Socket APIs
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Socket register group.
Socket register configures and control SOCKETn which is necessary to data communication.
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Macros | |
#define | Sn_MR(N) (_W5500_IO_BASE_ + (0x0000 << 8) + (WIZCHIP_SREG_BLOCK(N) << 3)) |
socket Mode register(R/W) More... | |
#define | Sn_CR(N) (_W5500_IO_BASE_ + (0x0001 << 8) + (WIZCHIP_SREG_BLOCK(N) << 3)) |
Socket command register(R/W) More... | |
#define | Sn_IR(N) (_W5500_IO_BASE_ + (0x0002 << 8) + (WIZCHIP_SREG_BLOCK(N) << 3)) |
Socket interrupt register(R) More... | |
#define | Sn_SR(N) (_W5500_IO_BASE_ + (0x0003 << 8) + (WIZCHIP_SREG_BLOCK(N) << 3)) |
Socket status register(R) More... | |
#define | Sn_PORT(N) (_W5500_IO_BASE_ + (0x0004 << 8) + (WIZCHIP_SREG_BLOCK(N) << 3)) |
source port register(R/W) More... | |
#define | Sn_DHAR(N) (_W5500_IO_BASE_ + (0x0006 << 8) + (WIZCHIP_SREG_BLOCK(N) << 3)) |
Peer MAC register address(R/W) More... | |
#define | Sn_DIPR(N) (_W5500_IO_BASE_ + (0x000C << 8) + (WIZCHIP_SREG_BLOCK(N) << 3)) |
Peer IP register address(R/W) More... | |
#define | Sn_DPORT(N) (_W5500_IO_BASE_ + (0x0010 << 8) + (WIZCHIP_SREG_BLOCK(N) << 3)) |
Peer port register address(R/W) More... | |
#define | Sn_MSSR(N) (_W5500_IO_BASE_ + (0x0012 << 8) + (WIZCHIP_SREG_BLOCK(N) << 3)) |
Maximum Segment Size(Sn_MSSR0) register address(R/W) More... | |
#define | Sn_TOS(N) (_W5500_IO_BASE_ + (0x0015 << 8) + (WIZCHIP_SREG_BLOCK(N) << 3)) |
IP Type of Service(TOS) Register(R/W) More... | |
#define | Sn_TTL(N) (_W5500_IO_BASE_ + (0x0016 << 8) + (WIZCHIP_SREG_BLOCK(N) << 3)) |
IP Time to live(TTL) Register(R/W) More... | |
#define | Sn_RXBUF_SIZE(N) (_W5500_IO_BASE_ + (0x001E << 8) + (WIZCHIP_SREG_BLOCK(N) << 3)) |
Receive memory size register(R/W) More... | |
#define | Sn_TXBUF_SIZE(N) (_W5500_IO_BASE_ + (0x001F << 8) + (WIZCHIP_SREG_BLOCK(N) << 3)) |
Transmit memory size register(R/W) More... | |
#define | Sn_TX_FSR(N) (_W5500_IO_BASE_ + (0x0020 << 8) + (WIZCHIP_SREG_BLOCK(N) << 3)) |
Transmit free memory size register(R) More... | |
#define | Sn_TX_RD(N) (_W5500_IO_BASE_ + (0x0022 << 8) + (WIZCHIP_SREG_BLOCK(N) << 3)) |
Transmit memory read pointer register address(R) More... | |
#define | Sn_TX_WR(N) (_W5500_IO_BASE_ + (0x0024 << 8) + (WIZCHIP_SREG_BLOCK(N) << 3)) |
Transmit memory write pointer register address(R/W) More... | |
#define | Sn_RX_RSR(N) (_W5500_IO_BASE_ + (0x0026 << 8) + (WIZCHIP_SREG_BLOCK(N) << 3)) |
Received data size register(R) More... | |
#define | Sn_RX_RD(N) (_W5500_IO_BASE_ + (0x0028 << 8) + (WIZCHIP_SREG_BLOCK(N) << 3)) |
Read point of Receive memory(R/W) More... | |
#define | Sn_RX_WR(N) (_W5500_IO_BASE_ + (0x002A << 8) + (WIZCHIP_SREG_BLOCK(N) << 3)) |
Write point of Receive memory(R) More... | |
#define | Sn_IMR(N) (_W5500_IO_BASE_ + (0x002C << 8) + (WIZCHIP_SREG_BLOCK(N) << 3)) |
socket interrupt mask register(R) More... | |
#define | Sn_FRAG(N) (_W5500_IO_BASE_ + (0x002D << 8) + (WIZCHIP_SREG_BLOCK(N) << 3)) |
Fragment field value in IP header register(R/W) More... | |
#define | Sn_KPALVTR(N) (_W5500_IO_BASE_ + (0x002F << 8) + (WIZCHIP_SREG_BLOCK(N) << 3)) |
Keep Alive Timer register(R/W) More... | |
Socket register group.
Socket register configures and control SOCKETn which is necessary to data communication.
#define Sn_MR | ( | N) | (_W5500_IO_BASE_ + (0x0000 << 8) + (WIZCHIP_SREG_BLOCK(N) << 3)) |
socket Mode register(R/W)
Sn_MR configures the option or protocol type of Socket n.
Each bit of Sn_MR defined as the following.
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
MULTI/MFEN | BCASTB | ND/MC/MMB | UCASTB/MIP6B | Protocol[3] | Protocol[2] | Protocol[1] | Protocol[0] |
Protocol[3] | Protocol[2] | Protocol[1] | Protocol[0] | Meaning |
0 | 0 | 0 | 0 | Closed |
0 | 0 | 0 | 1 | TCP |
0 | 0 | 1 | 0 | UDP |
0 | 1 | 0 | 0 | MACRAW |
#define Sn_CR | ( | N) | (_W5500_IO_BASE_ + (0x0001 << 8) + (WIZCHIP_SREG_BLOCK(N) << 3)) |
Socket command register(R/W)
This is used to set the command for Socket n such as OPEN, CLOSE, CONNECT, LISTEN, SEND, and RECEIVE.
After W5500 accepts the command, the Sn_CR register is automatically cleared to 0x00. Even though Sn_CR is cleared to 0x00, the command is still being processed.
To check whether the command is completed or not, please check the Sn_IR or Sn_SR.
#define Sn_IR | ( | N) | (_W5500_IO_BASE_ + (0x0002 << 8) + (WIZCHIP_SREG_BLOCK(N) << 3)) |
Socket interrupt register(R)
Sn_IR indicates the status of Socket Interrupt such as establishment, termination, receiving data, timeout).
When an interrupt occurs and the corresponding bit of Sn_IMR is the corresponding bit of Sn_IR becomes
In order to clear the Sn_IR bit, the host should write the bit to
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
Reserved | Reserved | Reserved | SEND_OK | TIMEOUT | RECV | DISCON | CON |
#define Sn_SR | ( | N) | (_W5500_IO_BASE_ + (0x0003 << 8) + (WIZCHIP_SREG_BLOCK(N) << 3)) |
Socket status register(R)
Sn_SR indicates the status of Socket n.
The status of Socket n is changed by Sn_CR or some special control packet as SYN, FIN packet in TCP.
#define Sn_PORT | ( | N) | (_W5500_IO_BASE_ + (0x0004 << 8) + (WIZCHIP_SREG_BLOCK(N) << 3)) |
#define Sn_DHAR | ( | N) | (_W5500_IO_BASE_ + (0x0006 << 8) + (WIZCHIP_SREG_BLOCK(N) << 3)) |
#define Sn_DIPR | ( | N) | (_W5500_IO_BASE_ + (0x000C << 8) + (WIZCHIP_SREG_BLOCK(N) << 3)) |
Peer IP register address(R/W)
Sn_DIPR configures or indicates the destination IP address of Socket n. It is valid when Socket n is used in TCP/UDP mode. In TCP client mode, it configures an IP address of �TCP serverbefore CONNECT command. In TCP server mode, it indicates an IP address of �TCP clientafter successfully establishing connection. In UDP mode, it configures an IP address of peer to be received the UDP packet by SEND or SEND_MAC command.
#define Sn_DPORT | ( | N) | (_W5500_IO_BASE_ + (0x0010 << 8) + (WIZCHIP_SREG_BLOCK(N) << 3)) |
Peer port register address(R/W)
Sn_DPORT configures or indicates the destination port number of Socket n. It is valid when Socket n is used in TCP/UDP mode. In �TCP clientmode, it configures the listen port number of �TCP serverbefore CONNECT command. In �TCP Servermode, it indicates the port number of TCP client after successfully establishing connection. In UDP mode, it configures the port number of peer to be transmitted the UDP packet by SEND/SEND_MAC command.
#define Sn_MSSR | ( | N) | (_W5500_IO_BASE_ + (0x0012 << 8) + (WIZCHIP_SREG_BLOCK(N) << 3)) |
#define Sn_TOS | ( | N) | (_W5500_IO_BASE_ + (0x0015 << 8) + (WIZCHIP_SREG_BLOCK(N) << 3)) |
#define Sn_TTL | ( | N) | (_W5500_IO_BASE_ + (0x0016 << 8) + (WIZCHIP_SREG_BLOCK(N) << 3)) |
#define Sn_RXBUF_SIZE | ( | N) | (_W5500_IO_BASE_ + (0x001E << 8) + (WIZCHIP_SREG_BLOCK(N) << 3)) |
Receive memory size register(R/W)
Sn_RXBUF_SIZE configures the RX buffer block size of Socket n. Socket n RX Buffer Block size can be configured with 1,2,4,8, and 16 Kbytes. If a different size is configured, the data cannot be normally received from a peer. Although Socket n RX Buffer Block size is initially configured to 2Kbytes, user can re-configure its size using Sn_RXBUF_SIZE. The total sum of Sn_RXBUF_SIZE can not be exceed 16Kbytes. When exceeded, the data reception error is occurred.
#define Sn_TXBUF_SIZE | ( | N) | (_W5500_IO_BASE_ + (0x001F << 8) + (WIZCHIP_SREG_BLOCK(N) << 3)) |
Transmit memory size register(R/W)
Sn_TXBUF_SIZE configures the TX buffer block size of Socket n. Socket n TX Buffer Block size can be configured with 1,2,4,8, and 16 Kbytes. If a different size is configured, the data can�t be normally transmitted to a peer. Although Socket n TX Buffer Block size is initially configured to 2Kbytes, user can be re-configure its size using Sn_TXBUF_SIZE. The total sum of Sn_TXBUF_SIZE can not be exceed 16Kbytes. When exceeded, the data transmission error is occurred.
#define Sn_TX_FSR | ( | N) | (_W5500_IO_BASE_ + (0x0020 << 8) + (WIZCHIP_SREG_BLOCK(N) << 3)) |
Transmit free memory size register(R)
Sn_TX_FSR indicates the free size of Socket n TX Buffer Block. It is initialized to the configured size by Sn_TXBUF_SIZE. Data bigger than Sn_TX_FSR should not be saved in the Socket n TX Buffer because the bigger data overwrites the previous saved data not yet sent. Therefore, check before saving the data to the Socket n TX Buffer, and if data is equal or smaller than its checked size, transmit the data with SEND/SEND_MAC command after saving the data in Socket n TX buffer. But, if data is bigger than its checked size, transmit the data after dividing into the checked size and saving in the Socket n TX buffer.
Definition at line 582 of file w5500.h.
Referenced by getSn_TX_FSR().
#define Sn_TX_RD | ( | N) | (_W5500_IO_BASE_ + (0x0022 << 8) + (WIZCHIP_SREG_BLOCK(N) << 3)) |
Transmit memory read pointer register address(R)
Sn_TX_RD is initialized by OPEN command. However, if Sn_MR(P[3:0]) is TCP mode(001, it is re-initialized while connecting with TCP. After its initialization, it is auto-increased by SEND command. SEND command transmits the saved data from the current Sn_TX_RD to the Sn_TX_WR in the Socket n TX Buffer. After transmitting the saved data, the SEND command increases the Sn_TX_RD as same as the Sn_TX_WR. If its increment value exceeds the maximum value 0xFFFF, (greater than 0x10000 and the carry bit occurs), then the carry bit is ignored and will automatically update with the lower 16bits value.
#define Sn_TX_WR | ( | N) | (_W5500_IO_BASE_ + (0x0024 << 8) + (WIZCHIP_SREG_BLOCK(N) << 3)) |
Transmit memory write pointer register address(R/W)
Sn_TX_WR is initialized by OPEN command. However, if Sn_MR(P[3:0]) is TCP mode(001, it is re-initialized while connecting with TCP.
It should be read or be updated like as follows.
#define Sn_RX_RSR | ( | N) | (_W5500_IO_BASE_ + (0x0026 << 8) + (WIZCHIP_SREG_BLOCK(N) << 3)) |
Received data size register(R)
Sn_RX_RSR indicates the data size received and saved in Socket n RX Buffer. Sn_RX_RSR does not exceed the Sn_RXBUF_SIZE and is calculated as the difference between �Socket n RX Write Pointer (Sn_RX_WR)and �Socket n RX Read Pointer (Sn_RX_RD)
Definition at line 617 of file w5500.h.
Referenced by getSn_RX_RSR().
#define Sn_RX_RD | ( | N) | (_W5500_IO_BASE_ + (0x0028 << 8) + (WIZCHIP_SREG_BLOCK(N) << 3)) |
Read point of Receive memory(R/W)
Sn_RX_RD is initialized by OPEN command. Make sure to be read or updated as follows.
#define Sn_RX_WR | ( | N) | (_W5500_IO_BASE_ + (0x002A << 8) + (WIZCHIP_SREG_BLOCK(N) << 3)) |
Write point of Receive memory(R)
Sn_RX_WR is initialized by OPEN command and it is auto-increased by the data reception. If the increased value exceeds the maximum value 0xFFFF, (greater than 0x10000 and the carry bit occurs), then the carry bit is ignored and will automatically update with the lower 16bits value.
#define Sn_IMR | ( | N) | (_W5500_IO_BASE_ + (0x002C << 8) + (WIZCHIP_SREG_BLOCK(N) << 3)) |
socket interrupt mask register(R)
Sn_IMR masks the interrupt of Socket n. Each bit corresponds to each bit of Sn_IR. When a Socket n Interrupt is occurred and the corresponding bit of Sn_IMR is the corresponding bit of Sn_IR becomes When both the corresponding bit of Sn_IMR and Sn_IR are and the n-th bit of IR is Host is interrupted by asserted INTn PIN to low.
#define Sn_FRAG | ( | N) | (_W5500_IO_BASE_ + (0x002D << 8) + (WIZCHIP_SREG_BLOCK(N) << 3)) |
#define Sn_KPALVTR | ( | N) | (_W5500_IO_BASE_ + (0x002F << 8) + (WIZCHIP_SREG_BLOCK(N) << 3)) |
Keep Alive Timer register(R/W)
Sn_KPALVTR configures the transmitting timer of �KEEP ALIVE(KA)packet of SOCKETn. It is valid only in TCP mode, and ignored in other modes. The time unit is 5s. KA packet is transmittable after Sn_SR is changed to SOCK_ESTABLISHED and after the data is transmitted or received to/from a peer at least once. In case of 'Sn_KPALVTR > 0', W5500 automatically transmits KA packet after time-period for checking the TCP connection (Auto-keepalive-process). In case of 'Sn_KPALVTR = 0', Auto-keep-alive-process will not operate, and KA packet can be transmitted by SEND_KEEP command by the host (Manual-keep-alive-process). Manual-keep-alive-process is ignored in case of 'Sn_KPALVTR > 0'.