/**
  ******************************************************************************
  * @file    stm32f0xx_it.c
  * @brief   Interrupt Service Routines.
  ******************************************************************************
  *
  * COPYRIGHT(c) 2018 STMicroelectronics
  *
  * Redistribution and use in source and binary forms, with or without modification,
  * are permitted provided that the following conditions are met:
  *   1. Redistributions of source code must retain the above copyright notice,
  *      this list of conditions and the following disclaimer.
  *   2. Redistributions in binary form must reproduce the above copyright notice,
  *      this list of conditions and the following disclaimer in the documentation
  *      and/or other materials provided with the distribution.
  *   3. Neither the name of STMicroelectronics nor the names of its contributors
  *      may be used to endorse or promote products derived from this software
  *      without specific prior written permission.
  *
  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  *
  ******************************************************************************
  */
/* Includes ------------------------------------------------------------------*/
#include "stm32f0xx_hal.h"
#include "stm32f0xx.h"
#include "stm32f0xx_it.h"

/* USER CODE BEGIN 0 */
#include "functions.h"
/* USER CODE END 0 */

/* External variables --------------------------------------------------------*/

/******************************************************************************/
/*            Cortex-M0 Processor Interruption and Exception Handlers         */ 
/******************************************************************************/

/**
* @brief This function handles Non maskable interrupt.
*/
void NMI_Handler(void)
{
  /* USER CODE BEGIN NonMaskableInt_IRQn 0 */

  /* USER CODE END NonMaskableInt_IRQn 0 */
  /* USER CODE BEGIN NonMaskableInt_IRQn 1 */

  /* USER CODE END NonMaskableInt_IRQn 1 */
}

/**
* @brief This function handles Hard fault interrupt.
*/
void HardFault_Handler(void)
{
  /* USER CODE BEGIN HardFault_IRQn 0 */

  /* USER CODE END HardFault_IRQn 0 */
  while (1)
  {
    /* USER CODE BEGIN W1_HardFault_IRQn 0 */
    /* USER CODE END W1_HardFault_IRQn 0 */
  }
  /* USER CODE BEGIN HardFault_IRQn 1 */

  /* USER CODE END HardFault_IRQn 1 */
}

/**
* @brief This function handles System service call via SWI instruction.
*/
void SVC_Handler(void)
{
  /* USER CODE BEGIN SVC_IRQn 0 */

  /* USER CODE END SVC_IRQn 0 */
  /* USER CODE BEGIN SVC_IRQn 1 */

  /* USER CODE END SVC_IRQn 1 */
}

/**
* @brief This function handles Pendable request for system service.
*/
void PendSV_Handler(void)
{
  /* USER CODE BEGIN PendSV_IRQn 0 */
  SCB->ICSR=SCB_ICSR_PENDSVCLR_Msk; //1<<SCB_ICSR_PENDSVCLR_Pos;
//	NVIC_ClearPendingIRQ(PendSV_IRQn);	
//	NVIC_DisableIRQ(PendSV_IRQn);
	PendSvCallBack();
  /* USER CODE END PendSV_IRQn 0 */
  /* USER CODE BEGIN PendSV_IRQn 1 */

  /* USER CODE END PendSV_IRQn 1 */
}

/**
* @brief This function handles System tick timer.
*/
void SysTick_Handler(void)
{
  /* USER CODE BEGIN SysTick_IRQn 0 */

  /* USER CODE END SysTick_IRQn 0 */
  HAL_IncTick();
  HAL_SYSTICK_IRQHandler();
  /* USER CODE BEGIN SysTick_IRQn 1 */

  /* USER CODE END SysTick_IRQn 1 */
}

/******************************************************************************/
/* STM32F0xx Peripheral Interrupt Handlers                                    */
/* Add here the Interrupt Handlers for the used peripherals.                  */
/* For the available peripheral interrupt handler names,                      */
/* please refer to the startup file (startup_stm32f0xx.s).                    */
/******************************************************************************/
/**
  * @brief This function handles TIM6 global interrupt.
  */
void TIM6_IRQHandler(void)
{
  /* USER CODE BEGIN TIM6_IRQn 0 */
	if (LL_TIM_IsActiveFlag_UPDATE(TIM6)) {	LL_TIM_ClearFlag_UPDATE(TIM6);}
	
//		KMem.SDD[46]+=1000;
//	  KMem.SDT[93] = LL_TIM_GetCounter(TIM6);
  /* USER CODE END TIM6_IRQn 0 */
  /* USER CODE BEGIN TIM6_IRQn 1 */

  /* USER CODE END TIM6_IRQn 1 */
}

/**
* @brief This function handles DMA1 channel 2 and 3 interrupts.
*/
void DMA1_Channel2_3_IRQHandler(void)
{
  /* USER CODE BEGIN DMA1_Channel2_3_IRQn 0 */
	if (LL_DMA_IsActiveFlag_TC2(DMA1))
	{

		LL_DMA_ClearFlag_TC2(DMA1);

	}
  /* USER CODE END DMA1_Channel2_3_IRQn 0 */
  
  /* USER CODE BEGIN DMA1_Channel2_3_IRQn 1 */
	if (LL_DMA_IsActiveFlag_TC3(DMA1))
	{
		LL_DMA_ClearFlag_TC3(DMA1);

	}
  /* USER CODE END DMA1_Channel2_3_IRQn 1 */
}

void DMA1_Channel4_5_IRQHandler(void)
{
  /* USER CODE BEGIN DMA1_Channel4_5_IRQn 0 */
	if (LL_DMA_IsActiveFlag_TC4(DMA1))
	{
		LL_DMA_ClearFlag_TC4(DMA1);
/*		
		Uart2Stat.SendBytes+=Uart2Stat.DMASendLen;
		DelData(&Uart2Stat.QTx,Uart2Stat.DMASendLen);

		
		if (!IsEmpty(&Uart2Stat.QTx))
		{
			int len1=GetContinueData(&Uart2Stat.QTx);
//			if (len1>128) len1=128;			
			LL_DMA_DisableChannel(DMA1,LL_DMA_CHANNEL_4);		
			LL_DMA_SetMemoryAddress(DMA1,LL_DMA_CHANNEL_4,(uint32_t)GetReadBuffer(&Uart2Stat.QTx));
			LL_DMA_SetDataLength(DMA1,LL_DMA_CHANNEL_4,len1);
			LL_DMA_EnableChannel(DMA1,LL_DMA_CHANNEL_4);
			Uart2Stat.DMASendLen=len1;
			LL_USART_EnableDMAReq_TX(USART2);
		}
		else
*/		
	}
  /* USER CODE END DMA1_Channel4_5_IRQn 0 */
  
  /* USER CODE BEGIN DMA1_Channel4_5_IRQn 1 */
	if (LL_DMA_IsActiveFlag_TC5(DMA1))
	{
		LL_DMA_ClearFlag_TC5(DMA1);
	}
  /* USER CODE END DMA1_Channel4_5_IRQn 1 */
}

void SPI1_IRQHandler(void)
{
  /* USER CODE BEGIN SPI1_IRQn 0 */
	SPI1_IRQ_CallBack();
  /* USER CODE END SPI1_IRQn 0 */
  /* USER CODE BEGIN SPI1_IRQn 1 */

  /* USER CODE END SPI1_IRQn 1 */
}

/**
* @brief This function handles USART1 global interrupt.
*/
void USART1_IRQHandler(void)
{
  /* USER CODE BEGIN USART1_IRQn 0 */
//	LL_GPIO_TogglePin(GPIOB,LL_GPIO_PIN_7);

	if (LL_USART_IsActiveFlag_RXNE(USART1))
	{
		unsigned char ch=LL_USART_ReceiveData8(USART1);
	}
	if (LL_USART_IsActiveFlag_ORE(USART1))
	{
		LL_USART_ClearFlag_ORE(USART1);
	}
	if (LL_USART_IsEnabledIT_IDLE(USART1)&&LL_USART_IsActiveFlag_IDLE(USART1))
	{//接收完成
		LL_USART_ClearFlag_IDLE(USART1);
		Uart1RecvDone();
	}	
  /* USER CODE END USART1_IRQn 0 */
  /* USER CODE BEGIN USART1_IRQn 1 */
	if (LL_USART_IsActiveFlag_TC(USART1))
	{//发送完成
		LL_USART_ClearFlag_TC(USART1);
		Uart1SendDone();
	}	
  /* USER CODE END USART1_IRQn 1 */
}

void USART2_IRQHandler(void)
{
  /* USER CODE BEGIN USART2_IRQn 0 */
//	LL_GPIO_TogglePin(GPIOB,LL_GPIO_PIN_7);

	if (LL_USART_IsActiveFlag_RXNE(USART2))
	{
		unsigned char ch=LL_USART_ReceiveData8(USART2);
		//LL_USART_TransmitData8(USART2,ch);
	}
	if (LL_USART_IsActiveFlag_ORE(USART2))
	{
		LL_USART_ClearFlag_ORE(USART2);
	}
	if (LL_USART_IsEnabledIT_IDLE(USART2)&&LL_USART_IsActiveFlag_IDLE(USART2))
	{//接收完成
		LL_USART_ClearFlag_IDLE(USART2);
		Uart2RecvDone();
	}	
  /* USER CODE END USART2_IRQn 0 */
  /* USER CODE BEGIN USART2_IRQn 1 */
	if (LL_USART_IsActiveFlag_TC(USART2))
	{//发送完成
		LL_USART_ClearFlag_TC(USART2);
		Uart2SendDone();
	}	
  /* USER CODE END USART2_IRQn 1 */
}

/* USER CODE BEGIN 1 */

/* USER CODE END 1 */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/