From a7db3c8485547ec1c6b07c59b2aacc4a45249cfa Mon Sep 17 00:00:00 2001
From: QuakeGod <QuakeGod@sina.com>
Date: 星期一, 17 十月 2022 01:50:48 +0800
Subject: [PATCH] arrange Klink Knet FP0 Radio and merge together

---
 Inc/BSP.h                              |    5 
 Src/GlobalDef.c                        |   10 
 .gitignore                             |    3 
 Inc/debug.h                            |   23 
 Src/KMachine.c                         |  395 +
 w5500_socket_apis_v103.zip             |    0 
 Inc/KMachine.h                         |  348 +
 Src/Ethernet/loopback.c                |  225 
 Src/PLCfunctions.c                     |  870 ++-
 Inc/ModbusRTU.h                        |   87 
 Src/KLink.c                            |  221 
 MDK-ARM/JLinkLog.txt                   | 1760 -------
 MDK-ARM/F030C8T6_Test2.uvguix.QuakeGod |  599 +-
 Inc/GlobalDef.h                        |   19 
 Inc/w5500_port.h                       |   38 
 Src/Internet/DHCP/dhcp.c               |  976 ++++
 Src/Ethernet/loopback.h                |   38 
 Src/system_stm32f0xx.c                 |    4 
 Inc/main.h                             |    1 
 Src/Internet/DHCP/dhcp.h               |  152 
 Src/Ethernet/socket.h                  |  466 +
 Src/KBus.c                             |  255 
 Src/Internet/DNS/dns.c                 |  563 ++
 Inc/KBus.h                             |   33 
 Inc/functions.h                        |   14 
 Src/Ethernet/wizchip_conf.c            |  636 ++
 Inc/PLCfunctions.h                     |  220 
 Src/Internet/DNS/dns.h                 |  101 
 Src/w5500_port.c                       |  348 +
 Inc/stm32f0xx_it.h                     |    2 
 Src/Ethernet/socket.c                  |  688 ++
 Src/functions.c                        |  347 +
 MDK-ARM/F030C8T6_Test2.uvprojx         |   57 
 Src/Ethernet/wizchip_conf.h            |  548 ++
 iolibrary_bsd_internet_v111.zip        |    0 
 Src/debug.c                            |  307 +
 Src/BSP.c                              |  182 
 Src/Ethernet/W5500/w5500.c             |  367 +
 Src/main.c                             |  666 -
 iolibrary_bsd_ethernet_v103.zip        |    0 
 MDK-ARM/F030C8T6_Test2.uvoptx          |  222 
 Src/Ethernet/W5500/w5500.h             | 2054 ++++++++
 Inc/KLink.h                            |   84 
 Src/stm32f0xx_it.c                     |   53 
 Src/ModbusRTU.c                        |  312 +
 45 files changed, 11,011 insertions(+), 3,288 deletions(-)

diff --git a/.gitignore b/.gitignore
index c9355c1..bd0008a 100644
--- a/.gitignore
+++ b/.gitignore
@@ -1,4 +1,7 @@
 Thumbs.db
 *.TMP
 MDK-ARM/F030C8T6_Test2/*
+MDK-ARM/*.uvguix.*
+MDK-ARM/*.uvoptx
+MDK-ARM/JLinkLog.txt
 
diff --git a/Inc/BSP.h b/Inc/BSP.h
index 6a5d3ab..49069d9 100644
--- a/Inc/BSP.h
+++ b/Inc/BSP.h
@@ -1,12 +1,13 @@
 /* Define to prevent recursive inclusion -------------------------------------*/
 #ifndef __BSP_H__
 #define __BSP_H__
+
+#include "stm32f0xx_ll_rcc.h"
 #include "stm32f0xx_ll_adc.h"
 #include "stm32f0xx_ll_crc.h"
 #include "stm32f0xx_ll_dma.h"
 #include "stm32f0xx_ll_spi.h"
 #include "stm32f0xx_ll_usart.h"
-#include "stm32f0xx_ll_rcc.h"
 #include "stm32f0xx_ll_system.h"
 #include "stm32f0xx_ll_gpio.h"
 #include "stm32f0xx_ll_exti.h"
@@ -14,6 +15,7 @@
 #include "stm32f0xx_ll_cortex.h"
 #include "stm32f0xx_ll_utils.h"
 #include "stm32f0xx_ll_pwr.h"
+#include "stm32f0xx_ll_tim.h"
 
 void SystemClock_Config(void);
 void MX_IWDG_Init(void);
@@ -21,6 +23,7 @@
 void MX_DMA_Init(void);
 void MX_USART1_UART_Init(void);
 void MX_USART2_UART_Init(void);
+void MX_TIM6_Init(void);
 void MX_SPI1_Init(void);
 void MX_SPI2_Init(void);
 
diff --git a/Inc/GlobalDef.h b/Inc/GlobalDef.h
index b9c380f..03f09b6 100644
--- a/Inc/GlobalDef.h
+++ b/Inc/GlobalDef.h
@@ -16,7 +16,10 @@
 	4  //New Master 16 in16 out V1.2
 	5  //Slave 8 in 8 out V1.2
 */
-#define XLAT_FREQ 12
+
+
+#define DefaultUart1Baud 230400
+#define DefaultUart2Baud 1000000
 
 enum enBOARD_TYPE
 {
@@ -33,12 +36,19 @@
 	BOARD_V42_SLAVE,		//10	New V4.2 Slave 8 in 8 o	
 	
 	BOARD_V30_MINI	=11,		//11  Mini Board
+	
+	BOARD_V45_NET = 13,
+
+	BOARD_EXT_FP0 = 14,
+	
+	BOARD_V50_RADIO = 15, 
 };
 
-#define BOARD_TYPE 11
+#define BOARD_TYPE 9
+#define XLAT_FREQ 8
 
 
-extern int GetBoardType(void);
+#define GetBoardType() (BOARD_TYPE)
 
 extern volatile int PendSvCount;
 
@@ -76,7 +86,6 @@
 extern stUartStat Uart1Stat;
 extern stUartStat Uart2Stat;
 
-extern const unsigned int DefaultUart1Baud;
 extern unsigned int Uart1Baud;
 extern unsigned int Uart2Baud;
 
@@ -101,7 +110,7 @@
 struct stSysConfig{
 	int bInited:1;
 	int bConfiged:1;
-	int bMaster:1;
+	int bKBusMaster:1;
 };
 
 
diff --git a/Inc/KBus.h b/Inc/KBus.h
index 3e17746..3436a55 100644
--- a/Inc/KBus.h
+++ b/Inc/KBus.h
@@ -11,7 +11,7 @@
 #define __KBUS_H__
 typedef unsigned char uchar;
 
-extern int bMaster,bSlave;
+extern unsigned char bKBusMaster,bKBusSlave,bKBusRepeater;;
 	enum enCMDs
 	{
 		cmdNone = '0',		//Nothing
@@ -43,14 +43,15 @@
 
 extern unsigned char BufferIn[16];
 extern unsigned char BufferOut[16];
-extern int nAddr;
-extern int nChilds;
+extern unsigned char nAddr;
+extern unsigned char nChilds;
 extern int ChildStat[16];
-extern int nCurPollId;
-extern int nSeq;
+extern unsigned char nCurPollId;
+extern unsigned char nSeq;
 
-extern int MasterRecved;
-extern volatile int SlaveRecved;
+extern volatile unsigned char MasterRecved;
+extern volatile unsigned char MasterRecvOK;
+extern volatile unsigned char SlaveRecved;
 extern unsigned int SendTimeuS;
 extern volatile int RecvTimeuS;
 extern int DelayuS;
@@ -142,6 +143,7 @@
 		};
 	};
 } stChnStat;
+
 extern stChnStat ChnStats[8];
 
 typedef struct tagSlaveStat
@@ -189,7 +191,7 @@
 typedef struct tagPacket
 	{
 		unsigned char Sign;		//起始标记		
-		unsigned char DstAddr;	//目标地址
+		unsigned char DstHost;	//目标地址
 		unsigned char SrcAddr;	//源地址
 		unsigned char nCMD;		//命令
 		unsigned char nSEQ;		//序列号
@@ -204,20 +206,20 @@
 	S_TIMEOUT=2
 
 }	;
+
 unsigned char BCC(void * pData, int nSize);
 //
-
 	/* Make a Packet and return Packet Length */
 int MakePacket(pPacket p1,uchar Src, uchar Dst, uchar nType, uchar nSEQ, uchar DataLen, void *pData );
 
 /*   */
-int CheckPacket(pPacket p1,int len1);
+int CheckPacket(int nChn, pPacket p1, int len1);
 
 /* */
-int ParsePacket(pPacket p1, int Len1);
+int ParsePacket(int nChn, pPacket p1, int Len1);
 typedef struct tagMachineConfig
 {
-	int bMaster;
+	int bKBusMaster;
 	int nAddr;
 }stMachineConfig;
 
@@ -237,10 +239,9 @@
 
 int GetStat(void);
 
-
-
-	
-
+int KBusRepeaterFunc(int nChn);
+int KBusMasterFunc(int nChn);
+int KBusSlaveFunc(int nChn);
 
 #endif	/* __KBUS_H__ */
 
diff --git a/Inc/KLink.h b/Inc/KLink.h
index ea4bd0e..edf976c 100644
--- a/Inc/KLink.h
+++ b/Inc/KLink.h
@@ -28,8 +28,8 @@
 	
 }	;
 
-enum {KLSignStart='%',
-			KLSignReply='U',
+enum {KLSignStart='%',	//0x25
+			KLSignReply='U',	//0x55
 			KLSignEnd=0x0D,
 			KLMaxPacketLength=64,
 };
@@ -61,7 +61,9 @@
 		KLCmdSetPass,
 		KLCmdEraseAll,
 		KLCmdReadProgram,
+		KLCmdStartProgram,
 		KLCmdWriteProgram,
+		KLCmdFinishProgram,
 
 		KLCmdRead1Bit = 0x21,				//ReadSingleBit
 		KLCmdWrite1Bit = 0x22,				//WriteSingleBit
@@ -90,6 +92,7 @@
 		KLCmdWriteSysCfg,
 		KLCmdSaveSysCfg,
 		KLCmdSaveRunStat,
+		KLCmdReadRunStat,
 		
 		KLCmdEraseFlashPage = 0x61,
 		KLCmdWriteToFlash = 0x62,
@@ -102,8 +105,11 @@
 		KLCmdResetMachine,
 		KLCmdGetUid,
 		KLCmdSetTime,
-		
-		KLCmdMC,
+		KLCmdGetSN,
+		KLCmdReadFactData,
+		KLCmdWriteFactData,
+
+		KLCmdMC = 0x70, 		
 		KLCmdMD,
 		KLCmdMG,
 		
@@ -119,56 +125,6 @@
 		KLInfoTypeEventLogCount = 3,
 	};
 	
-	enum enKLCoilTypes
-	{
-		KLCoilTypeX = 0,		//X Input
-		KLCoilTypeY = 1,		//Y Output
-		KLCoilTypeR = 2,		//R register
-		KLCoilTypeLX = 3,		//Link register
-		KLCoilTypeLY = 4,		//Link register
-		KLCoilTypeT = 5,		//Timer
-		KLCoilTypeC = 5,		//Counter
-		KLCoilTypeLR = 6,		//Link register
-
-	};
-	enum enKLDataTypes
-	{
-		KLDataTypeWX = 0,
-		KLDataTypeWY = 1,
-		KLDataTypeWR = 2,
-		KLDataTypeWLX = 3,
-		KLDataTypeWLY = 4,
-		KLDataTypeDT = 5,
-		KLDataTypeSDT = 6,
-		KLDataTypeWSR = 7,
-		KLDataTypeSV = 8,
-		KLDataTypeEV = 9,
-		KLDataTypeLD = 10,
-		
-		KLDataSysCfg = 25, 
-		KLDataTypeFlash = 33 ,
-		
-		KLDataTypeTest = 254,
-	};
-enum enKLDataCounts
-{
-	KLCoilXCount=256,
-	KLCoilYCount=256,
-	KLCoilRCount=256,
-	KLCoilTCount=64,
-	KLCoilCCount=64,
-	KLCoilLCount=128,
-	KLDataDTCount = 256,
-	KLDataSDTCount = 256,
-	KLDataWXCount = 16,
-	KLDataWYCount = 16,
-	KLDataWRCount = 16,
-	KLDataSVCount = 64,
-	KLDataEVCount = 64,
-	KLDataLDCount = 64,
-	KLDataWLCount = 8,
-}; 
-
 extern unsigned char KLPacketBuf1[256];
 extern unsigned char KLPacketBuf2[256];
 
@@ -204,7 +160,7 @@
 typedef struct tagKLReqPktHdr
 {
 	unsigned char ReqStSgn;		//
-	unsigned char DstAddr;		//
+	unsigned char DstHost;		//
 	unsigned char Stat;				//
 	unsigned char nCMD;				//
 	unsigned char nType1;			//
@@ -214,7 +170,7 @@
 typedef struct tagKLPingReqPkt
 {
 	unsigned char ReqStSgn;		//
-	unsigned char DstAddr;		//
+	unsigned char DstHost;		//
 	unsigned char nCMD;				//
 	unsigned char nSize;			//
 	
@@ -223,7 +179,7 @@
 typedef struct tagKLRplyPktHdr
 {
 	unsigned char RplyStSgn;	//
-	unsigned char DstAddr;		//
+	unsigned char DstHost;		//
 	unsigned char nStatus;		//	
 	unsigned char nRplyCMD;		//
 	unsigned char nSize1;			//
@@ -235,7 +191,7 @@
 {
 		unsigned char StSign;		//起始标记
 		unsigned char SrcAddr;	//源地址
-		unsigned char DstAddr;	//目标地址
+		unsigned char DstHost;	//目标地址
 		unsigned char nCMD;		//命令
 	
 }stKLPtHdr, * pKLPktHdr;
@@ -245,7 +201,7 @@
 {
 		unsigned char StSign;		//起始标记		
 		unsigned char SrcAddr;	//源地址
-		unsigned char DstAddr;	//目标地址
+		unsigned char DstHost;	//目标地址
 		unsigned char nCMD;		//命令
 		unsigned char nType;
 		unsigned char nAddr;	//
@@ -256,7 +212,7 @@
 	{
 		unsigned char StSign;		//起始标记		
 		unsigned char SrcAddr;	//源地址
-		unsigned char DstAddr;	//目标地址
+		unsigned char DstHost;	//目标地址
 		unsigned char nCMD;		//命令
 		unsigned char nSEQ;		//序列号
 		unsigned char LoadLen;	//数据载荷长度	不包括头部5个字节，不包括尾部BCC。
@@ -264,18 +220,18 @@
 	}stKLPacket,* pKLPacket;	
 */
 
-unsigned char KLBCC(void * pData, int nSize);
+unsigned char KLBCC(const void * pData, int nSize);
 //
 
 	/* Make a Packet and return Packet Length */
 int KLMakeReqPacket(void * pBuf1,uchar Src, uchar Dst, uchar nType, uchar nSEQ, uchar DataLen, void *pData );
-int KLMakeRplyPacket(void * pBuf1, uchar Dst, uchar Status, uchar nCmd, uchar DataLen, void *pData );
+int KLMakeRplyPacket(void * pBuf1, uchar Dst, uchar Status, uchar nCmd, uchar DataLen, const void *pData );
 
 /*   */
-int KLCheckPacket(void * pBuf1,int len1);
+int KLCheckPacket(int nChn, void * pBuf1, int len1);
 
 /* */
-int KLParsePacket(void * pBuf1, int Len1);
+int KLParsePacket(int nChn, void * pBuf1, int Len1);
 
 //int ReadData(void);
 
diff --git a/Inc/KMachine.h b/Inc/KMachine.h
index 72a5daf..64545c7 100644
--- a/Inc/KMachine.h
+++ b/Inc/KMachine.h
@@ -16,7 +16,7 @@
 #define STORE_PRG_PAGESIZE (0x00000400)							//Page Size = 1K
 #define STORE_PRG_PAGES 4													//use 4 pages
 
-#define ALT_PRG_BASE (FLASH_BASE + 0x00009000)		//36k //and FLASH_BANK1_END
+#define ALT_PRG_BASE (FLASH_BASE + 0x0000A000)		//36k //and FLASH_BANK1_END
 #define ALT_PRG_PAGESIZE (0x00000400)							//Page Size = 1K
 #define ALT_PRG_PAGES 4													//use 4 pages
 
@@ -24,7 +24,7 @@
 #define STORE_SYSREG_PAGESIZE (0x00000400)							//Page Size = 1K
 #define STORE_SYSREG_PAGES 1														//use 1 pages
 
-#define STORE_RUNSTAT_BASE (FLASH_BASE + 0x0000B000)		//44k K //and 
+#define STORE_RUNSTAT_BASE (FLASH_BASE + 0x0000A800)		//44k K //and 
 #define STORE_RUNSTAT_PAGESIZE (0x00000400)							//Page Size = 1K
 #define STORE_RUNSTAT_PAGES 1														//use 1 pages
 
@@ -32,6 +32,7 @@
 #define STORE_LOG_BASE (FLASH_BASE + 0x0000C000)		//48k and FLASH_BANK1_END
 #define STORE_LOG_PAGESIZE (0x00000400)							//Page Size = 1K
 #define STORE_LOG_PAGES 4														//use 4 pages
+
 
 typedef unsigned char uchar;
 typedef unsigned char UCHAR;
@@ -42,8 +43,38 @@
 typedef unsigned short WORD;
 typedef unsigned char BYTE;
 
+#define LoBofW(x) ((x)&0xff)
+#define HiBofW(x) (((x)>>8)&0xff)
+
+#define LoHofB(x) ((x)&0xf)
+#define HiHofB(x) (((x)>>4)&0xf)
+
+//  信息块
+//  工厂参数配置块
+//  用户/系统参数配置块
+//  
+//
+
+typedef struct tagInfoBlock
+{
+	USHORT nDeviceType;
+	USHORT ProgVer;
+	USHORT KLinkVer;
+	USHORT nCapacity;
+	UCHAR nDInput;
+	UCHAR nDOutput;
+	UCHAR nAInput;
+	UCHAR nAOutput;
+	UCHAR nHInput;
+	UCHAR nHOutput;
+	UCHAR nExt1;
+	UCHAR nExt2;
+	
+}stKMInfoBlock;
+
 enum enStoreCfg
 {
+	CFG_VER		= 0x100,
 	START_SIGN = 0x55aa,
 	END_SIGN	=	0x5aa5,
 };
@@ -80,6 +111,21 @@
 	PortType_ModbusRTU = 5, //Modbus RTU 通讯
 };
 
+//每个模块有 0/1/2/3/4/5/6/7/8个 通讯port
+//不限于 UART, 网口，无线，单总线等，都是port
+//甚至可以有虚拟的port
+
+typedef struct tagPortStat
+{
+	UCHAR nWorking;			//工作中
+	UCHAR nStation;			//自己站号
+	UCHAR bBus;					//总线?,,全双工?
+	UCHAR bMaster;			//主机
+	UCHAR PortType;			//端口工作模式
+	UCHAR nDevices;			//连接的设备数量//不包括自己 //device list;
+	
+}stPortStat,*pPortStat;
+
 enum enKeventType
 {
 	EventTypeNone = 0,
@@ -97,6 +143,7 @@
 	
 	EventType
 };
+
 typedef struct tagKMFuncParam
 {
 	USHORT EnablePLC:1;		//使能内部PLC功能
@@ -105,73 +152,106 @@
 
 // 输入输出地址映射
 
-typedef struct tagComPortParam
+typedef struct tagComPortParam			//4 Bytes
 {
-	USHORT PortType:4;				/* 0-4=None,Odd,Even,Mark,Space    */
+	USHORT Station;					/* 0=From jumper */
+	USHORT WorkMode;				/* 0-5=Com,Gen,KLink,KBus,KNet,RTU */
+	USHORT BaudRate;       /* =*100 Baudrate at which running       */
+//	USHORT PortType:4;				/* 0-5=Com,Gen,KLink,KBus,KNet,RTU */
   USHORT ByteSize:2;        /* 0-1=Number of bits/byte, 7-8    */
 	USHORT Parity:4;					/* 0-4=None,Odd,Even,Mark,Space    */
   USHORT StopBits:2;        /* 0,1,2 = 1, 1.5, 2               */
-  USHORT EofChar:2;         /* 0,1,2 = None, CR, CR+LF, ETX;  End of character  */
+	USHORT EndType:2;					/* 0=ByChar, 1= ByTime */
+  USHORT EofChar:4;         /* 0,1,2 = None, CR, CR+LF, ETX;  End of character  */
 	USHORT SofChar:2;					/* 0,1,2 = None, STX */
-	USHORT BaudRate;       /* =*100 Baudrate at which running       */
+	USHORT EndTime;
+	USHORT RecvAddr;
+	USHORT RecvSize;
+	
 }stComPortParam;
 
-typedef struct tagInputFilterParam
+typedef struct tagInputFilterParam		// 1 Bytes
 {
 	BYTE Filter0:4;
 	BYTE Filter1:4;
 
 }stInputFilterParam;
 
-typedef struct tagOutputHoldParam
+typedef struct tagOutputHoldParam			//1 Bytes
 {
 	BYTE Hold1:4;
 	BYTE Hold2:4;
 }stOutputHoldParam;	
 
 #pragma anon_unions
-typedef struct tagMSysCfg
+typedef struct tagKMSysCfg		//120 Bytes total
 {
-	unsigned short Sign1;
-	unsigned short Seq1;
-	UINT cfgvar2;
-	stComPortParam Ports[2];
-	stOutputHoldParam OutputParams[16];
-	stInputFilterParam InputParams[16];
+	USHORT Version;										// SC0	// 2 Bytes
+	USHORT workmode;									// SC1  // 2 Bytes 0=From jumper  
+	USHORT SwitchFunc;								// SC2  // 2 Bytes 
 	
-	UINT cfgvar3;
-	UINT cfgvar4;
-	UINT cfgvar5;
-	UINT cfgvar6;
-	UINT cfgvar7;
-	UINT cfgvar8;
-	UINT cfgvar9;
-	UINT cfgvar10;
-	UINT cfgvar11;
-	UINT cfgvar12;
-	UINT cfgvar13;
-	UINT cfgvar14;
-	UINT cfgvar15;
-	UINT cfgvar16;
-	UINT Space1[5];
+	USHORT OutMappings[6];										//12 Bytes //输出映射
+	
+	stComPortParam PortParams[2];							// 8 Bytes
+	stOutputHoldParam OutputParams[16];				//16 Bytes
+	stInputFilterParam InputParams[16];				//16 Bytes
+	
+	UINT cfgvar3;															// 4 Bytes
+	UINT cfgvar4;															// 4 Bytes
+	UINT cfgvar5;															// 4 Bytes
+	UINT cfgvar6;															// 4 Bytes
+	UINT cfgvar7;															// 4 Bytes
+	UINT cfgvar8;															// 4 Bytes
+	UINT cfgvar9;															// 4 Bytes
+	UINT cfgvar10;														// 4 Bytes
+	UINT cfgvar11;														// 4 Bytes
+	UINT cfgvar12;														// 4 Bytes
+	UINT cfgvar13;														// 4 Bytes
+	UINT cfgvar14;														// 4 Bytes
+	UINT cfgvar15;														// 4 Bytes
+	UINT cfgvar16;														// 4 Bytes
+	UINT Space1[5];														//20 Bytes
 
-	unsigned short CRC1;
-	unsigned short EndSign1;
 }stKMSysCfg,* pKMSysCfg;
 
-typedef struct tagFactoryData		//工厂量产参数，数据
+typedef struct tagStoredKMSysCfg
 {
 	unsigned short Sign1;
 	unsigned short Seq1;
-	unsigned int nModelNo;
-	unsigned int nModelVer;
-	unsigned int SN1;
-	unsigned int nProtocalVer;
- 	unsigned int nProductDateTime;
-	unsigned int nLotNo;
-	unsigned int nDefaultFunc;
-	char ModelStr[16];
-	char SNStr[16];
+	stKMSysCfg theKMSysCfg;
+	unsigned short CRC1;
+	unsigned short EndSign1;
+}stStoredKMSysCfg,*pStoredKMSysCfg;
+
+
+/*
+typedef struct tagFactData
+{
+	USHORT Sign;					//
+	USHORT nLength;				//
+	UCHAR LOT_NO[16];			//
+	UINT MANDate;					//
+	UINT SN;							//
+	UINT REV1[24];				//
+	USHORT rev9;
+	USHORT CRC;
+	
+}stFactData;
+*/
+typedef struct tagFactoryData		//工厂量产参数，数据
+{
+	USHORT Sign1;
+	USHORT Seq1;
+	USHORT nModelNo;
+	USHORT nModelVer;
+	UINT nLotNo;
+ 	UINT nProductDateTime;
+	UINT SN1;
+	UINT nProtocalVer;
+	UINT nDefaultFunc;
+	UCHAR ModelStr[16];
+	UCHAR LOT_NO[16];			//
+	UCHAR SNStr[16];
 	unsigned short CRC1;
 	unsigned short EndSign1;
 	
@@ -191,11 +271,15 @@
 {
 	unsigned short Sign1;
 	unsigned short Seq1;
-	unsigned short PowerCount;	//
-	unsigned short Reserved1;
-	unsigned int UpTime;		//Seconds;
-	unsigned int UserData1;
-	unsigned int Reserved2[3];
+	volatile unsigned short PowerCount;	//
+	volatile unsigned short Reserved1;
+	volatile unsigned int UpTime;		//Seconds;
+	volatile unsigned int UserData1;
+	volatile unsigned short WorkMode;
+	volatile unsigned short WorkMode2;
+	volatile unsigned short nBinProgBank;
+	volatile unsigned short nBinProgSize;
+	unsigned int Reserved2[1];
 	unsigned short CRC1;
 	unsigned short EndSign1;
 }stRunStat, *pRunStat;
@@ -205,25 +289,149 @@
 //stStoreCfg * GetCurStoreCfgAddr(void );
 //stStoreCfg * GetNextStoreCfgAddr(stStoreCfg * CurCfg );
 
-extern stKMSysCfg KMSysCfg;
+extern stStoredKMSysCfg storedKMSysCfg;
+
+#define TYPECOIL 0x00
+#define TYPEDATA 0x80
+
+	enum enKLCoilTypes
+	{
+		KLCoilTypeX = 0 | TYPECOIL ,		//X Input
+		KLCoilTypeY = 1 | TYPECOIL,		//Y Output
+		KLCoilTypeR = 2 | TYPECOIL,		//R register
+		KLCoilTypeLX = 3 | TYPECOIL,		//Link register
+		KLCoilTypeLY = 4 | TYPECOIL,		//Link register
+		KLCoilTypeT = 5 | TYPECOIL,		//Timer
+		KLCoilTypeC = 6 | TYPECOIL,		//Counter
+		KLCoilTypeLR = 7 | TYPECOIL,		//Link register
+		KLCoilTypeSR = 8 | TYPECOIL,		//Link register
+
+	};
+	enum enKLDataTypes
+	{
+		KLDataTypeDEC = 0 | TYPEDATA,
+		KLDataTypeHEX = 1 | TYPEDATA,
+		KLDataTypeFloat = 2 | TYPEDATA,
+		KLDataTypeWX = 3 | TYPEDATA,
+		KLDataTypeWY = 4 | TYPEDATA,
+		KLDataTypeWR = 5 | TYPEDATA,
+		KLDataTypeWLX = 6 | TYPEDATA,
+		KLDataTypeWLY = 7 | TYPEDATA,
+		KLDataTypeDT = 8 | TYPEDATA,
+		KLDataTypeSDT = 9 | TYPEDATA,
+		KLDataTypeWSR = 10 | TYPEDATA,
+		KLDataTypeSV = 11 | TYPEDATA,
+		KLDataTypeEV = 12 | TYPEDATA,
+		KLDataTypeLD = 13 | TYPEDATA,
+		KLDataSysCfg = 25 | TYPEDATA,
+		KLDataTypeFlash = 33 | TYPEDATA,
+		KLDataTypeTest = 254 | TYPEDATA,
+	};
+	
+enum enKLDataCounts
+	{
+		KLDataDTCount = 256,
+		KLDataSDTCount = 256,
+
+		KLDataWXCount = 16,
+		KLDataWYCount = 16,
+		KLDataWRCount = 16,
+		KLDataLDCount = 64,
+		KLDataWLCount = 8, 
+		
+		KLCoilXCount = KLDataWXCount * 16,
+		KLCoilYCount = KLDataWYCount * 16,
+		KLCoilRCount = KLDataWRCount * 16,
+
+		KLCoilTCount = 64,
+		KLCoilCCount = KLCoilTCount,
+
+		KLDataSVCount = KLCoilTCount,
+		KLDataEVCount = KLCoilTCount,
+
+		KLCoilLXCount = 128,
+		KLCoilLYCount = 128,
+		KLCoilLRCount = 128,
+		KLCoilSRCount = 128,
+
+	};
+#define TOTAL_WDFS (16)		//Total DF Count
+#define TOTAL_CurVAL (16)		//
+#define TOTALTIMERS (64)
+
+typedef struct tagTimerStat
+{
+	unsigned short nScale:2;//Time Scale, 0:1ms 1:10ms 2:100ms 3:1S
+	unsigned short nType:1;	//0 : timer 1:counter ;
+	unsigned short nDir:1;		//0 : count down. 1 count up;
+	unsigned short nInited:1;
+	unsigned short bSet:1;
+	unsigned short bTon:1;
+	
+}stTimerStat;
+
+typedef struct tagTimer
+{
+	unsigned int LastActTime;
+	union {
+		unsigned short StatByte;
+	 struct 
+	{
+		unsigned short nScale:2;	//Time Scale, 0:1ms 1:10ms 2:100ms 3:1S
+		unsigned short nType:1;		//0 : timer 1	:	counter ;
+		unsigned short nDir:1;		//0 : count down. 1 count up;
+		unsigned short nInited:1;
+		unsigned short bSet:1;
+		unsigned short bTon:1;
+		
+	};		
+//		stTimerStat Stat;
+	};
+}stTimer;
+
 typedef struct tagKMem
 {
-	unsigned short WX[16];		//本机的X和Y
-	unsigned short WY[16];		//本机的X和Y
-	unsigned short WR[64];
-	unsigned short DT[256];
+	unsigned short WDFs[TOTAL_WDFS];
+	unsigned char CurVALs[TOTAL_CurVAL];
+	unsigned char CurVAL;
+	stTimer Timers[TOTALTIMERS];
+
+	union {
+	unsigned short WX[KLDataWXCount];		//本机的X和Y
+	unsigned char WXB[KLDataWXCount*2];	
+	};
+	union {
+	unsigned short WY[KLDataWYCount];		//本机的X和Y
+	unsigned char WYB[KLDataWYCount*2];		//本机的X和Y
+	}; 
+	unsigned short WR[KLDataWRCount];
+	
+	unsigned short WT[16];
+
+	unsigned short WC[16];
+	unsigned short EV[KLDataEVCount];
+	unsigned short SV[KLDataSVCount];
+	
+	
 	unsigned short WLX[16];		//虚拟的X和Y，远程通讯时映射用。
 	unsigned short WLY[16];
+	unsigned short WLR[16];	
 	unsigned short WSR[16];
-	
+
+union {
+	unsigned int DTD[KLDataDTCount];
+	unsigned short DT[KLDataDTCount];
+	unsigned char DTB[KLDataDTCount*2];
+};	
+
 	// 配置寄存器
 	// 系统状态寄存器
 	// 特殊寄存器
 	// 调试，监控寄存器
 	union {
-		unsigned int SDD[128];
-		unsigned short SDT[256];
-		unsigned char SDB[512];
+		unsigned int SDD[KLDataSDTCount/2];
+		unsigned short SDT[KLDataSDTCount];
+		unsigned char SDB[KLDataSDTCount*2];
 		struct {
 			unsigned int EffJumperSW;
 			unsigned int CurJumperSW;
@@ -252,14 +460,26 @@
 
 
 extern stKMem KMem;
+extern const stKMInfoBlock KMInfoBlock;
+
+extern volatile int PowerDownEvent;
+extern volatile int OldPowerDownEvent;
+extern volatile int OldPowerDownEventTime;
 
 int KMachineInit(void);
-int ReadFlashMem(void * pBuf, void * pAddrFlash, int nSize);
-int WriteToFlashMemNoErase(void * pBuf, void * pAddrFlash, unsigned int nSize);
-int EraseAndWriteToFlashMem(void * pBuf, void * pAddrFlash, unsigned int nSize);
+int ReadFlashMem(void * pBuf, void * pAddrFlash, int nByteSize);
+int WriteToFlashMemNoErase(void * pBuf, void * pAddrFlash, unsigned int nByteSize);
+int EraseAndWriteToFlashMem(void * pBuf, void * pAddrFlash, unsigned int nByteSize);
 
-int WriteSysCfgToFlash(pKMSysCfg theKMSysCfg);
-int ReadSysCfgFromFlash(pKMSysCfg theKMSysCfg);
+int ReadFactoryData(void * pDatabuf, int nByteCount);
+int WriteFactoryData(void * pDataBuf, int nByteCount);
+
+// active Program bank
+int ReadProgram(int nProgByteAddr, void *pBuf, int nByteSize, int nBank);
+int WriteProgram(int nProgByteAddr, void * pBuf, int nByteSize, int nBank);
+
+int WriteSysCfgToFlash(pStoredKMSysCfg theStoredKMSysCfg);
+int ReadSysCfgFromFlash(pStoredKMSysCfg theStoredKMSysCfg);
 
 int AddEventLog(uint32_t nTime, USHORT nEvent, USHORT nParam1, UINT nParam2);
 pEventLog GetEventLogAddr(int nIndex);
@@ -267,4 +487,10 @@
 int LoadRunStat(pRunStat theRunStat);
 int SaveRunStat(pRunStat theRunStat);
 
+
+unsigned char GetCoilValue(unsigned char nCoilType, unsigned short nCoilAddr);
+int SetCoilValue(unsigned char nCoilType, unsigned short nCoilAddr, unsigned char nCoilValue);
+int GetVarData(int nDataType, int nDataAddr);
+int SetVarData(int nDataType, int nDataAddr, int nDataValue);
+
 #endif	/* __KLPROTOCOL_H__ */
diff --git a/Inc/ModbusRTU.h b/Inc/ModbusRTU.h
new file mode 100644
index 0000000..ea5eb0a
--- /dev/null
+++ b/Inc/ModbusRTU.h
@@ -0,0 +1,87 @@
+/**
+  ******************************************************************************
+  * @file           : ModbusRTU.h
+  * @brief          : Header for ModbusRTU.c file.
+  *                   This file contains the common defines of the ModbusRTU protocol.
+  ******************************************************************************
+	*/
+#ifndef __MODBUSRTU_H__
+#define __MODBUSRTU_H__
+
+typedef unsigned char uchar;
+typedef unsigned short ushort;
+typedef unsigned char uint8_t;
+typedef unsigned short uint16_t;
+typedef int int32_t;
+
+/*
+enum enResult
+{
+	S_OK = 0,
+	S_ERR = 1,
+};
+*/
+enum enModbusRTUCmd
+{
+	None =0,
+	ReadCoils =1, //读线圈
+	ReadInputs =2,  //读离散量输入
+	ReadKeepRegs =3,	//读保持寄存器
+	ReadInputRegs =4,	//读输入寄存器
+	WriteCoil = 5,		//写单个线圈
+	WriteReg =6,		//写单个寄存器
+	ReadExptStat = 7,  //读取异常状态
+	FetchCommEventCtr =11,   //Fetch Comm Event Ctr
+													 // 12 Fetch Comm Event Log
+													
+	WriteCoils =15,				//写多个线圈
+	WriteRegs = 16,		//写多个寄存器
+										//17 Report Slave ID
+										//20 Read General Reference
+										//21 Write General Reference
+										//22 Mask Write 4X Register
+										// 23 Read/Write 4X Registers
+										//24 Read FIFO Queue
+	
+};
+#pragma anon_unions
+typedef struct tagModBusRTUReqPkg
+{
+	uchar Dst;
+	uchar Cmd;
+	union	{
+		ushort Addr;
+		struct		{
+			uchar AddrH;
+			uchar AddrL;
+		};
+	};
+	union
+	{
+		ushort nCount;
+		struct 
+		{
+			uchar CountH;
+			uchar CountL;
+		};
+	};
+}stModBusRTUReqPkg, *pModBusRTUReqPkg;
+
+typedef struct tagModBusRTUReplyPkg
+{
+	uchar Dst;
+	uchar Cmd;
+	uchar nByteCount;
+	uchar Datas[1];
+}stModBusRTUReplyPkg, *pModBusRTUReplyPkg;
+
+//int ModBusCRC16(void * pBuf, int len1);
+uint16_t crc16tablefast(const uint8_t *ptr, uint16_t len);
+
+int ModBusSlaveCheckPkg(int nChn, void * pPkg, uint16_t len1);
+
+int ModBusSlaveParsePkg(int nChn, void * pPkg, uint16_t len1);
+
+
+
+#endif	/* __MODBUSRTU_H__ */
diff --git a/Inc/PLCfunctions.h b/Inc/PLCfunctions.h
index d62fdf7..4a9c35d 100644
--- a/Inc/PLCfunctions.h
+++ b/Inc/PLCfunctions.h
@@ -10,15 +10,6 @@
 #include "GlobalDef.h"
 #include "KMachine.h"
 
-
-#define TOTAL_WDFS (16)		//Total DF Count
-#define TOTAL_CurVAL (8)		//
-
-//extern unsigned short X[256];
-//extern unsigned short Y[256];
-//extern unsigned short R[256];
-
-#define TOTALTIMERS (64)
 #define TICK_OF_MS (10)		//1ms
 #define TICK_OF_RS (100)		//10mS
 #define TICK_OF_XS (1000)			//100mS
@@ -26,49 +17,138 @@
 
 #pragma anon_unions
 
-typedef struct tagTimerStat
+typedef struct tagPLCMem
 {
-	unsigned short nScale:2;//Time Scale, 0:1ms 1:10ms 2:100ms 3:1S
-	unsigned short nType:1;	//0 : timer 1:counter ;
-	unsigned short nDir:1;		//0 : count down. 1 count up;
-	unsigned short nInited:1;
-	unsigned short bSet:1;
-	unsigned short bTon:1;
+	int bPLCRunning;
+	int nScanCount;
+	char ProgTrace[512];
 	
-}stTimerStat;
+}stPLCMem;
+extern stPLCMem PLCMem;
 
-typedef struct tagTimer
+int InitPLC(void);
+int StartPLC(void);
+int StopPLC(void);
+
+enum enPLCOPs
 {
-	unsigned short SV;
-	unsigned short EV;
-	unsigned int LastActTime;
-	union {
-		unsigned short StatByte;
-	 struct 
-	{
-		unsigned short nScale:2;	//Time Scale, 0:1ms 1:10ms 2:100ms 3:1S
-		unsigned short nType:1;		//0 : timer 1	:	counter ;
-		unsigned short nDir:1;		//0 : count down. 1 count up;
-		unsigned short nInited:1;
-		unsigned short bSet:1;
-		unsigned short bTon:1;
-		
-	};		
-//		stTimerStat Stat;
-	};
-}stTimer;
+		OP_NONE = 0,
+		OP_NOP = 0,
+		OP_ST = 1,		//
+		OP_ST_ = 2,		//
+		OP_AN = 3,		//
+		OP_AN_ = 4,		//
+		OP_OR = 5,		//
+		OP_OR_ = 6,		//
+		OP_NOT = 7,		//
+		OP_ANS = 8,	//
+		OP_ORS = 9,	//
 
+		OP_PSHS = 10,	//
+		OP_RDS = 11,		//
+		OP_POPS = 12,	//
+
+		OP_OUT = 16,		//
+		OP_SET = 17,	//
+		OP_RESET = 18,	//
+		OP_DF = 19,		//
+		OP_DF_ = 20,	//
+
+		OP_ST_EQ,	//
+		OP_ST_LT,	//
+		OP_ST_GT,	//
+		OP_ST_LE,	//
+		OP_ST_GE,		//
+		OP_ST_NE,		//
+		OP_AN_EQ,		//
+		OP_AN_LT,		//
+		OP_AN_GT,
+		OP_AN_LE,
+		OP_AN_GE,
+		OP_AN_NE,
+		OP_OR_EQ,
+		OP_OR_LT,
+		OP_OR_GT,
+		OP_OR_LE,
+		OP_OR_GE,
+		OP_OR_NE,
+
+
+		OP_MV = 51,
+		OP_INC = 52,
+		OP_ADD2 = 53,
+		OP_ADD3 = 54,
+		OP_DEC = 55,
+		OP_SUB2 = 56,
+		OP_SUB3 = 57,
+		OP_MUL = 58,
+		OP_DIV = 59,
+		OP_BKMV = 60,
+		OP_COPY = 61,
+		OP_CLR = 62,
+
+		OP_BRK,
+		OP_PAUSE,
+		OP_JP,
+		OP_CALL,
+
+		OP_TML = 0xC8,	//
+		OP_TMR = 0xDC,	//
+		OP_TMX = 0xDD,	//
+		OP_TMY = 0xFA,	//
+	
+};
+/*
 typedef struct tagPLCPROG
 {
 	unsigned char OP;
 	unsigned char AddrType;
 	unsigned short Addr;
 }stPLCPROG;
+*/
+	typedef struct stBinProg1
+	{
+		unsigned char nOp;
+		unsigned char nParamType;
+		unsigned short nParamAddr;
+	}stBinProg1;
+	typedef struct stBinProg15
+	{	//???
+		//
+		unsigned char nOp;
+		unsigned char nOpNum;
+		unsigned short nParamAddr1;
+		unsigned char nParamType1;
+		unsigned char resvr1;
+		unsigned short resvr2;
+	}stBinProg15;
+	typedef struct stBinProg2
+	{	//????
+		//
+		unsigned char nOp;
+		unsigned char nOpNum;
+		unsigned short nParamAddr1;
+		unsigned char nParamType1;
+		unsigned char nParamType2;
+		unsigned short nParamAddr2;
+	}stBinProg2;
+	typedef struct stBinProg3
+	{	//???????
+		unsigned char nOp;
+		unsigned char nOpNum;
+		unsigned short nParamAddr1;
+		unsigned char nParamType1;
+		unsigned char nParamType2;
+		unsigned short nParamAddr2;
+		unsigned char resvr1;
+		unsigned char nParamType3;
+		unsigned short nParamAddr3;
+	}stBinProg3;
 
-extern stPLCPROG const prog1[];
+	
+extern stBinProg1 const prog1[];
 extern int nSizeProg1;
-
-
+	
 //extern unsigned char CurVAL;
 //extern unsigned char CurVALs[TOTAL_CurVAL];
 //extern unsigned short DFs[TOTAL_WDFS];
@@ -78,23 +158,16 @@
 //extern unsigned short WR[64];
 //extern unsigned short DT[256];
 //extern unsigned short SDT[256];
-extern const unsigned short bitMasks[16];
+//extern const unsigned short bitMasks[16];
 //extern stTimer Timers[TOTALTIMERS];
 
+///*
 
-typedef struct tagPLCMem
-{
-	unsigned short WDFs[TOTAL_WDFS];
-	unsigned char CurVALs[TOTAL_CurVAL];
-	unsigned char CurVAL;
-	stTimer Timers[TOTALTIMERS];
-	
-}stPLCMem;
 
-extern stPLCMem PLCMem;
+//*/
 
 int InitTimer(int nIndex, int nType);
-int StartTimer(int nIndex , int SV);
+int RunTimer(int nIndex , int SV);
 int StopTimer(int nIndex);
 int ResetTimer(int nIndex);
 int SetTimerValue(int nIndex, int bSet, int SV);
@@ -106,51 +179,8 @@
 int PushInVal(void);
 int PopOutVal(void);
 
-
-enum enPLCOPs
-{
-	OP_None =0,
-	OP_ST=1,
-	OP_ST_=2,
-	OP_AN=3,
-	OP_AN_=4,
-	OP_OR=5,
-	OP_OR_=6,
-	OP_NOT=7,
-	
-	OP_PSHS =8,
-	OP_RDS = 9,
-	OP_POPS =10,
-
-	OP_ANS=11,
-	OP_ORS=12,
-
-	OP_OUT=16,
-	OP_SET=17,
-	OP_RESET=18,
-	OP_DF=19,
-	OP_DF_=20,
-	
-	OP_TML=0xC8,
-	OP_TMR=0xDC,
-	OP_TMX=0xDD,
-	OP_TMY=0xFA,
-	
-};
-
-enum enAddrTypes
-{
-	Addr_None =0,
-	Addr_X =1,
-	Addr_Y =2,
-	Addr_R =3,
-	Addr_T =4,
-	Addr_L =5,
-	Addr_ =6,
-
-};
-
-int ProcessPLCPROG(const stPLCPROG * prog,int nSize);
+int ProcessPLCBinProg(const stBinProg1 * pBinprog, int nSize);
+//int ProcessPLCPROG(const stBinProg1 * prog,int nSize);
 
 
 
diff --git a/Inc/debug.h b/Inc/debug.h
new file mode 100644
index 0000000..b4dd149
--- /dev/null
+++ b/Inc/debug.h
@@ -0,0 +1,23 @@
+/**
+  ******************************************************************************
+  * @file           : functions.h
+  * @brief          : Header for functions.c file.
+  *                   This file contains the user functions defines of the application.
+  ******************************************************************************
+	*/
+#ifndef __DEBUG_H__
+#define __DEBUG_H__
+#include <stdint.h>
+
+int add1(int a,int b);
+void clearscreen(void );
+void Locate(int x,int y);
+int FormatHex(char * buf1, unsigned char * data, int n);
+int ShowInitInfo(void);
+int ShowRunningInfo(void);
+int ADCProcess(void);
+int PowerDownProcess(void);
+int PowerRecoverProcess(void);
+
+
+#endif  /* __DEBUG_H__ */
diff --git a/Inc/functions.h b/Inc/functions.h
index cc5c54a..7a8fe6c 100644
--- a/Inc/functions.h
+++ b/Inc/functions.h
@@ -43,15 +43,18 @@
 int Uart3RecvDMA(void * pBuf, int nSize);
 int Uart3TriggerRecvDMA(void );
 int Uart3TriggerSendDMA(void );
+void TriggerPendSV(void);
+void PendSvCallBack(void);
+void SPI1_IRQ_CallBack(void);
+
 void Uart1SendDone(void);
 void Uart1RecvDone(void);
 void Uart2SendDone(void);
 void Uart2RecvDone(void);
 int PutStr(char * str1, int len1);
-void clearscreen(void );
-void Locate(int x,int y);
-int SendPacket1(void * pBuf,int len1);
-int SendPacket2(pPacket p1,int len1);
+int SendPacket(int nChn, void * pBuf,int len1);
+//int SendPacket1(void * pBuf,int len1);
+//int SendPacket2(pPacket p1,int len1);
 void ToggleRunLed(void );
 void ToggleErrLed(void );
 void ToggleOutStat(void );
@@ -66,9 +69,10 @@
 unsigned short crc_check(const unsigned char * data, unsigned int  length);
 unsigned short crc16bitbybit(const unsigned char *ptr, unsigned int len);
 uint16_t crc16table(const uint8_t *ptr, uint16_t len);
-uint16_t crc16tablefast(const uint8_t *ptr, uint16_t len) ;
+//uint16_t crc16tablefast(const uint8_t *ptr, uint16_t len) ;
 
 void EnableDisIn(uchar bEnable);
 void displayInput(unsigned int cc);
+void PutOutputSPI1(unsigned int Y);
 
 #endif  /* __MYFUNCTIONS_H__ */
diff --git a/Inc/main.h b/Inc/main.h
index e2f5efd..33d7289 100644
--- a/Inc/main.h
+++ b/Inc/main.h
@@ -54,6 +54,7 @@
 #include "stm32f0xx_ll_exti.h"
 #include "stm32f0xx_ll_bus.h"
 #include "stm32f0xx_ll_cortex.h"
+#include "stm32f0xx_ll_tim.h"
 #include "stm32f0xx_ll_utils.h"
 #include "stm32f0xx_ll_pwr.h"
 
diff --git a/Inc/stm32f0xx_it.h b/Inc/stm32f0xx_it.h
index c93dbd8..170bd54 100644
--- a/Inc/stm32f0xx_it.h
+++ b/Inc/stm32f0xx_it.h
@@ -52,6 +52,8 @@
 void SVC_Handler(void);
 void PendSV_Handler(void);
 void SysTick_Handler(void);
+void TIM6_IRQHandler(void);
+void SPI1_IRQHandler(void);
 void DMA1_Channel2_3_IRQHandler(void);
 void DMA1_Channel4_5_IRQHandler(void);
 void USART1_IRQHandler(void);
diff --git a/Inc/w5500_port.h b/Inc/w5500_port.h
new file mode 100644
index 0000000..c0ab731
--- /dev/null
+++ b/Inc/w5500_port.h
@@ -0,0 +1,38 @@
+#ifndef _W5500_PORT_HAL_
+#define _W5500_PORT_HAL_
+
+#include "../src/ethernet/wizchip_conf.h"
+#include <string.h>
+#include <stdio.h>
+
+#define W5500_SPI_HANDLE    SPI1
+#define W5500_CS_PORT       GPIOA
+#define W5500_CS_PIN        GPIO_PIN_15
+#define W5500_RST_PORT      GPIOB
+#define W5500_RST_PIN       GPIO_PIN_6
+
+#define DEFAULT_MAC_ADDR    {0x00,0xf1,0xbe,0xc4,0xa1,0x05}
+#define DEFAULT_IP_ADDR     {192,168,1,135}
+#define DEFAULT_SUB_MASK    {255,255,255,0}
+#define DEFAULT_GW_ADDR     {192,168,1,2}
+#define DEFAULT_DNS_ADDR    {8,8,8,8}
+
+/* 100M*/
+#define USE_AUTONEGO
+
+//#define SOFT_SPI
+
+/* DHCP */
+//#define USE_DHCP
+
+void w5500_network_info_show(void);
+int w5500_init(void);
+
+void EnterCS(void);
+void ExitCS(void);
+void SPI1_CS_Select(void);
+void SPI1_CS_Deselect(void);
+void SPI_Write_Byte(uint8_t byte);
+uint8_t SPI_Read_Byte(void);
+
+#endif
diff --git a/MDK-ARM/F030C8T6_Test2.uvguix.QuakeGod b/MDK-ARM/F030C8T6_Test2.uvguix.QuakeGod
index f287e51..cd5c1be 100644
--- a/MDK-ARM/F030C8T6_Test2.uvguix.QuakeGod
+++ b/MDK-ARM/F030C8T6_Test2.uvguix.QuakeGod
@@ -18,23 +18,41 @@
       <UserString></UserString>
       <PropColWidth>80</PropColWidth>
     </View>
+    <View>
+      <ViewName>System Viewer\RCC</ViewName>
+      <WinId>35903</WinId>
+      <UserString></UserString>
+      <PropColWidth>78</PropColWidth>
+    </View>
+    <View>
+      <ViewName>System Viewer\TIM6</ViewName>
+      <WinId>35901</WinId>
+      <UserString></UserString>
+      <PropColWidth>78</PropColWidth>
+    </View>
+    <View>
+      <ViewName>System Viewer\USART2</ViewName>
+      <WinId>35902</WinId>
+      <UserString></UserString>
+      <PropColWidth>78</PropColWidth>
+    </View>
   </ViewPool>
 
   <SECTreeCtrl>
     <View>
       <WinId>38003</WinId>
       <ViewName>Registers</ViewName>
-      <TableColWidths>115 179</TableColWidths>
+      <TableColWidths>115 172</TableColWidths>
     </View>
     <View>
       <WinId>346</WinId>
       <ViewName>Code Coverage</ViewName>
-      <TableColWidths>1010 348</TableColWidths>
+      <TableColWidths>1010 160</TableColWidths>
     </View>
     <View>
       <WinId>204</WinId>
       <ViewName>Performance Analyzer</ViewName>
-      <TableColWidths>1170 175 175 188</TableColWidths>
+      <TableColWidths>1170</TableColWidths>
     </View>
   </SECTreeCtrl>
 
@@ -43,30 +61,30 @@
       <WinId>1506</WinId>
       <ViewName>Symbols</ViewName>
       <UserString></UserString>
-      <TableColWidths>80 80 80</TableColWidths>
+      <TableColWidths>106 106 106</TableColWidths>
     </View>
     <View>
       <WinId>1936</WinId>
       <ViewName>Watch 1</ViewName>
       <UserString></UserString>
-      <TableColWidths>80 80 80</TableColWidths>
+      <TableColWidths>106 106 106</TableColWidths>
     </View>
     <View>
       <WinId>1937</WinId>
       <ViewName>Watch 2</ViewName>
       <UserString></UserString>
-      <TableColWidths>80 80 80</TableColWidths>
+      <TableColWidths>106 106 106</TableColWidths>
     </View>
     <View>
       <WinId>1935</WinId>
       <ViewName>Call Stack + Locals</ViewName>
       <UserString></UserString>
-      <TableColWidths>80 80 80</TableColWidths>
+      <TableColWidths>106 106 106</TableColWidths>
     </View>
     <View>
       <WinId>2506</WinId>
       <ViewName>Trace Data</ViewName>
-      <UserString></UserString>
+      <UserString>FiltIdx=0;DescrEn=0;DescrHeight=4;FuncTrc=1;FindType=8;ColWidths=004B00870082005F004600E600C80096</UserString>
       <TableColWidths>75 135 130 95 70 230 200 150</TableColWidths>
     </View>
   </TreeListPane>
@@ -90,25 +108,25 @@
       <flags>2</flags>
       <showCmd>3</showCmd>
       <MinPosition>
-        <xPos>-32000</xPos>
-        <yPos>-32000</yPos>
+        <xPos>-1</xPos>
+        <yPos>-1</yPos>
       </MinPosition>
       <MaxPosition>
         <xPos>-1</xPos>
         <yPos>-1</yPos>
       </MaxPosition>
       <NormalPosition>
-        <Top>116</Top>
-        <Left>205</Left>
-        <Right>1659</Right>
-        <Bottom>991</Bottom>
+        <Top>134</Top>
+        <Left>-2376</Left>
+        <Right>-443</Right>
+        <Bottom>1187</Bottom>
       </NormalPosition>
     </WindowPosition>
     <MDIClientArea>
       <RegID>0</RegID>
       <MDITabState>
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-      <Doc>
-        <Name>..\Src\KLink.c</Name>
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-        <TopLine>157</TopLine>
-        <CurrentLine>158</CurrentLine>
+        <TopLine>22</TopLine>
+        <CurrentLine>55</CurrentLine>
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         <ContractedFolders></ContractedFolders>
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       <Doc>
         <Name>..\Src\KBus.c</Name>
-        <ColumnNumber>26</ColumnNumber>
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+        <ColumnNumber>18</ColumnNumber>
+        <TopLine>524</TopLine>
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+        <ContractedFolders></ContractedFolders>
+        <PaneID>0</PaneID>
+      </Doc>
+    </MDIGroup>
+    <MDIGroup>
+      <Size>50</Size>
+      <ActiveTab>9</ActiveTab>
+      <Doc>
+        <Name>..\Src\BSP.c</Name>
+        <ColumnNumber>18</ColumnNumber>
+        <TopLine>372</TopLine>
+        <CurrentLine>373</CurrentLine>
         <Folding>1</Folding>
         <ContractedFolders></ContractedFolders>
         <PaneID>0</PaneID>
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-        <ColumnNumber>23</ColumnNumber>
-        <TopLine>176</TopLine>
-        <CurrentLine>186</CurrentLine>
+        <Name>../Src/Ethernet/socket.h</Name>
+        <ColumnNumber>35</ColumnNumber>
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+        <ColumnNumber>0</ColumnNumber>
+        <TopLine>138</TopLine>
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+        <ContractedFolders></ContractedFolders>
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+        <ColumnNumber>0</ColumnNumber>
+        <TopLine>46</TopLine>
+        <CurrentLine>50</CurrentLine>
+        <Folding>1</Folding>
+        <ContractedFolders></ContractedFolders>
+        <PaneID>0</PaneID>
+      </Doc>
+      <Doc>
+        <Name>..\Src\Ethernet\wizchip_conf.c</Name>
+        <ColumnNumber>41</ColumnNumber>
+        <TopLine>39</TopLine>
+        <CurrentLine>40</CurrentLine>
+        <Folding>1</Folding>
+        <ContractedFolders></ContractedFolders>
+        <PaneID>0</PaneID>
+      </Doc>
+      <Doc>
+        <Name>..\Src\ModbusRTU.c</Name>
+        <ColumnNumber>16</ColumnNumber>
+        <TopLine>1</TopLine>
+        <CurrentLine>7</CurrentLine>
+        <Folding>1</Folding>
+        <ContractedFolders></ContractedFolders>
+        <PaneID>0</PaneID>
+      </Doc>
+      <Doc>
+        <Name>../Inc/BSP.h</Name>
+        <ColumnNumber>0</ColumnNumber>
+        <TopLine>1</TopLine>
+        <CurrentLine>4</CurrentLine>
         <Folding>1</Folding>
         <ContractedFolders></ContractedFolders>
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@@ -3579,17 +3570,71 @@
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         <Name>../Src/stm32f0xx_it.c</Name>
         <ColumnNumber>0</ColumnNumber>
-        <TopLine>244</TopLine>
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         <ContractedFolders></ContractedFolders>
         <PaneID>0</PaneID>
       </Doc>
       <Doc>
-        <Name>.\startup_stm32f030x8.s</Name>
+        <Name>..\Src\KLink.c</Name>
         <ColumnNumber>0</ColumnNumber>
-        <TopLine>131</TopLine>
-        <CurrentLine>133</CurrentLine>
+        <TopLine>363</TopLine>
+        <CurrentLine>416</CurrentLine>
+        <Folding>1</Folding>
+        <ContractedFolders></ContractedFolders>
+        <PaneID>0</PaneID>
+      </Doc>
+      <Doc>
+        <Name>../Src/main.c</Name>
+        <ColumnNumber>18</ColumnNumber>
+        <TopLine>433</TopLine>
+        <CurrentLine>489</CurrentLine>
+        <Folding>1</Folding>
+        <ContractedFolders></ContractedFolders>
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+        <Name>..\Src\PLCfunctions.c</Name>
+        <ColumnNumber>0</ColumnNumber>
+        <TopLine>343</TopLine>
+        <CurrentLine>358</CurrentLine>
+        <Folding>1</Folding>
+        <ContractedFolders></ContractedFolders>
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+      </Doc>
+      <Doc>
+        <Name>..\Src\KMachine.c</Name>
+        <ColumnNumber>30</ColumnNumber>
+        <TopLine>592</TopLine>
+        <CurrentLine>483</CurrentLine>
+        <Folding>1</Folding>
+        <ContractedFolders></ContractedFolders>
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+      </Doc>
+      <Doc>
+        <Name>..\Src\GlobalDef.c</Name>
+        <ColumnNumber>0</ColumnNumber>
+        <TopLine>37</TopLine>
+        <CurrentLine>38</CurrentLine>
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+        <ContractedFolders></ContractedFolders>
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+      <Doc>
+        <Name>..\Src\debug.c</Name>
+        <ColumnNumber>28</ColumnNumber>
+        <TopLine>251</TopLine>
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         <Folding>1</Folding>
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diff --git a/MDK-ARM/F030C8T6_Test2.uvoptx b/MDK-ARM/F030C8T6_Test2.uvoptx
index f3ce22f..1a589aa 100644
--- a/MDK-ARM/F030C8T6_Test2.uvoptx
+++ b/MDK-ARM/F030C8T6_Test2.uvoptx
@@ -118,6 +118,12 @@
         <SetRegEntry>
           <Number>0</Number>
           <Key>DLGUARM</Key>
+          <Name>H姒�
`顕晇H姒�
</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGDARM</Key>
+          <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)</Name>
         </SetRegEntry>
         <SetRegEntry>
           <Number>0</Number>
@@ -127,12 +133,12 @@
         <SetRegEntry>
           <Number>0</Number>
           <Key>DLGTARM</Key>
-          <Name>(1010=856,0,1273,429,0)(1007=0,0,187,216,0)(1008=-1,-1,-1,-1,0)</Name>
+          <Name>(1010=856,0,1273,429,0)(1007=0,0,187,216,0)(1008=472,504,848,740,0)</Name>
         </SetRegEntry>
         <SetRegEntry>
           <Number>0</Number>
           <Key>ARMDBGFLAGS</Key>
-          <Name></Name>
+          <Name>-T0</Name>
         </SetRegEntry>
         <SetRegEntry>
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@@ -145,29 +151,17 @@
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         </SetRegEntry>
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-          <LineNumber>118</LineNumber>
-          <EnabledFlag>1</EnabledFlag>
-          <Address>134229098</Address>
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-          <Filename>..\Src\BSP.c</Filename>
-          <ExecCommand></ExecCommand>
-          <Expression>\\F030C8T6_Test2\../Src/BSP.c\118</Expression>
-        </Bp>
-      </Breakpoint>
+      <Breakpoint/>
       <WatchWindow1>
         <Ww>
           <count>0</count>
           <WinNumber>1</WinNumber>
           <ItemText>ADCValues</ItemText>
+        </Ww>
+        <Ww>
+          <count>1</count>
+          <WinNumber>1</WinNumber>
+          <ItemText>str1</ItemText>
         </Ww>
       </WatchWindow1>
       <MemoryWindow1>
@@ -233,6 +227,18 @@
           <Name>System Viewer\NVIC</Name>
           <WinId>35905</WinId>
         </Entry>
+        <Entry>
+          <Name>System Viewer\RCC</Name>
+          <WinId>35903</WinId>
+        </Entry>
+        <Entry>
+          <Name>System Viewer\TIM6</Name>
+          <WinId>35901</WinId>
+        </Entry>
+        <Entry>
+          <Name>System Viewer\USART2</Name>
+          <WinId>35902</WinId>
+        </Entry>
       </SystemViewers>
       <DebugDescription>
         <Enable>1</Enable>
@@ -285,7 +291,7 @@
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       <FileNumber>3</FileNumber>
       <FileType>1</FileType>
-      <tvExp>0</tvExp>
+      <tvExp>1</tvExp>
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@@ -413,6 +419,30 @@
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       <bShared>0</bShared>
     </File>
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+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>..\Src\ModbusRTU.c</PathWithFileName>
+      <FilenameWithoutPath>ModbusRTU.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
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+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
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   </Group>
 
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@@ -563,7 +593,7 @@
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@@ -575,7 +605,7 @@
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@@ -623,7 +653,7 @@
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@@ -705,6 +735,110 @@
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+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>..\Src\Ethernet\loopback.c</PathWithFileName>
+      <FilenameWithoutPath>loopback.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
   </Group>
 
   <Group>
diff --git a/MDK-ARM/F030C8T6_Test2.uvprojx b/MDK-ARM/F030C8T6_Test2.uvprojx
index e478997..6199103 100644
--- a/MDK-ARM/F030C8T6_Test2.uvprojx
+++ b/MDK-ARM/F030C8T6_Test2.uvprojx
@@ -335,7 +335,7 @@
               <MiscControls></MiscControls>
               <Define>USE_FULL_LL_DRIVER,USE_HAL_DRIVER</Define>
               <Undefine></Undefine>
-              <IncludePath>../Inc;           ../Drivers/STM32F0xx_HAL_Driver/Inc;           ../Drivers/CMSIS/Device/ST/STM32F0xx/Include;           ../Drivers/CMSIS/Include;    ../Drivers/STM32F0xx_HAL_Driver/Inc/Legacy</IncludePath>
+              <IncludePath>../Inc;../Src;           ../Drivers/STM32F0xx_HAL_Driver/Inc;           ../Drivers/CMSIS/Device/ST/STM32F0xx/Include;           ../Drivers/CMSIS/Include;    ../Drivers/STM32F0xx_HAL_Driver/Inc/Legacy</IncludePath>
             </VariousControls>
           </Cads>
           <Aads>
@@ -448,6 +448,16 @@
               <FileName>KLink.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\Src\KLink.c</FilePath>
+            </File>
+            <File>
+              <FileName>ModbusRTU.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\Src\ModbusRTU.c</FilePath>
+            </File>
+            <File>
+              <FileName>debug.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\Src\debug.c</FilePath>
             </File>
           </Files>
         </Group>
@@ -574,6 +584,51 @@
               <FileType>1</FileType>
               <FilePath>../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_utils.c</FilePath>
             </File>
+            <File>
+              <FileName>stm32f0xx_ll_tim.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_ll_tim.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/W5500</GroupName>
+          <Files>
+            <File>
+              <FileName>socket.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\Src\Ethernet\socket.c</FilePath>
+            </File>
+            <File>
+              <FileName>wizchip_conf.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\Src\Ethernet\wizchip_conf.c</FilePath>
+            </File>
+            <File>
+              <FileName>dns.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\Src\Internet\DNS\dns.c</FilePath>
+            </File>
+            <File>
+              <FileName>dhcp.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\Src\Internet\DHCP\dhcp.c</FilePath>
+            </File>
+            <File>
+              <FileName>w5500.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\Src\Ethernet\W5500\w5500.c</FilePath>
+            </File>
+            <File>
+              <FileName>w5500_port.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\Src\w5500_port.c</FilePath>
+            </File>
+            <File>
+              <FileName>loopback.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\Src\Ethernet\loopback.c</FilePath>
+            </File>
           </Files>
         </Group>
         <Group>
diff --git a/MDK-ARM/JLinkLog.txt b/MDK-ARM/JLinkLog.txt
index b48b094..05fac1c 100644
--- a/MDK-ARM/JLinkLog.txt
+++ b/MDK-ARM/JLinkLog.txt
@@ -1,1740 +1,28 @@
 
-T13F8 000:155 SEGGER J-Link V6.10i Log File (0002ms, 0028ms total)
-T13F8 000:155 DLL Compiled: Oct 25 2016 19:31:51 (0002ms, 0028ms total)
-T13F8 000:155 Logging started @ 2021-07-28 19:42 (0002ms, 0028ms total)
-T13F8 000:157 JLINK_SetWarnOutHandler(...) (0000ms, 0028ms total)
-T13F8 000:157 JLINK_OpenEx(...)
+T16E8 000:156 SEGGER J-Link V6.10i Log File (0002ms, 0029ms total)
+T16E8 000:156 DLL Compiled: Oct 25 2016 19:31:51 (0002ms, 0029ms total)
+T16E8 000:156 Logging started @ 2022-10-15 09:00 (0002ms, 0029ms total)
+T16E8 000:158 JLINK_SetWarnOutHandler(...) (0000ms, 0029ms total)
+T16E8 000:158 JLINK_OpenEx(...)
 Firmware: J-Link ARM-OB STM32 compiled Aug 22 2012 19:52:04
 Hardware: V7.00
 S/N: 20090928
-Feature(s): RDI,FlashDL,FlashBP,JFlash,GDBFullWEBSRV Webserver running on local port 19080 (0015ms, 0043ms total)
-T13F8 000:157   returns O.K. (0015ms, 0043ms total)
-T13F8 000:172 JLINK_SetErrorOutHandler(...) (0000ms, 0043ms total)
-T13F8 000:172 JLINK_ExecCommand("ProjectFile = "D:\WORK\MCU&PCB\DIST_IO\F030C8T6_KLink_20210620\MDK-ARM\JLinkSettings.ini"", ...). Device "CORTEX-M0" selected.  returns 0x00 (0137ms, 0180ms total)
-T13F8 000:318 JLINK_ExecCommand("Device = STM32F030C8Tx", ...). Device "CORTEX-M0" selected.  returns 0x00 (0018ms, 0198ms total)
-T13F8 000:336 JLINK_ExecCommand("DisableConnectionTimeout", ...).   returns 0x01 (0000ms, 0198ms total)
-T13F8 000:336 JLINK_GetHardwareVersion()  returns 0x11170 (0000ms, 0198ms total)
-T13F8 000:336 JLINK_GetDLLVersion()  returns 61009 (0000ms, 0198ms total)
-T13F8 000:336 JLINK_GetFirmwareString(...) (0000ms, 0198ms total)
-T13F8 000:365 JLINK_GetDLLVersion()  returns 61009 (0000ms, 0198ms total)
-T13F8 000:365 JLINK_GetCompileDateTime() (0000ms, 0198ms total)
-T13F8 000:377 JLINK_GetFirmwareString(...) (0000ms, 0198ms total)
-T13F8 000:388 JLINK_GetHardwareVersion()  returns 0x11170 (0000ms, 0198ms total)
-T13F8 000:431 JLINK_TIF_Select(JLINKARM_TIF_SWD)  returns 0x00 (0001ms, 0199ms total)
-T13F8 000:432 JLINK_SetSpeed(5000) (0000ms, 0199ms total)
-T13F8 000:432 JLINK_GetId() >0x108 TIF>Found SWD-DP with ID 0x0BB11477 >0x0D TIF> >0x28 TIF> >0x0D TIF> >0x28 TIF> >0x0D TIF> >0x28 TIF> >0x0D TIF> >0x28 TIF> >0x0D TIF> >0x21 TIF> >0x0D TIF> >0x28 TIF> >0x0D TIF> >0x28 TIF> >0x0D TIF> >0x21 TIF> >0x0D TIF> >0x21 TIF> >0x0D TIF> >0x21 TIF>AP-IDR: 0x04770021, Type: AHB-AP >0x0D TIF> >0x28 TIF> >0x0D TIF> >0x28 TIF> >0x0D TIF> >0x28 TIF> >0x0D TIF> >0x21 TIF> >0x0D TIF> >0x21 TIF> >0x0D TIF> >0x28 TIF> >0x0D TIF> >0x21 TIF> >0x0D TIF> >0x21 TIF>
-Found Cortex-M0 r0p0, Little endian. -- CPU_ReadMem(4 bytes @ 0xE000EDF0) -- CPU_WriteMem(4 bytes @ 0xE000EDF0) -- CPU_ReadMem(4 bytes @ 0xE0002000)FPUnit: 4 code (BP) slots and 0 literal slots -- CPU_ReadMem(4 bytes @ 0xE000EDFC) -- CPU_WriteMem(4 bytes @ 0xE000EDFC) -- CPU_ReadMem(4 bytes @ 0xE0001000) -- CPU_WriteMem(4 bytes @ 0xE0001000)CoreSight components:ROMTbl 0 @ E00FF000 -- CPU_ReadMem(16 bytes @ 0xE00FF000) -- CPU_ReadMem(16 bytes @ 0xE000EFF0) -- CPU_ReadMem(16 bytes @ 0xE000EFE0)
-ROMTbl 0 [0]: FFF0F000, CID: B105E00D, PID: 000BB008 SCS -- CPU_ReadMem(16 bytes @ 0xE0001FF0) -- CPU_ReadMem(16 bytes @ 0xE0001FE0)ROMTbl 0 [1]: FFF02000, CID: B105E00D, PID: 000BB00A DWT -- CPU_ReadMem(16 bytes @ 0xE0002FF0) -- CPU_ReadMem(16 bytes @ 0xE0002FE0)ROMTbl 0 [2]: FFF03000, CID: B105E00D, PID: 000BB00B FPB >0x0D TIF> >0x21 TIF>  returns 0x0BB11477 (0118ms, 0317ms total)
-T13F8 000:550 JLINK_GetDLLVersion()  returns 61009 (0000ms, 0317ms total)
-T13F8 000:550 JLINK_CORE_GetFound()  returns 0x60000FF (0000ms, 0317ms total)
-T13F8 000:550 JLINK_GetDebugInfo(0x100) -- Value=0xE00FF000  returns 0x00 (0000ms, 0317ms total)
-T13F8 000:562 JLINK_GetDebugInfo(0x100) -- Value=0xE00FF000  returns 0x00 (0000ms, 0317ms total)
-T13F8 000:562 JLINK_GetDebugInfo(0x101) -- Value=0x00000000  returns 0x00 (0000ms, 0317ms total)
-T13F8 000:562 JLINK_ReadMem (0xE0041FF0, 0x0010 Bytes, ...) -- CPU is running -- CPU_ReadMem(16 bytes @ 0xE0041FF0) - Data: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  returns 0x00 (0001ms, 0318ms total)
-T13F8 000:563 JLINK_GetDebugInfo(0x102) -- Value=0x00000000  returns 0x00 (0000ms, 0318ms total)
-T13F8 000:563 JLINK_GetDebugInfo(0x103) -- Value=0x00000000  returns 0x00 (0000ms, 0318ms total)
-T13F8 000:563 JLINK_ReadMem (0xE0040FF0, 0x0010 Bytes, ...) -- CPU is running -- CPU_ReadMem(16 bytes @ 0xE0040FF0) - Data: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  returns 0x00 (0001ms, 0319ms total)
-T13F8 000:564 JLINK_GetDebugInfo(0x104) -- Value=0xE0000000  returns 0x00 (0000ms, 0319ms total)
-T13F8 000:564 JLINK_GetDebugInfo(0x105) -- Value=0xE0001000  returns 0x00 (0000ms, 0319ms total)
-T13F8 000:564 JLINK_GetDebugInfo(0x106) -- Value=0xE0002000  returns 0x00 (0000ms, 0319ms total)
-T13F8 000:564 JLINK_GetDebugInfo(0x107) -- Value=0xE000E000  returns 0x00 (0000ms, 0319ms total)
-T13F8 000:564 JLINK_GetDebugInfo(0x10C) -- Value=0xE000EDF0  returns 0x00 (0000ms, 0319ms total)
-T13F8 000:564 JLINK_ReadMemU32(0xE000ED00, 0x0001 Items, ...) -- CPU is running -- CPU_ReadMem(4 bytes @ 0xE000ED00) - Data: 00 C2 0C 41  returns 0x01 (0001ms, 0320ms total)
-T13F8 000:565 JLINK_SetResetType(JLINKARM_RESET_TYPE_NORMAL)  returns JLINKARM_RESET_TYPE_NORMAL (0000ms, 0320ms total)
-T13F8 000:565 JLINK_Reset() -- CPU is running -- CPU_WriteMem(4 bytes @ 0xE000EDF0) -- CPU is running -- CPU_WriteMem(4 bytes @ 0xE000EDFC) >0x35 TIF> -- CPU is running -- CPU_WriteMem(4 bytes @ 0xE000ED0C) -- CPU is running -- CPU_ReadMem(4 bytes @ 0xE000EDF0) -- CPU is running -- CPU_ReadMem(4 bytes @ 0xE000EDF0) -- CPU is running -- CPU_WriteMem(4 bytes @ 0xE000EDF0) -- CPU is running -- CPU_WriteMem(4 bytes @ 0xE000EDFC) -- CPU is running -- CPU_ReadMem(4 bytes @ 0xE000EDF0)
- -- CPU_WriteMem(4 bytes @ 0xE0002000) -- CPU_ReadMem(4 bytes @ 0xE000EDFC) -- CPU_ReadMem(4 bytes @ 0xE0001000) -- CPU_WriteMem(4 bytes @ 0xE0001000) (0020ms, 0340ms total)
-T13F8 000:585 JLINK_Halt()  returns 0x00 (0000ms, 0340ms total)
-T13F8 000:585 JLINK_IsHalted()  returns TRUE (0000ms, 0340ms total)
-T13F8 000:585 JLINK_ReadMemU32(0xE000EDF0, 0x0001 Items, ...) -- CPU_ReadMem(4 bytes @ 0xE000EDF0) - Data: 03 00 03 00  returns 0x01 (0001ms, 0341ms total)
-T13F8 000:586 JLINK_WriteU32(0xE000EDF0, 0xA05F0003) -- CPU_WriteMem(4 bytes @ 0xE000EDF0)  returns 0x00 (0000ms, 0341ms total)
-T13F8 000:586 JLINK_WriteU32(0xE000EDFC, 0x01000000) -- CPU_WriteMem(4 bytes @ 0xE000EDFC)  returns 0x00 (0001ms, 0342ms total)
-T13F8 000:623 JLINK_GetHWStatus(...)  returns 0x00 (0002ms, 0344ms total)
-T13F8 000:656 JLINK_GetNumBPUnits(Type = 0xFFFFFF00)  returns 0x04 (0000ms, 0344ms total)
-T13F8 000:656 JLINK_GetNumBPUnits(Type = 0xF0)  returns 0x2000 (0000ms, 0344ms total)
-T13F8 000:656 JLINK_GetNumWPUnits()  returns 0x02 (0000ms, 0344ms total)
-T13F8 000:684 JLINK_GetSpeed()  returns 0xFA0 (0000ms, 0344ms total)
-T13F8 000:701 JLINK_ReadMemU32(0xE000E004, 0x0001 Items, ...) -- CPU_ReadMem(4 bytes @ 0xE000E004) - Data: 00 00 00 00  returns 0x01 (0001ms, 0345ms total)
-T13F8 000:702 JLINK_Halt()  returns 0x00 (0000ms, 0345ms total)
-T13F8 000:702 JLINK_IsHalted()  returns TRUE (0000ms, 0345ms total)
-T13F8 000:706 JLINK_WriteMem(0x20000000, 0x0170 Bytes, ...) - Data: 00 BE 0A E0 0D 78 2D 06 68 40 08 24 40 00 00 D3 ... -- CPU_WriteMem(368 bytes @ 0x20000000)  returns 0x170 (0005ms, 0350ms total)
-T13F8 000:711 JLINK_WriteReg(R0, 0x08000000)  returns 0x00 (0000ms, 0350ms total)
-T13F8 000:711 JLINK_WriteReg(R1, 0x00B71B00)  returns 0x00 (0000ms, 0350ms total)
-T13F8 000:711 JLINK_WriteReg(R2, 0x00000001)  returns 0x00 (0000ms, 0350ms total)
-T13F8 000:711 JLINK_WriteReg(R3, 0x00000000)  returns 0x00 (0001ms, 0351ms total)
-T13F8 000:712 JLINK_WriteReg(R4, 0x00000000)  returns 0x00 (0000ms, 0351ms total)
-T13F8 000:712 JLINK_WriteReg(R5, 0x00000000)  returns 0x00 (0000ms, 0351ms total)
-T13F8 000:712 JLINK_WriteReg(R6, 0x00000000)  returns 0x00 (0000ms, 0351ms total)
-T13F8 000:712 JLINK_WriteReg(R7, 0x00000000)  returns 0x00 (0000ms, 0351ms total)
-T13F8 000:712 JLINK_WriteReg(R8, 0x00000000)  returns 0x00 (0000ms, 0351ms total)
-T13F8 000:712 JLINK_WriteReg(R9, 0x2000016C)  returns 0x00 (0000ms, 0351ms total)
-T13F8 000:712 JLINK_WriteReg(R10, 0x00000000)  returns 0x00 (0000ms, 0351ms total)
-T13F8 000:712 JLINK_WriteReg(R11, 0x00000000)  returns 0x00 (0000ms, 0351ms total)
-T13F8 000:712 JLINK_WriteReg(R12, 0x00000000)  returns 0x00 (0000ms, 0351ms total)
-T13F8 000:712 JLINK_WriteReg(R13 (SP), 0x20001000)  returns 0x00 (0000ms, 0351ms total)
-T13F8 000:712 JLINK_WriteReg(R14, 0x20000001)  returns 0x00 (0000ms, 0351ms total)
-T13F8 000:712 JLINK_WriteReg(R15 (PC), 0x20000038)  returns 0x00 (0000ms, 0351ms total)
-T13F8 000:712 JLINK_WriteReg(XPSR, 0x01000000)  returns 0x00 (0000ms, 0351ms total)
-T13F8 000:712 JLINK_WriteReg(MSP, 0x20001000)  returns 0x00 (0000ms, 0351ms total)
-T13F8 000:712 JLINK_WriteReg(PSP, 0x20001000)  returns 0x00 (0000ms, 0351ms total)
-T13F8 000:712 JLINK_WriteReg(CFBP, 0x00000000)  returns 0x00 (0000ms, 0351ms total)
-T13F8 000:712 JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2) -- CPU_ReadMem(4 bytes @ 0x20000000) -- CPU_WriteMem(4 bytes @ 0x20000000) -- CPU_ReadMem(4 bytes @ 0x20000000) -- CPU_WriteMem(4 bytes @ 0x20000000) -- CPU_ReadMem(2 bytes @ 0x20000000)  returns 0x00000001 (0003ms, 0354ms total)
-T13F8 000:715 JLINK_Go() -- CPU_WriteMem(2 bytes @ 0x20000000) -- CPU_ReadMem(4 bytes @ 0xE0001000) -- CPU_WriteMem(4 bytes @ 0xE0001000) -- CPU_WriteMem(4 bytes @ 0xE0002008) -- CPU_WriteMem(4 bytes @ 0xE000200C) -- CPU_WriteMem(4 bytes @ 0xE0002010) -- CPU_WriteMem(4 bytes @ 0xE0002014) -- CPU_WriteMem(4 bytes @ 0xE0001004) (0007ms, 0361ms total)
-T13F8 000:722 JLINK_IsHalted() -- CPU_ReadMem(2 bytes @ 0x20000000)  returns TRUE (0004ms, 0365ms total)
-T13F8 000:726 JLINK_ReadReg(R15 (PC))  returns 0x20000000 (0000ms, 0361ms total)
-T13F8 000:726 JLINK_ClrBPEx(BPHandle = 0x00000001)  returns 0x00 (0000ms, 0361ms total)
-T13F8 000:726 JLINK_ReadReg(R0)  returns 0x00000000 (0000ms, 0361ms total)
-T13F8 000:727 JLINK_WriteReg(R0, 0x08000000)  returns 0x00 (0000ms, 0361ms total)
-T13F8 000:727 JLINK_WriteReg(R1, 0x00000400)  returns 0x00 (0000ms, 0361ms total)
-T13F8 000:727 JLINK_WriteReg(R2, 0x000000FF)  returns 0x00 (0000ms, 0361ms total)
-T13F8 000:727 JLINK_WriteReg(R3, 0x00000000)  returns 0x00 (0000ms, 0361ms total)
-T13F8 000:727 JLINK_WriteReg(R4, 0x00000000)  returns 0x00 (0000ms, 0361ms total)
-T13F8 000:727 JLINK_WriteReg(R5, 0x00000000)  returns 0x00 (0000ms, 0361ms total)
-T13F8 000:727 JLINK_WriteReg(R6, 0x00000000)  returns 0x00 (0000ms, 0361ms total)
-T13F8 000:727 JLINK_WriteReg(R7, 0x00000000)  returns 0x00 (0000ms, 0361ms total)
-T13F8 000:727 JLINK_WriteReg(R8, 0x00000000)  returns 0x00 (0000ms, 0361ms total)
-T13F8 000:727 JLINK_WriteReg(R9, 0x2000016C)  returns 0x00 (0000ms, 0361ms total)
-T13F8 000:727 JLINK_WriteReg(R10, 0x00000000)  returns 0x00 (0000ms, 0361ms total)
-T13F8 000:727 JLINK_WriteReg(R11, 0x00000000)  returns 0x00 (0000ms, 0361ms total)
-T13F8 000:727 JLINK_WriteReg(R12, 0x00000000)  returns 0x00 (0000ms, 0361ms total)
-T13F8 000:727 JLINK_WriteReg(R13 (SP), 0x20001000)  returns 0x00 (0000ms, 0361ms total)
-T13F8 000:727 JLINK_WriteReg(R14, 0x20000001)  returns 0x00 (0000ms, 0361ms total)
-T13F8 000:727 JLINK_WriteReg(R15 (PC), 0x20000020)  returns 0x00 (0000ms, 0361ms total)
-T13F8 000:727 JLINK_WriteReg(XPSR, 0x01000000)  returns 0x00 (0000ms, 0361ms total)
-T13F8 000:727 JLINK_WriteReg(MSP, 0x20001000)  returns 0x00 (0000ms, 0361ms total)
-T13F8 000:727 JLINK_WriteReg(PSP, 0x20001000)  returns 0x00 (0000ms, 0361ms total)
-T13F8 000:727 JLINK_WriteReg(CFBP, 0x00000000)  returns 0x00 (0000ms, 0361ms total)
-T13F8 000:728 JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2)  returns 0x00000002 (0000ms, 0361ms total)
-T13F8 000:728 JLINK_Go() -- CPU_ReadMem(4 bytes @ 0xE0001000) -- CPU_WriteMem(4 bytes @ 0xE0001000) (0002ms, 0363ms total)
-T13F8 000:730 JLINK_IsHalted() -- CPU_ReadMem(2 bytes @ 0x20000000)  returns TRUE (0004ms, 0367ms total)
-T13F8 000:734 JLINK_ReadReg(R15 (PC))  returns 0x20000000 (0000ms, 0363ms total)
-T13F8 000:734 JLINK_ClrBPEx(BPHandle = 0x00000002)  returns 0x00 (0000ms, 0363ms total)
-T13F8 000:734 JLINK_ReadReg(R0)  returns 0x00000001 (0000ms, 0363ms total)
-T13F8 000:734 JLINK_WriteReg(R0, 0x08000000)  returns 0x00 (0001ms, 0364ms total)
-T13F8 000:735 JLINK_WriteReg(R1, 0x00000400)  returns 0x00 (0000ms, 0364ms total)
-T13F8 000:735 JLINK_WriteReg(R2, 0x000000FF)  returns 0x00 (0000ms, 0364ms total)
-T13F8 000:735 JLINK_WriteReg(R3, 0x00000000)  returns 0x00 (0000ms, 0364ms total)
-T13F8 000:735 JLINK_WriteReg(R4, 0x00000000)  returns 0x00 (0000ms, 0364ms total)
-T13F8 000:735 JLINK_WriteReg(R5, 0x00000000)  returns 0x00 (0000ms, 0364ms total)
-T13F8 000:735 JLINK_WriteReg(R6, 0x00000000)  returns 0x00 (0000ms, 0364ms total)
-T13F8 000:735 JLINK_WriteReg(R7, 0x00000000)  returns 0x00 (0000ms, 0364ms total)
-T13F8 000:735 JLINK_WriteReg(R8, 0x00000000)  returns 0x00 (0000ms, 0364ms total)
-T13F8 000:735 JLINK_WriteReg(R9, 0x2000016C)  returns 0x00 (0000ms, 0364ms total)
-T13F8 000:735 JLINK_WriteReg(R10, 0x00000000)  returns 0x00 (0000ms, 0364ms total)
-T13F8 000:735 JLINK_WriteReg(R11, 0x00000000)  returns 0x00 (0000ms, 0364ms total)
-T13F8 000:735 JLINK_WriteReg(R12, 0x00000000)  returns 0x00 (0000ms, 0364ms total)
-T13F8 000:735 JLINK_WriteReg(R13 (SP), 0x20001000)  returns 0x00 (0000ms, 0364ms total)
-T13F8 000:735 JLINK_WriteReg(R14, 0x20000001)  returns 0x00 (0000ms, 0364ms total)
-T13F8 000:735 JLINK_WriteReg(R15 (PC), 0x200000B8)  returns 0x00 (0000ms, 0364ms total)
-T13F8 000:735 JLINK_WriteReg(XPSR, 0x01000000)  returns 0x00 (0000ms, 0364ms total)
-T13F8 000:735 JLINK_WriteReg(MSP, 0x20001000)  returns 0x00 (0000ms, 0364ms total)
-T13F8 000:735 JLINK_WriteReg(PSP, 0x20001000)  returns 0x00 (0000ms, 0364ms total)
-T13F8 000:735 JLINK_WriteReg(CFBP, 0x00000000)  returns 0x00 (0000ms, 0364ms total)
-T13F8 000:735 JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2)  returns 0x00000003 (0000ms, 0364ms total)
-T13F8 000:735 JLINK_Go() -- CPU_ReadMem(4 bytes @ 0xE0001000) -- CPU_WriteMem(4 bytes @ 0xE0001000) (0003ms, 0367ms total)
-T13F8 000:738 JLINK_IsHalted()  returns FALSE (0000ms, 0367ms total)
-T13F8 000:856 JLINK_IsHalted() -- CPU_ReadMem(2 bytes @ 0x20000000)  returns TRUE (0003ms, 0370ms total)
-T13F8 000:859 JLINK_ReadReg(R15 (PC))  returns 0x20000000 (0000ms, 0367ms total)
-T13F8 000:859 JLINK_ClrBPEx(BPHandle = 0x00000003)  returns 0x00 (0001ms, 0368ms total)
-T13F8 000:860 JLINK_ReadReg(R0)  returns 0x00000000 (0000ms, 0368ms total)
-T13F8 000:861 JLINK_WriteReg(R0, 0x08000400)  returns 0x00 (0000ms, 0368ms total)
-T13F8 000:861 JLINK_WriteReg(R1, 0x00000400)  returns 0x00 (0000ms, 0368ms total)
-T13F8 000:861 JLINK_WriteReg(R2, 0x000000FF)  returns 0x00 (0000ms, 0368ms total)
-T13F8 000:861 JLINK_WriteReg(R3, 0x00000000)  returns 0x00 (0000ms, 0368ms total)
-T13F8 000:861 JLINK_WriteReg(R4, 0x00000000)  returns 0x00 (0000ms, 0368ms total)
-T13F8 000:861 JLINK_WriteReg(R5, 0x00000000)  returns 0x00 (0000ms, 0368ms total)
-T13F8 000:861 JLINK_WriteReg(R6, 0x00000000)  returns 0x00 (0000ms, 0368ms total)
-T13F8 000:861 JLINK_WriteReg(R7, 0x00000000)  returns 0x00 (0000ms, 0368ms total)
-T13F8 000:861 JLINK_WriteReg(R8, 0x00000000)  returns 0x00 (0000ms, 0368ms total)
-T13F8 000:861 JLINK_WriteReg(R9, 0x2000016C)  returns 0x00 (0000ms, 0368ms total)
-T13F8 000:861 JLINK_WriteReg(R10, 0x00000000)  returns 0x00 (0000ms, 0368ms total)
-T13F8 000:861 JLINK_WriteReg(R11, 0x00000000)  returns 0x00 (0000ms, 0368ms total)
-T13F8 000:861 JLINK_WriteReg(R12, 0x00000000)  returns 0x00 (0000ms, 0368ms total)
-T13F8 000:861 JLINK_WriteReg(R13 (SP), 0x20001000)  returns 0x00 (0000ms, 0368ms total)
-T13F8 000:861 JLINK_WriteReg(R14, 0x20000001)  returns 0x00 (0000ms, 0368ms total)
-T13F8 000:861 JLINK_WriteReg(R15 (PC), 0x20000020)  returns 0x00 (0000ms, 0368ms total)
-T13F8 000:861 JLINK_WriteReg(XPSR, 0x01000000)  returns 0x00 (0000ms, 0368ms total)
-T13F8 000:861 JLINK_WriteReg(MSP, 0x20001000)  returns 0x00 (0000ms, 0368ms total)
-T13F8 000:861 JLINK_WriteReg(PSP, 0x20001000)  returns 0x00 (0000ms, 0368ms total)
-T13F8 000:861 JLINK_WriteReg(CFBP, 0x00000000)  returns 0x00 (0000ms, 0368ms total)
-T13F8 000:861 JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2)  returns 0x00000004 (0001ms, 0369ms total)
-T13F8 000:862 JLINK_Go() -- CPU_ReadMem(4 bytes @ 0xE0001000) -- CPU_WriteMem(4 bytes @ 0xE0001000) (0003ms, 0372ms total)
-T13F8 000:865 JLINK_IsHalted() -- CPU_ReadMem(2 bytes @ 0x20000000)  returns TRUE (0003ms, 0375ms total)
-T13F8 000:868 JLINK_ReadReg(R15 (PC))  returns 0x20000000 (0001ms, 0373ms total)
-T13F8 000:869 JLINK_ClrBPEx(BPHandle = 0x00000004)  returns 0x00 (0000ms, 0373ms total)
-T13F8 000:869 JLINK_ReadReg(R0)  returns 0x00000001 (0000ms, 0373ms total)
-T13F8 000:869 JLINK_WriteReg(R0, 0x08000400)  returns 0x00 (0000ms, 0373ms total)
-T13F8 000:869 JLINK_WriteReg(R1, 0x00000400)  returns 0x00 (0000ms, 0373ms total)
-T13F8 000:869 JLINK_WriteReg(R2, 0x000000FF)  returns 0x00 (0000ms, 0373ms total)
-T13F8 000:869 JLINK_WriteReg(R3, 0x00000000)  returns 0x00 (0000ms, 0373ms total)
-T13F8 000:869 JLINK_WriteReg(R4, 0x00000000)  returns 0x00 (0000ms, 0373ms total)
-T13F8 000:869 JLINK_WriteReg(R5, 0x00000000)  returns 0x00 (0000ms, 0373ms total)
-T13F8 000:869 JLINK_WriteReg(R6, 0x00000000)  returns 0x00 (0000ms, 0373ms total)
-T13F8 000:869 JLINK_WriteReg(R7, 0x00000000)  returns 0x00 (0000ms, 0373ms total)
-T13F8 000:869 JLINK_WriteReg(R8, 0x00000000)  returns 0x00 (0000ms, 0373ms total)
-T13F8 000:869 JLINK_WriteReg(R9, 0x2000016C)  returns 0x00 (0000ms, 0373ms total)
-T13F8 000:869 JLINK_WriteReg(R10, 0x00000000)  returns 0x00 (0000ms, 0373ms total)
-T13F8 000:869 JLINK_WriteReg(R11, 0x00000000)  returns 0x00 (0000ms, 0373ms total)
-T13F8 000:869 JLINK_WriteReg(R12, 0x00000000)  returns 0x00 (0000ms, 0373ms total)
-T13F8 000:869 JLINK_WriteReg(R13 (SP), 0x20001000)  returns 0x00 (0000ms, 0373ms total)
-T13F8 000:869 JLINK_WriteReg(R14, 0x20000001)  returns 0x00 (0000ms, 0373ms total)
-T13F8 000:869 JLINK_WriteReg(R15 (PC), 0x200000B8)  returns 0x00 (0000ms, 0373ms total)
-T13F8 000:869 JLINK_WriteReg(XPSR, 0x01000000)  returns 0x00 (0000ms, 0373ms total)
-T13F8 000:869 JLINK_WriteReg(MSP, 0x20001000)  returns 0x00 (0000ms, 0373ms total)
-T13F8 000:869 JLINK_WriteReg(PSP, 0x20001000)  returns 0x00 (0000ms, 0373ms total)
-T13F8 000:869 JLINK_WriteReg(CFBP, 0x00000000)  returns 0x00 (0000ms, 0373ms total)
-T13F8 000:869 JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2)  returns 0x00000005 (0000ms, 0373ms total)
-T13F8 000:870 JLINK_Go() -- CPU_ReadMem(4 bytes @ 0xE0001000) -- CPU_WriteMem(4 bytes @ 0xE0001000) (0002ms, 0375ms total)
-T13F8 000:872 JLINK_IsHalted()  returns FALSE (0001ms, 0376ms total)
-T13F8 000:876 JLINK_IsHalted()  returns FALSE (0000ms, 0375ms total)
-T13F8 000:878 JLINK_IsHalted()  returns FALSE (0000ms, 0375ms total)
-T13F8 000:880 JLINK_IsHalted()  returns FALSE (0000ms, 0375ms total)
-T13F8 000:882 JLINK_IsHalted()  returns FALSE (0000ms, 0375ms total)
-T13F8 000:884 JLINK_IsHalted()  returns FALSE (0000ms, 0375ms total)
-T13F8 000:891 JLINK_IsHalted()  returns FALSE (0000ms, 0375ms total)
-T13F8 000:893 JLINK_IsHalted()  returns FALSE (0000ms, 0375ms total)
-T13F8 000:895 JLINK_IsHalted() -- CPU_ReadMem(2 bytes @ 0x20000000)  returns TRUE (0003ms, 0378ms total)
-T13F8 000:899 JLINK_ReadReg(R15 (PC))  returns 0x20000000 (0000ms, 0375ms total)
-T13F8 000:899 JLINK_ClrBPEx(BPHandle = 0x00000005)  returns 0x00 (0000ms, 0375ms total)
-T13F8 000:899 JLINK_ReadReg(R0)  returns 0x00000000 (0000ms, 0375ms total)
-T13F8 000:899 JLINK_WriteReg(R0, 0x08000800)  returns 0x00 (0000ms, 0375ms total)
-T13F8 000:899 JLINK_WriteReg(R1, 0x00000400)  returns 0x00 (0000ms, 0375ms total)
-T13F8 000:899 JLINK_WriteReg(R2, 0x000000FF)  returns 0x00 (0001ms, 0376ms total)
-T13F8 000:900 JLINK_WriteReg(R3, 0x00000000)  returns 0x00 (0000ms, 0376ms total)
-T13F8 000:900 JLINK_WriteReg(R4, 0x00000000)  returns 0x00 (0000ms, 0376ms total)
-T13F8 000:900 JLINK_WriteReg(R5, 0x00000000)  returns 0x00 (0000ms, 0376ms total)
-T13F8 000:900 JLINK_WriteReg(R6, 0x00000000)  returns 0x00 (0000ms, 0376ms total)
-T13F8 000:900 JLINK_WriteReg(R7, 0x00000000)  returns 0x00 (0000ms, 0376ms total)
-T13F8 000:900 JLINK_WriteReg(R8, 0x00000000)  returns 0x00 (0000ms, 0376ms total)
-T13F8 000:900 JLINK_WriteReg(R9, 0x2000016C)  returns 0x00 (0000ms, 0376ms total)
-T13F8 000:900 JLINK_WriteReg(R10, 0x00000000)  returns 0x00 (0000ms, 0376ms total)
-T13F8 000:900 JLINK_WriteReg(R11, 0x00000000)  returns 0x00 (0000ms, 0376ms total)
-T13F8 000:900 JLINK_WriteReg(R12, 0x00000000)  returns 0x00 (0000ms, 0376ms total)
-T13F8 000:900 JLINK_WriteReg(R13 (SP), 0x20001000)  returns 0x00 (0000ms, 0376ms total)
-T13F8 000:900 JLINK_WriteReg(R14, 0x20000001)  returns 0x00 (0000ms, 0376ms total)
-T13F8 000:900 JLINK_WriteReg(R15 (PC), 0x20000020)  returns 0x00 (0000ms, 0376ms total)
-T13F8 000:900 JLINK_WriteReg(XPSR, 0x01000000)  returns 0x00 (0000ms, 0376ms total)
-T13F8 000:900 JLINK_WriteReg(MSP, 0x20001000)  returns 0x00 (0000ms, 0376ms total)
-T13F8 000:900 JLINK_WriteReg(PSP, 0x20001000)  returns 0x00 (0000ms, 0376ms total)
-T13F8 000:900 JLINK_WriteReg(CFBP, 0x00000000)  returns 0x00 (0000ms, 0376ms total)
-T13F8 000:900 JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2)  returns 0x00000006 (0000ms, 0376ms total)
-T13F8 000:900 JLINK_Go() -- CPU_ReadMem(4 bytes @ 0xE0001000) -- CPU_WriteMem(4 bytes @ 0xE0001000) (0003ms, 0379ms total)
-T13F8 000:903 JLINK_IsHalted() -- CPU_ReadMem(2 bytes @ 0x20000000)  returns TRUE (0004ms, 0383ms total)
-T13F8 000:907 JLINK_ReadReg(R15 (PC))  returns 0x20000000 (0000ms, 0379ms total)
-T13F8 000:907 JLINK_ClrBPEx(BPHandle = 0x00000006)  returns 0x00 (0000ms, 0379ms total)
-T13F8 000:907 JLINK_ReadReg(R0)  returns 0x00000001 (0000ms, 0379ms total)
-T13F8 000:907 JLINK_WriteReg(R0, 0x08000800)  returns 0x00 (0000ms, 0379ms total)
-T13F8 000:907 JLINK_WriteReg(R1, 0x00000400)  returns 0x00 (0000ms, 0379ms total)
-T13F8 000:907 JLINK_WriteReg(R2, 0x000000FF)  returns 0x00 (0000ms, 0379ms total)
-T13F8 000:907 JLINK_WriteReg(R3, 0x00000000)  returns 0x00 (0000ms, 0379ms total)
-T13F8 000:907 JLINK_WriteReg(R4, 0x00000000)  returns 0x00 (0000ms, 0379ms total)
-T13F8 000:907 JLINK_WriteReg(R5, 0x00000000)  returns 0x00 (0001ms, 0380ms total)
-T13F8 000:908 JLINK_WriteReg(R6, 0x00000000)  returns 0x00 (0000ms, 0380ms total)
-T13F8 000:908 JLINK_WriteReg(R7, 0x00000000)  returns 0x00 (0000ms, 0380ms total)
-T13F8 000:908 JLINK_WriteReg(R8, 0x00000000)  returns 0x00 (0000ms, 0380ms total)
-T13F8 000:908 JLINK_WriteReg(R9, 0x2000016C)  returns 0x00 (0000ms, 0380ms total)
-T13F8 000:908 JLINK_WriteReg(R10, 0x00000000)  returns 0x00 (0000ms, 0380ms total)
-T13F8 000:908 JLINK_WriteReg(R11, 0x00000000)  returns 0x00 (0000ms, 0380ms total)
-T13F8 000:908 JLINK_WriteReg(R12, 0x00000000)  returns 0x00 (0000ms, 0380ms total)
-T13F8 000:908 JLINK_WriteReg(R13 (SP), 0x20001000)  returns 0x00 (0000ms, 0380ms total)
-T13F8 000:908 JLINK_WriteReg(R14, 0x20000001)  returns 0x00 (0000ms, 0380ms total)
-T13F8 000:908 JLINK_WriteReg(R15 (PC), 0x200000B8)  returns 0x00 (0000ms, 0380ms total)
-T13F8 000:908 JLINK_WriteReg(XPSR, 0x01000000)  returns 0x00 (0000ms, 0380ms total)
-T13F8 000:908 JLINK_WriteReg(MSP, 0x20001000)  returns 0x00 (0000ms, 0380ms total)
-T13F8 000:908 JLINK_WriteReg(PSP, 0x20001000)  returns 0x00 (0000ms, 0380ms total)
-T13F8 000:908 JLINK_WriteReg(CFBP, 0x00000000)  returns 0x00 (0000ms, 0380ms total)
-T13F8 000:908 JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2)  returns 0x00000007 (0000ms, 0380ms total)
-T13F8 000:908 JLINK_Go() -- CPU_ReadMem(4 bytes @ 0xE0001000) -- CPU_WriteMem(4 bytes @ 0xE0001000) (0003ms, 0383ms total)
-T13F8 000:911 JLINK_IsHalted()  returns FALSE (0000ms, 0383ms total)
-T13F8 000:913 JLINK_IsHalted()  returns FALSE (0000ms, 0383ms total)
-T13F8 000:915 JLINK_IsHalted()  returns FALSE (0000ms, 0383ms total)
-T13F8 000:917 JLINK_IsHalted()  returns FALSE (0000ms, 0383ms total)
-T13F8 000:919 JLINK_IsHalted()  returns FALSE (0000ms, 0383ms total)
-T13F8 000:921 JLINK_IsHalted()  returns FALSE (0000ms, 0383ms total)
-T13F8 000:923 JLINK_IsHalted()  returns FALSE (0000ms, 0383ms total)
-T13F8 000:925 JLINK_IsHalted()  returns FALSE (0000ms, 0383ms total)
-T13F8 000:927 JLINK_IsHalted()  returns FALSE (0000ms, 0383ms total)
-T13F8 000:929 JLINK_IsHalted()  returns FALSE (0000ms, 0383ms total)
-T13F8 000:931 JLINK_IsHalted()  returns FALSE (0000ms, 0383ms total)
-T13F8 000:933 JLINK_IsHalted() -- CPU_ReadMem(2 bytes @ 0x20000000)  returns TRUE (0003ms, 0386ms total)
-T13F8 000:936 JLINK_ReadReg(R15 (PC))  returns 0x20000000 (0000ms, 0383ms total)
-T13F8 000:936 JLINK_ClrBPEx(BPHandle = 0x00000007)  returns 0x00 (0000ms, 0383ms total)
-T13F8 000:936 JLINK_ReadReg(R0)  returns 0x00000000 (0000ms, 0383ms total)
-T13F8 000:937 JLINK_WriteReg(R0, 0x08000C00)  returns 0x00 (0000ms, 0383ms total)
-T13F8 000:937 JLINK_WriteReg(R1, 0x00000400)  returns 0x00 (0000ms, 0383ms total)
-T13F8 000:937 JLINK_WriteReg(R2, 0x000000FF)  returns 0x00 (0000ms, 0383ms total)
-T13F8 000:937 JLINK_WriteReg(R3, 0x00000000)  returns 0x00 (0000ms, 0383ms total)
-T13F8 000:937 JLINK_WriteReg(R4, 0x00000000)  returns 0x00 (0000ms, 0383ms total)
-T13F8 000:937 JLINK_WriteReg(R5, 0x00000000)  returns 0x00 (0000ms, 0383ms total)
-T13F8 000:937 JLINK_WriteReg(R6, 0x00000000)  returns 0x00 (0000ms, 0383ms total)
-T13F8 000:937 JLINK_WriteReg(R7, 0x00000000)  returns 0x00 (0000ms, 0383ms total)
-T13F8 000:937 JLINK_WriteReg(R8, 0x00000000)  returns 0x00 (0000ms, 0383ms total)
-T13F8 000:937 JLINK_WriteReg(R9, 0x2000016C)  returns 0x00 (0000ms, 0383ms total)
-T13F8 000:937 JLINK_WriteReg(R10, 0x00000000)  returns 0x00 (0001ms, 0384ms total)
-T13F8 000:938 JLINK_WriteReg(R11, 0x00000000)  returns 0x00 (0000ms, 0384ms total)
-T13F8 000:938 JLINK_WriteReg(R12, 0x00000000)  returns 0x00 (0000ms, 0384ms total)
-T13F8 000:938 JLINK_WriteReg(R13 (SP), 0x20001000)  returns 0x00 (0000ms, 0384ms total)
-T13F8 000:938 JLINK_WriteReg(R14, 0x20000001)  returns 0x00 (0000ms, 0384ms total)
-T13F8 000:938 JLINK_WriteReg(R15 (PC), 0x20000020)  returns 0x00 (0000ms, 0384ms total)
-T13F8 000:938 JLINK_WriteReg(XPSR, 0x01000000)  returns 0x00 (0000ms, 0384ms total)
-T13F8 000:938 JLINK_WriteReg(MSP, 0x20001000)  returns 0x00 (0000ms, 0384ms total)
-T13F8 000:938 JLINK_WriteReg(PSP, 0x20001000)  returns 0x00 (0000ms, 0384ms total)
-T13F8 000:938 JLINK_WriteReg(CFBP, 0x00000000)  returns 0x00 (0000ms, 0384ms total)
-T13F8 000:938 JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2)  returns 0x00000008 (0000ms, 0384ms total)
-T13F8 000:938 JLINK_Go() -- CPU_ReadMem(4 bytes @ 0xE0001000) -- CPU_WriteMem(4 bytes @ 0xE0001000) (0003ms, 0387ms total)
-T13F8 000:941 JLINK_IsHalted() -- CPU_ReadMem(2 bytes @ 0x20000000)  returns TRUE (0004ms, 0391ms total)
-T13F8 000:945 JLINK_ReadReg(R15 (PC))  returns 0x20000000 (0000ms, 0387ms total)
-T13F8 000:945 JLINK_ClrBPEx(BPHandle = 0x00000008)  returns 0x00 (0000ms, 0387ms total)
-T13F8 000:945 JLINK_ReadReg(R0)  returns 0x00000001 (0000ms, 0387ms total)
-T13F8 000:945 JLINK_WriteReg(R0, 0x08000C00)  returns 0x00 (0000ms, 0387ms total)
-T13F8 000:945 JLINK_WriteReg(R1, 0x00000400)  returns 0x00 (0000ms, 0387ms total)
-T13F8 000:945 JLINK_WriteReg(R2, 0x000000FF)  returns 0x00 (0000ms, 0387ms total)
-T13F8 000:945 JLINK_WriteReg(R3, 0x00000000)  returns 0x00 (0000ms, 0387ms total)
-T13F8 000:945 JLINK_WriteReg(R4, 0x00000000)  returns 0x00 (0000ms, 0387ms total)
-T13F8 000:945 JLINK_WriteReg(R5, 0x00000000)  returns 0x00 (0000ms, 0387ms total)
-T13F8 000:945 JLINK_WriteReg(R6, 0x00000000)  returns 0x00 (0000ms, 0387ms total)
-T13F8 000:945 JLINK_WriteReg(R7, 0x00000000)  returns 0x00 (0000ms, 0387ms total)
-T13F8 000:945 JLINK_WriteReg(R8, 0x00000000)  returns 0x00 (0000ms, 0387ms total)
-T13F8 000:945 JLINK_WriteReg(R9, 0x2000016C)  returns 0x00 (0000ms, 0387ms total)
-T13F8 000:945 JLINK_WriteReg(R10, 0x00000000)  returns 0x00 (0000ms, 0387ms total)
-T13F8 000:945 JLINK_WriteReg(R11, 0x00000000)  returns 0x00 (0000ms, 0387ms total)
-T13F8 000:945 JLINK_WriteReg(R12, 0x00000000)  returns 0x00 (0000ms, 0387ms total)
-T13F8 000:945 JLINK_WriteReg(R13 (SP), 0x20001000)  returns 0x00 (0000ms, 0387ms total)
-T13F8 000:945 JLINK_WriteReg(R14, 0x20000001)  returns 0x00 (0000ms, 0387ms total)
-T13F8 000:946 JLINK_WriteReg(R15 (PC), 0x200000B8)  returns 0x00 (0000ms, 0388ms total)
-T13F8 000:946 JLINK_WriteReg(XPSR, 0x01000000)  returns 0x00 (0000ms, 0388ms total)
-T13F8 000:946 JLINK_WriteReg(MSP, 0x20001000)  returns 0x00 (0000ms, 0388ms total)
-T13F8 000:946 JLINK_WriteReg(PSP, 0x20001000)  returns 0x00 (0000ms, 0388ms total)
-T13F8 000:946 JLINK_WriteReg(CFBP, 0x00000000)  returns 0x00 (0000ms, 0388ms total)
-T13F8 000:946 JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2)  returns 0x00000009 (0000ms, 0388ms total)
-T13F8 000:946 JLINK_Go() -- CPU_ReadMem(4 bytes @ 0xE0001000) -- CPU_WriteMem(4 bytes @ 0xE0001000) (0002ms, 0390ms total)
-T13F8 000:948 JLINK_IsHalted()  returns FALSE (0001ms, 0391ms total)
-T13F8 000:951 JLINK_IsHalted()  returns FALSE (0000ms, 0390ms total)
-T13F8 000:953 JLINK_IsHalted()  returns FALSE (0000ms, 0390ms total)
-T13F8 000:955 JLINK_IsHalted()  returns FALSE (0000ms, 0390ms total)
-T13F8 000:957 JLINK_IsHalted()  returns FALSE (0000ms, 0390ms total)
-T13F8 000:975 JLINK_IsHalted() -- CPU_ReadMem(2 bytes @ 0x20000000)  returns TRUE (0004ms, 0394ms total)
-T13F8 000:979 JLINK_ReadReg(R15 (PC))  returns 0x20000000 (0000ms, 0390ms total)
-T13F8 000:979 JLINK_ClrBPEx(BPHandle = 0x00000009)  returns 0x00 (0000ms, 0390ms total)
-T13F8 000:979 JLINK_ReadReg(R0)  returns 0x00000000 (0000ms, 0390ms total)
-T13F8 000:980 JLINK_WriteReg(R0, 0x08001000)  returns 0x00 (0000ms, 0390ms total)
-T13F8 000:980 JLINK_WriteReg(R1, 0x00000400)  returns 0x00 (0000ms, 0390ms total)
-T13F8 000:980 JLINK_WriteReg(R2, 0x000000FF)  returns 0x00 (0000ms, 0390ms total)
-T13F8 000:980 JLINK_WriteReg(R3, 0x00000000)  returns 0x00 (0000ms, 0390ms total)
-T13F8 000:980 JLINK_WriteReg(R4, 0x00000000)  returns 0x00 (0000ms, 0390ms total)
-T13F8 000:980 JLINK_WriteReg(R5, 0x00000000)  returns 0x00 (0000ms, 0390ms total)
-T13F8 000:980 JLINK_WriteReg(R6, 0x00000000)  returns 0x00 (0000ms, 0390ms total)
-T13F8 000:980 JLINK_WriteReg(R7, 0x00000000)  returns 0x00 (0000ms, 0390ms total)
-T13F8 000:980 JLINK_WriteReg(R8, 0x00000000)  returns 0x00 (0000ms, 0390ms total)
-T13F8 000:980 JLINK_WriteReg(R9, 0x2000016C)  returns 0x00 (0000ms, 0390ms total)
-T13F8 000:980 JLINK_WriteReg(R10, 0x00000000)  returns 0x00 (0000ms, 0390ms total)
-T13F8 000:980 JLINK_WriteReg(R11, 0x00000000)  returns 0x00 (0000ms, 0390ms total)
-T13F8 000:980 JLINK_WriteReg(R12, 0x00000000)  returns 0x00 (0000ms, 0390ms total)
-T13F8 000:980 JLINK_WriteReg(R13 (SP), 0x20001000)  returns 0x00 (0000ms, 0390ms total)
-T13F8 000:980 JLINK_WriteReg(R14, 0x20000001)  returns 0x00 (0000ms, 0390ms total)
-T13F8 000:980 JLINK_WriteReg(R15 (PC), 0x20000020)  returns 0x00 (0000ms, 0390ms total)
-T13F8 000:980 JLINK_WriteReg(XPSR, 0x01000000)  returns 0x00 (0000ms, 0390ms total)
-T13F8 000:980 JLINK_WriteReg(MSP, 0x20001000)  returns 0x00 (0000ms, 0390ms total)
-T13F8 000:980 JLINK_WriteReg(PSP, 0x20001000)  returns 0x00 (0000ms, 0390ms total)
-T13F8 000:980 JLINK_WriteReg(CFBP, 0x00000000)  returns 0x00 (0000ms, 0390ms total)
-T13F8 000:980 JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2)  returns 0x0000000A (0000ms, 0390ms total)
-T13F8 000:980 JLINK_Go() -- CPU_ReadMem(4 bytes @ 0xE0001000) -- CPU_WriteMem(4 bytes @ 0xE0001000) (0003ms, 0393ms total)
-T13F8 000:983 JLINK_IsHalted() -- CPU_ReadMem(2 bytes @ 0x20000000)  returns TRUE (0004ms, 0397ms total)
-T13F8 000:987 JLINK_ReadReg(R15 (PC))  returns 0x20000000 (0000ms, 0393ms total)
-T13F8 000:987 JLINK_ClrBPEx(BPHandle = 0x0000000A)  returns 0x00 (0000ms, 0393ms total)
-T13F8 000:987 JLINK_ReadReg(R0)  returns 0x00000001 (0000ms, 0393ms total)
-T13F8 000:987 JLINK_WriteReg(R0, 0x08001000)  returns 0x00 (0000ms, 0393ms total)
-T13F8 000:987 JLINK_WriteReg(R1, 0x00000400)  returns 0x00 (0000ms, 0393ms total)
-T13F8 000:987 JLINK_WriteReg(R2, 0x000000FF)  returns 0x00 (0000ms, 0393ms total)
-T13F8 000:987 JLINK_WriteReg(R3, 0x00000000)  returns 0x00 (0000ms, 0393ms total)
-T13F8 000:987 JLINK_WriteReg(R4, 0x00000000)  returns 0x00 (0000ms, 0393ms total)
-T13F8 000:987 JLINK_WriteReg(R5, 0x00000000)  returns 0x00 (0000ms, 0393ms total)
-T13F8 000:987 JLINK_WriteReg(R6, 0x00000000)  returns 0x00 (0001ms, 0394ms total)
-T13F8 000:988 JLINK_WriteReg(R7, 0x00000000)  returns 0x00 (0000ms, 0394ms total)
-T13F8 000:988 JLINK_WriteReg(R8, 0x00000000)  returns 0x00 (0000ms, 0394ms total)
-T13F8 000:988 JLINK_WriteReg(R9, 0x2000016C)  returns 0x00 (0000ms, 0394ms total)
-T13F8 000:988 JLINK_WriteReg(R10, 0x00000000)  returns 0x00 (0000ms, 0394ms total)
-T13F8 000:988 JLINK_WriteReg(R11, 0x00000000)  returns 0x00 (0000ms, 0394ms total)
-T13F8 000:988 JLINK_WriteReg(R12, 0x00000000)  returns 0x00 (0000ms, 0394ms total)
-T13F8 000:988 JLINK_WriteReg(R13 (SP), 0x20001000)  returns 0x00 (0000ms, 0394ms total)
-T13F8 000:988 JLINK_WriteReg(R14, 0x20000001)  returns 0x00 (0000ms, 0394ms total)
-T13F8 000:988 JLINK_WriteReg(R15 (PC), 0x200000B8)  returns 0x00 (0000ms, 0394ms total)
-T13F8 000:988 JLINK_WriteReg(XPSR, 0x01000000)  returns 0x00 (0000ms, 0394ms total)
-T13F8 000:988 JLINK_WriteReg(MSP, 0x20001000)  returns 0x00 (0000ms, 0394ms total)
-T13F8 000:988 JLINK_WriteReg(PSP, 0x20001000)  returns 0x00 (0000ms, 0394ms total)
-T13F8 000:988 JLINK_WriteReg(CFBP, 0x00000000)  returns 0x00 (0000ms, 0394ms total)
-T13F8 000:988 JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2)  returns 0x0000000B (0000ms, 0394ms total)
-T13F8 000:988 JLINK_Go() -- CPU_ReadMem(4 bytes @ 0xE0001000) -- CPU_WriteMem(4 bytes @ 0xE0001000) (0003ms, 0397ms total)
-T13F8 000:991 JLINK_IsHalted()  returns FALSE (0000ms, 0397ms total)
-T13F8 001:000 JLINK_IsHalted()  returns FALSE (0000ms, 0397ms total)
-T13F8 001:002 JLINK_IsHalted()  returns FALSE (0000ms, 0397ms total)
-T13F8 001:015 JLINK_IsHalted() -- CPU_ReadMem(2 bytes @ 0x20000000)  returns TRUE (0003ms, 0400ms total)
-T13F8 001:018 JLINK_ReadReg(R15 (PC))  returns 0x20000000 (0000ms, 0397ms total)
-T13F8 001:018 JLINK_ClrBPEx(BPHandle = 0x0000000B)  returns 0x00 (0000ms, 0397ms total)
-T13F8 001:018 JLINK_ReadReg(R0)  returns 0x00000000 (0000ms, 0397ms total)
-T13F8 001:019 JLINK_WriteReg(R0, 0x08001400)  returns 0x00 (0000ms, 0397ms total)
-T13F8 001:019 JLINK_WriteReg(R1, 0x00000400)  returns 0x00 (0000ms, 0397ms total)
-T13F8 001:019 JLINK_WriteReg(R2, 0x000000FF)  returns 0x00 (0000ms, 0397ms total)
-T13F8 001:019 JLINK_WriteReg(R3, 0x00000000)  returns 0x00 (0000ms, 0397ms total)
-T13F8 001:019 JLINK_WriteReg(R4, 0x00000000)  returns 0x00 (0000ms, 0397ms total)
-T13F8 001:019 JLINK_WriteReg(R5, 0x00000000)  returns 0x00 (0000ms, 0397ms total)
-T13F8 001:019 JLINK_WriteReg(R6, 0x00000000)  returns 0x00 (0000ms, 0397ms total)
-T13F8 001:019 JLINK_WriteReg(R7, 0x00000000)  returns 0x00 (0000ms, 0397ms total)
-T13F8 001:020 JLINK_WriteReg(R8, 0x00000000)  returns 0x00 (0000ms, 0398ms total)
-T13F8 001:020 JLINK_WriteReg(R9, 0x2000016C)  returns 0x00 (0000ms, 0398ms total)
-T13F8 001:020 JLINK_WriteReg(R10, 0x00000000)  returns 0x00 (0000ms, 0398ms total)
-T13F8 001:020 JLINK_WriteReg(R11, 0x00000000)  returns 0x00 (0000ms, 0398ms total)
-T13F8 001:020 JLINK_WriteReg(R12, 0x00000000)  returns 0x00 (0000ms, 0398ms total)
-T13F8 001:020 JLINK_WriteReg(R13 (SP), 0x20001000)  returns 0x00 (0000ms, 0398ms total)
-T13F8 001:020 JLINK_WriteReg(R14, 0x20000001)  returns 0x00 (0000ms, 0398ms total)
-T13F8 001:020 JLINK_WriteReg(R15 (PC), 0x20000020)  returns 0x00 (0000ms, 0398ms total)
-T13F8 001:020 JLINK_WriteReg(XPSR, 0x01000000)  returns 0x00 (0000ms, 0398ms total)
-T13F8 001:020 JLINK_WriteReg(MSP, 0x20001000)  returns 0x00 (0000ms, 0398ms total)
-T13F8 001:020 JLINK_WriteReg(PSP, 0x20001000)  returns 0x00 (0000ms, 0398ms total)
-T13F8 001:020 JLINK_WriteReg(CFBP, 0x00000000)  returns 0x00 (0000ms, 0398ms total)
-T13F8 001:020 JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2)  returns 0x0000000C (0000ms, 0398ms total)
-T13F8 001:020 JLINK_Go() -- CPU_ReadMem(4 bytes @ 0xE0001000) -- CPU_WriteMem(4 bytes @ 0xE0001000) (0003ms, 0401ms total)
-T13F8 001:023 JLINK_IsHalted() -- CPU_ReadMem(2 bytes @ 0x20000000)  returns TRUE (0004ms, 0405ms total)
-T13F8 001:027 JLINK_ReadReg(R15 (PC))  returns 0x20000000 (0000ms, 0401ms total)
-T13F8 001:027 JLINK_ClrBPEx(BPHandle = 0x0000000C)  returns 0x00 (0000ms, 0401ms total)
-T13F8 001:027 JLINK_ReadReg(R0)  returns 0x00000001 (0000ms, 0401ms total)
-T13F8 001:027 JLINK_WriteReg(R0, 0x08001400)  returns 0x00 (0000ms, 0401ms total)
-T13F8 001:027 JLINK_WriteReg(R1, 0x00000400)  returns 0x00 (0000ms, 0401ms total)
-T13F8 001:027 JLINK_WriteReg(R2, 0x000000FF)  returns 0x00 (0000ms, 0401ms total)
-T13F8 001:027 JLINK_WriteReg(R3, 0x00000000)  returns 0x00 (0000ms, 0401ms total)
-T13F8 001:027 JLINK_WriteReg(R4, 0x00000000)  returns 0x00 (0000ms, 0401ms total)
-T13F8 001:027 JLINK_WriteReg(R5, 0x00000000)  returns 0x00 (0000ms, 0401ms total)
-T13F8 001:027 JLINK_WriteReg(R6, 0x00000000)  returns 0x00 (0000ms, 0401ms total)
-T13F8 001:027 JLINK_WriteReg(R7, 0x00000000)  returns 0x00 (0000ms, 0401ms total)
-T13F8 001:027 JLINK_WriteReg(R8, 0x00000000)  returns 0x00 (0000ms, 0401ms total)
-T13F8 001:027 JLINK_WriteReg(R9, 0x2000016C)  returns 0x00 (0001ms, 0402ms total)
-T13F8 001:028 JLINK_WriteReg(R10, 0x00000000)  returns 0x00 (0000ms, 0402ms total)
-T13F8 001:028 JLINK_WriteReg(R11, 0x00000000)  returns 0x00 (0000ms, 0402ms total)
-T13F8 001:028 JLINK_WriteReg(R12, 0x00000000)  returns 0x00 (0000ms, 0402ms total)
-T13F8 001:028 JLINK_WriteReg(R13 (SP), 0x20001000)  returns 0x00 (0000ms, 0402ms total)
-T13F8 001:028 JLINK_WriteReg(R14, 0x20000001)  returns 0x00 (0000ms, 0402ms total)
-T13F8 001:028 JLINK_WriteReg(R15 (PC), 0x200000B8)  returns 0x00 (0000ms, 0402ms total)
-T13F8 001:028 JLINK_WriteReg(XPSR, 0x01000000)  returns 0x00 (0000ms, 0402ms total)
-T13F8 001:028 JLINK_WriteReg(MSP, 0x20001000)  returns 0x00 (0000ms, 0402ms total)
-T13F8 001:028 JLINK_WriteReg(PSP, 0x20001000)  returns 0x00 (0000ms, 0402ms total)
-T13F8 001:028 JLINK_WriteReg(CFBP, 0x00000000)  returns 0x00 (0000ms, 0402ms total)
-T13F8 001:028 JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2)  returns 0x0000000D (0000ms, 0402ms total)
-T13F8 001:028 JLINK_Go() -- CPU_ReadMem(4 bytes @ 0xE0001000) -- CPU_WriteMem(4 bytes @ 0xE0001000) (0003ms, 0405ms total)
-T13F8 001:031 JLINK_IsHalted()  returns FALSE (0001ms, 0406ms total)
-T13F8 001:034 JLINK_IsHalted()  returns FALSE (0000ms, 0405ms total)
-T13F8 001:036 JLINK_IsHalted()  returns FALSE (0000ms, 0405ms total)
-T13F8 001:038 JLINK_IsHalted()  returns FALSE (0000ms, 0405ms total)
-T13F8 001:040 JLINK_IsHalted()  returns FALSE (0000ms, 0405ms total)
-T13F8 001:042 JLINK_IsHalted()  returns FALSE (0000ms, 0405ms total)
-T13F8 001:044 JLINK_IsHalted()  returns FALSE (0000ms, 0405ms total)
-T13F8 001:046 JLINK_IsHalted()  returns FALSE (0000ms, 0405ms total)
-T13F8 001:048 JLINK_IsHalted()  returns FALSE (0000ms, 0405ms total)
-T13F8 001:050 JLINK_IsHalted()  returns FALSE (0000ms, 0405ms total)
-T13F8 001:052 JLINK_IsHalted()  returns FALSE (0000ms, 0405ms total)
-T13F8 001:054 JLINK_IsHalted() -- CPU_ReadMem(2 bytes @ 0x20000000)  returns TRUE (0004ms, 0409ms total)
-T13F8 001:058 JLINK_ReadReg(R15 (PC))  returns 0x20000000 (0000ms, 0405ms total)
-T13F8 001:058 JLINK_ClrBPEx(BPHandle = 0x0000000D)  returns 0x00 (0000ms, 0405ms total)
-T13F8 001:058 JLINK_ReadReg(R0)  returns 0x00000000 (0000ms, 0405ms total)
-T13F8 001:058 JLINK_WriteReg(R0, 0x08001800)  returns 0x00 (0000ms, 0405ms total)
-T13F8 001:058 JLINK_WriteReg(R1, 0x00000400)  returns 0x00 (0000ms, 0405ms total)
-T13F8 001:058 JLINK_WriteReg(R2, 0x000000FF)  returns 0x00 (0000ms, 0405ms total)
-T13F8 001:058 JLINK_WriteReg(R3, 0x00000000)  returns 0x00 (0001ms, 0406ms total)
-T13F8 001:059 JLINK_WriteReg(R4, 0x00000000)  returns 0x00 (0000ms, 0406ms total)
-T13F8 001:059 JLINK_WriteReg(R5, 0x00000000)  returns 0x00 (0000ms, 0406ms total)
-T13F8 001:059 JLINK_WriteReg(R6, 0x00000000)  returns 0x00 (0000ms, 0406ms total)
-T13F8 001:059 JLINK_WriteReg(R7, 0x00000000)  returns 0x00 (0000ms, 0406ms total)
-T13F8 001:059 JLINK_WriteReg(R8, 0x00000000)  returns 0x00 (0000ms, 0406ms total)
-T13F8 001:059 JLINK_WriteReg(R9, 0x2000016C)  returns 0x00 (0000ms, 0406ms total)
-T13F8 001:059 JLINK_WriteReg(R10, 0x00000000)  returns 0x00 (0000ms, 0406ms total)
-T13F8 001:059 JLINK_WriteReg(R11, 0x00000000)  returns 0x00 (0000ms, 0406ms total)
-T13F8 001:059 JLINK_WriteReg(R12, 0x00000000)  returns 0x00 (0000ms, 0406ms total)
-T13F8 001:059 JLINK_WriteReg(R13 (SP), 0x20001000)  returns 0x00 (0000ms, 0406ms total)
-T13F8 001:059 JLINK_WriteReg(R14, 0x20000001)  returns 0x00 (0000ms, 0406ms total)
-T13F8 001:059 JLINK_WriteReg(R15 (PC), 0x20000020)  returns 0x00 (0000ms, 0406ms total)
-T13F8 001:059 JLINK_WriteReg(XPSR, 0x01000000)  returns 0x00 (0000ms, 0406ms total)
-T13F8 001:059 JLINK_WriteReg(MSP, 0x20001000)  returns 0x00 (0000ms, 0406ms total)
-T13F8 001:059 JLINK_WriteReg(PSP, 0x20001000)  returns 0x00 (0000ms, 0406ms total)
-T13F8 001:059 JLINK_WriteReg(CFBP, 0x00000000)  returns 0x00 (0000ms, 0406ms total)
-T13F8 001:059 JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2)  returns 0x0000000E (0000ms, 0406ms total)
-T13F8 001:059 JLINK_Go() -- CPU_ReadMem(4 bytes @ 0xE0001000) -- CPU_WriteMem(4 bytes @ 0xE0001000) (0003ms, 0409ms total)
-T13F8 001:062 JLINK_IsHalted() -- CPU_ReadMem(2 bytes @ 0x20000000)  returns TRUE (0004ms, 0413ms total)
-T13F8 001:066 JLINK_ReadReg(R15 (PC))  returns 0x20000000 (0000ms, 0409ms total)
-T13F8 001:066 JLINK_ClrBPEx(BPHandle = 0x0000000E)  returns 0x00 (0000ms, 0409ms total)
-T13F8 001:066 JLINK_ReadReg(R0)  returns 0x00000001 (0000ms, 0409ms total)
-T13F8 001:066 JLINK_WriteReg(R0, 0x08001800)  returns 0x00 (0000ms, 0409ms total)
-T13F8 001:066 JLINK_WriteReg(R1, 0x00000400)  returns 0x00 (0000ms, 0409ms total)
-T13F8 001:066 JLINK_WriteReg(R2, 0x000000FF)  returns 0x00 (0000ms, 0409ms total)
-T13F8 001:066 JLINK_WriteReg(R3, 0x00000000)  returns 0x00 (0000ms, 0409ms total)
-T13F8 001:066 JLINK_WriteReg(R4, 0x00000000)  returns 0x00 (0000ms, 0409ms total)
-T13F8 001:066 JLINK_WriteReg(R5, 0x00000000)  returns 0x00 (0000ms, 0409ms total)
-T13F8 001:066 JLINK_WriteReg(R6, 0x00000000)  returns 0x00 (0000ms, 0409ms total)
-T13F8 001:066 JLINK_WriteReg(R7, 0x00000000)  returns 0x00 (0001ms, 0410ms total)
-T13F8 001:067 JLINK_WriteReg(R8, 0x00000000)  returns 0x00 (0000ms, 0410ms total)
-T13F8 001:067 JLINK_WriteReg(R9, 0x2000016C)  returns 0x00 (0000ms, 0410ms total)
-T13F8 001:067 JLINK_WriteReg(R10, 0x00000000)  returns 0x00 (0000ms, 0410ms total)
-T13F8 001:067 JLINK_WriteReg(R11, 0x00000000)  returns 0x00 (0000ms, 0410ms total)
-T13F8 001:067 JLINK_WriteReg(R12, 0x00000000)  returns 0x00 (0000ms, 0410ms total)
-T13F8 001:067 JLINK_WriteReg(R13 (SP), 0x20001000)  returns 0x00 (0000ms, 0410ms total)
-T13F8 001:067 JLINK_WriteReg(R14, 0x20000001)  returns 0x00 (0000ms, 0410ms total)
-T13F8 001:067 JLINK_WriteReg(R15 (PC), 0x200000B8)  returns 0x00 (0000ms, 0410ms total)
-T13F8 001:067 JLINK_WriteReg(XPSR, 0x01000000)  returns 0x00 (0000ms, 0410ms total)
-T13F8 001:067 JLINK_WriteReg(MSP, 0x20001000)  returns 0x00 (0000ms, 0410ms total)
-T13F8 001:067 JLINK_WriteReg(PSP, 0x20001000)  returns 0x00 (0000ms, 0410ms total)
-T13F8 001:067 JLINK_WriteReg(CFBP, 0x00000000)  returns 0x00 (0000ms, 0410ms total)
-T13F8 001:067 JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2)  returns 0x0000000F (0000ms, 0410ms total)
-T13F8 001:067 JLINK_Go() -- CPU_ReadMem(4 bytes @ 0xE0001000) -- CPU_WriteMem(4 bytes @ 0xE0001000) (0003ms, 0413ms total)
-T13F8 001:070 JLINK_IsHalted()  returns FALSE (0000ms, 0413ms total)
-T13F8 001:074 JLINK_IsHalted()  returns FALSE (0000ms, 0413ms total)
-T13F8 001:076 JLINK_IsHalted()  returns FALSE (0000ms, 0413ms total)
-T13F8 001:078 JLINK_IsHalted()  returns FALSE (0000ms, 0413ms total)
-T13F8 001:080 JLINK_IsHalted()  returns FALSE (0000ms, 0413ms total)
-T13F8 001:082 JLINK_IsHalted()  returns FALSE (0000ms, 0413ms total)
-T13F8 001:084 JLINK_IsHalted()  returns FALSE (0000ms, 0413ms total)
-T13F8 001:089 JLINK_IsHalted()  returns FALSE (0000ms, 0413ms total)
-T13F8 001:091 JLINK_IsHalted()  returns FALSE (0000ms, 0413ms total)
-T13F8 001:094 JLINK_IsHalted() -- CPU_ReadMem(2 bytes @ 0x20000000)  returns TRUE (0004ms, 0417ms total)
-T13F8 001:098 JLINK_ReadReg(R15 (PC))  returns 0x20000000 (0000ms, 0413ms total)
-T13F8 001:098 JLINK_ClrBPEx(BPHandle = 0x0000000F)  returns 0x00 (0000ms, 0413ms total)
-T13F8 001:098 JLINK_ReadReg(R0)  returns 0x00000000 (0000ms, 0413ms total)
-T13F8 001:099 JLINK_WriteReg(R0, 0x08001C00)  returns 0x00 (0000ms, 0413ms total)
-T13F8 001:099 JLINK_WriteReg(R1, 0x00000400)  returns 0x00 (0000ms, 0413ms total)
-T13F8 001:099 JLINK_WriteReg(R2, 0x000000FF)  returns 0x00 (0000ms, 0413ms total)
-T13F8 001:099 JLINK_WriteReg(R3, 0x00000000)  returns 0x00 (0000ms, 0413ms total)
-T13F8 001:099 JLINK_WriteReg(R4, 0x00000000)  returns 0x00 (0000ms, 0413ms total)
-T13F8 001:099 JLINK_WriteReg(R5, 0x00000000)  returns 0x00 (0000ms, 0413ms total)
-T13F8 001:099 JLINK_WriteReg(R6, 0x00000000)  returns 0x00 (0000ms, 0413ms total)
-T13F8 001:100 JLINK_WriteReg(R7, 0x00000000)  returns 0x00 (0000ms, 0414ms total)
-T13F8 001:100 JLINK_WriteReg(R8, 0x00000000)  returns 0x00 (0000ms, 0414ms total)
-T13F8 001:100 JLINK_WriteReg(R9, 0x2000016C)  returns 0x00 (0000ms, 0414ms total)
-T13F8 001:100 JLINK_WriteReg(R10, 0x00000000)  returns 0x00 (0000ms, 0414ms total)
-T13F8 001:100 JLINK_WriteReg(R11, 0x00000000)  returns 0x00 (0000ms, 0414ms total)
-T13F8 001:100 JLINK_WriteReg(R12, 0x00000000)  returns 0x00 (0000ms, 0414ms total)
-T13F8 001:100 JLINK_WriteReg(R13 (SP), 0x20001000)  returns 0x00 (0000ms, 0414ms total)
-T13F8 001:100 JLINK_WriteReg(R14, 0x20000001)  returns 0x00 (0000ms, 0414ms total)
-T13F8 001:100 JLINK_WriteReg(R15 (PC), 0x20000020)  returns 0x00 (0000ms, 0414ms total)
-T13F8 001:100 JLINK_WriteReg(XPSR, 0x01000000)  returns 0x00 (0000ms, 0414ms total)
-T13F8 001:100 JLINK_WriteReg(MSP, 0x20001000)  returns 0x00 (0000ms, 0414ms total)
-T13F8 001:100 JLINK_WriteReg(PSP, 0x20001000)  returns 0x00 (0000ms, 0414ms total)
-T13F8 001:100 JLINK_WriteReg(CFBP, 0x00000000)  returns 0x00 (0000ms, 0414ms total)
-T13F8 001:100 JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2)  returns 0x00000010 (0000ms, 0414ms total)
-T13F8 001:100 JLINK_Go() -- CPU_ReadMem(4 bytes @ 0xE0001000) -- CPU_WriteMem(4 bytes @ 0xE0001000) (0003ms, 0417ms total)
-T13F8 001:103 JLINK_IsHalted() -- CPU_ReadMem(2 bytes @ 0x20000000)  returns TRUE (0005ms, 0422ms total)
-T13F8 001:108 JLINK_ReadReg(R15 (PC))  returns 0x20000000 (0000ms, 0417ms total)
-T13F8 001:108 JLINK_ClrBPEx(BPHandle = 0x00000010)  returns 0x00 (0000ms, 0417ms total)
-T13F8 001:108 JLINK_ReadReg(R0)  returns 0x00000001 (0000ms, 0417ms total)
-T13F8 001:108 JLINK_WriteReg(R0, 0x08001C00)  returns 0x00 (0000ms, 0417ms total)
-T13F8 001:108 JLINK_WriteReg(R1, 0x00000400)  returns 0x00 (0000ms, 0417ms total)
-T13F8 001:108 JLINK_WriteReg(R2, 0x000000FF)  returns 0x00 (0000ms, 0417ms total)
-T13F8 001:108 JLINK_WriteReg(R3, 0x00000000)  returns 0x00 (0000ms, 0417ms total)
-T13F8 001:108 JLINK_WriteReg(R4, 0x00000000)  returns 0x00 (0000ms, 0417ms total)
-T13F8 001:108 JLINK_WriteReg(R5, 0x00000000)  returns 0x00 (0000ms, 0417ms total)
-T13F8 001:108 JLINK_WriteReg(R6, 0x00000000)  returns 0x00 (0000ms, 0417ms total)
-T13F8 001:108 JLINK_WriteReg(R7, 0x00000000)  returns 0x00 (0000ms, 0417ms total)
-T13F8 001:108 JLINK_WriteReg(R8, 0x00000000)  returns 0x00 (0000ms, 0417ms total)
-T13F8 001:108 JLINK_WriteReg(R9, 0x2000016C)  returns 0x00 (0000ms, 0417ms total)
-T13F8 001:108 JLINK_WriteReg(R10, 0x00000000)  returns 0x00 (0000ms, 0417ms total)
-T13F8 001:108 JLINK_WriteReg(R11, 0x00000000)  returns 0x00 (0000ms, 0417ms total)
-T13F8 001:108 JLINK_WriteReg(R12, 0x00000000)  returns 0x00 (0000ms, 0417ms total)
-T13F8 001:108 JLINK_WriteReg(R13 (SP), 0x20001000)  returns 0x00 (0000ms, 0417ms total)
-T13F8 001:108 JLINK_WriteReg(R14, 0x20000001)  returns 0x00 (0000ms, 0417ms total)
-T13F8 001:108 JLINK_WriteReg(R15 (PC), 0x200000B8)  returns 0x00 (0000ms, 0417ms total)
-T13F8 001:108 JLINK_WriteReg(XPSR, 0x01000000)  returns 0x00 (0000ms, 0417ms total)
-T13F8 001:108 JLINK_WriteReg(MSP, 0x20001000)  returns 0x00 (0000ms, 0417ms total)
-T13F8 001:108 JLINK_WriteReg(PSP, 0x20001000)  returns 0x00 (0000ms, 0417ms total)
-T13F8 001:108 JLINK_WriteReg(CFBP, 0x00000000)  returns 0x00 (0000ms, 0417ms total)
-T13F8 001:108 JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2)  returns 0x00000011 (0000ms, 0417ms total)
-T13F8 001:108 JLINK_Go() -- CPU_ReadMem(4 bytes @ 0xE0001000) -- CPU_WriteMem(4 bytes @ 0xE0001000) (0004ms, 0421ms total)
-T13F8 001:112 JLINK_IsHalted()  returns FALSE (0000ms, 0421ms total)
-T13F8 001:114 JLINK_IsHalted()  returns FALSE (0001ms, 0422ms total)
-T13F8 001:117 JLINK_IsHalted()  returns FALSE (0000ms, 0421ms total)
-T13F8 001:119 JLINK_IsHalted()  returns FALSE (0000ms, 0421ms total)
-T13F8 001:121 JLINK_IsHalted()  returns FALSE (0000ms, 0421ms total)
-T13F8 001:123 JLINK_IsHalted()  returns FALSE (0000ms, 0421ms total)
-T13F8 001:125 JLINK_IsHalted()  returns FALSE (0000ms, 0421ms total)
-T13F8 001:127 JLINK_IsHalted()  returns FALSE (0000ms, 0421ms total)
-T13F8 001:129 JLINK_IsHalted()  returns FALSE (0000ms, 0421ms total)
-T13F8 001:131 JLINK_IsHalted()  returns FALSE (0001ms, 0422ms total)
-T13F8 001:134 JLINK_IsHalted() -- CPU_ReadMem(2 bytes @ 0x20000000)  returns TRUE (0003ms, 0424ms total)
-T13F8 001:137 JLINK_ReadReg(R15 (PC))  returns 0x20000000 (0000ms, 0421ms total)
-T13F8 001:137 JLINK_ClrBPEx(BPHandle = 0x00000011)  returns 0x00 (0002ms, 0423ms total)
-T13F8 001:139 JLINK_ReadReg(R0)  returns 0x00000000 (0000ms, 0423ms total)
-T13F8 001:139 JLINK_WriteReg(R0, 0x08002000)  returns 0x00 (0000ms, 0423ms total)
-T13F8 001:139 JLINK_WriteReg(R1, 0x00000400)  returns 0x00 (0000ms, 0423ms total)
-T13F8 001:139 JLINK_WriteReg(R2, 0x000000FF)  returns 0x00 (0000ms, 0423ms total)
-T13F8 001:139 JLINK_WriteReg(R3, 0x00000000)  returns 0x00 (0000ms, 0423ms total)
-T13F8 001:139 JLINK_WriteReg(R4, 0x00000000)  returns 0x00 (0000ms, 0423ms total)
-T13F8 001:139 JLINK_WriteReg(R5, 0x00000000)  returns 0x00 (0000ms, 0423ms total)
-T13F8 001:139 JLINK_WriteReg(R6, 0x00000000)  returns 0x00 (0000ms, 0423ms total)
-T13F8 001:139 JLINK_WriteReg(R7, 0x00000000)  returns 0x00 (0000ms, 0423ms total)
-T13F8 001:139 JLINK_WriteReg(R8, 0x00000000)  returns 0x00 (0000ms, 0423ms total)
-T13F8 001:139 JLINK_WriteReg(R9, 0x2000016C)  returns 0x00 (0000ms, 0423ms total)
-T13F8 001:139 JLINK_WriteReg(R10, 0x00000000)  returns 0x00 (0000ms, 0423ms total)
-T13F8 001:139 JLINK_WriteReg(R11, 0x00000000)  returns 0x00 (0000ms, 0423ms total)
-T13F8 001:139 JLINK_WriteReg(R12, 0x00000000)  returns 0x00 (0000ms, 0423ms total)
-T13F8 001:139 JLINK_WriteReg(R13 (SP), 0x20001000)  returns 0x00 (0000ms, 0423ms total)
-T13F8 001:139 JLINK_WriteReg(R14, 0x20000001)  returns 0x00 (0000ms, 0423ms total)
-T13F8 001:139 JLINK_WriteReg(R15 (PC), 0x20000020)  returns 0x00 (0000ms, 0423ms total)
-T13F8 001:139 JLINK_WriteReg(XPSR, 0x01000000)  returns 0x00 (0000ms, 0423ms total)
-T13F8 001:139 JLINK_WriteReg(MSP, 0x20001000)  returns 0x00 (0000ms, 0423ms total)
-T13F8 001:139 JLINK_WriteReg(PSP, 0x20001000)  returns 0x00 (0000ms, 0423ms total)
-T13F8 001:139 JLINK_WriteReg(CFBP, 0x00000000)  returns 0x00 (0000ms, 0423ms total)
-T13F8 001:139 JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2)  returns 0x00000012 (0000ms, 0423ms total)
-T13F8 001:139 JLINK_Go() -- CPU_ReadMem(4 bytes @ 0xE0001000) -- CPU_WriteMem(4 bytes @ 0xE0001000) (0004ms, 0427ms total)
-T13F8 001:143 JLINK_IsHalted() -- CPU_ReadMem(2 bytes @ 0x20000000)  returns TRUE (0005ms, 0432ms total)
-T13F8 001:148 JLINK_ReadReg(R15 (PC))  returns 0x20000000 (0000ms, 0427ms total)
-T13F8 001:148 JLINK_ClrBPEx(BPHandle = 0x00000012)  returns 0x00 (0000ms, 0427ms total)
-T13F8 001:148 JLINK_ReadReg(R0)  returns 0x00000001 (0000ms, 0427ms total)
-T13F8 001:148 JLINK_WriteReg(R0, 0x08002000)  returns 0x00 (0000ms, 0427ms total)
-T13F8 001:148 JLINK_WriteReg(R1, 0x00000400)  returns 0x00 (0000ms, 0427ms total)
-T13F8 001:148 JLINK_WriteReg(R2, 0x000000FF)  returns 0x00 (0000ms, 0427ms total)
-T13F8 001:148 JLINK_WriteReg(R3, 0x00000000)  returns 0x00 (0000ms, 0427ms total)
-T13F8 001:148 JLINK_WriteReg(R4, 0x00000000)  returns 0x00 (0000ms, 0427ms total)
-T13F8 001:148 JLINK_WriteReg(R5, 0x00000000)  returns 0x00 (0000ms, 0427ms total)
-T13F8 001:148 JLINK_WriteReg(R6, 0x00000000)  returns 0x00 (0000ms, 0427ms total)
-T13F8 001:148 JLINK_WriteReg(R7, 0x00000000)  returns 0x00 (0000ms, 0427ms total)
-T13F8 001:148 JLINK_WriteReg(R8, 0x00000000)  returns 0x00 (0000ms, 0427ms total)
-T13F8 001:148 JLINK_WriteReg(R9, 0x2000016C)  returns 0x00 (0000ms, 0427ms total)
-T13F8 001:148 JLINK_WriteReg(R10, 0x00000000)  returns 0x00 (0000ms, 0427ms total)
-T13F8 001:148 JLINK_WriteReg(R11, 0x00000000)  returns 0x00 (0000ms, 0427ms total)
-T13F8 001:148 JLINK_WriteReg(R12, 0x00000000)  returns 0x00 (0000ms, 0427ms total)
-T13F8 001:148 JLINK_WriteReg(R13 (SP), 0x20001000)  returns 0x00 (0000ms, 0427ms total)
-T13F8 001:148 JLINK_WriteReg(R14, 0x20000001)  returns 0x00 (0000ms, 0427ms total)
-T13F8 001:148 JLINK_WriteReg(R15 (PC), 0x200000B8)  returns 0x00 (0000ms, 0427ms total)
-T13F8 001:148 JLINK_WriteReg(XPSR, 0x01000000)  returns 0x00 (0000ms, 0427ms total)
-T13F8 001:148 JLINK_WriteReg(MSP, 0x20001000)  returns 0x00 (0000ms, 0427ms total)
-T13F8 001:148 JLINK_WriteReg(PSP, 0x20001000)  returns 0x00 (0000ms, 0427ms total)
-T13F8 001:148 JLINK_WriteReg(CFBP, 0x00000000)  returns 0x00 (0000ms, 0427ms total)
-T13F8 001:148 JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2)  returns 0x00000013 (0001ms, 0428ms total)
-T13F8 001:149 JLINK_Go() -- CPU_ReadMem(4 bytes @ 0xE0001000) -- CPU_WriteMem(4 bytes @ 0xE0001000) (0003ms, 0431ms total)
-T13F8 001:152 JLINK_IsHalted()  returns FALSE (0000ms, 0431ms total)
-T13F8 001:154 JLINK_IsHalted()  returns FALSE (0000ms, 0431ms total)
-T13F8 001:156 JLINK_IsHalted()  returns FALSE (0000ms, 0431ms total)
-T13F8 001:158 JLINK_IsHalted()  returns FALSE (0000ms, 0431ms total)
-T13F8 001:160 JLINK_IsHalted()  returns FALSE (0000ms, 0431ms total)
-T13F8 001:162 JLINK_IsHalted()  returns FALSE (0000ms, 0431ms total)
-T13F8 001:164 JLINK_IsHalted()  returns FALSE (0000ms, 0431ms total)
-T13F8 001:166 JLINK_IsHalted()  returns FALSE (0000ms, 0431ms total)
-T13F8 001:168 JLINK_IsHalted()  returns FALSE (0000ms, 0431ms total)
-T13F8 001:170 JLINK_IsHalted()  returns FALSE (0000ms, 0431ms total)
-T13F8 001:172 JLINK_IsHalted()  returns FALSE (0000ms, 0431ms total)
-T13F8 001:174 JLINK_IsHalted() -- CPU_ReadMem(2 bytes @ 0x20000000)  returns TRUE (0004ms, 0435ms total)
-T13F8 001:178 JLINK_ReadReg(R15 (PC))  returns 0x20000000 (0000ms, 0431ms total)
-T13F8 001:178 JLINK_ClrBPEx(BPHandle = 0x00000013)  returns 0x00 (0000ms, 0431ms total)
-T13F8 001:178 JLINK_ReadReg(R0)  returns 0x00000000 (0000ms, 0431ms total)
-T13F8 001:179 JLINK_WriteReg(R0, 0x08002400)  returns 0x00 (0000ms, 0431ms total)
-T13F8 001:179 JLINK_WriteReg(R1, 0x00000400)  returns 0x00 (0000ms, 0431ms total)
-T13F8 001:179 JLINK_WriteReg(R2, 0x000000FF)  returns 0x00 (0000ms, 0431ms total)
-T13F8 001:179 JLINK_WriteReg(R3, 0x00000000)  returns 0x00 (0000ms, 0431ms total)
-T13F8 001:179 JLINK_WriteReg(R4, 0x00000000)  returns 0x00 (0000ms, 0431ms total)
-T13F8 001:179 JLINK_WriteReg(R5, 0x00000000)  returns 0x00 (0000ms, 0431ms total)
-T13F8 001:179 JLINK_WriteReg(R6, 0x00000000)  returns 0x00 (0000ms, 0431ms total)
-T13F8 001:179 JLINK_WriteReg(R7, 0x00000000)  returns 0x00 (0000ms, 0431ms total)
-T13F8 001:179 JLINK_WriteReg(R8, 0x00000000)  returns 0x00 (0000ms, 0431ms total)
-T13F8 001:179 JLINK_WriteReg(R9, 0x2000016C)  returns 0x00 (0000ms, 0431ms total)
-T13F8 001:179 JLINK_WriteReg(R10, 0x00000000)  returns 0x00 (0000ms, 0431ms total)
-T13F8 001:179 JLINK_WriteReg(R11, 0x00000000)  returns 0x00 (0000ms, 0431ms total)
-T13F8 001:179 JLINK_WriteReg(R12, 0x00000000)  returns 0x00 (0000ms, 0431ms total)
-T13F8 001:179 JLINK_WriteReg(R13 (SP), 0x20001000)  returns 0x00 (0000ms, 0431ms total)
-T13F8 001:179 JLINK_WriteReg(R14, 0x20000001)  returns 0x00 (0000ms, 0431ms total)
-T13F8 001:179 JLINK_WriteReg(R15 (PC), 0x20000020)  returns 0x00 (0000ms, 0431ms total)
-T13F8 001:179 JLINK_WriteReg(XPSR, 0x01000000)  returns 0x00 (0000ms, 0431ms total)
-T13F8 001:179 JLINK_WriteReg(MSP, 0x20001000)  returns 0x00 (0000ms, 0431ms total)
-T13F8 001:179 JLINK_WriteReg(PSP, 0x20001000)  returns 0x00 (0000ms, 0431ms total)
-T13F8 001:179 JLINK_WriteReg(CFBP, 0x00000000)  returns 0x00 (0000ms, 0431ms total)
-T13F8 001:179 JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2)  returns 0x00000014 (0001ms, 0432ms total)
-T13F8 001:180 JLINK_Go() -- CPU_ReadMem(4 bytes @ 0xE0001000) -- CPU_WriteMem(4 bytes @ 0xE0001000) (0003ms, 0435ms total)
-T13F8 001:183 JLINK_IsHalted() -- CPU_ReadMem(2 bytes @ 0x20000000)  returns TRUE (0004ms, 0439ms total)
-T13F8 001:187 JLINK_ReadReg(R15 (PC))  returns 0x20000000 (0000ms, 0435ms total)
-T13F8 001:187 JLINK_ClrBPEx(BPHandle = 0x00000014)  returns 0x00 (0000ms, 0435ms total)
-T13F8 001:187 JLINK_ReadReg(R0)  returns 0x00000001 (0000ms, 0435ms total)
-T13F8 001:187 JLINK_WriteReg(R0, 0x08002400)  returns 0x00 (0000ms, 0435ms total)
-T13F8 001:187 JLINK_WriteReg(R1, 0x00000400)  returns 0x00 (0000ms, 0435ms total)
-T13F8 001:187 JLINK_WriteReg(R2, 0x000000FF)  returns 0x00 (0000ms, 0435ms total)
-T13F8 001:187 JLINK_WriteReg(R3, 0x00000000)  returns 0x00 (0000ms, 0435ms total)
-T13F8 001:187 JLINK_WriteReg(R4, 0x00000000)  returns 0x00 (0000ms, 0435ms total)
-T13F8 001:187 JLINK_WriteReg(R5, 0x00000000)  returns 0x00 (0000ms, 0435ms total)
-T13F8 001:187 JLINK_WriteReg(R6, 0x00000000)  returns 0x00 (0000ms, 0435ms total)
-T13F8 001:187 JLINK_WriteReg(R7, 0x00000000)  returns 0x00 (0000ms, 0435ms total)
-T13F8 001:187 JLINK_WriteReg(R8, 0x00000000)  returns 0x00 (0000ms, 0435ms total)
-T13F8 001:187 JLINK_WriteReg(R9, 0x2000016C)  returns 0x00 (0000ms, 0435ms total)
-T13F8 001:187 JLINK_WriteReg(R10, 0x00000000)  returns 0x00 (0000ms, 0435ms total)
-T13F8 001:187 JLINK_WriteReg(R11, 0x00000000)  returns 0x00 (0000ms, 0435ms total)
-T13F8 001:187 JLINK_WriteReg(R12, 0x00000000)  returns 0x00 (0000ms, 0435ms total)
-T13F8 001:187 JLINK_WriteReg(R13 (SP), 0x20001000)  returns 0x00 (0000ms, 0435ms total)
-T13F8 001:187 JLINK_WriteReg(R14, 0x20000001)  returns 0x00 (0000ms, 0435ms total)
-T13F8 001:187 JLINK_WriteReg(R15 (PC), 0x200000B8)  returns 0x00 (0000ms, 0435ms total)
-T13F8 001:187 JLINK_WriteReg(XPSR, 0x01000000)  returns 0x00 (0001ms, 0436ms total)
-T13F8 001:188 JLINK_WriteReg(MSP, 0x20001000)  returns 0x00 (0000ms, 0436ms total)
-T13F8 001:188 JLINK_WriteReg(PSP, 0x20001000)  returns 0x00 (0000ms, 0436ms total)
-T13F8 001:188 JLINK_WriteReg(CFBP, 0x00000000)  returns 0x00 (0000ms, 0436ms total)
-T13F8 001:188 JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2)  returns 0x00000015 (0000ms, 0436ms total)
-T13F8 001:188 JLINK_Go() -- CPU_ReadMem(4 bytes @ 0xE0001000) -- CPU_WriteMem(4 bytes @ 0xE0001000) (0003ms, 0439ms total)
-T13F8 001:191 JLINK_IsHalted()  returns FALSE (0001ms, 0440ms total)
-T13F8 001:196 JLINK_IsHalted()  returns FALSE (0000ms, 0439ms total)
-T13F8 001:200 JLINK_IsHalted()  returns FALSE (0000ms, 0439ms total)
-T13F8 001:202 JLINK_IsHalted()  returns FALSE (0000ms, 0439ms total)
-T13F8 001:204 JLINK_IsHalted()  returns FALSE (0000ms, 0439ms total)
-T13F8 001:206 JLINK_IsHalted()  returns FALSE (0000ms, 0439ms total)
-T13F8 001:208 JLINK_IsHalted()  returns FALSE (0000ms, 0439ms total)
-T13F8 001:210 JLINK_IsHalted()  returns FALSE (0000ms, 0439ms total)
-T13F8 001:212 JLINK_IsHalted()  returns FALSE (0000ms, 0439ms total)
-T13F8 001:214 JLINK_IsHalted() -- CPU_ReadMem(2 bytes @ 0x20000000)  returns TRUE (0003ms, 0442ms total)
-T13F8 001:217 JLINK_ReadReg(R15 (PC))  returns 0x20000000 (0001ms, 0440ms total)
-T13F8 001:218 JLINK_ClrBPEx(BPHandle = 0x00000015)  returns 0x00 (0000ms, 0440ms total)
-T13F8 001:218 JLINK_ReadReg(R0)  returns 0x00000000 (0000ms, 0440ms total)
-T13F8 001:218 JLINK_WriteReg(R0, 0x08002800)  returns 0x00 (0000ms, 0440ms total)
-T13F8 001:218 JLINK_WriteReg(R1, 0x00000400)  returns 0x00 (0000ms, 0440ms total)
-T13F8 001:218 JLINK_WriteReg(R2, 0x000000FF)  returns 0x00 (0000ms, 0440ms total)
-T13F8 001:218 JLINK_WriteReg(R3, 0x00000000)  returns 0x00 (0001ms, 0441ms total)
-T13F8 001:219 JLINK_WriteReg(R4, 0x00000000)  returns 0x00 (0000ms, 0441ms total)
-T13F8 001:219 JLINK_WriteReg(R5, 0x00000000)  returns 0x00 (0000ms, 0441ms total)
-T13F8 001:219 JLINK_WriteReg(R6, 0x00000000)  returns 0x00 (0000ms, 0441ms total)
-T13F8 001:219 JLINK_WriteReg(R7, 0x00000000)  returns 0x00 (0000ms, 0441ms total)
-T13F8 001:219 JLINK_WriteReg(R8, 0x00000000)  returns 0x00 (0000ms, 0441ms total)
-T13F8 001:219 JLINK_WriteReg(R9, 0x2000016C)  returns 0x00 (0000ms, 0441ms total)
-T13F8 001:219 JLINK_WriteReg(R10, 0x00000000)  returns 0x00 (0000ms, 0441ms total)
-T13F8 001:219 JLINK_WriteReg(R11, 0x00000000)  returns 0x00 (0000ms, 0441ms total)
-T13F8 001:219 JLINK_WriteReg(R12, 0x00000000)  returns 0x00 (0000ms, 0441ms total)
-T13F8 001:219 JLINK_WriteReg(R13 (SP), 0x20001000)  returns 0x00 (0000ms, 0441ms total)
-T13F8 001:219 JLINK_WriteReg(R14, 0x20000001)  returns 0x00 (0000ms, 0441ms total)
-T13F8 001:219 JLINK_WriteReg(R15 (PC), 0x20000020)  returns 0x00 (0000ms, 0441ms total)
-T13F8 001:219 JLINK_WriteReg(XPSR, 0x01000000)  returns 0x00 (0000ms, 0441ms total)
-T13F8 001:219 JLINK_WriteReg(MSP, 0x20001000)  returns 0x00 (0000ms, 0441ms total)
-T13F8 001:219 JLINK_WriteReg(PSP, 0x20001000)  returns 0x00 (0000ms, 0441ms total)
-T13F8 001:219 JLINK_WriteReg(CFBP, 0x00000000)  returns 0x00 (0000ms, 0441ms total)
-T13F8 001:219 JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2)  returns 0x00000016 (0000ms, 0441ms total)
-T13F8 001:219 JLINK_Go() -- CPU_ReadMem(4 bytes @ 0xE0001000) -- CPU_WriteMem(4 bytes @ 0xE0001000) (0003ms, 0444ms total)
-T13F8 001:222 JLINK_IsHalted() -- CPU_ReadMem(2 bytes @ 0x20000000)  returns TRUE (0004ms, 0448ms total)
-T13F8 001:226 JLINK_ReadReg(R15 (PC))  returns 0x20000000 (0000ms, 0444ms total)
-T13F8 001:226 JLINK_ClrBPEx(BPHandle = 0x00000016)  returns 0x00 (0000ms, 0444ms total)
-T13F8 001:226 JLINK_ReadReg(R0)  returns 0x00000001 (0000ms, 0444ms total)
-T13F8 001:226 JLINK_WriteReg(R0, 0x08002800)  returns 0x00 (0000ms, 0444ms total)
-T13F8 001:226 JLINK_WriteReg(R1, 0x00000400)  returns 0x00 (0000ms, 0444ms total)
-T13F8 001:226 JLINK_WriteReg(R2, 0x000000FF)  returns 0x00 (0000ms, 0444ms total)
-T13F8 001:226 JLINK_WriteReg(R3, 0x00000000)  returns 0x00 (0000ms, 0444ms total)
-T13F8 001:226 JLINK_WriteReg(R4, 0x00000000)  returns 0x00 (0000ms, 0444ms total)
-T13F8 001:226 JLINK_WriteReg(R5, 0x00000000)  returns 0x00 (0000ms, 0444ms total)
-T13F8 001:226 JLINK_WriteReg(R6, 0x00000000)  returns 0x00 (0000ms, 0444ms total)
-T13F8 001:226 JLINK_WriteReg(R7, 0x00000000)  returns 0x00 (0000ms, 0444ms total)
-T13F8 001:226 JLINK_WriteReg(R8, 0x00000000)  returns 0x00 (0000ms, 0444ms total)
-T13F8 001:226 JLINK_WriteReg(R9, 0x2000016C)  returns 0x00 (0000ms, 0444ms total)
-T13F8 001:226 JLINK_WriteReg(R10, 0x00000000)  returns 0x00 (0001ms, 0445ms total)
-T13F8 001:227 JLINK_WriteReg(R11, 0x00000000)  returns 0x00 (0000ms, 0445ms total)
-T13F8 001:227 JLINK_WriteReg(R12, 0x00000000)  returns 0x00 (0000ms, 0445ms total)
-T13F8 001:227 JLINK_WriteReg(R13 (SP), 0x20001000)  returns 0x00 (0000ms, 0445ms total)
-T13F8 001:227 JLINK_WriteReg(R14, 0x20000001)  returns 0x00 (0000ms, 0445ms total)
-T13F8 001:227 JLINK_WriteReg(R15 (PC), 0x200000B8)  returns 0x00 (0000ms, 0445ms total)
-T13F8 001:227 JLINK_WriteReg(XPSR, 0x01000000)  returns 0x00 (0000ms, 0445ms total)
-T13F8 001:227 JLINK_WriteReg(MSP, 0x20001000)  returns 0x00 (0000ms, 0445ms total)
-T13F8 001:227 JLINK_WriteReg(PSP, 0x20001000)  returns 0x00 (0000ms, 0445ms total)
-T13F8 001:227 JLINK_WriteReg(CFBP, 0x00000000)  returns 0x00 (0000ms, 0445ms total)
-T13F8 001:227 JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2)  returns 0x00000017 (0000ms, 0445ms total)
-T13F8 001:227 JLINK_Go() -- CPU_ReadMem(4 bytes @ 0xE0001000) -- CPU_WriteMem(4 bytes @ 0xE0001000) (0002ms, 0447ms total)
-T13F8 001:229 JLINK_IsHalted()  returns FALSE (0001ms, 0448ms total)
-T13F8 001:232 JLINK_IsHalted()  returns FALSE (0000ms, 0447ms total)
-T13F8 001:234 JLINK_IsHalted()  returns FALSE (0000ms, 0447ms total)
-T13F8 001:236 JLINK_IsHalted()  returns FALSE (0000ms, 0447ms total)
-T13F8 001:238 JLINK_IsHalted()  returns FALSE (0000ms, 0447ms total)
-T13F8 001:240 JLINK_IsHalted()  returns FALSE (0000ms, 0447ms total)
-T13F8 001:242 JLINK_IsHalted()  returns FALSE (0000ms, 0447ms total)
-T13F8 001:244 JLINK_IsHalted()  returns FALSE (0000ms, 0447ms total)
-T13F8 001:246 JLINK_IsHalted()  returns FALSE (0000ms, 0447ms total)
-T13F8 001:248 JLINK_IsHalted()  returns FALSE (0000ms, 0447ms total)
-T13F8 001:250 JLINK_IsHalted()  returns FALSE (0000ms, 0447ms total)
-T13F8 001:252 JLINK_IsHalted() -- CPU_ReadMem(2 bytes @ 0x20000000)  returns TRUE (0003ms, 0450ms total)
-T13F8 001:255 JLINK_ReadReg(R15 (PC))  returns 0x20000000 (0000ms, 0447ms total)
-T13F8 001:255 JLINK_ClrBPEx(BPHandle = 0x00000017)  returns 0x00 (0000ms, 0447ms total)
-T13F8 001:255 JLINK_ReadReg(R0)  returns 0x00000000 (0001ms, 0448ms total)
-T13F8 001:256 JLINK_WriteReg(R0, 0x08002C00)  returns 0x00 (0000ms, 0448ms total)
-T13F8 001:256 JLINK_WriteReg(R1, 0x00000400)  returns 0x00 (0000ms, 0448ms total)
-T13F8 001:256 JLINK_WriteReg(R2, 0x000000FF)  returns 0x00 (0000ms, 0448ms total)
-T13F8 001:256 JLINK_WriteReg(R3, 0x00000000)  returns 0x00 (0000ms, 0448ms total)
-T13F8 001:256 JLINK_WriteReg(R4, 0x00000000)  returns 0x00 (0000ms, 0448ms total)
-T13F8 001:256 JLINK_WriteReg(R5, 0x00000000)  returns 0x00 (0000ms, 0448ms total)
-T13F8 001:256 JLINK_WriteReg(R6, 0x00000000)  returns 0x00 (0000ms, 0448ms total)
-T13F8 001:256 JLINK_WriteReg(R7, 0x00000000)  returns 0x00 (0000ms, 0448ms total)
-T13F8 001:256 JLINK_WriteReg(R8, 0x00000000)  returns 0x00 (0000ms, 0448ms total)
-T13F8 001:256 JLINK_WriteReg(R9, 0x2000016C)  returns 0x00 (0000ms, 0448ms total)
-T13F8 001:256 JLINK_WriteReg(R10, 0x00000000)  returns 0x00 (0000ms, 0448ms total)
-T13F8 001:256 JLINK_WriteReg(R11, 0x00000000)  returns 0x00 (0000ms, 0448ms total)
-T13F8 001:256 JLINK_WriteReg(R12, 0x00000000)  returns 0x00 (0000ms, 0448ms total)
-T13F8 001:256 JLINK_WriteReg(R13 (SP), 0x20001000)  returns 0x00 (0000ms, 0448ms total)
-T13F8 001:256 JLINK_WriteReg(R14, 0x20000001)  returns 0x00 (0000ms, 0448ms total)
-T13F8 001:256 JLINK_WriteReg(R15 (PC), 0x20000020)  returns 0x00 (0001ms, 0449ms total)
-T13F8 001:257 JLINK_WriteReg(XPSR, 0x01000000)  returns 0x00 (0000ms, 0449ms total)
-T13F8 001:257 JLINK_WriteReg(MSP, 0x20001000)  returns 0x00 (0000ms, 0449ms total)
-T13F8 001:257 JLINK_WriteReg(PSP, 0x20001000)  returns 0x00 (0000ms, 0449ms total)
-T13F8 001:257 JLINK_WriteReg(CFBP, 0x00000000)  returns 0x00 (0000ms, 0449ms total)
-T13F8 001:257 JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2)  returns 0x00000018 (0000ms, 0449ms total)
-T13F8 001:257 JLINK_Go() -- CPU_ReadMem(4 bytes @ 0xE0001000) -- CPU_WriteMem(4 bytes @ 0xE0001000) (0003ms, 0452ms total)
-T13F8 001:260 JLINK_IsHalted() -- CPU_ReadMem(2 bytes @ 0x20000000)  returns TRUE (0004ms, 0456ms total)
-T13F8 001:264 JLINK_ReadReg(R15 (PC))  returns 0x20000000 (0000ms, 0452ms total)
-T13F8 001:264 JLINK_ClrBPEx(BPHandle = 0x00000018)  returns 0x00 (0000ms, 0452ms total)
-T13F8 001:264 JLINK_ReadReg(R0)  returns 0x00000001 (0000ms, 0452ms total)
-T13F8 001:264 JLINK_WriteReg(R0, 0x08002C00)  returns 0x00 (0000ms, 0452ms total)
-T13F8 001:264 JLINK_WriteReg(R1, 0x00000400)  returns 0x00 (0000ms, 0452ms total)
-T13F8 001:264 JLINK_WriteReg(R2, 0x000000FF)  returns 0x00 (0000ms, 0452ms total)
-T13F8 001:264 JLINK_WriteReg(R3, 0x00000000)  returns 0x00 (0000ms, 0452ms total)
-T13F8 001:264 JLINK_WriteReg(R4, 0x00000000)  returns 0x00 (0000ms, 0452ms total)
-T13F8 001:264 JLINK_WriteReg(R5, 0x00000000)  returns 0x00 (0000ms, 0452ms total)
-T13F8 001:264 JLINK_WriteReg(R6, 0x00000000)  returns 0x00 (0000ms, 0452ms total)
-T13F8 001:264 JLINK_WriteReg(R7, 0x00000000)  returns 0x00 (0000ms, 0452ms total)
-T13F8 001:264 JLINK_WriteReg(R8, 0x00000000)  returns 0x00 (0000ms, 0452ms total)
-T13F8 001:264 JLINK_WriteReg(R9, 0x2000016C)  returns 0x00 (0001ms, 0453ms total)
-T13F8 001:265 JLINK_WriteReg(R10, 0x00000000)  returns 0x00 (0000ms, 0453ms total)
-T13F8 001:265 JLINK_WriteReg(R11, 0x00000000)  returns 0x00 (0000ms, 0453ms total)
-T13F8 001:265 JLINK_WriteReg(R12, 0x00000000)  returns 0x00 (0000ms, 0453ms total)
-T13F8 001:265 JLINK_WriteReg(R13 (SP), 0x20001000)  returns 0x00 (0000ms, 0453ms total)
-T13F8 001:265 JLINK_WriteReg(R14, 0x20000001)  returns 0x00 (0000ms, 0453ms total)
-T13F8 001:265 JLINK_WriteReg(R15 (PC), 0x200000B8)  returns 0x00 (0000ms, 0453ms total)
-T13F8 001:265 JLINK_WriteReg(XPSR, 0x01000000)  returns 0x00 (0000ms, 0453ms total)
-T13F8 001:265 JLINK_WriteReg(MSP, 0x20001000)  returns 0x00 (0000ms, 0453ms total)
-T13F8 001:265 JLINK_WriteReg(PSP, 0x20001000)  returns 0x00 (0000ms, 0453ms total)
-T13F8 001:265 JLINK_WriteReg(CFBP, 0x00000000)  returns 0x00 (0000ms, 0453ms total)
-T13F8 001:265 JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2)  returns 0x00000019 (0000ms, 0453ms total)
-T13F8 001:265 JLINK_Go() -- CPU_ReadMem(4 bytes @ 0xE0001000) -- CPU_WriteMem(4 bytes @ 0xE0001000) (0003ms, 0456ms total)
-T13F8 001:268 JLINK_IsHalted()  returns FALSE (0000ms, 0456ms total)
-T13F8 001:274 JLINK_IsHalted()  returns FALSE (0000ms, 0456ms total)
-T13F8 001:276 JLINK_IsHalted()  returns FALSE (0001ms, 0457ms total)
-T13F8 001:279 JLINK_IsHalted()  returns FALSE (0000ms, 0456ms total)
-T13F8 001:281 JLINK_IsHalted()  returns FALSE (0000ms, 0456ms total)
-T13F8 001:283 JLINK_IsHalted()  returns FALSE (0000ms, 0456ms total)
-T13F8 001:285 JLINK_IsHalted()  returns FALSE (0000ms, 0456ms total)
-T13F8 001:289 JLINK_IsHalted()  returns FALSE (0000ms, 0456ms total)
-T13F8 001:291 JLINK_IsHalted() -- CPU_ReadMem(2 bytes @ 0x20000000)  returns TRUE (0004ms, 0460ms total)
-T13F8 001:295 JLINK_ReadReg(R15 (PC))  returns 0x20000000 (0000ms, 0456ms total)
-T13F8 001:295 JLINK_ClrBPEx(BPHandle = 0x00000019)  returns 0x00 (0000ms, 0456ms total)
-T13F8 001:295 JLINK_ReadReg(R0)  returns 0x00000000 (0000ms, 0456ms total)
-T13F8 001:296 JLINK_WriteReg(R0, 0x08003000)  returns 0x00 (0000ms, 0456ms total)
-T13F8 001:296 JLINK_WriteReg(R1, 0x00000400)  returns 0x00 (0000ms, 0456ms total)
-T13F8 001:296 JLINK_WriteReg(R2, 0x000000FF)  returns 0x00 (0000ms, 0456ms total)
-T13F8 001:296 JLINK_WriteReg(R3, 0x00000000)  returns 0x00 (0000ms, 0456ms total)
-T13F8 001:296 JLINK_WriteReg(R4, 0x00000000)  returns 0x00 (0000ms, 0456ms total)
-T13F8 001:296 JLINK_WriteReg(R5, 0x00000000)  returns 0x00 (0000ms, 0456ms total)
-T13F8 001:296 JLINK_WriteReg(R6, 0x00000000)  returns 0x00 (0000ms, 0456ms total)
-T13F8 001:296 JLINK_WriteReg(R7, 0x00000000)  returns 0x00 (0000ms, 0456ms total)
-T13F8 001:296 JLINK_WriteReg(R8, 0x00000000)  returns 0x00 (0000ms, 0456ms total)
-T13F8 001:296 JLINK_WriteReg(R9, 0x2000016C)  returns 0x00 (0000ms, 0456ms total)
-T13F8 001:296 JLINK_WriteReg(R10, 0x00000000)  returns 0x00 (0000ms, 0456ms total)
-T13F8 001:296 JLINK_WriteReg(R11, 0x00000000)  returns 0x00 (0000ms, 0456ms total)
-T13F8 001:296 JLINK_WriteReg(R12, 0x00000000)  returns 0x00 (0000ms, 0456ms total)
-T13F8 001:296 JLINK_WriteReg(R13 (SP), 0x20001000)  returns 0x00 (0000ms, 0456ms total)
-T13F8 001:296 JLINK_WriteReg(R14, 0x20000001)  returns 0x00 (0000ms, 0456ms total)
-T13F8 001:296 JLINK_WriteReg(R15 (PC), 0x20000020)  returns 0x00 (0000ms, 0456ms total)
-T13F8 001:296 JLINK_WriteReg(XPSR, 0x01000000)  returns 0x00 (0000ms, 0456ms total)
-T13F8 001:296 JLINK_WriteReg(MSP, 0x20001000)  returns 0x00 (0000ms, 0456ms total)
-T13F8 001:296 JLINK_WriteReg(PSP, 0x20001000)  returns 0x00 (0000ms, 0456ms total)
-T13F8 001:296 JLINK_WriteReg(CFBP, 0x00000000)  returns 0x00 (0000ms, 0456ms total)
-T13F8 001:296 JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2)  returns 0x0000001A (0000ms, 0456ms total)
-T13F8 001:296 JLINK_Go() -- CPU_ReadMem(4 bytes @ 0xE0001000) -- CPU_WriteMem(4 bytes @ 0xE0001000) (0004ms, 0460ms total)
-T13F8 001:300 JLINK_IsHalted() -- CPU_ReadMem(2 bytes @ 0x20000000)  returns TRUE (0004ms, 0464ms total)
-T13F8 001:304 JLINK_ReadReg(R15 (PC))  returns 0x20000000 (0000ms, 0460ms total)
-T13F8 001:304 JLINK_ClrBPEx(BPHandle = 0x0000001A)  returns 0x00 (0000ms, 0460ms total)
-T13F8 001:304 JLINK_ReadReg(R0)  returns 0x00000001 (0000ms, 0460ms total)
-T13F8 001:304 JLINK_WriteReg(R0, 0x08003000)  returns 0x00 (0000ms, 0460ms total)
-T13F8 001:304 JLINK_WriteReg(R1, 0x00000400)  returns 0x00 (0000ms, 0460ms total)
-T13F8 001:304 JLINK_WriteReg(R2, 0x000000FF)  returns 0x00 (0000ms, 0460ms total)
-T13F8 001:304 JLINK_WriteReg(R3, 0x00000000)  returns 0x00 (0000ms, 0460ms total)
-T13F8 001:304 JLINK_WriteReg(R4, 0x00000000)  returns 0x00 (0000ms, 0460ms total)
-T13F8 001:304 JLINK_WriteReg(R5, 0x00000000)  returns 0x00 (0000ms, 0460ms total)
-T13F8 001:304 JLINK_WriteReg(R6, 0x00000000)  returns 0x00 (0000ms, 0460ms total)
-T13F8 001:304 JLINK_WriteReg(R7, 0x00000000)  returns 0x00 (0000ms, 0460ms total)
-T13F8 001:304 JLINK_WriteReg(R8, 0x00000000)  returns 0x00 (0000ms, 0460ms total)
-T13F8 001:304 JLINK_WriteReg(R9, 0x2000016C)  returns 0x00 (0000ms, 0460ms total)
-T13F8 001:304 JLINK_WriteReg(R10, 0x00000000)  returns 0x00 (0000ms, 0460ms total)
-T13F8 001:304 JLINK_WriteReg(R11, 0x00000000)  returns 0x00 (0000ms, 0460ms total)
-T13F8 001:304 JLINK_WriteReg(R12, 0x00000000)  returns 0x00 (0000ms, 0460ms total)
-T13F8 001:304 JLINK_WriteReg(R13 (SP), 0x20001000)  returns 0x00 (0000ms, 0460ms total)
-T13F8 001:305 JLINK_WriteReg(R14, 0x20000001)  returns 0x00 (0000ms, 0460ms total)
-T13F8 001:305 JLINK_WriteReg(R15 (PC), 0x200000B8)  returns 0x00 (0000ms, 0460ms total)
-T13F8 001:305 JLINK_WriteReg(XPSR, 0x01000000)  returns 0x00 (0000ms, 0460ms total)
-T13F8 001:305 JLINK_WriteReg(MSP, 0x20001000)  returns 0x00 (0000ms, 0460ms total)
-T13F8 001:305 JLINK_WriteReg(PSP, 0x20001000)  returns 0x00 (0000ms, 0460ms total)
-T13F8 001:305 JLINK_WriteReg(CFBP, 0x00000000)  returns 0x00 (0000ms, 0460ms total)
-T13F8 001:305 JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2)  returns 0x0000001B (0000ms, 0460ms total)
-T13F8 001:305 JLINK_Go() -- CPU_ReadMem(4 bytes @ 0xE0001000) -- CPU_WriteMem(4 bytes @ 0xE0001000) (0003ms, 0463ms total)
-T13F8 001:308 JLINK_IsHalted()  returns FALSE (0001ms, 0464ms total)
-T13F8 001:484 JLINK_IsHalted() -- CPU_ReadMem(2 bytes @ 0x20000000)  returns TRUE (0004ms, 0467ms total)
-T13F8 001:488 JLINK_ReadReg(R15 (PC))  returns 0x20000000 (0001ms, 0464ms total)
-T13F8 001:489 JLINK_ClrBPEx(BPHandle = 0x0000001B)  returns 0x00 (0000ms, 0464ms total)
-T13F8 001:489 JLINK_ReadReg(R0)  returns 0x00000000 (0000ms, 0464ms total)
-T13F8 001:490 JLINK_WriteReg(R0, 0x08003400)  returns 0x00 (0000ms, 0464ms total)
-T13F8 001:490 JLINK_WriteReg(R1, 0x00000400)  returns 0x00 (0000ms, 0464ms total)
-T13F8 001:490 JLINK_WriteReg(R2, 0x000000FF)  returns 0x00 (0000ms, 0464ms total)
-T13F8 001:490 JLINK_WriteReg(R3, 0x00000000)  returns 0x00 (0000ms, 0464ms total)
-T13F8 001:490 JLINK_WriteReg(R4, 0x00000000)  returns 0x00 (0000ms, 0464ms total)
-T13F8 001:490 JLINK_WriteReg(R5, 0x00000000)  returns 0x00 (0000ms, 0464ms total)
-T13F8 001:490 JLINK_WriteReg(R6, 0x00000000)  returns 0x00 (0000ms, 0464ms total)
-T13F8 001:490 JLINK_WriteReg(R7, 0x00000000)  returns 0x00 (0000ms, 0464ms total)
-T13F8 001:490 JLINK_WriteReg(R8, 0x00000000)  returns 0x00 (0000ms, 0464ms total)
-T13F8 001:490 JLINK_WriteReg(R9, 0x2000016C)  returns 0x00 (0000ms, 0464ms total)
-T13F8 001:490 JLINK_WriteReg(R10, 0x00000000)  returns 0x00 (0000ms, 0464ms total)
-T13F8 001:490 JLINK_WriteReg(R11, 0x00000000)  returns 0x00 (0000ms, 0464ms total)
-T13F8 001:490 JLINK_WriteReg(R12, 0x00000000)  returns 0x00 (0000ms, 0464ms total)
-T13F8 001:490 JLINK_WriteReg(R13 (SP), 0x20001000)  returns 0x00 (0000ms, 0464ms total)
-T13F8 001:490 JLINK_WriteReg(R14, 0x20000001)  returns 0x00 (0000ms, 0464ms total)
-T13F8 001:490 JLINK_WriteReg(R15 (PC), 0x20000020)  returns 0x00 (0001ms, 0465ms total)
-T13F8 001:491 JLINK_WriteReg(XPSR, 0x01000000)  returns 0x00 (0000ms, 0465ms total)
-T13F8 001:491 JLINK_WriteReg(MSP, 0x20001000)  returns 0x00 (0000ms, 0465ms total)
-T13F8 001:491 JLINK_WriteReg(PSP, 0x20001000)  returns 0x00 (0000ms, 0465ms total)
-T13F8 001:491 JLINK_WriteReg(CFBP, 0x00000000)  returns 0x00 (0000ms, 0465ms total)
-T13F8 001:491 JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2)  returns 0x0000001C (0000ms, 0465ms total)
-T13F8 001:491 JLINK_Go() -- CPU_ReadMem(4 bytes @ 0xE0001000) -- CPU_WriteMem(4 bytes @ 0xE0001000) (0004ms, 0469ms total)
-T13F8 001:495 JLINK_IsHalted() -- CPU_ReadMem(2 bytes @ 0x20000000)  returns TRUE (0004ms, 0473ms total)
-T13F8 001:499 JLINK_ReadReg(R15 (PC))  returns 0x20000000 (0000ms, 0469ms total)
-T13F8 001:499 JLINK_ClrBPEx(BPHandle = 0x0000001C)  returns 0x00 (0000ms, 0469ms total)
-T13F8 001:499 JLINK_ReadReg(R0)  returns 0x00000001 (0000ms, 0469ms total)
-T13F8 001:499 JLINK_WriteReg(R0, 0x08003400)  returns 0x00 (0000ms, 0469ms total)
-T13F8 001:499 JLINK_WriteReg(R1, 0x00000400)  returns 0x00 (0000ms, 0469ms total)
-T13F8 001:499 JLINK_WriteReg(R2, 0x000000FF)  returns 0x00 (0001ms, 0470ms total)
-T13F8 001:500 JLINK_WriteReg(R3, 0x00000000)  returns 0x00 (0000ms, 0470ms total)
-T13F8 001:500 JLINK_WriteReg(R4, 0x00000000)  returns 0x00 (0000ms, 0470ms total)
-T13F8 001:500 JLINK_WriteReg(R5, 0x00000000)  returns 0x00 (0000ms, 0470ms total)
-T13F8 001:500 JLINK_WriteReg(R6, 0x00000000)  returns 0x00 (0000ms, 0470ms total)
-T13F8 001:500 JLINK_WriteReg(R7, 0x00000000)  returns 0x00 (0000ms, 0470ms total)
-T13F8 001:500 JLINK_WriteReg(R8, 0x00000000)  returns 0x00 (0000ms, 0470ms total)
-T13F8 001:500 JLINK_WriteReg(R9, 0x2000016C)  returns 0x00 (0000ms, 0470ms total)
-T13F8 001:500 JLINK_WriteReg(R10, 0x00000000)  returns 0x00 (0000ms, 0470ms total)
-T13F8 001:500 JLINK_WriteReg(R11, 0x00000000)  returns 0x00 (0000ms, 0470ms total)
-T13F8 001:500 JLINK_WriteReg(R12, 0x00000000)  returns 0x00 (0000ms, 0470ms total)
-T13F8 001:500 JLINK_WriteReg(R13 (SP), 0x20001000)  returns 0x00 (0000ms, 0470ms total)
-T13F8 001:500 JLINK_WriteReg(R14, 0x20000001)  returns 0x00 (0000ms, 0470ms total)
-T13F8 001:500 JLINK_WriteReg(R15 (PC), 0x200000B8)  returns 0x00 (0000ms, 0470ms total)
-T13F8 001:500 JLINK_WriteReg(XPSR, 0x01000000)  returns 0x00 (0000ms, 0470ms total)
-T13F8 001:500 JLINK_WriteReg(MSP, 0x20001000)  returns 0x00 (0000ms, 0470ms total)
-T13F8 001:500 JLINK_WriteReg(PSP, 0x20001000)  returns 0x00 (0000ms, 0470ms total)
-T13F8 001:500 JLINK_WriteReg(CFBP, 0x00000000)  returns 0x00 (0000ms, 0470ms total)
-T13F8 001:500 JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2)  returns 0x0000001D (0001ms, 0471ms total)
-T13F8 001:501 JLINK_Go() -- CPU_ReadMem(4 bytes @ 0xE0001000) -- CPU_WriteMem(4 bytes @ 0xE0001000) (0003ms, 0474ms total)
-T13F8 001:504 JLINK_IsHalted()  returns FALSE (0001ms, 0475ms total)
-T13F8 001:507 JLINK_IsHalted()  returns FALSE (0000ms, 0474ms total)
-T13F8 001:513 JLINK_IsHalted()  returns FALSE (0000ms, 0474ms total)
-T13F8 001:516 JLINK_IsHalted()  returns FALSE (0000ms, 0474ms total)
-T13F8 001:518 JLINK_IsHalted()  returns FALSE (0000ms, 0474ms total)
-T13F8 001:524 JLINK_IsHalted()  returns FALSE (0001ms, 0475ms total)
-T13F8 001:527 JLINK_IsHalted() -- CPU_ReadMem(2 bytes @ 0x20000000)  returns TRUE (0004ms, 0478ms total)
-T13F8 001:531 JLINK_ReadReg(R15 (PC))  returns 0x20000000 (0000ms, 0474ms total)
-T13F8 001:532 JLINK_ClrBPEx(BPHandle = 0x0000001D)  returns 0x00 (0000ms, 0475ms total)
-T13F8 001:532 JLINK_ReadReg(R0)  returns 0x00000000 (0000ms, 0475ms total)
-T13F8 001:533 JLINK_WriteReg(R0, 0x08003800)  returns 0x00 (0000ms, 0475ms total)
-T13F8 001:533 JLINK_WriteReg(R1, 0x00000400)  returns 0x00 (0000ms, 0475ms total)
-T13F8 001:533 JLINK_WriteReg(R2, 0x000000FF)  returns 0x00 (0000ms, 0475ms total)
-T13F8 001:533 JLINK_WriteReg(R3, 0x00000000)  returns 0x00 (0000ms, 0475ms total)
-T13F8 001:533 JLINK_WriteReg(R4, 0x00000000)  returns 0x00 (0000ms, 0475ms total)
-T13F8 001:533 JLINK_WriteReg(R5, 0x00000000)  returns 0x00 (0000ms, 0475ms total)
-T13F8 001:533 JLINK_WriteReg(R6, 0x00000000)  returns 0x00 (0000ms, 0475ms total)
-T13F8 001:533 JLINK_WriteReg(R7, 0x00000000)  returns 0x00 (0000ms, 0475ms total)
-T13F8 001:533 JLINK_WriteReg(R8, 0x00000000)  returns 0x00 (0000ms, 0475ms total)
-T13F8 001:533 JLINK_WriteReg(R9, 0x2000016C)  returns 0x00 (0000ms, 0475ms total)
-T13F8 001:533 JLINK_WriteReg(R10, 0x00000000)  returns 0x00 (0000ms, 0475ms total)
-T13F8 001:533 JLINK_WriteReg(R11, 0x00000000)  returns 0x00 (0000ms, 0475ms total)
-T13F8 001:533 JLINK_WriteReg(R12, 0x00000000)  returns 0x00 (0000ms, 0475ms total)
-T13F8 001:533 JLINK_WriteReg(R13 (SP), 0x20001000)  returns 0x00 (0000ms, 0475ms total)
-T13F8 001:533 JLINK_WriteReg(R14, 0x20000001)  returns 0x00 (0000ms, 0475ms total)
-T13F8 001:533 JLINK_WriteReg(R15 (PC), 0x20000020)  returns 0x00 (0000ms, 0475ms total)
-T13F8 001:534 JLINK_WriteReg(XPSR, 0x01000000)  returns 0x00 (0000ms, 0476ms total)
-T13F8 001:534 JLINK_WriteReg(MSP, 0x20001000)  returns 0x00 (0000ms, 0476ms total)
-T13F8 001:534 JLINK_WriteReg(PSP, 0x20001000)  returns 0x00 (0000ms, 0476ms total)
-T13F8 001:534 JLINK_WriteReg(CFBP, 0x00000000)  returns 0x00 (0000ms, 0476ms total)
-T13F8 001:534 JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2)  returns 0x0000001E (0000ms, 0476ms total)
-T13F8 001:534 JLINK_Go() -- CPU_ReadMem(4 bytes @ 0xE0001000) -- CPU_WriteMem(4 bytes @ 0xE0001000) (0003ms, 0479ms total)
-T13F8 001:538 JLINK_IsHalted() -- CPU_ReadMem(2 bytes @ 0x20000000)  returns TRUE (0004ms, 0484ms total)
-T13F8 001:542 JLINK_ReadReg(R15 (PC))  returns 0x20000000 (0000ms, 0480ms total)
-T13F8 001:542 JLINK_ClrBPEx(BPHandle = 0x0000001E)  returns 0x00 (0000ms, 0480ms total)
-T13F8 001:542 JLINK_ReadReg(R0)  returns 0x00000001 (0000ms, 0480ms total)
-T13F8 001:542 JLINK_WriteReg(R0, 0x08003800)  returns 0x00 (0000ms, 0480ms total)
-T13F8 001:542 JLINK_WriteReg(R1, 0x00000400)  returns 0x00 (0000ms, 0480ms total)
-T13F8 001:542 JLINK_WriteReg(R2, 0x000000FF)  returns 0x00 (0000ms, 0480ms total)
-T13F8 001:542 JLINK_WriteReg(R3, 0x00000000)  returns 0x00 (0000ms, 0480ms total)
-T13F8 001:542 JLINK_WriteReg(R4, 0x00000000)  returns 0x00 (0000ms, 0480ms total)
-T13F8 001:542 JLINK_WriteReg(R5, 0x00000000)  returns 0x00 (0000ms, 0480ms total)
-T13F8 001:542 JLINK_WriteReg(R6, 0x00000000)  returns 0x00 (0000ms, 0480ms total)
-T13F8 001:542 JLINK_WriteReg(R7, 0x00000000)  returns 0x00 (0000ms, 0480ms total)
-T13F8 001:542 JLINK_WriteReg(R8, 0x00000000)  returns 0x00 (0000ms, 0480ms total)
-T13F8 001:542 JLINK_WriteReg(R9, 0x2000016C)  returns 0x00 (0001ms, 0481ms total)
-T13F8 001:543 JLINK_WriteReg(R10, 0x00000000)  returns 0x00 (0000ms, 0481ms total)
-T13F8 001:543 JLINK_WriteReg(R11, 0x00000000)  returns 0x00 (0000ms, 0481ms total)
-T13F8 001:543 JLINK_WriteReg(R12, 0x00000000)  returns 0x00 (0000ms, 0481ms total)
-T13F8 001:543 JLINK_WriteReg(R13 (SP), 0x20001000)  returns 0x00 (0000ms, 0481ms total)
-T13F8 001:543 JLINK_WriteReg(R14, 0x20000001)  returns 0x00 (0000ms, 0481ms total)
-T13F8 001:543 JLINK_WriteReg(R15 (PC), 0x200000B8)  returns 0x00 (0000ms, 0481ms total)
-T13F8 001:543 JLINK_WriteReg(XPSR, 0x01000000)  returns 0x00 (0000ms, 0481ms total)
-T13F8 001:543 JLINK_WriteReg(MSP, 0x20001000)  returns 0x00 (0000ms, 0481ms total)
-T13F8 001:543 JLINK_WriteReg(PSP, 0x20001000)  returns 0x00 (0000ms, 0481ms total)
-T13F8 001:543 JLINK_WriteReg(CFBP, 0x00000000)  returns 0x00 (0000ms, 0481ms total)
-T13F8 001:543 JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2)  returns 0x0000001F (0000ms, 0481ms total)
-T13F8 001:543 JLINK_Go() -- CPU_ReadMem(4 bytes @ 0xE0001000) -- CPU_WriteMem(4 bytes @ 0xE0001000) (0003ms, 0484ms total)
-T13F8 001:546 JLINK_IsHalted()  returns FALSE (0001ms, 0485ms total)
-T13F8 001:549 JLINK_IsHalted()  returns FALSE (0000ms, 0484ms total)
-T13F8 001:551 JLINK_IsHalted()  returns FALSE (0000ms, 0484ms total)
-T13F8 001:553 JLINK_IsHalted()  returns FALSE (0000ms, 0484ms total)
-T13F8 001:555 JLINK_IsHalted()  returns FALSE (0000ms, 0484ms total)
-T13F8 001:557 JLINK_IsHalted()  returns FALSE (0000ms, 0484ms total)
-T13F8 001:559 JLINK_IsHalted()  returns FALSE (0000ms, 0484ms total)
-T13F8 001:561 JLINK_IsHalted()  returns FALSE (0000ms, 0484ms total)
-T13F8 001:563 JLINK_IsHalted()  returns FALSE (0000ms, 0484ms total)
-T13F8 001:566 JLINK_IsHalted()  returns FALSE (0000ms, 0484ms total)
-T13F8 001:568 JLINK_IsHalted() -- CPU_ReadMem(2 bytes @ 0x20000000)  returns TRUE (0004ms, 0488ms total)
-T13F8 001:573 JLINK_ReadReg(R15 (PC))  returns 0x20000000 (0000ms, 0484ms total)
-T13F8 001:573 JLINK_ClrBPEx(BPHandle = 0x0000001F)  returns 0x00 (0000ms, 0484ms total)
-T13F8 001:573 JLINK_ReadReg(R0)  returns 0x00000000 (0000ms, 0484ms total)
-T13F8 001:574 JLINK_WriteReg(R0, 0x00000001)  returns 0x00 (0000ms, 0484ms total)
-T13F8 001:574 JLINK_WriteReg(R1, 0x00000400)  returns 0x00 (0000ms, 0484ms total)
-T13F8 001:574 JLINK_WriteReg(R2, 0x000000FF)  returns 0x00 (0000ms, 0484ms total)
-T13F8 001:574 JLINK_WriteReg(R3, 0x00000000)  returns 0x00 (0000ms, 0484ms total)
-T13F8 001:574 JLINK_WriteReg(R4, 0x00000000)  returns 0x00 (0000ms, 0484ms total)
-T13F8 001:574 JLINK_WriteReg(R5, 0x00000000)  returns 0x00 (0000ms, 0484ms total)
-T13F8 001:574 JLINK_WriteReg(R6, 0x00000000)  returns 0x00 (0000ms, 0484ms total)
-T13F8 001:574 JLINK_WriteReg(R7, 0x00000000)  returns 0x00 (0000ms, 0484ms total)
-T13F8 001:574 JLINK_WriteReg(R8, 0x00000000)  returns 0x00 (0000ms, 0484ms total)
-T13F8 001:574 JLINK_WriteReg(R9, 0x2000016C)  returns 0x00 (0000ms, 0484ms total)
-T13F8 001:574 JLINK_WriteReg(R10, 0x00000000)  returns 0x00 (0000ms, 0484ms total)
-T13F8 001:574 JLINK_WriteReg(R11, 0x00000000)  returns 0x00 (0000ms, 0484ms total)
-T13F8 001:574 JLINK_WriteReg(R12, 0x00000000)  returns 0x00 (0000ms, 0484ms total)
-T13F8 001:574 JLINK_WriteReg(R13 (SP), 0x20001000)  returns 0x00 (0000ms, 0484ms total)
-T13F8 001:574 JLINK_WriteReg(R14, 0x20000001)  returns 0x00 (0000ms, 0484ms total)
-T13F8 001:574 JLINK_WriteReg(R15 (PC), 0x20000066)  returns 0x00 (0000ms, 0484ms total)
-T13F8 001:574 JLINK_WriteReg(XPSR, 0x01000000)  returns 0x00 (0000ms, 0484ms total)
-T13F8 001:574 JLINK_WriteReg(MSP, 0x20001000)  returns 0x00 (0000ms, 0484ms total)
-T13F8 001:574 JLINK_WriteReg(PSP, 0x20001000)  returns 0x00 (0001ms, 0485ms total)
-T13F8 001:575 JLINK_WriteReg(CFBP, 0x00000000)  returns 0x00 (0000ms, 0485ms total)
-T13F8 001:575 JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2)  returns 0x00000020 (0000ms, 0485ms total)
-T13F8 001:575 JLINK_Go() -- CPU_ReadMem(4 bytes @ 0xE0001000) -- CPU_WriteMem(4 bytes @ 0xE0001000) (0004ms, 0489ms total)
-T13F8 001:579 JLINK_IsHalted() -- CPU_ReadMem(2 bytes @ 0x20000000)  returns TRUE (0004ms, 0493ms total)
-T13F8 001:583 JLINK_ReadReg(R15 (PC))  returns 0x20000000 (0000ms, 0489ms total)
-T13F8 001:583 JLINK_ClrBPEx(BPHandle = 0x00000020)  returns 0x00 (0000ms, 0489ms total)
-T13F8 001:583 JLINK_ReadReg(R0)  returns 0x00000000 (0000ms, 0489ms total)
-T13F8 001:659 JLINK_WriteMem(0x20000000, 0x0170 Bytes, ...) - Data: 00 BE 0A E0 0D 78 2D 06 68 40 08 24 40 00 00 D3 ... -- CPU_WriteMem(368 bytes @ 0x20000000)  returns 0x170 (0006ms, 0495ms total)
-T13F8 001:665 JLINK_WriteReg(R0, 0x08000000)  returns 0x00 (0000ms, 0495ms total)
-T13F8 001:665 JLINK_WriteReg(R1, 0x00B71B00)  returns 0x00 (0000ms, 0495ms total)
-T13F8 001:665 JLINK_WriteReg(R2, 0x00000002)  returns 0x00 (0000ms, 0495ms total)
-T13F8 001:665 JLINK_WriteReg(R3, 0x00000000)  returns 0x00 (0000ms, 0495ms total)
-T13F8 001:665 JLINK_WriteReg(R4, 0x00000000)  returns 0x00 (0000ms, 0495ms total)
-T13F8 001:665 JLINK_WriteReg(R5, 0x00000000)  returns 0x00 (0000ms, 0495ms total)
-T13F8 001:665 JLINK_WriteReg(R6, 0x00000000)  returns 0x00 (0000ms, 0495ms total)
-T13F8 001:665 JLINK_WriteReg(R7, 0x00000000)  returns 0x00 (0000ms, 0495ms total)
-T13F8 001:665 JLINK_WriteReg(R8, 0x00000000)  returns 0x00 (0000ms, 0495ms total)
-T13F8 001:665 JLINK_WriteReg(R9, 0x2000016C)  returns 0x00 (0000ms, 0495ms total)
-T13F8 001:665 JLINK_WriteReg(R10, 0x00000000)  returns 0x00 (0000ms, 0495ms total)
-T13F8 001:665 JLINK_WriteReg(R11, 0x00000000)  returns 0x00 (0000ms, 0495ms total)
-T13F8 001:665 JLINK_WriteReg(R12, 0x00000000)  returns 0x00 (0000ms, 0495ms total)
-T13F8 001:665 JLINK_WriteReg(R13 (SP), 0x20001000)  returns 0x00 (0000ms, 0495ms total)
-T13F8 001:666 JLINK_WriteReg(R14, 0x20000001)  returns 0x00 (0000ms, 0496ms total)
-T13F8 001:666 JLINK_WriteReg(R15 (PC), 0x20000038)  returns 0x00 (0000ms, 0496ms total)
-T13F8 001:666 JLINK_WriteReg(XPSR, 0x01000000)  returns 0x00 (0000ms, 0496ms total)
-T13F8 001:666 JLINK_WriteReg(MSP, 0x20001000)  returns 0x00 (0000ms, 0496ms total)
-T13F8 001:666 JLINK_WriteReg(PSP, 0x20001000)  returns 0x00 (0000ms, 0496ms total)
-T13F8 001:666 JLINK_WriteReg(CFBP, 0x00000000)  returns 0x00 (0000ms, 0496ms total)
-T13F8 001:666 JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2) -- CPU_ReadMem(4 bytes @ 0x20000000) -- CPU_WriteMem(4 bytes @ 0x20000000) -- CPU_ReadMem(4 bytes @ 0x20000000) -- CPU_WriteMem(4 bytes @ 0x20000000) -- CPU_ReadMem(2 bytes @ 0x20000000)  returns 0x00000021 (0003ms, 0499ms total)
-T13F8 001:669 JLINK_Go() -- CPU_WriteMem(2 bytes @ 0x20000000) -- CPU_ReadMem(4 bytes @ 0xE0001000) -- CPU_WriteMem(4 bytes @ 0xE0001000) (0004ms, 0503ms total)
-T13F8 001:673 JLINK_IsHalted() -- CPU_ReadMem(2 bytes @ 0x20000000)  returns TRUE (0005ms, 0508ms total)
-T13F8 001:678 JLINK_ReadReg(R15 (PC))  returns 0x20000000 (0000ms, 0503ms total)
-T13F8 001:678 JLINK_ClrBPEx(BPHandle = 0x00000021)  returns 0x00 (0000ms, 0503ms total)
-T13F8 001:678 JLINK_ReadReg(R0)  returns 0x00000000 (0000ms, 0503ms total)
-T13F8 001:679 JLINK_WriteMem(0x20000170, 0x0290 Bytes, ...) - Data: A0 19 00 20 CD 00 00 08 F1 0F 00 08 65 0E 00 08 ... -- CPU_WriteMem(656 bytes @ 0x20000170)  returns 0x290 (0009ms, 0513ms total)
-T13F8 001:688 JLINK_WriteMem(0x20000400, 0x0170 Bytes, ...) - Data: 04 DB 01 46 20 3A 91 40 00 20 10 BD 91 40 20 23 ... -- CPU_WriteMem(368 bytes @ 0x20000400)  returns 0x170 (0005ms, 0518ms total)
-T13F8 001:693 JLINK_WriteReg(R0, 0x08000000)  returns 0x00 (0000ms, 0518ms total)
-T13F8 001:693 JLINK_WriteReg(R1, 0x00000400)  returns 0x00 (0000ms, 0518ms total)
-T13F8 001:693 JLINK_WriteReg(R2, 0x20000170)  returns 0x00 (0000ms, 0518ms total)
-T13F8 001:693 JLINK_WriteReg(R3, 0x00000000)  returns 0x00 (0000ms, 0518ms total)
-T13F8 001:693 JLINK_WriteReg(R4, 0x00000000)  returns 0x00 (0000ms, 0518ms total)
-T13F8 001:693 JLINK_WriteReg(R5, 0x00000000)  returns 0x00 (0001ms, 0519ms total)
-T13F8 001:694 JLINK_WriteReg(R6, 0x00000000)  returns 0x00 (0000ms, 0519ms total)
-T13F8 001:694 JLINK_WriteReg(R7, 0x00000000)  returns 0x00 (0000ms, 0519ms total)
-T13F8 001:694 JLINK_WriteReg(R8, 0x00000000)  returns 0x00 (0000ms, 0519ms total)
-T13F8 001:694 JLINK_WriteReg(R9, 0x2000016C)  returns 0x00 (0000ms, 0519ms total)
-T13F8 001:694 JLINK_WriteReg(R10, 0x00000000)  returns 0x00 (0000ms, 0519ms total)
-T13F8 001:694 JLINK_WriteReg(R11, 0x00000000)  returns 0x00 (0000ms, 0519ms total)
-T13F8 001:694 JLINK_WriteReg(R12, 0x00000000)  returns 0x00 (0000ms, 0519ms total)
-T13F8 001:694 JLINK_WriteReg(R13 (SP), 0x20001000)  returns 0x00 (0000ms, 0519ms total)
-T13F8 001:694 JLINK_WriteReg(R14, 0x20000001)  returns 0x00 (0000ms, 0519ms total)
-T13F8 001:694 JLINK_WriteReg(R15 (PC), 0x200000FA)  returns 0x00 (0000ms, 0519ms total)
-T13F8 001:694 JLINK_WriteReg(XPSR, 0x01000000)  returns 0x00 (0000ms, 0519ms total)
-T13F8 001:694 JLINK_WriteReg(MSP, 0x20001000)  returns 0x00 (0000ms, 0519ms total)
-T13F8 001:694 JLINK_WriteReg(PSP, 0x20001000)  returns 0x00 (0000ms, 0519ms total)
-T13F8 001:694 JLINK_WriteReg(CFBP, 0x00000000)  returns 0x00 (0000ms, 0519ms total)
-T13F8 001:694 JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2)  returns 0x00000022 (0000ms, 0519ms total)
-T13F8 001:694 JLINK_Go() -- CPU_ReadMem(4 bytes @ 0xE0001000) -- CPU_WriteMem(4 bytes @ 0xE0001000) (0004ms, 0523ms total)
-T13F8 001:698 JLINK_IsHalted()  returns FALSE (0000ms, 0523ms total)
-T13F8 001:711 JLINK_IsHalted()  returns FALSE (0000ms, 0523ms total)
-T13F8 001:713 JLINK_IsHalted()  returns FALSE (0000ms, 0523ms total)
-T13F8 001:715 JLINK_IsHalted()  returns FALSE (0000ms, 0523ms total)
-T13F8 001:718 JLINK_IsHalted()  returns FALSE (0000ms, 0523ms total)
-T13F8 001:721 JLINK_IsHalted()  returns FALSE (0000ms, 0523ms total)
-T13F8 001:723 JLINK_IsHalted()  returns FALSE (0000ms, 0523ms total)
-T13F8 001:729 JLINK_IsHalted() -- CPU_ReadMem(2 bytes @ 0x20000000)  returns TRUE (0004ms, 0527ms total)
-T13F8 001:733 JLINK_ReadReg(R15 (PC))  returns 0x20000000 (0001ms, 0528ms total)
-T13F8 001:734 JLINK_ClrBPEx(BPHandle = 0x00000022)  returns 0x00 (0000ms, 0528ms total)
-T13F8 001:734 JLINK_ReadReg(R0)  returns 0x00000000 (0000ms, 0528ms total)
-T13F8 001:735 JLINK_WriteMem(0x20000170, 0x0290 Bytes, ...) - Data: 8A 42 FA DB 10 BD 00 00 FC B5 1D 48 01 90 1E 4D ... -- CPU_WriteMem(656 bytes @ 0x20000170)  returns 0x290 (0009ms, 0537ms total)
-T13F8 001:744 JLINK_WriteMem(0x20000400, 0x0170 Bytes, ...) - Data: 43 61 C2 60 84 68 94 42 04 D1 01 22 82 61 83 60 ... -- CPU_WriteMem(368 bytes @ 0x20000400)  returns 0x170 (0005ms, 0542ms total)
-T13F8 001:749 JLINK_WriteReg(R0, 0x08000400)  returns 0x00 (0000ms, 0542ms total)
-T13F8 001:749 JLINK_WriteReg(R1, 0x00000400)  returns 0x00 (0000ms, 0542ms total)
-T13F8 001:749 JLINK_WriteReg(R2, 0x20000170)  returns 0x00 (0000ms, 0542ms total)
-T13F8 001:749 JLINK_WriteReg(R3, 0x00000000)  returns 0x00 (0000ms, 0542ms total)
-T13F8 001:749 JLINK_WriteReg(R4, 0x00000000)  returns 0x00 (0000ms, 0542ms total)
-T13F8 001:749 JLINK_WriteReg(R5, 0x00000000)  returns 0x00 (0000ms, 0542ms total)
-T13F8 001:749 JLINK_WriteReg(R6, 0x00000000)  returns 0x00 (0000ms, 0542ms total)
-T13F8 001:749 JLINK_WriteReg(R7, 0x00000000)  returns 0x00 (0000ms, 0542ms total)
-T13F8 001:749 JLINK_WriteReg(R8, 0x00000000)  returns 0x00 (0000ms, 0542ms total)
-T13F8 001:749 JLINK_WriteReg(R9, 0x2000016C)  returns 0x00 (0000ms, 0542ms total)
-T13F8 001:749 JLINK_WriteReg(R10, 0x00000000)  returns 0x00 (0000ms, 0542ms total)
-T13F8 001:749 JLINK_WriteReg(R11, 0x00000000)  returns 0x00 (0000ms, 0542ms total)
-T13F8 001:749 JLINK_WriteReg(R12, 0x00000000)  returns 0x00 (0000ms, 0542ms total)
-T13F8 001:749 JLINK_WriteReg(R13 (SP), 0x20001000)  returns 0x00 (0000ms, 0542ms total)
-T13F8 001:749 JLINK_WriteReg(R14, 0x20000001)  returns 0x00 (0000ms, 0542ms total)
-T13F8 001:749 JLINK_WriteReg(R15 (PC), 0x200000FA)  returns 0x00 (0000ms, 0542ms total)
-T13F8 001:749 JLINK_WriteReg(XPSR, 0x01000000)  returns 0x00 (0000ms, 0542ms total)
-T13F8 001:749 JLINK_WriteReg(MSP, 0x20001000)  returns 0x00 (0000ms, 0542ms total)
-T13F8 001:749 JLINK_WriteReg(PSP, 0x20001000)  returns 0x00 (0000ms, 0542ms total)
-T13F8 001:749 JLINK_WriteReg(CFBP, 0x00000000)  returns 0x00 (0000ms, 0542ms total)
-T13F8 001:749 JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2)  returns 0x00000023 (0000ms, 0542ms total)
-T13F8 001:749 JLINK_Go() -- CPU_ReadMem(4 bytes @ 0xE0001000) -- CPU_WriteMem(4 bytes @ 0xE0001000) (0005ms, 0547ms total)
-T13F8 001:754 JLINK_IsHalted()  returns FALSE (0000ms, 0547ms total)
-T13F8 001:759 JLINK_IsHalted()  returns FALSE (0000ms, 0547ms total)
-T13F8 001:761 JLINK_IsHalted()  returns FALSE (0000ms, 0547ms total)
-T13F8 001:763 JLINK_IsHalted()  returns FALSE (0000ms, 0547ms total)
-T13F8 001:765 JLINK_IsHalted()  returns FALSE (0000ms, 0547ms total)
-T13F8 001:768 JLINK_IsHalted()  returns FALSE (0000ms, 0547ms total)
-T13F8 001:770 JLINK_IsHalted()  returns FALSE (0000ms, 0547ms total)
-T13F8 001:772 JLINK_IsHalted()  returns FALSE (0000ms, 0547ms total)
-T13F8 001:775 JLINK_IsHalted()  returns FALSE (0000ms, 0547ms total)
-T13F8 001:778 JLINK_IsHalted()  returns FALSE (0000ms, 0547ms total)
-T13F8 001:781 JLINK_IsHalted()  returns FALSE (0000ms, 0547ms total)
-T13F8 001:784 JLINK_IsHalted() -- CPU_ReadMem(2 bytes @ 0x20000000)  returns TRUE (0004ms, 0551ms total)
-T13F8 001:788 JLINK_ReadReg(R15 (PC))  returns 0x20000000 (0000ms, 0547ms total)
-T13F8 001:788 JLINK_ClrBPEx(BPHandle = 0x00000023)  returns 0x00 (0000ms, 0547ms total)
-T13F8 001:788 JLINK_ReadReg(R0)  returns 0x00000000 (0001ms, 0548ms total)
-T13F8 001:791 JLINK_WriteMem(0x20000170, 0x0290 Bytes, ...) - Data: F1 D1 E0 68 80 06 01 D5 20 20 E0 60 E0 68 C0 06 ... -- CPU_WriteMem(656 bytes @ 0x20000170)  returns 0x290 (0008ms, 0556ms total)
-T13F8 001:799 JLINK_WriteMem(0x20000400, 0x0170 Bytes, ...) - Data: 20 01 00 20 10 B5 06 48 01 68 10 22 11 43 01 60 ... -- CPU_WriteMem(368 bytes @ 0x20000400)  returns 0x170 (0006ms, 0562ms total)
-T13F8 001:805 JLINK_WriteReg(R0, 0x08000800)  returns 0x00 (0000ms, 0562ms total)
-T13F8 001:805 JLINK_WriteReg(R1, 0x00000400)  returns 0x00 (0000ms, 0562ms total)
-T13F8 001:805 JLINK_WriteReg(R2, 0x20000170)  returns 0x00 (0000ms, 0562ms total)
-T13F8 001:805 JLINK_WriteReg(R3, 0x00000000)  returns 0x00 (0000ms, 0562ms total)
-T13F8 001:805 JLINK_WriteReg(R4, 0x00000000)  returns 0x00 (0000ms, 0562ms total)
-T13F8 001:805 JLINK_WriteReg(R5, 0x00000000)  returns 0x00 (0000ms, 0562ms total)
-T13F8 001:805 JLINK_WriteReg(R6, 0x00000000)  returns 0x00 (0000ms, 0562ms total)
-T13F8 001:805 JLINK_WriteReg(R7, 0x00000000)  returns 0x00 (0000ms, 0562ms total)
-T13F8 001:805 JLINK_WriteReg(R8, 0x00000000)  returns 0x00 (0000ms, 0562ms total)
-T13F8 001:805 JLINK_WriteReg(R9, 0x2000016C)  returns 0x00 (0000ms, 0562ms total)
-T13F8 001:805 JLINK_WriteReg(R10, 0x00000000)  returns 0x00 (0000ms, 0562ms total)
-T13F8 001:805 JLINK_WriteReg(R11, 0x00000000)  returns 0x00 (0000ms, 0562ms total)
-T13F8 001:805 JLINK_WriteReg(R12, 0x00000000)  returns 0x00 (0001ms, 0563ms total)
-T13F8 001:806 JLINK_WriteReg(R13 (SP), 0x20001000)  returns 0x00 (0000ms, 0563ms total)
-T13F8 001:806 JLINK_WriteReg(R14, 0x20000001)  returns 0x00 (0000ms, 0563ms total)
-T13F8 001:806 JLINK_WriteReg(R15 (PC), 0x200000FA)  returns 0x00 (0000ms, 0563ms total)
-T13F8 001:806 JLINK_WriteReg(XPSR, 0x01000000)  returns 0x00 (0000ms, 0563ms total)
-T13F8 001:806 JLINK_WriteReg(MSP, 0x20001000)  returns 0x00 (0000ms, 0563ms total)
-T13F8 001:806 JLINK_WriteReg(PSP, 0x20001000)  returns 0x00 (0000ms, 0563ms total)
-T13F8 001:806 JLINK_WriteReg(CFBP, 0x00000000)  returns 0x00 (0000ms, 0563ms total)
-T13F8 001:806 JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2)  returns 0x00000024 (0000ms, 0563ms total)
-T13F8 001:806 JLINK_Go() -- CPU_ReadMem(4 bytes @ 0xE0001000) -- CPU_WriteMem(4 bytes @ 0xE0001000) (0004ms, 0567ms total)
-T13F8 001:810 JLINK_IsHalted()  returns FALSE (0001ms, 0568ms total)
-T13F8 001:817 JLINK_IsHalted()  returns FALSE (0001ms, 0568ms total)
-T13F8 001:820 JLINK_IsHalted()  returns FALSE (0000ms, 0567ms total)
-T13F8 001:823 JLINK_IsHalted()  returns FALSE (0001ms, 0568ms total)
-T13F8 001:826 JLINK_IsHalted()  returns FALSE (0001ms, 0568ms total)
-T13F8 001:829 JLINK_IsHalted()  returns FALSE (0000ms, 0567ms total)
-T13F8 001:832 JLINK_IsHalted()  returns FALSE (0001ms, 0568ms total)
-T13F8 001:842 JLINK_IsHalted() -- CPU_ReadMem(2 bytes @ 0x20000000)  returns TRUE (0005ms, 0572ms total)
-T13F8 001:847 JLINK_ReadReg(R15 (PC))  returns 0x20000000 (0000ms, 0567ms total)
-T13F8 001:847 JLINK_ClrBPEx(BPHandle = 0x00000024)  returns 0x00 (0000ms, 0567ms total)
-T13F8 001:847 JLINK_ReadReg(R0)  returns 0x00000000 (0000ms, 0567ms total)
-T13F8 001:850 JLINK_WriteMem(0x20000170, 0x0290 Bytes, ...) - Data: 00 10 02 40 00 70 00 40 88 13 00 00 F8 B5 05 46 ... -- CPU_WriteMem(656 bytes @ 0x20000170)  returns 0x290 (0009ms, 0576ms total)
-T13F8 001:859 JLINK_WriteMem(0x20000400, 0x0170 Bytes, ...) - Data: 41 F9 0E 4C 20 61 FF F7 4F FF 29 46 FF F7 24 F9 ... -- CPU_WriteMem(368 bytes @ 0x20000400)  returns 0x170 (0006ms, 0582ms total)
-T13F8 001:865 JLINK_WriteReg(R0, 0x08000C00)  returns 0x00 (0000ms, 0582ms total)
-T13F8 001:865 JLINK_WriteReg(R1, 0x00000400)  returns 0x00 (0000ms, 0582ms total)
-T13F8 001:865 JLINK_WriteReg(R2, 0x20000170)  returns 0x00 (0000ms, 0582ms total)
-T13F8 001:865 JLINK_WriteReg(R3, 0x00000000)  returns 0x00 (0000ms, 0582ms total)
-T13F8 001:865 JLINK_WriteReg(R4, 0x00000000)  returns 0x00 (0000ms, 0582ms total)
-T13F8 001:865 JLINK_WriteReg(R5, 0x00000000)  returns 0x00 (0000ms, 0582ms total)
-T13F8 001:865 JLINK_WriteReg(R6, 0x00000000)  returns 0x00 (0000ms, 0582ms total)
-T13F8 001:865 JLINK_WriteReg(R7, 0x00000000)  returns 0x00 (0001ms, 0583ms total)
-T13F8 001:866 JLINK_WriteReg(R8, 0x00000000)  returns 0x00 (0000ms, 0583ms total)
-T13F8 001:866 JLINK_WriteReg(R9, 0x2000016C)  returns 0x00 (0000ms, 0583ms total)
-T13F8 001:866 JLINK_WriteReg(R10, 0x00000000)  returns 0x00 (0000ms, 0583ms total)
-T13F8 001:866 JLINK_WriteReg(R11, 0x00000000)  returns 0x00 (0000ms, 0583ms total)
-T13F8 001:866 JLINK_WriteReg(R12, 0x00000000)  returns 0x00 (0000ms, 0583ms total)
-T13F8 001:866 JLINK_WriteReg(R13 (SP), 0x20001000)  returns 0x00 (0000ms, 0583ms total)
-T13F8 001:866 JLINK_WriteReg(R14, 0x20000001)  returns 0x00 (0000ms, 0583ms total)
-T13F8 001:866 JLINK_WriteReg(R15 (PC), 0x200000FA)  returns 0x00 (0000ms, 0583ms total)
-T13F8 001:866 JLINK_WriteReg(XPSR, 0x01000000)  returns 0x00 (0000ms, 0583ms total)
-T13F8 001:866 JLINK_WriteReg(MSP, 0x20001000)  returns 0x00 (0001ms, 0584ms total)
-T13F8 001:867 JLINK_WriteReg(PSP, 0x20001000)  returns 0x00 (0000ms, 0584ms total)
-T13F8 001:867 JLINK_WriteReg(CFBP, 0x00000000)  returns 0x00 (0000ms, 0584ms total)
-T13F8 001:867 JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2)  returns 0x00000025 (0000ms, 0584ms total)
-T13F8 001:867 JLINK_Go() -- CPU_ReadMem(4 bytes @ 0xE0001000) -- CPU_WriteMem(4 bytes @ 0xE0001000) (0004ms, 0588ms total)
-T13F8 001:871 JLINK_IsHalted()  returns FALSE (0001ms, 0589ms total)
-T13F8 001:892 JLINK_IsHalted()  returns FALSE (0000ms, 0588ms total)
-T13F8 001:894 JLINK_IsHalted()  returns FALSE (0000ms, 0588ms total)
-T13F8 001:896 JLINK_IsHalted()  returns FALSE (0000ms, 0588ms total)
-T13F8 001:898 JLINK_IsHalted()  returns FALSE (0000ms, 0588ms total)
-T13F8 001:901 JLINK_IsHalted() -- CPU_ReadMem(2 bytes @ 0x20000000)  returns TRUE (0004ms, 0592ms total)
-T13F8 001:905 JLINK_ReadReg(R15 (PC))  returns 0x20000000 (0000ms, 0588ms total)
-T13F8 001:905 JLINK_ClrBPEx(BPHandle = 0x00000025)  returns 0x00 (0000ms, 0588ms total)
-T13F8 001:905 JLINK_ReadReg(R0)  returns 0x00000000 (0000ms, 0588ms total)
-T13F8 001:907 JLINK_WriteMem(0x20000170, 0x0290 Bytes, ...) - Data: 33 2E 30 30 00 00 00 00 FE B5 04 46 00 78 D0 4D ... -- CPU_WriteMem(656 bytes @ 0x20000170)  returns 0x290 (0008ms, 0596ms total)
-T13F8 001:915 JLINK_WriteMem(0x20000400, 0x0170 Bytes, ...) - Data: 88 43 A1 69 C9 00 08 43 68 63 0B E0 B8 43 68 63 ... -- CPU_WriteMem(368 bytes @ 0x20000400)  returns 0x170 (0005ms, 0601ms total)
-T13F8 001:920 JLINK_WriteReg(R0, 0x08001000)  returns 0x00 (0000ms, 0601ms total)
-T13F8 001:921 JLINK_WriteReg(R1, 0x00000400)  returns 0x00 (0000ms, 0602ms total)
-T13F8 001:921 JLINK_WriteReg(R2, 0x20000170)  returns 0x00 (0000ms, 0602ms total)
-T13F8 001:921 JLINK_WriteReg(R3, 0x00000000)  returns 0x00 (0000ms, 0602ms total)
-T13F8 001:921 JLINK_WriteReg(R4, 0x00000000)  returns 0x00 (0000ms, 0602ms total)
-T13F8 001:921 JLINK_WriteReg(R5, 0x00000000)  returns 0x00 (0000ms, 0602ms total)
-T13F8 001:921 JLINK_WriteReg(R6, 0x00000000)  returns 0x00 (0000ms, 0602ms total)
-T13F8 001:921 JLINK_WriteReg(R7, 0x00000000)  returns 0x00 (0000ms, 0602ms total)
-T13F8 001:921 JLINK_WriteReg(R8, 0x00000000)  returns 0x00 (0000ms, 0602ms total)
-T13F8 001:921 JLINK_WriteReg(R9, 0x2000016C)  returns 0x00 (0000ms, 0602ms total)
-T13F8 001:921 JLINK_WriteReg(R10, 0x00000000)  returns 0x00 (0000ms, 0602ms total)
-T13F8 001:921 JLINK_WriteReg(R11, 0x00000000)  returns 0x00 (0000ms, 0602ms total)
-T13F8 001:921 JLINK_WriteReg(R12, 0x00000000)  returns 0x00 (0000ms, 0602ms total)
-T13F8 001:921 JLINK_WriteReg(R13 (SP), 0x20001000)  returns 0x00 (0000ms, 0602ms total)
-T13F8 001:921 JLINK_WriteReg(R14, 0x20000001)  returns 0x00 (0000ms, 0602ms total)
-T13F8 001:921 JLINK_WriteReg(R15 (PC), 0x200000FA)  returns 0x00 (0000ms, 0602ms total)
-T13F8 001:921 JLINK_WriteReg(XPSR, 0x01000000)  returns 0x00 (0000ms, 0602ms total)
-T13F8 001:921 JLINK_WriteReg(MSP, 0x20001000)  returns 0x00 (0001ms, 0603ms total)
-T13F8 001:922 JLINK_WriteReg(PSP, 0x20001000)  returns 0x00 (0000ms, 0603ms total)
-T13F8 001:922 JLINK_WriteReg(CFBP, 0x00000000)  returns 0x00 (0000ms, 0603ms total)
-T13F8 001:922 JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2)  returns 0x00000026 (0000ms, 0603ms total)
-T13F8 001:922 JLINK_Go() -- CPU_ReadMem(4 bytes @ 0xE0001000) -- CPU_WriteMem(4 bytes @ 0xE0001000) (0004ms, 0607ms total)
-T13F8 001:926 JLINK_IsHalted()  returns FALSE (0001ms, 0608ms total)
-T13F8 001:932 JLINK_IsHalted()  returns FALSE (0001ms, 0608ms total)
-T13F8 001:935 JLINK_IsHalted()  returns FALSE (0000ms, 0607ms total)
-T13F8 001:938 JLINK_IsHalted()  returns FALSE (0001ms, 0608ms total)
-T13F8 001:941 JLINK_IsHalted()  returns FALSE (0001ms, 0608ms total)
-T13F8 001:944 JLINK_IsHalted()  returns FALSE (0001ms, 0608ms total)
-T13F8 001:947 JLINK_IsHalted()  returns FALSE (0000ms, 0607ms total)
-T13F8 001:953 JLINK_IsHalted()  returns FALSE (0001ms, 0608ms total)
-T13F8 001:956 JLINK_IsHalted() -- CPU_ReadMem(2 bytes @ 0x20000000)  returns TRUE (0003ms, 0610ms total)
-T13F8 001:960 JLINK_ReadReg(R15 (PC))  returns 0x20000000 (0000ms, 0607ms total)
-T13F8 001:960 JLINK_ClrBPEx(BPHandle = 0x00000026)  returns 0x00 (0000ms, 0607ms total)
-T13F8 001:960 JLINK_ReadReg(R0)  returns 0x00000000 (0000ms, 0607ms total)
-T13F8 001:961 JLINK_WriteMem(0x20000170, 0x0290 Bytes, ...) - Data: 30 78 29 79 02 09 A8 78 12 01 00 07 00 0F 02 43 ... -- CPU_WriteMem(656 bytes @ 0x20000170)  returns 0x290 (0009ms, 0616ms total)
-T13F8 001:970 JLINK_WriteMem(0x20000400, 0x0170 Bytes, ...) - Data: 02 29 20 D0 03 29 26 D0 04 29 2D D0 05 29 37 D0 ... -- CPU_WriteMem(368 bytes @ 0x20000400)  returns 0x170 (0005ms, 0621ms total)
-T13F8 001:975 JLINK_WriteReg(R0, 0x08001400)  returns 0x00 (0000ms, 0621ms total)
-T13F8 001:975 JLINK_WriteReg(R1, 0x00000400)  returns 0x00 (0000ms, 0621ms total)
-T13F8 001:975 JLINK_WriteReg(R2, 0x20000170)  returns 0x00 (0000ms, 0621ms total)
-T13F8 001:975 JLINK_WriteReg(R3, 0x00000000)  returns 0x00 (0000ms, 0621ms total)
-T13F8 001:975 JLINK_WriteReg(R4, 0x00000000)  returns 0x00 (0000ms, 0621ms total)
-T13F8 001:975 JLINK_WriteReg(R5, 0x00000000)  returns 0x00 (0000ms, 0621ms total)
-T13F8 001:975 JLINK_WriteReg(R6, 0x00000000)  returns 0x00 (0000ms, 0621ms total)
-T13F8 001:975 JLINK_WriteReg(R7, 0x00000000)  returns 0x00 (0000ms, 0621ms total)
-T13F8 001:975 JLINK_WriteReg(R8, 0x00000000)  returns 0x00 (0000ms, 0621ms total)
-T13F8 001:975 JLINK_WriteReg(R9, 0x2000016C)  returns 0x00 (0000ms, 0621ms total)
-T13F8 001:975 JLINK_WriteReg(R10, 0x00000000)  returns 0x00 (0000ms, 0621ms total)
-T13F8 001:975 JLINK_WriteReg(R11, 0x00000000)  returns 0x00 (0000ms, 0621ms total)
-T13F8 001:975 JLINK_WriteReg(R12, 0x00000000)  returns 0x00 (0000ms, 0621ms total)
-T13F8 001:975 JLINK_WriteReg(R13 (SP), 0x20001000)  returns 0x00 (0000ms, 0621ms total)
-T13F8 001:975 JLINK_WriteReg(R14, 0x20000001)  returns 0x00 (0000ms, 0621ms total)
-T13F8 001:975 JLINK_WriteReg(R15 (PC), 0x200000FA)  returns 0x00 (0000ms, 0621ms total)
-T13F8 001:975 JLINK_WriteReg(XPSR, 0x01000000)  returns 0x00 (0001ms, 0622ms total)
-T13F8 001:976 JLINK_WriteReg(MSP, 0x20001000)  returns 0x00 (0000ms, 0622ms total)
-T13F8 001:976 JLINK_WriteReg(PSP, 0x20001000)  returns 0x00 (0000ms, 0622ms total)
-T13F8 001:976 JLINK_WriteReg(CFBP, 0x00000000)  returns 0x00 (0000ms, 0622ms total)
-T13F8 001:976 JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2)  returns 0x00000027 (0000ms, 0622ms total)
-T13F8 001:976 JLINK_Go() -- CPU_ReadMem(4 bytes @ 0xE0001000) -- CPU_WriteMem(4 bytes @ 0xE0001000) (0003ms, 0625ms total)
-T13F8 001:980 JLINK_IsHalted()  returns FALSE (0000ms, 0625ms total)
-T13F8 001:993 JLINK_IsHalted()  returns FALSE (0000ms, 0625ms total)
-T13F8 001:994 JLINK_IsHalted()  returns FALSE (0000ms, 0625ms total)
-T13F8 001:998 JLINK_IsHalted()  returns FALSE (0000ms, 0625ms total)
-T13F8 002:000 JLINK_IsHalted()  returns FALSE (0001ms, 0626ms total)
-T13F8 002:003 JLINK_IsHalted()  returns FALSE (0001ms, 0626ms total)
-T13F8 002:006 JLINK_IsHalted()  returns FALSE (0000ms, 0625ms total)
-T13F8 002:008 JLINK_IsHalted()  returns FALSE (0001ms, 0626ms total)
-T13F8 002:011 JLINK_IsHalted() -- CPU_ReadMem(2 bytes @ 0x20000000)  returns TRUE (0005ms, 0630ms total)
-T13F8 002:016 JLINK_ReadReg(R15 (PC))  returns 0x20000000 (0000ms, 0625ms total)
-T13F8 002:016 JLINK_ClrBPEx(BPHandle = 0x00000027)  returns 0x00 (0000ms, 0625ms total)
-T13F8 002:016 JLINK_ReadReg(R0)  returns 0x00000000 (0000ms, 0625ms total)
-T13F8 002:017 JLINK_WriteMem(0x20000170, 0x0290 Bytes, ...) - Data: E8 69 60 67 28 69 A0 67 28 6A E0 67 00 20 70 BD ... -- CPU_WriteMem(656 bytes @ 0x20000170)  returns 0x290 (0008ms, 0633ms total)
-T13F8 002:025 JLINK_WriteMem(0x20000400, 0x0170 Bytes, ...) - Data: 1D 46 7D 43 2E 43 C6 60 4D 68 02 2D 19 D1 FF 2A ... -- CPU_WriteMem(368 bytes @ 0x20000400)  returns 0x170 (0005ms, 0638ms total)
-T13F8 002:030 JLINK_WriteReg(R0, 0x08001800)  returns 0x00 (0000ms, 0638ms total)
-T13F8 002:030 JLINK_WriteReg(R1, 0x00000400)  returns 0x00 (0000ms, 0638ms total)
-T13F8 002:030 JLINK_WriteReg(R2, 0x20000170)  returns 0x00 (0000ms, 0638ms total)
-T13F8 002:030 JLINK_WriteReg(R3, 0x00000000)  returns 0x00 (0000ms, 0638ms total)
-T13F8 002:030 JLINK_WriteReg(R4, 0x00000000)  returns 0x00 (0000ms, 0638ms total)
-T13F8 002:030 JLINK_WriteReg(R5, 0x00000000)  returns 0x00 (0000ms, 0638ms total)
-T13F8 002:030 JLINK_WriteReg(R6, 0x00000000)  returns 0x00 (0000ms, 0638ms total)
-T13F8 002:030 JLINK_WriteReg(R7, 0x00000000)  returns 0x00 (0000ms, 0638ms total)
-T13F8 002:031 JLINK_WriteReg(R8, 0x00000000)  returns 0x00 (0000ms, 0639ms total)
-T13F8 002:031 JLINK_WriteReg(R9, 0x2000016C)  returns 0x00 (0000ms, 0639ms total)
-T13F8 002:031 JLINK_WriteReg(R10, 0x00000000)  returns 0x00 (0000ms, 0639ms total)
-T13F8 002:031 JLINK_WriteReg(R11, 0x00000000)  returns 0x00 (0000ms, 0639ms total)
-T13F8 002:031 JLINK_WriteReg(R12, 0x00000000)  returns 0x00 (0000ms, 0639ms total)
-T13F8 002:031 JLINK_WriteReg(R13 (SP), 0x20001000)  returns 0x00 (0000ms, 0639ms total)
-T13F8 002:031 JLINK_WriteReg(R14, 0x20000001)  returns 0x00 (0000ms, 0639ms total)
-T13F8 002:031 JLINK_WriteReg(R15 (PC), 0x200000FA)  returns 0x00 (0000ms, 0639ms total)
-T13F8 002:031 JLINK_WriteReg(XPSR, 0x01000000)  returns 0x00 (0000ms, 0639ms total)
-T13F8 002:031 JLINK_WriteReg(MSP, 0x20001000)  returns 0x00 (0000ms, 0639ms total)
-T13F8 002:031 JLINK_WriteReg(PSP, 0x20001000)  returns 0x00 (0000ms, 0639ms total)
-T13F8 002:031 JLINK_WriteReg(CFBP, 0x00000000)  returns 0x00 (0000ms, 0639ms total)
-T13F8 002:031 JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2)  returns 0x00000028 (0000ms, 0639ms total)
-T13F8 002:031 JLINK_Go() -- CPU_ReadMem(4 bytes @ 0xE0001000) -- CPU_WriteMem(4 bytes @ 0xE0001000) (0004ms, 0643ms total)
-T13F8 002:035 JLINK_IsHalted()  returns FALSE (0001ms, 0644ms total)
-T13F8 002:041 JLINK_IsHalted()  returns FALSE (0000ms, 0643ms total)
-T13F8 002:044 JLINK_IsHalted()  returns FALSE (0000ms, 0643ms total)
-T13F8 002:046 JLINK_IsHalted()  returns FALSE (0000ms, 0643ms total)
-T13F8 002:049 JLINK_IsHalted()  returns FALSE (0000ms, 0643ms total)
-T13F8 002:052 JLINK_IsHalted()  returns FALSE (0000ms, 0643ms total)
-T13F8 002:058 JLINK_IsHalted()  returns FALSE (0001ms, 0644ms total)
-T13F8 002:061 JLINK_IsHalted()  returns FALSE (0000ms, 0643ms total)
-T13F8 002:064 JLINK_IsHalted()  returns FALSE (0000ms, 0643ms total)
-T13F8 002:072 JLINK_IsHalted() -- CPU_ReadMem(2 bytes @ 0x20000000)  returns TRUE (0004ms, 0647ms total)
-T13F8 002:076 JLINK_ReadReg(R15 (PC))  returns 0x20000000 (0000ms, 0643ms total)
-T13F8 002:076 JLINK_ClrBPEx(BPHandle = 0x00000028)  returns 0x00 (0000ms, 0643ms total)
-T13F8 002:076 JLINK_ReadReg(R0)  returns 0x00000000 (0000ms, 0643ms total)
-T13F8 002:078 JLINK_WriteMem(0x20000170, 0x0290 Bytes, ...) - Data: 08 43 20 60 A9 68 60 68 03 22 12 03 90 43 08 43 ... -- CPU_WriteMem(656 bytes @ 0x20000170)  returns 0x290 (0009ms, 0652ms total)
-T13F8 002:087 JLINK_WriteMem(0x20000400, 0x0170 Bytes, ...) - Data: 40 03 00 90 02 94 03 94 69 46 01 96 04 94 09 48 ... -- CPU_WriteMem(368 bytes @ 0x20000400)  returns 0x170 (0005ms, 0657ms total)
-T13F8 002:092 JLINK_WriteReg(R0, 0x08001C00)  returns 0x00 (0000ms, 0657ms total)
-T13F8 002:092 JLINK_WriteReg(R1, 0x00000400)  returns 0x00 (0000ms, 0657ms total)
-T13F8 002:092 JLINK_WriteReg(R2, 0x20000170)  returns 0x00 (0000ms, 0657ms total)
-T13F8 002:092 JLINK_WriteReg(R3, 0x00000000)  returns 0x00 (0000ms, 0657ms total)
-T13F8 002:092 JLINK_WriteReg(R4, 0x00000000)  returns 0x00 (0000ms, 0657ms total)
-T13F8 002:092 JLINK_WriteReg(R5, 0x00000000)  returns 0x00 (0000ms, 0657ms total)
-T13F8 002:092 JLINK_WriteReg(R6, 0x00000000)  returns 0x00 (0000ms, 0657ms total)
-T13F8 002:092 JLINK_WriteReg(R7, 0x00000000)  returns 0x00 (0000ms, 0657ms total)
-T13F8 002:092 JLINK_WriteReg(R8, 0x00000000)  returns 0x00 (0000ms, 0657ms total)
-T13F8 002:092 JLINK_WriteReg(R9, 0x2000016C)  returns 0x00 (0000ms, 0657ms total)
-T13F8 002:092 JLINK_WriteReg(R10, 0x00000000)  returns 0x00 (0000ms, 0657ms total)
-T13F8 002:092 JLINK_WriteReg(R11, 0x00000000)  returns 0x00 (0000ms, 0657ms total)
-T13F8 002:092 JLINK_WriteReg(R12, 0x00000000)  returns 0x00 (0000ms, 0657ms total)
-T13F8 002:092 JLINK_WriteReg(R13 (SP), 0x20001000)  returns 0x00 (0000ms, 0657ms total)
-T13F8 002:092 JLINK_WriteReg(R14, 0x20000001)  returns 0x00 (0000ms, 0657ms total)
-T13F8 002:092 JLINK_WriteReg(R15 (PC), 0x200000FA)  returns 0x00 (0000ms, 0657ms total)
-T13F8 002:093 JLINK_WriteReg(XPSR, 0x01000000)  returns 0x00 (0000ms, 0658ms total)
-T13F8 002:093 JLINK_WriteReg(MSP, 0x20001000)  returns 0x00 (0000ms, 0658ms total)
-T13F8 002:093 JLINK_WriteReg(PSP, 0x20001000)  returns 0x00 (0000ms, 0658ms total)
-T13F8 002:093 JLINK_WriteReg(CFBP, 0x00000000)  returns 0x00 (0000ms, 0658ms total)
-T13F8 002:093 JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2)  returns 0x00000029 (0000ms, 0658ms total)
-T13F8 002:093 JLINK_Go() -- CPU_ReadMem(4 bytes @ 0xE0001000) -- CPU_WriteMem(4 bytes @ 0xE0001000) (0005ms, 0663ms total)
-T13F8 002:098 JLINK_IsHalted()  returns FALSE (0000ms, 0663ms total)
-T13F8 002:104 JLINK_IsHalted()  returns FALSE (0000ms, 0663ms total)
-T13F8 002:106 JLINK_IsHalted()  returns FALSE (0001ms, 0664ms total)
-T13F8 002:109 JLINK_IsHalted()  returns FALSE (0000ms, 0663ms total)
-T13F8 002:111 JLINK_IsHalted()  returns FALSE (0000ms, 0663ms total)
-T13F8 002:113 JLINK_IsHalted()  returns FALSE (0001ms, 0664ms total)
-T13F8 002:116 JLINK_IsHalted()  returns FALSE (0000ms, 0663ms total)
-T13F8 002:118 JLINK_IsHalted()  returns FALSE (0000ms, 0663ms total)
-T13F8 002:120 JLINK_IsHalted()  returns FALSE (0000ms, 0663ms total)
-T13F8 002:122 JLINK_IsHalted()  returns FALSE (0000ms, 0663ms total)
-T13F8 002:124 JLINK_IsHalted()  returns FALSE (0001ms, 0664ms total)
-T13F8 002:127 JLINK_IsHalted() -- CPU_ReadMem(2 bytes @ 0x20000000)  returns TRUE (0004ms, 0667ms total)
-T13F8 002:131 JLINK_ReadReg(R15 (PC))  returns 0x20000000 (0000ms, 0663ms total)
-T13F8 002:131 JLINK_ClrBPEx(BPHandle = 0x00000029)  returns 0x00 (0000ms, 0663ms total)
-T13F8 002:131 JLINK_ReadReg(R0)  returns 0x00000000 (0000ms, 0663ms total)
-T13F8 002:132 JLINK_WriteMem(0x20000170, 0x0290 Bytes, ...) - Data: 30 46 FF F7 FB FC 00 22 02 21 30 46 FF F7 04 FD ... -- CPU_WriteMem(656 bytes @ 0x20000170)  returns 0x290 (0009ms, 0672ms total)
-T13F8 002:141 JLINK_WriteMem(0x20000400, 0x0170 Bytes, ...) - Data: 42 2B 17 D1 05 E0 62 2B 03 D0 63 2B 01 D0 64 2B ... -- CPU_WriteMem(368 bytes @ 0x20000400)  returns 0x170 (0006ms, 0678ms total)
-T13F8 002:147 JLINK_WriteReg(R0, 0x08002000)  returns 0x00 (0000ms, 0678ms total)
-T13F8 002:147 JLINK_WriteReg(R1, 0x00000400)  returns 0x00 (0000ms, 0678ms total)
-T13F8 002:147 JLINK_WriteReg(R2, 0x20000170)  returns 0x00 (0000ms, 0678ms total)
-T13F8 002:147 JLINK_WriteReg(R3, 0x00000000)  returns 0x00 (0000ms, 0678ms total)
-T13F8 002:147 JLINK_WriteReg(R4, 0x00000000)  returns 0x00 (0000ms, 0678ms total)
-T13F8 002:147 JLINK_WriteReg(R5, 0x00000000)  returns 0x00 (0000ms, 0678ms total)
-T13F8 002:147 JLINK_WriteReg(R6, 0x00000000)  returns 0x00 (0000ms, 0678ms total)
-T13F8 002:147 JLINK_WriteReg(R7, 0x00000000)  returns 0x00 (0000ms, 0678ms total)
-T13F8 002:147 JLINK_WriteReg(R8, 0x00000000)  returns 0x00 (0000ms, 0678ms total)
-T13F8 002:147 JLINK_WriteReg(R9, 0x2000016C)  returns 0x00 (0000ms, 0678ms total)
-T13F8 002:147 JLINK_WriteReg(R10, 0x00000000)  returns 0x00 (0000ms, 0678ms total)
-T13F8 002:147 JLINK_WriteReg(R11, 0x00000000)  returns 0x00 (0000ms, 0678ms total)
-T13F8 002:147 JLINK_WriteReg(R12, 0x00000000)  returns 0x00 (0000ms, 0678ms total)
-T13F8 002:147 JLINK_WriteReg(R13 (SP), 0x20001000)  returns 0x00 (0000ms, 0678ms total)
-T13F8 002:147 JLINK_WriteReg(R14, 0x20000001)  returns 0x00 (0000ms, 0678ms total)
-T13F8 002:148 JLINK_WriteReg(R15 (PC), 0x200000FA)  returns 0x00 (0000ms, 0679ms total)
-T13F8 002:148 JLINK_WriteReg(XPSR, 0x01000000)  returns 0x00 (0000ms, 0679ms total)
-T13F8 002:148 JLINK_WriteReg(MSP, 0x20001000)  returns 0x00 (0000ms, 0679ms total)
-T13F8 002:148 JLINK_WriteReg(PSP, 0x20001000)  returns 0x00 (0000ms, 0679ms total)
-T13F8 002:148 JLINK_WriteReg(CFBP, 0x00000000)  returns 0x00 (0000ms, 0679ms total)
-T13F8 002:148 JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2)  returns 0x0000002A (0000ms, 0679ms total)
-T13F8 002:148 JLINK_Go() -- CPU_ReadMem(4 bytes @ 0xE0001000) -- CPU_WriteMem(4 bytes @ 0xE0001000) (0004ms, 0683ms total)
-T13F8 002:152 JLINK_IsHalted()  returns FALSE (0001ms, 0684ms total)
-T13F8 002:158 JLINK_IsHalted()  returns FALSE (0000ms, 0683ms total)
-T13F8 002:165 JLINK_IsHalted()  returns FALSE (0001ms, 0684ms total)
-T13F8 002:168 JLINK_IsHalted()  returns FALSE (0001ms, 0684ms total)
-T13F8 002:171 JLINK_IsHalted()  returns FALSE (0001ms, 0684ms total)
-T13F8 002:174 JLINK_IsHalted()  returns FALSE (0001ms, 0684ms total)
-T13F8 002:177 JLINK_IsHalted()  returns FALSE (0001ms, 0684ms total)
-T13F8 002:180 JLINK_IsHalted()  returns FALSE (0000ms, 0683ms total)
-T13F8 002:186 JLINK_IsHalted() -- CPU_ReadMem(2 bytes @ 0x20000000)  returns TRUE (0004ms, 0687ms total)
-T13F8 002:190 JLINK_ReadReg(R15 (PC))  returns 0x20000000 (0000ms, 0683ms total)
-T13F8 002:190 JLINK_ClrBPEx(BPHandle = 0x0000002A)  returns 0x00 (0000ms, 0683ms total)
-T13F8 002:190 JLINK_ReadReg(R0)  returns 0x00000000 (0000ms, 0683ms total)
-T13F8 002:192 JLINK_WriteMem(0x20000170, 0x0290 Bytes, ...) - Data: 10 0E 00 20 E4 00 00 20 4C 00 00 20 F0 00 00 20 ... -- CPU_WriteMem(656 bytes @ 0x20000170)  returns 0x290 (0008ms, 0691ms total)
-T13F8 002:200 JLINK_WriteMem(0x20000400, 0x0170 Bytes, ...) - Data: 39 30 00 00 30 10 00 20 02 48 81 6C 49 1C 81 64 ... -- CPU_WriteMem(368 bytes @ 0x20000400)  returns 0x170 (0006ms, 0697ms total)
-T13F8 002:206 JLINK_WriteReg(R0, 0x08002400)  returns 0x00 (0000ms, 0697ms total)
-T13F8 002:206 JLINK_WriteReg(R1, 0x00000400)  returns 0x00 (0000ms, 0697ms total)
-T13F8 002:206 JLINK_WriteReg(R2, 0x20000170)  returns 0x00 (0000ms, 0697ms total)
-T13F8 002:206 JLINK_WriteReg(R3, 0x00000000)  returns 0x00 (0000ms, 0697ms total)
-T13F8 002:206 JLINK_WriteReg(R4, 0x00000000)  returns 0x00 (0000ms, 0697ms total)
-T13F8 002:206 JLINK_WriteReg(R5, 0x00000000)  returns 0x00 (0000ms, 0697ms total)
-T13F8 002:206 JLINK_WriteReg(R6, 0x00000000)  returns 0x00 (0000ms, 0697ms total)
-T13F8 002:206 JLINK_WriteReg(R7, 0x00000000)  returns 0x00 (0000ms, 0697ms total)
-T13F8 002:206 JLINK_WriteReg(R8, 0x00000000)  returns 0x00 (0000ms, 0697ms total)
-T13F8 002:206 JLINK_WriteReg(R9, 0x2000016C)  returns 0x00 (0000ms, 0697ms total)
-T13F8 002:206 JLINK_WriteReg(R10, 0x00000000)  returns 0x00 (0000ms, 0697ms total)
-T13F8 002:206 JLINK_WriteReg(R11, 0x00000000)  returns 0x00 (0000ms, 0697ms total)
-T13F8 002:206 JLINK_WriteReg(R12, 0x00000000)  returns 0x00 (0000ms, 0697ms total)
-T13F8 002:206 JLINK_WriteReg(R13 (SP), 0x20001000)  returns 0x00 (0000ms, 0697ms total)
-T13F8 002:206 JLINK_WriteReg(R14, 0x20000001)  returns 0x00 (0000ms, 0697ms total)
-T13F8 002:207 JLINK_WriteReg(R15 (PC), 0x200000FA)  returns 0x00 (0000ms, 0698ms total)
-T13F8 002:207 JLINK_WriteReg(XPSR, 0x01000000)  returns 0x00 (0000ms, 0698ms total)
-T13F8 002:207 JLINK_WriteReg(MSP, 0x20001000)  returns 0x00 (0000ms, 0698ms total)
-T13F8 002:207 JLINK_WriteReg(PSP, 0x20001000)  returns 0x00 (0000ms, 0698ms total)
-T13F8 002:207 JLINK_WriteReg(CFBP, 0x00000000)  returns 0x00 (0000ms, 0698ms total)
-T13F8 002:207 JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2)  returns 0x0000002B (0000ms, 0698ms total)
-T13F8 002:207 JLINK_Go() -- CPU_ReadMem(4 bytes @ 0xE0001000) -- CPU_WriteMem(4 bytes @ 0xE0001000) (0004ms, 0702ms total)
-T13F8 002:211 JLINK_IsHalted()  returns FALSE (0000ms, 0702ms total)
-T13F8 002:213 JLINK_IsHalted()  returns FALSE (0000ms, 0702ms total)
-T13F8 002:215 JLINK_IsHalted()  returns FALSE (0000ms, 0702ms total)
-T13F8 002:217 JLINK_IsHalted()  returns FALSE (0000ms, 0702ms total)
-T13F8 002:219 JLINK_IsHalted()  returns FALSE (0000ms, 0702ms total)
-T13F8 002:221 JLINK_IsHalted()  returns FALSE (0001ms, 0703ms total)
-T13F8 002:224 JLINK_IsHalted()  returns FALSE (0000ms, 0702ms total)
-T13F8 002:226 JLINK_IsHalted()  returns FALSE (0000ms, 0702ms total)
-T13F8 002:229 JLINK_IsHalted()  returns FALSE (0000ms, 0702ms total)
-T13F8 002:231 JLINK_IsHalted()  returns FALSE (0001ms, 0703ms total)
-T13F8 002:234 JLINK_IsHalted()  returns FALSE (0001ms, 0703ms total)
-T13F8 002:237 JLINK_IsHalted()  returns FALSE (0001ms, 0703ms total)
-T13F8 002:243 JLINK_IsHalted() -- CPU_ReadMem(2 bytes @ 0x20000000)  returns TRUE (0005ms, 0707ms total)
-T13F8 002:248 JLINK_ReadReg(R15 (PC))  returns 0x20000000 (0000ms, 0702ms total)
-T13F8 002:248 JLINK_ClrBPEx(BPHandle = 0x0000002B)  returns 0x00 (0000ms, 0702ms total)
-T13F8 002:248 JLINK_ReadReg(R0)  returns 0x00000000 (0000ms, 0702ms total)
-T13F8 002:249 JLINK_WriteMem(0x20000170, 0x0290 Bytes, ...) - Data: 01 40 05 48 05 D0 04 29 03 D0 08 29 01 D1 00 F0 ... -- CPU_WriteMem(656 bytes @ 0x20000170)  returns 0x290 (0008ms, 0710ms total)
-T13F8 002:257 JLINK_WriteMem(0x20000400, 0x0170 Bytes, ...) - Data: 70 47 91 61 70 47 00 00 00 08 00 48 01 21 09 22 ... -- CPU_WriteMem(368 bytes @ 0x20000400)  returns 0x170 (0006ms, 0716ms total)
-T13F8 002:263 JLINK_WriteReg(R0, 0x08002800)  returns 0x00 (0000ms, 0716ms total)
-T13F8 002:263 JLINK_WriteReg(R1, 0x00000400)  returns 0x00 (0000ms, 0716ms total)
-T13F8 002:263 JLINK_WriteReg(R2, 0x20000170)  returns 0x00 (0000ms, 0716ms total)
-T13F8 002:263 JLINK_WriteReg(R3, 0x00000000)  returns 0x00 (0000ms, 0716ms total)
-T13F8 002:263 JLINK_WriteReg(R4, 0x00000000)  returns 0x00 (0000ms, 0716ms total)
-T13F8 002:263 JLINK_WriteReg(R5, 0x00000000)  returns 0x00 (0000ms, 0716ms total)
-T13F8 002:263 JLINK_WriteReg(R6, 0x00000000)  returns 0x00 (0000ms, 0716ms total)
-T13F8 002:263 JLINK_WriteReg(R7, 0x00000000)  returns 0x00 (0000ms, 0716ms total)
-T13F8 002:263 JLINK_WriteReg(R8, 0x00000000)  returns 0x00 (0000ms, 0716ms total)
-T13F8 002:263 JLINK_WriteReg(R9, 0x2000016C)  returns 0x00 (0000ms, 0716ms total)
-T13F8 002:263 JLINK_WriteReg(R10, 0x00000000)  returns 0x00 (0000ms, 0716ms total)
-T13F8 002:263 JLINK_WriteReg(R11, 0x00000000)  returns 0x00 (0000ms, 0716ms total)
-T13F8 002:263 JLINK_WriteReg(R12, 0x00000000)  returns 0x00 (0000ms, 0716ms total)
-T13F8 002:263 JLINK_WriteReg(R13 (SP), 0x20001000)  returns 0x00 (0001ms, 0717ms total)
-T13F8 002:264 JLINK_WriteReg(R14, 0x20000001)  returns 0x00 (0000ms, 0717ms total)
-T13F8 002:264 JLINK_WriteReg(R15 (PC), 0x200000FA)  returns 0x00 (0000ms, 0717ms total)
-T13F8 002:264 JLINK_WriteReg(XPSR, 0x01000000)  returns 0x00 (0000ms, 0717ms total)
-T13F8 002:264 JLINK_WriteReg(MSP, 0x20001000)  returns 0x00 (0000ms, 0717ms total)
-T13F8 002:264 JLINK_WriteReg(PSP, 0x20001000)  returns 0x00 (0000ms, 0717ms total)
-T13F8 002:264 JLINK_WriteReg(CFBP, 0x00000000)  returns 0x00 (0000ms, 0717ms total)
-T13F8 002:264 JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2)  returns 0x0000002C (0000ms, 0717ms total)
-T13F8 002:264 JLINK_Go() -- CPU_ReadMem(4 bytes @ 0xE0001000) -- CPU_WriteMem(4 bytes @ 0xE0001000) (0004ms, 0721ms total)
-T13F8 002:268 JLINK_IsHalted()  returns FALSE (0000ms, 0721ms total)
-T13F8 002:276 JLINK_IsHalted()  returns FALSE (0000ms, 0721ms total)
-T13F8 002:279 JLINK_IsHalted()  returns FALSE (0000ms, 0721ms total)
-T13F8 002:281 JLINK_IsHalted()  returns FALSE (0001ms, 0722ms total)
-T13F8 002:284 JLINK_IsHalted()  returns FALSE (0001ms, 0722ms total)
-T13F8 002:293 JLINK_IsHalted()  returns FALSE (0001ms, 0722ms total)
-T13F8 002:296 JLINK_IsHalted()  returns FALSE (0001ms, 0722ms total)
-T13F8 002:299 JLINK_IsHalted() -- CPU_ReadMem(2 bytes @ 0x20000000)  returns TRUE (0005ms, 0726ms total)
-T13F8 002:304 JLINK_ReadReg(R15 (PC))  returns 0x20000000 (0000ms, 0721ms total)
-T13F8 002:304 JLINK_ClrBPEx(BPHandle = 0x0000002C)  returns 0x00 (0000ms, 0721ms total)
-T13F8 002:304 JLINK_ReadReg(R0)  returns 0x00000000 (0000ms, 0721ms total)
-T13F8 002:305 JLINK_WriteMem(0x20000170, 0x0290 Bytes, ...) - Data: 80 34 1B 19 1E 8F 86 72 1E 8F 36 0A C6 72 9E 6B ... -- CPU_WriteMem(656 bytes @ 0x20000170)  returns 0x290 (0009ms, 0730ms total)
-T13F8 002:314 JLINK_WriteMem(0x20000400, 0x0170 Bytes, ...) - Data: 00 F0 B6 F8 70 BD 00 00 00 44 00 40 C4 01 00 20 ... -- CPU_WriteMem(368 bytes @ 0x20000400)  returns 0x170 (0005ms, 0735ms total)
-T13F8 002:319 JLINK_WriteReg(R0, 0x08002C00)  returns 0x00 (0000ms, 0735ms total)
-T13F8 002:319 JLINK_WriteReg(R1, 0x00000400)  returns 0x00 (0000ms, 0735ms total)
-T13F8 002:319 JLINK_WriteReg(R2, 0x20000170)  returns 0x00 (0000ms, 0735ms total)
-T13F8 002:319 JLINK_WriteReg(R3, 0x00000000)  returns 0x00 (0000ms, 0735ms total)
-T13F8 002:319 JLINK_WriteReg(R4, 0x00000000)  returns 0x00 (0000ms, 0735ms total)
-T13F8 002:319 JLINK_WriteReg(R5, 0x00000000)  returns 0x00 (0000ms, 0735ms total)
-T13F8 002:319 JLINK_WriteReg(R6, 0x00000000)  returns 0x00 (0000ms, 0735ms total)
-T13F8 002:319 JLINK_WriteReg(R7, 0x00000000)  returns 0x00 (0000ms, 0735ms total)
-T13F8 002:319 JLINK_WriteReg(R8, 0x00000000)  returns 0x00 (0000ms, 0735ms total)
-T13F8 002:319 JLINK_WriteReg(R9, 0x2000016C)  returns 0x00 (0000ms, 0735ms total)
-T13F8 002:319 JLINK_WriteReg(R10, 0x00000000)  returns 0x00 (0000ms, 0735ms total)
-T13F8 002:319 JLINK_WriteReg(R11, 0x00000000)  returns 0x00 (0000ms, 0735ms total)
-T13F8 002:319 JLINK_WriteReg(R12, 0x00000000)  returns 0x00 (0000ms, 0735ms total)
-T13F8 002:319 JLINK_WriteReg(R13 (SP), 0x20001000)  returns 0x00 (0000ms, 0735ms total)
-T13F8 002:319 JLINK_WriteReg(R14, 0x20000001)  returns 0x00 (0001ms, 0736ms total)
-T13F8 002:320 JLINK_WriteReg(R15 (PC), 0x200000FA)  returns 0x00 (0000ms, 0736ms total)
-T13F8 002:320 JLINK_WriteReg(XPSR, 0x01000000)  returns 0x00 (0000ms, 0736ms total)
-T13F8 002:320 JLINK_WriteReg(MSP, 0x20001000)  returns 0x00 (0000ms, 0736ms total)
-T13F8 002:320 JLINK_WriteReg(PSP, 0x20001000)  returns 0x00 (0000ms, 0736ms total)
-T13F8 002:320 JLINK_WriteReg(CFBP, 0x00000000)  returns 0x00 (0000ms, 0736ms total)
-T13F8 002:320 JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2)  returns 0x0000002D (0000ms, 0736ms total)
-T13F8 002:320 JLINK_Go() -- CPU_ReadMem(4 bytes @ 0xE0001000) -- CPU_WriteMem(4 bytes @ 0xE0001000) (0004ms, 0740ms total)
-T13F8 002:324 JLINK_IsHalted()  returns FALSE (0001ms, 0741ms total)
-T13F8 002:327 JLINK_IsHalted()  returns FALSE (0000ms, 0740ms total)
-T13F8 002:329 JLINK_IsHalted()  returns FALSE (0000ms, 0740ms total)
-T13F8 002:331 JLINK_IsHalted()  returns FALSE (0001ms, 0741ms total)
-T13F8 002:334 JLINK_IsHalted()  returns FALSE (0000ms, 0740ms total)
-T13F8 002:336 JLINK_IsHalted()  returns FALSE (0000ms, 0740ms total)
-T13F8 002:338 JLINK_IsHalted()  returns FALSE (0001ms, 0741ms total)
-T13F8 002:341 JLINK_IsHalted()  returns FALSE (0000ms, 0740ms total)
-T13F8 002:344 JLINK_IsHalted()  returns FALSE (0000ms, 0740ms total)
-T13F8 002:346 JLINK_IsHalted()  returns FALSE (0000ms, 0740ms total)
-T13F8 002:349 JLINK_IsHalted()  returns FALSE (0001ms, 0741ms total)
-T13F8 002:355 JLINK_IsHalted() -- CPU_ReadMem(2 bytes @ 0x20000000)  returns TRUE (0004ms, 0744ms total)
-T13F8 002:359 JLINK_ReadReg(R15 (PC))  returns 0x20000000 (0000ms, 0740ms total)
-T13F8 002:359 JLINK_ClrBPEx(BPHandle = 0x0000002D)  returns 0x00 (0000ms, 0740ms total)
-T13F8 002:359 JLINK_ReadReg(R0)  returns 0x00000000 (0000ms, 0740ms total)
-T13F8 002:361 JLINK_WriteMem(0x20000170, 0x0290 Bytes, ...) - Data: 02 48 C1 6A 49 1C C1 62 70 47 00 00 C4 01 00 20 ... -- CPU_WriteMem(656 bytes @ 0x20000170)  returns 0x290 (0008ms, 0748ms total)
-T13F8 002:369 JLINK_WriteMem(0x20000400, 0x0170 Bytes, ...) - Data: 01 20 FD F7 09 FA FD F7 C7 FA 07 28 0B D0 FD F7 ... -- CPU_WriteMem(368 bytes @ 0x20000400)  returns 0x170 (0006ms, 0754ms total)
-T13F8 002:375 JLINK_WriteReg(R0, 0x08003000)  returns 0x00 (0000ms, 0754ms total)
-T13F8 002:375 JLINK_WriteReg(R1, 0x00000400)  returns 0x00 (0000ms, 0754ms total)
-T13F8 002:375 JLINK_WriteReg(R2, 0x20000170)  returns 0x00 (0000ms, 0754ms total)
-T13F8 002:375 JLINK_WriteReg(R3, 0x00000000)  returns 0x00 (0000ms, 0754ms total)
-T13F8 002:375 JLINK_WriteReg(R4, 0x00000000)  returns 0x00 (0000ms, 0754ms total)
-T13F8 002:375 JLINK_WriteReg(R5, 0x00000000)  returns 0x00 (0000ms, 0754ms total)
-T13F8 002:375 JLINK_WriteReg(R6, 0x00000000)  returns 0x00 (0000ms, 0754ms total)
-T13F8 002:375 JLINK_WriteReg(R7, 0x00000000)  returns 0x00 (0000ms, 0754ms total)
-T13F8 002:375 JLINK_WriteReg(R8, 0x00000000)  returns 0x00 (0000ms, 0754ms total)
-T13F8 002:375 JLINK_WriteReg(R9, 0x2000016C)  returns 0x00 (0000ms, 0754ms total)
-T13F8 002:375 JLINK_WriteReg(R10, 0x00000000)  returns 0x00 (0000ms, 0754ms total)
-T13F8 002:375 JLINK_WriteReg(R11, 0x00000000)  returns 0x00 (0001ms, 0755ms total)
-T13F8 002:376 JLINK_WriteReg(R12, 0x00000000)  returns 0x00 (0000ms, 0755ms total)
-T13F8 002:376 JLINK_WriteReg(R13 (SP), 0x20001000)  returns 0x00 (0000ms, 0755ms total)
-T13F8 002:376 JLINK_WriteReg(R14, 0x20000001)  returns 0x00 (0000ms, 0755ms total)
-T13F8 002:376 JLINK_WriteReg(R15 (PC), 0x200000FA)  returns 0x00 (0000ms, 0755ms total)
-T13F8 002:376 JLINK_WriteReg(XPSR, 0x01000000)  returns 0x00 (0000ms, 0755ms total)
-T13F8 002:376 JLINK_WriteReg(MSP, 0x20001000)  returns 0x00 (0000ms, 0755ms total)
-T13F8 002:376 JLINK_WriteReg(PSP, 0x20001000)  returns 0x00 (0000ms, 0755ms total)
-T13F8 002:376 JLINK_WriteReg(CFBP, 0x00000000)  returns 0x00 (0000ms, 0755ms total)
-T13F8 002:376 JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2)  returns 0x0000002E (0000ms, 0755ms total)
-T13F8 002:376 JLINK_Go() -- CPU_ReadMem(4 bytes @ 0xE0001000) -- CPU_WriteMem(4 bytes @ 0xE0001000) (0004ms, 0759ms total)
-T13F8 002:380 JLINK_IsHalted()  returns FALSE (0000ms, 0759ms total)
-T13F8 002:387 JLINK_IsHalted()  returns FALSE (0001ms, 0760ms total)
-T13F8 002:390 JLINK_IsHalted()  returns FALSE (0001ms, 0760ms total)
-T13F8 002:393 JLINK_IsHalted()  returns FALSE (0000ms, 0759ms total)
-T13F8 002:400 JLINK_IsHalted()  returns FALSE (0001ms, 0760ms total)
-T13F8 002:403 JLINK_IsHalted()  returns FALSE (0001ms, 0760ms total)
-T13F8 002:406 JLINK_IsHalted()  returns FALSE (0001ms, 0760ms total)
-T13F8 002:409 JLINK_IsHalted() -- CPU_ReadMem(2 bytes @ 0x20000000)  returns TRUE (0004ms, 0763ms total)
-T13F8 002:413 JLINK_ReadReg(R15 (PC))  returns 0x20000000 (0000ms, 0759ms total)
-T13F8 002:413 JLINK_ClrBPEx(BPHandle = 0x0000002E)  returns 0x00 (0000ms, 0759ms total)
-T13F8 002:413 JLINK_ReadReg(R0)  returns 0x00000000 (0000ms, 0759ms total)
-T13F8 002:415 JLINK_WriteMem(0x20000170, 0x0290 Bytes, ...) - Data: 01 D0 40 1E 20 63 60 6B 00 28 01 D0 40 1E 60 63 ... -- CPU_WriteMem(656 bytes @ 0x20000170)  returns 0x290 (0009ms, 0768ms total)
-T13F8 002:424 JLINK_WriteMem(0x20000400, 0x0170 Bytes, ...) - Data: B5 D1 42 29 CB 38 50 0A D9 1B 66 6F EF 7E 74 4C ... -- CPU_WriteMem(368 bytes @ 0x20000400)  returns 0x170 (0005ms, 0773ms total)
-T13F8 002:429 JLINK_WriteReg(R0, 0x08003400)  returns 0x00 (0000ms, 0773ms total)
-T13F8 002:429 JLINK_WriteReg(R1, 0x00000400)  returns 0x00 (0000ms, 0773ms total)
-T13F8 002:429 JLINK_WriteReg(R2, 0x20000170)  returns 0x00 (0000ms, 0773ms total)
-T13F8 002:429 JLINK_WriteReg(R3, 0x00000000)  returns 0x00 (0000ms, 0773ms total)
-T13F8 002:429 JLINK_WriteReg(R4, 0x00000000)  returns 0x00 (0000ms, 0773ms total)
-T13F8 002:429 JLINK_WriteReg(R5, 0x00000000)  returns 0x00 (0000ms, 0773ms total)
-T13F8 002:429 JLINK_WriteReg(R6, 0x00000000)  returns 0x00 (0000ms, 0773ms total)
-T13F8 002:429 JLINK_WriteReg(R7, 0x00000000)  returns 0x00 (0000ms, 0773ms total)
-T13F8 002:429 JLINK_WriteReg(R8, 0x00000000)  returns 0x00 (0000ms, 0773ms total)
-T13F8 002:429 JLINK_WriteReg(R9, 0x2000016C)  returns 0x00 (0001ms, 0774ms total)
-T13F8 002:430 JLINK_WriteReg(R10, 0x00000000)  returns 0x00 (0000ms, 0774ms total)
-T13F8 002:430 JLINK_WriteReg(R11, 0x00000000)  returns 0x00 (0000ms, 0774ms total)
-T13F8 002:430 JLINK_WriteReg(R12, 0x00000000)  returns 0x00 (0000ms, 0774ms total)
-T13F8 002:430 JLINK_WriteReg(R13 (SP), 0x20001000)  returns 0x00 (0000ms, 0774ms total)
-T13F8 002:430 JLINK_WriteReg(R14, 0x20000001)  returns 0x00 (0000ms, 0774ms total)
-T13F8 002:430 JLINK_WriteReg(R15 (PC), 0x200000FA)  returns 0x00 (0000ms, 0774ms total)
-T13F8 002:430 JLINK_WriteReg(XPSR, 0x01000000)  returns 0x00 (0000ms, 0774ms total)
-T13F8 002:430 JLINK_WriteReg(MSP, 0x20001000)  returns 0x00 (0000ms, 0774ms total)
-T13F8 002:430 JLINK_WriteReg(PSP, 0x20001000)  returns 0x00 (0000ms, 0774ms total)
-T13F8 002:430 JLINK_WriteReg(CFBP, 0x00000000)  returns 0x00 (0000ms, 0774ms total)
-T13F8 002:430 JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2)  returns 0x0000002F (0001ms, 0775ms total)
-T13F8 002:431 JLINK_Go() -- CPU_ReadMem(4 bytes @ 0xE0001000) -- CPU_WriteMem(4 bytes @ 0xE0001000) (0004ms, 0779ms total)
-T13F8 002:435 JLINK_IsHalted()  returns FALSE (0000ms, 0779ms total)
-T13F8 002:437 JLINK_IsHalted()  returns FALSE (0000ms, 0779ms total)
-T13F8 002:439 JLINK_IsHalted()  returns FALSE (0000ms, 0779ms total)
-T13F8 002:441 JLINK_IsHalted()  returns FALSE (0000ms, 0779ms total)
-T13F8 002:443 JLINK_IsHalted()  returns FALSE (0001ms, 0780ms total)
-T13F8 002:446 JLINK_IsHalted()  returns FALSE (0000ms, 0779ms total)
-T13F8 002:448 JLINK_IsHalted()  returns FALSE (0000ms, 0779ms total)
-T13F8 002:450 JLINK_IsHalted()  returns FALSE (0000ms, 0779ms total)
-T13F8 002:452 JLINK_IsHalted()  returns FALSE (0001ms, 0780ms total)
-T13F8 002:455 JLINK_IsHalted()  returns FALSE (0000ms, 0779ms total)
-T13F8 002:471 JLINK_IsHalted() -- CPU_ReadMem(2 bytes @ 0x20000000)  returns TRUE (0004ms, 0783ms total)
-T13F8 002:476 JLINK_ReadReg(R15 (PC))  returns 0x20000000 (0000ms, 0779ms total)
-T13F8 002:476 JLINK_ClrBPEx(BPHandle = 0x0000002F)  returns 0x00 (0000ms, 0779ms total)
-T13F8 002:476 JLINK_ReadReg(R0)  returns 0x00000000 (0000ms, 0779ms total)
-T13F8 002:478 JLINK_WriteMem(0x20000170, 0x0290 Bytes, ...) - Data: 80 41 00 C1 81 40 01 C0 80 41 01 C0 80 41 00 C1 ... -- CPU_WriteMem(656 bytes @ 0x20000170)  returns 0x290 (0009ms, 0788ms total)
-T13F8 002:487 JLINK_WriteMem(0x20000400, 0x0170 Bytes, ...) - Data: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ... -- CPU_WriteMem(368 bytes @ 0x20000400)  returns 0x170 (0005ms, 0793ms total)
-T13F8 002:492 JLINK_WriteReg(R0, 0x08003800)  returns 0x00 (0000ms, 0793ms total)
-T13F8 002:492 JLINK_WriteReg(R1, 0x00000380)  returns 0x00 (0000ms, 0793ms total)
-T13F8 002:492 JLINK_WriteReg(R2, 0x20000170)  returns 0x00 (0000ms, 0793ms total)
-T13F8 002:492 JLINK_WriteReg(R3, 0x00000000)  returns 0x00 (0001ms, 0794ms total)
-T13F8 002:493 JLINK_WriteReg(R4, 0x00000000)  returns 0x00 (0000ms, 0794ms total)
-T13F8 002:493 JLINK_WriteReg(R5, 0x00000000)  returns 0x00 (0000ms, 0794ms total)
-T13F8 002:493 JLINK_WriteReg(R6, 0x00000000)  returns 0x00 (0000ms, 0794ms total)
-T13F8 002:493 JLINK_WriteReg(R7, 0x00000000)  returns 0x00 (0000ms, 0794ms total)
-T13F8 002:493 JLINK_WriteReg(R8, 0x00000000)  returns 0x00 (0000ms, 0794ms total)
-T13F8 002:493 JLINK_WriteReg(R9, 0x2000016C)  returns 0x00 (0000ms, 0794ms total)
-T13F8 002:493 JLINK_WriteReg(R10, 0x00000000)  returns 0x00 (0000ms, 0794ms total)
-T13F8 002:493 JLINK_WriteReg(R11, 0x00000000)  returns 0x00 (0000ms, 0794ms total)
-T13F8 002:493 JLINK_WriteReg(R12, 0x00000000)  returns 0x00 (0000ms, 0794ms total)
-T13F8 002:493 JLINK_WriteReg(R13 (SP), 0x20001000)  returns 0x00 (0000ms, 0794ms total)
-T13F8 002:493 JLINK_WriteReg(R14, 0x20000001)  returns 0x00 (0000ms, 0794ms total)
-T13F8 002:493 JLINK_WriteReg(R15 (PC), 0x200000FA)  returns 0x00 (0000ms, 0794ms total)
-T13F8 002:493 JLINK_WriteReg(XPSR, 0x01000000)  returns 0x00 (0000ms, 0794ms total)
-T13F8 002:493 JLINK_WriteReg(MSP, 0x20001000)  returns 0x00 (0001ms, 0795ms total)
-T13F8 002:494 JLINK_WriteReg(PSP, 0x20001000)  returns 0x00 (0000ms, 0795ms total)
-T13F8 002:494 JLINK_WriteReg(CFBP, 0x00000000)  returns 0x00 (0000ms, 0795ms total)
-T13F8 002:494 JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2)  returns 0x00000030 (0000ms, 0795ms total)
-T13F8 002:494 JLINK_Go() -- CPU_ReadMem(4 bytes @ 0xE0001000) -- CPU_WriteMem(4 bytes @ 0xE0001000) (0004ms, 0799ms total)
-T13F8 002:498 JLINK_IsHalted()  returns FALSE (0001ms, 0800ms total)
-T13F8 002:504 JLINK_IsHalted()  returns FALSE (0001ms, 0800ms total)
-T13F8 002:507 JLINK_IsHalted()  returns FALSE (0001ms, 0800ms total)
-T13F8 002:514 JLINK_IsHalted()  returns FALSE (0001ms, 0800ms total)
-T13F8 002:517 JLINK_IsHalted()  returns FALSE (0001ms, 0800ms total)
-T13F8 002:520 JLINK_IsHalted()  returns FALSE (0000ms, 0799ms total)
-T13F8 002:523 JLINK_IsHalted() -- CPU_ReadMem(2 bytes @ 0x20000000)  returns TRUE (0004ms, 0803ms total)
-T13F8 002:527 JLINK_ReadReg(R15 (PC))  returns 0x20000000 (0001ms, 0800ms total)
-T13F8 002:528 JLINK_ClrBPEx(BPHandle = 0x00000030)  returns 0x00 (0000ms, 0800ms total)
-T13F8 002:528 JLINK_ReadReg(R0)  returns 0x00000000 (0000ms, 0800ms total)
-T13F8 002:528 JLINK_WriteReg(R0, 0x00000002)  returns 0x00 (0000ms, 0800ms total)
-T13F8 002:528 JLINK_WriteReg(R1, 0x00000380)  returns 0x00 (0000ms, 0800ms total)
-T13F8 002:528 JLINK_WriteReg(R2, 0x20000170)  returns 0x00 (0000ms, 0800ms total)
-T13F8 002:528 JLINK_WriteReg(R3, 0x00000000)  returns 0x00 (0000ms, 0800ms total)
-T13F8 002:528 JLINK_WriteReg(R4, 0x00000000)  returns 0x00 (0000ms, 0800ms total)
-T13F8 002:528 JLINK_WriteReg(R5, 0x00000000)  returns 0x00 (0000ms, 0800ms total)
-T13F8 002:528 JLINK_WriteReg(R6, 0x00000000)  returns 0x00 (0000ms, 0800ms total)
-T13F8 002:528 JLINK_WriteReg(R7, 0x00000000)  returns 0x00 (0000ms, 0800ms total)
-T13F8 002:528 JLINK_WriteReg(R8, 0x00000000)  returns 0x00 (0000ms, 0800ms total)
-T13F8 002:528 JLINK_WriteReg(R9, 0x2000016C)  returns 0x00 (0000ms, 0800ms total)
-T13F8 002:528 JLINK_WriteReg(R10, 0x00000000)  returns 0x00 (0000ms, 0800ms total)
-T13F8 002:528 JLINK_WriteReg(R11, 0x00000000)  returns 0x00 (0000ms, 0800ms total)
-T13F8 002:528 JLINK_WriteReg(R12, 0x00000000)  returns 0x00 (0001ms, 0801ms total)
-T13F8 002:529 JLINK_WriteReg(R13 (SP), 0x20001000)  returns 0x00 (0000ms, 0801ms total)
-T13F8 002:529 JLINK_WriteReg(R14, 0x20000001)  returns 0x00 (0000ms, 0801ms total)
-T13F8 002:529 JLINK_WriteReg(R15 (PC), 0x20000066)  returns 0x00 (0000ms, 0801ms total)
-T13F8 002:529 JLINK_WriteReg(XPSR, 0x01000000)  returns 0x00 (0000ms, 0801ms total)
-T13F8 002:529 JLINK_WriteReg(MSP, 0x20001000)  returns 0x00 (0000ms, 0801ms total)
-T13F8 002:529 JLINK_WriteReg(PSP, 0x20001000)  returns 0x00 (0000ms, 0801ms total)
-T13F8 002:529 JLINK_WriteReg(CFBP, 0x00000000)  returns 0x00 (0000ms, 0801ms total)
-T13F8 002:529 JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2)  returns 0x00000031 (0000ms, 0801ms total)
-T13F8 002:529 JLINK_Go() -- CPU_ReadMem(4 bytes @ 0xE0001000) -- CPU_WriteMem(4 bytes @ 0xE0001000) (0004ms, 0805ms total)
-T13F8 002:533 JLINK_IsHalted() -- CPU_ReadMem(2 bytes @ 0x20000000)  returns TRUE (0005ms, 0810ms total)
-T13F8 002:538 JLINK_ReadReg(R15 (PC))  returns 0x20000000 (0000ms, 0805ms total)
-T13F8 002:538 JLINK_ClrBPEx(BPHandle = 0x00000031)  returns 0x00 (0000ms, 0805ms total)
-T13F8 002:538 JLINK_ReadReg(R0)  returns 0x00000000 (0000ms, 0805ms total)
-T13F8 002:622 JLINK_WriteMem(0x20000000, 0x0170 Bytes, ...) - Data: 00 BE 0A E0 0D 78 2D 06 68 40 08 24 40 00 00 D3 ... -- CPU_WriteMem(368 bytes @ 0x20000000)  returns 0x170 (0005ms, 0810ms total)
-T13F8 002:627 JLINK_WriteReg(R0, 0x08000000)  returns 0x00 (0000ms, 0810ms total)
-T13F8 002:627 JLINK_WriteReg(R1, 0x00B71B00)  returns 0x00 (0000ms, 0810ms total)
-T13F8 002:627 JLINK_WriteReg(R2, 0x00000003)  returns 0x00 (0000ms, 0810ms total)
-T13F8 002:627 JLINK_WriteReg(R3, 0x00000000)  returns 0x00 (0000ms, 0810ms total)
-T13F8 002:627 JLINK_WriteReg(R4, 0x00000000)  returns 0x00 (0000ms, 0810ms total)
-T13F8 002:627 JLINK_WriteReg(R5, 0x00000000)  returns 0x00 (0000ms, 0810ms total)
-T13F8 002:627 JLINK_WriteReg(R6, 0x00000000)  returns 0x00 (0000ms, 0810ms total)
-T13F8 002:628 JLINK_WriteReg(R7, 0x00000000)  returns 0x00 (0000ms, 0810ms total)
-T13F8 002:628 JLINK_WriteReg(R8, 0x00000000)  returns 0x00 (0000ms, 0810ms total)
-T13F8 002:628 JLINK_WriteReg(R9, 0x2000016C)  returns 0x00 (0000ms, 0810ms total)
-T13F8 002:628 JLINK_WriteReg(R10, 0x00000000)  returns 0x00 (0000ms, 0810ms total)
-T13F8 002:628 JLINK_WriteReg(R11, 0x00000000)  returns 0x00 (0000ms, 0810ms total)
-T13F8 002:628 JLINK_WriteReg(R12, 0x00000000)  returns 0x00 (0000ms, 0810ms total)
-T13F8 002:628 JLINK_WriteReg(R13 (SP), 0x20001000)  returns 0x00 (0000ms, 0810ms total)
-T13F8 002:628 JLINK_WriteReg(R14, 0x20000001)  returns 0x00 (0000ms, 0810ms total)
-T13F8 002:628 JLINK_WriteReg(R15 (PC), 0x20000038)  returns 0x00 (0000ms, 0810ms total)
-T13F8 002:628 JLINK_WriteReg(XPSR, 0x01000000)  returns 0x00 (0000ms, 0810ms total)
-T13F8 002:628 JLINK_WriteReg(MSP, 0x20001000)  returns 0x00 (0000ms, 0810ms total)
-T13F8 002:628 JLINK_WriteReg(PSP, 0x20001000)  returns 0x00 (0000ms, 0810ms total)
-T13F8 002:628 JLINK_WriteReg(CFBP, 0x00000000)  returns 0x00 (0000ms, 0810ms total)
-T13F8 002:628 JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2) -- CPU_ReadMem(4 bytes @ 0x20000000) -- CPU_WriteMem(4 bytes @ 0x20000000) -- CPU_ReadMem(4 bytes @ 0x20000000) -- CPU_WriteMem(4 bytes @ 0x20000000) -- CPU_ReadMem(2 bytes @ 0x20000000)  returns 0x00000032 (0005ms, 0815ms total)
-T13F8 002:633 JLINK_Go() -- CPU_WriteMem(2 bytes @ 0x20000000) -- CPU_ReadMem(4 bytes @ 0xE0001000) -- CPU_WriteMem(4 bytes @ 0xE0001000) (0004ms, 0819ms total)
-T13F8 002:637 JLINK_IsHalted() -- CPU_ReadMem(2 bytes @ 0x20000000)  returns TRUE (0004ms, 0823ms total)
-T13F8 002:641 JLINK_ReadReg(R15 (PC))  returns 0x20000000 (0000ms, 0819ms total)
-T13F8 002:641 JLINK_ClrBPEx(BPHandle = 0x00000032)  returns 0x00 (0000ms, 0819ms total)
-T13F8 002:641 JLINK_ReadReg(R0)  returns 0x00000000 (0000ms, 0819ms total)
-T13F8 002:641 JLINK_WriteReg(R0, 0xFFFFFFFF)  returns 0x00 (0000ms, 0819ms total)
-T13F8 002:641 JLINK_WriteReg(R1, 0x08000000)  returns 0x00 (0000ms, 0819ms total)
-T13F8 002:641 JLINK_WriteReg(R2, 0x00003B80)  returns 0x00 (0000ms, 0819ms total)
-T13F8 002:641 JLINK_WriteReg(R3, 0x04C11DB7)  returns 0x00 (0000ms, 0819ms total)
-T13F8 002:641 JLINK_WriteReg(R4, 0x00000000)  returns 0x00 (0000ms, 0819ms total)
-T13F8 002:641 JLINK_WriteReg(R5, 0x00000000)  returns 0x00 (0000ms, 0819ms total)
-T13F8 002:641 JLINK_WriteReg(R6, 0x00000000)  returns 0x00 (0000ms, 0819ms total)
-T13F8 002:641 JLINK_WriteReg(R7, 0x00000000)  returns 0x00 (0000ms, 0819ms total)
-T13F8 002:641 JLINK_WriteReg(R8, 0x00000000)  returns 0x00 (0000ms, 0819ms total)
-T13F8 002:641 JLINK_WriteReg(R9, 0x2000016C)  returns 0x00 (0000ms, 0819ms total)
-T13F8 002:641 JLINK_WriteReg(R10, 0x00000000)  returns 0x00 (0000ms, 0819ms total)
-T13F8 002:641 JLINK_WriteReg(R11, 0x00000000)  returns 0x00 (0001ms, 0820ms total)
-T13F8 002:642 JLINK_WriteReg(R12, 0x00000000)  returns 0x00 (0000ms, 0820ms total)
-T13F8 002:642 JLINK_WriteReg(R13 (SP), 0x20001000)  returns 0x00 (0000ms, 0820ms total)
-T13F8 002:642 JLINK_WriteReg(R14, 0x20000001)  returns 0x00 (0000ms, 0820ms total)
-T13F8 002:642 JLINK_WriteReg(R15 (PC), 0x20000002)  returns 0x00 (0000ms, 0820ms total)
-T13F8 002:642 JLINK_WriteReg(XPSR, 0x01000000)  returns 0x00 (0000ms, 0820ms total)
-T13F8 002:642 JLINK_WriteReg(MSP, 0x20001000)  returns 0x00 (0000ms, 0820ms total)
-T13F8 002:642 JLINK_WriteReg(PSP, 0x20001000)  returns 0x00 (0000ms, 0820ms total)
-T13F8 002:642 JLINK_WriteReg(CFBP, 0x00000000)  returns 0x00 (0000ms, 0820ms total)
-T13F8 002:642 JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2)  returns 0x00000033 (0000ms, 0820ms total)
-T13F8 002:642 JLINK_Go() -- CPU_ReadMem(4 bytes @ 0xE0001000) -- CPU_WriteMem(4 bytes @ 0xE0001000) (0003ms, 0823ms total)
-T13F8 002:645 JLINK_IsHalted()  returns FALSE (0001ms, 0824ms total)
-T13F8 002:661 JLINK_IsHalted()  returns FALSE (0000ms, 0823ms total)
-T13F8 002:663 JLINK_IsHalted()  returns FALSE (0000ms, 0823ms total)
-T13F8 002:665 JLINK_IsHalted()  returns FALSE (0001ms, 0824ms total)
-T13F8 002:668 JLINK_IsHalted()  returns FALSE (0000ms, 0823ms total)
-T13F8 002:671 JLINK_IsHalted()  returns FALSE (0000ms, 0823ms total)
-T13F8 002:673 JLINK_IsHalted()  returns FALSE (0001ms, 0824ms total)
-T13F8 002:676 JLINK_IsHalted()  returns FALSE (0000ms, 0823ms total)
-T13F8 002:678 JLINK_IsHalted()  returns FALSE (0000ms, 0823ms total)
-T13F8 002:680 JLINK_IsHalted()  returns FALSE (0000ms, 0823ms total)
-T13F8 002:682 JLINK_IsHalted()  returns FALSE (0000ms, 0823ms total)
-T13F8 002:684 JLINK_IsHalted()  returns FALSE (0000ms, 0823ms total)
-T13F8 002:686 JLINK_IsHalted()  returns FALSE (0000ms, 0823ms total)
-T13F8 002:689 JLINK_IsHalted()  returns FALSE (0000ms, 0823ms total)
-T13F8 002:691 JLINK_IsHalted()  returns FALSE (0001ms, 0824ms total)
-T13F8 002:694 JLINK_IsHalted()  returns FALSE (0000ms, 0823ms total)
-T13F8 002:696 JLINK_IsHalted()  returns FALSE (0000ms, 0823ms total)
-T13F8 002:698 JLINK_IsHalted()  returns FALSE (0000ms, 0823ms total)
-T13F8 002:701 JLINK_IsHalted()  returns FALSE (0000ms, 0823ms total)
-T13F8 002:704 JLINK_IsHalted()  returns FALSE (0001ms, 0824ms total)
-T13F8 002:707 JLINK_IsHalted()  returns FALSE (0000ms, 0823ms total)
-T13F8 002:712 JLINK_IsHalted()  returns FALSE (0000ms, 0823ms total)
-T13F8 002:714 JLINK_IsHalted()  returns FALSE (0000ms, 0823ms total)
-T13F8 002:717 JLINK_IsHalted()  returns FALSE (0000ms, 0823ms total)
-T13F8 002:719 JLINK_IsHalted()  returns FALSE (0001ms, 0824ms total)
-T13F8 002:722 JLINK_IsHalted()  returns FALSE (0000ms, 0823ms total)
-T13F8 002:726 JLINK_IsHalted()  returns FALSE (0000ms, 0823ms total)
-T13F8 002:728 JLINK_IsHalted()  returns FALSE (0000ms, 0823ms total)
-T13F8 002:730 JLINK_IsHalted()  returns FALSE (0001ms, 0824ms total)
-T13F8 002:733 JLINK_IsHalted()  returns FALSE (0000ms, 0823ms total)
-T13F8 002:735 JLINK_IsHalted()  returns FALSE (0000ms, 0823ms total)
-T13F8 002:737 JLINK_IsHalted()  returns FALSE (0000ms, 0823ms total)
-T13F8 002:739 JLINK_IsHalted()  returns FALSE (0000ms, 0823ms total)
-T13F8 002:741 JLINK_IsHalted()  returns FALSE (0000ms, 0823ms total)
-T13F8 002:743 JLINK_IsHalted()  returns FALSE (0001ms, 0824ms total)
-T13F8 002:746 JLINK_IsHalted()  returns FALSE (0000ms, 0823ms total)
-T13F8 002:748 JLINK_IsHalted()  returns FALSE (0000ms, 0823ms total)
-T13F8 002:750 JLINK_IsHalted()  returns FALSE (0001ms, 0824ms total)
-T13F8 002:753 JLINK_IsHalted()  returns FALSE (0000ms, 0823ms total)
-T13F8 002:755 JLINK_IsHalted()  returns FALSE (0001ms, 0824ms total)
-T13F8 002:758 JLINK_IsHalted()  returns FALSE (0000ms, 0823ms total)
-T13F8 002:762 JLINK_IsHalted()  returns FALSE (0000ms, 0823ms total)
-T13F8 002:765 JLINK_IsHalted()  returns FALSE (0000ms, 0823ms total)
-T13F8 002:768 JLINK_IsHalted()  returns FALSE (0000ms, 0823ms total)
-T13F8 002:769 JLINK_IsHalted()  returns FALSE (0000ms, 0823ms total)
-T13F8 002:771 JLINK_IsHalted()  returns FALSE (0000ms, 0823ms total)
-T13F8 002:774 JLINK_IsHalted()  returns FALSE (0000ms, 0823ms total)
-T13F8 002:776 JLINK_IsHalted()  returns FALSE (0000ms, 0823ms total)
-T13F8 002:779 JLINK_IsHalted() -- CPU_ReadMem(2 bytes @ 0x20000000)  returns TRUE (0003ms, 0826ms total)
-T13F8 002:782 JLINK_ReadReg(R15 (PC))  returns 0x20000000 (0000ms, 0823ms total)
-T13F8 002:782 JLINK_ClrBPEx(BPHandle = 0x00000033)  returns 0x00 (0000ms, 0823ms total)
-T13F8 002:782 JLINK_ReadReg(R0)  returns 0xEAFDE5CE (0000ms, 0823ms total)
-T13F8 002:784 JLINK_WriteReg(R0, 0x00000003)  returns 0x00 (0000ms, 0823ms total)
-T13F8 002:784 JLINK_WriteReg(R1, 0x08000000)  returns 0x00 (0000ms, 0823ms total)
-T13F8 002:784 JLINK_WriteReg(R2, 0x00003B80)  returns 0x00 (0000ms, 0823ms total)
-T13F8 002:784 JLINK_WriteReg(R3, 0x04C11DB7)  returns 0x00 (0000ms, 0823ms total)
-T13F8 002:784 JLINK_WriteReg(R4, 0x00000000)  returns 0x00 (0000ms, 0823ms total)
-T13F8 002:784 JLINK_WriteReg(R5, 0x00000000)  returns 0x00 (0000ms, 0823ms total)
-T13F8 002:784 JLINK_WriteReg(R6, 0x00000000)  returns 0x00 (0000ms, 0823ms total)
-T13F8 002:784 JLINK_WriteReg(R7, 0x00000000)  returns 0x00 (0000ms, 0823ms total)
-T13F8 002:784 JLINK_WriteReg(R8, 0x00000000)  returns 0x00 (0000ms, 0823ms total)
-T13F8 002:784 JLINK_WriteReg(R9, 0x2000016C)  returns 0x00 (0000ms, 0823ms total)
-T13F8 002:784 JLINK_WriteReg(R10, 0x00000000)  returns 0x00 (0000ms, 0823ms total)
-T13F8 002:784 JLINK_WriteReg(R11, 0x00000000)  returns 0x00 (0000ms, 0823ms total)
-T13F8 002:784 JLINK_WriteReg(R12, 0x00000000)  returns 0x00 (0000ms, 0823ms total)
-T13F8 002:784 JLINK_WriteReg(R13 (SP), 0x20001000)  returns 0x00 (0000ms, 0823ms total)
-T13F8 002:784 JLINK_WriteReg(R14, 0x20000001)  returns 0x00 (0000ms, 0823ms total)
-T13F8 002:784 JLINK_WriteReg(R15 (PC), 0x20000066)  returns 0x00 (0000ms, 0823ms total)
-T13F8 002:784 JLINK_WriteReg(XPSR, 0x01000000)  returns 0x00 (0000ms, 0823ms total)
-T13F8 002:784 JLINK_WriteReg(MSP, 0x20001000)  returns 0x00 (0000ms, 0823ms total)
-T13F8 002:784 JLINK_WriteReg(PSP, 0x20001000)  returns 0x00 (0000ms, 0823ms total)
-T13F8 002:784 JLINK_WriteReg(CFBP, 0x00000000)  returns 0x00 (0000ms, 0823ms total)
-T13F8 002:784 JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2)  returns 0x00000034 (0000ms, 0823ms total)
-T13F8 002:784 JLINK_Go() -- CPU_ReadMem(4 bytes @ 0xE0001000) -- CPU_WriteMem(4 bytes @ 0xE0001000) (0005ms, 0828ms total)
-T13F8 002:789 JLINK_IsHalted() -- CPU_ReadMem(2 bytes @ 0x20000000)  returns TRUE (0004ms, 0832ms total)
-T13F8 002:793 JLINK_ReadReg(R15 (PC))  returns 0x20000000 (0000ms, 0828ms total)
-T13F8 002:793 JLINK_ClrBPEx(BPHandle = 0x00000034)  returns 0x00 (0000ms, 0828ms total)
-T13F8 002:793 JLINK_ReadReg(R0)  returns 0x00000000 (0000ms, 0828ms total)
-T13F8 002:854 JLINK_WriteMem(0x20000000, 0x0002 Bytes, ...) - Data: FE E7 -- CPU_WriteMem(2 bytes @ 0x20000000)  returns 0x02 (0001ms, 0829ms total)
-T13F8 002:855 JLINK_SetResetType(JLINKARM_RESET_TYPE_NORMAL)  returns JLINKARM_RESET_TYPE_NORMAL (0000ms, 0829ms total)
-T13F8 002:855 JLINK_Reset() -- CPU_ReadMem(4 bytes @ 0x20000000) -- CPU_WriteMem(4 bytes @ 0x20000000) -- CPU_WriteMem(4 bytes @ 0xE000EDF0) -- CPU_WriteMem(4 bytes @ 0xE000EDFC) >0x35 TIF> -- CPU_WriteMem(4 bytes @ 0xE000ED0C) -- CPU_ReadMem(4 bytes @ 0xE000EDF0) -- CPU_ReadMem(4 bytes @ 0xE000EDF0) -- CPU_WriteMem(4 bytes @ 0xE000EDF0) -- CPU_WriteMem(4 bytes @ 0xE000EDFC) -- CPU is running -- CPU_ReadMem(4 bytes @ 0xE000EDF0) -- CPU_WriteMem(4 bytes @ 0xE0002000) -- CPU_ReadMem(4 bytes @ 0xE000EDFC)
- -- CPU_ReadMem(4 bytes @ 0xE0001000) -- CPU_WriteMem(4 bytes @ 0xE0001000) (0023ms, 0852ms total)
-T13F8 002:878 JLINK_Go() -- CPU_ReadMem(4 bytes @ 0xE0001000) -- CPU_WriteMem(4 bytes @ 0xE0001000) -- CPU_WriteMem(4 bytes @ 0xE0002008) -- CPU_WriteMem(4 bytes @ 0xE000200C) -- CPU_WriteMem(4 bytes @ 0xE0002010) -- CPU_WriteMem(4 bytes @ 0xE0002014) -- CPU_WriteMem(4 bytes @ 0xE0001004) (0005ms, 0857ms total)
-T13F8 002:953 JLINK_Close() -- CPU is running -- CPU_WriteMem(4 bytes @ 0xE0002008) -- CPU is running -- CPU_WriteMem(4 bytes @ 0xE000200C) -- CPU is running -- CPU_WriteMem(4 bytes @ 0xE0002010) -- CPU is running -- CPU_WriteMem(4 bytes @ 0xE0002014) >0x0D TIF> >0x28 TIF> >0x0D TIF> >0x28 TIF> >0x0D TIF> >0x28 TIF> >0x0D TIF> >0x28 TIF> >0x0D TIF> >0x28 TIF> >0x0D TIF> >0x28 TIF> >0x0D TIF> >0x28 TIF> >0x0D TIF> >0x28 TIF> >0x0D TIF> >0x21 TIF> >0x0D TIF> >0x28 TIF> (0023ms, 0880ms total)
-T13F8 002:953  (0023ms, 0880ms total)
-T13F8 002:953 Closed (0023ms, 0880ms total)
+Feature(s): RDI,FlashDL,FlashBP,JFlash,GDBFullWEBSRV Webserver running on local port 19080 (0018ms, 0047ms total)
+T16E8 000:158   returns O.K. (0018ms, 0047ms total)
+T16E8 000:176 JLINK_SetErrorOutHandler(...) (0000ms, 0047ms total)
+T16E8 000:176 JLINK_ExecCommand("ProjectFile = "D:\WORK\MCU&PCB\DIST_IO\F030C8T6_KNet_20220301\MDK-ARM\JLinkSettings.ini"", ...). Device "CORTEX-M0" selected.  returns 0x00 (0240ms, 0287ms total)
+T16E8 000:446 JLINK_ExecCommand("Device = STM32F030C8Tx", ...). Device "CORTEX-M0" selected.  returns 0x00 (0024ms, 0311ms total)
+T16E8 000:470 JLINK_ExecCommand("DisableConnectionTimeout", ...).   returns 0x01 (0000ms, 0311ms total)
+T16E8 000:471 JLINK_GetHardwareVersion()  returns 0x11170 (0000ms, 0312ms total)
+T16E8 000:471 JLINK_GetDLLVersion()  returns 61009 (0000ms, 0312ms total)
+T16E8 000:471 JLINK_GetFirmwareString(...) (0000ms, 0312ms total)
+T16E8 000:587 JLINK_GetDLLVersion()  returns 61009 (0000ms, 0312ms total)
+T16E8 000:587 JLINK_GetCompileDateTime() (0000ms, 0312ms total)
+T16E8 000:615 JLINK_GetFirmwareString(...) (0000ms, 0312ms total)
+T16E8 000:645 JLINK_GetHardwareVersion()  returns 0x11170 (0001ms, 0313ms total)
+T16E8 000:770 JLINK_TIF_Select(JLINKARM_TIF_SWD)  returns 0x00 (0001ms, 0314ms total)
+T16E8 000:771 JLINK_SetSpeed(5000) (0000ms, 0314ms total)
+T16E8 000:771 JLINK_GetId() >0x108 TIF> >0x108 TIF> >0x108 TIF> >0x108 TIF> >0x108 TIF> >0x108 TIF> >0x108 TIF> >0x108 TIF> >0x108 TIF> >0x108 TIF> >0x108 TIF> >0x108 TIF> >0x0D TIF> >0x0D TIF> >0x0D TIF> >0x0D TIF> >0x0D TIF> >0x0D TIF> >0x0D TIF> >0x0D TIF> >0x0D TIF> >0x0D TIF> >0x108 TIF> >0x108 TIF>  returns 0x00000000 (0787ms, 1101ms total)
+T16E8 003:370 JLINK_Close() (0010ms, 1111ms total)
+T16E8 003:370  (0010ms, 1111ms total)
+T16E8 003:370 Closed (0010ms, 1111ms total)
diff --git a/Src/BSP.c b/Src/BSP.c
index eec4f09..34a69bd 100644
--- a/Src/BSP.c
+++ b/Src/BSP.c
@@ -105,6 +105,7 @@
   * @brief System Clock Configuration
   * @retval None
   */
+
 void SystemClock_Config(void)
 {
 	RCC_OscInitTypeDef RCC_OscInitStruct = {0};
@@ -116,14 +117,15 @@
   RCC_OscInitStruct.HSEState = RCC_HSE_ON;
   RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
   RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
+//  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
 	
 #if (XLAT_FREQ == 12)	
-	RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL4;
+  RCC_OscInitStruct.PLL.PREDIV = RCC_PREDIV_DIV3;
 #else
-  RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL6;
+  RCC_OscInitStruct.PLL.PREDIV = RCC_PREDIV_DIV2;
 #endif
-	
-  RCC_OscInitStruct.PLL.PREDIV = RCC_PREDIV_DIV1;
+
+	RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL12;	
   if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
   {
     Error_Handler();
@@ -158,7 +160,8 @@
 
     /**Configure the Systick interrupt time 
     */
-  HAL_SYSTICK_Config(HAL_RCC_GetHCLKFreq()/10000);
+//  HAL_SYSTICK_Config(HAL_RCC_GetHCLKFreq()/10000);
+  HAL_SYSTICK_Config(48000000/10000);
 
     /**Configure the Systick 
     */
@@ -193,7 +196,40 @@
   /* USER CODE END IWDG_Init 2 */
 
 }
+/**
+  * @brief TIM6 Initialization Function
+  * @param None
+  * @retval None
+  */
+void MX_TIM6_Init(void)
+{
 
+  /* USER CODE BEGIN TIM6_Init 0 */
+
+  /* USER CODE END TIM6_Init 0 */
+
+  LL_TIM_InitTypeDef TIM_InitStruct = {0};
+
+  /* Peripheral clock enable */
+  LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_TIM6);
+
+  /* TIM6 interrupt Init */
+  NVIC_SetPriority(TIM6_IRQn, 0);
+  NVIC_EnableIRQ(TIM6_IRQn);
+
+  /* USER CODE BEGIN TIM6_Init 1 */
+
+  /* USER CODE END TIM6_Init 1 */
+  TIM_InitStruct.Prescaler = 47;
+  TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP;
+  TIM_InitStruct.Autoreload = 999;
+  LL_TIM_Init(TIM6, &TIM_InitStruct);
+  LL_TIM_DisableARRPreload(TIM6);
+  /* USER CODE BEGIN TIM6_Init 2 */
+	LL_TIM_EnableIT_UPDATE(TIM6);
+  /* USER CODE END TIM6_Init 2 */
+
+}
 /* ADC init function */
 void MX_ADC_Init(void)
 {
@@ -263,9 +299,9 @@
 void MX_SPI1_Init(void)
 {
 
-  LL_SPI_InitTypeDef SPI_InitStruct;
+  LL_SPI_InitTypeDef SPI_InitStruct = {0};
 
-  LL_GPIO_InitTypeDef GPIO_InitStruct;
+  LL_GPIO_InitTypeDef GPIO_InitStruct = {0};
 
   /* Peripheral clock enable */
   LL_APB1_GRP2_EnableClock(LL_APB1_GRP2_PERIPH_SPI1);
@@ -317,7 +353,7 @@
   GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
   GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_HIGH;
   GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
-  GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
+  GPIO_InitStruct.Pull = LL_GPIO_PULL_UP;
   GPIO_InitStruct.Alternate = LL_GPIO_AF_0;
   LL_GPIO_Init(GPIOB, &GPIO_InitStruct);
 
@@ -334,9 +370,51 @@
   NVIC_EnableIRQ(SPI1_IRQn);
   /* USER CODE BEGIN SPI1_Init 1 */
 
+#if (BOARD_TYPE == 14)
+
   /* USER CODE END SPI1_Init 1 */
 
   /* SPI1 parameter configuration*/
+  SPI_InitStruct.TransferDirection = LL_SPI_FULL_DUPLEX;
+  SPI_InitStruct.Mode = LL_SPI_MODE_SLAVE;
+  SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_8BIT;
+  SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_LOW; //LL_SPI_POLARITY_LOW;
+  SPI_InitStruct.ClockPhase = LL_SPI_PHASE_2EDGE ; //LL_SPI_PHASE_1EDGE;
+  SPI_InitStruct.NSS = LL_SPI_NSS_SOFT;
+  SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV4;
+  SPI_InitStruct.BitOrder = LL_SPI_LSB_FIRST;
+  SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE;
+  SPI_InitStruct.CRCPoly = 7;
+  LL_SPI_Init(SPI1, &SPI_InitStruct);
+
+  LL_SPI_SetStandard(SPI1, LL_SPI_PROTOCOL_MOTOROLA);
+  LL_SPI_DisableNSSPulseMgt(SPI1);
+  LL_SPI_SetRxFIFOThreshold(SPI1,LL_SPI_RX_FIFO_TH_QUARTER);
+//  LL_SPI_EnableNSSPulseMgt(SPI1);	
+
+  /* USER CODE BEGIN SPI1_Init 2 */
+
+#elif (BOARD_TYPE == 13)
+
+  SPI_InitStruct.TransferDirection = LL_SPI_FULL_DUPLEX;
+  SPI_InitStruct.Mode = LL_SPI_MODE_MASTER;
+  SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_8BIT;
+  SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH; //LL_SPI_POLARITY_LOW;
+  SPI_InitStruct.ClockPhase = LL_SPI_PHASE_2EDGE ; //LL_SPI_PHASE_1EDGE;
+  SPI_InitStruct.NSS = LL_SPI_NSS_SOFT;
+  SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV2;
+  SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST;
+  SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE;
+  SPI_InitStruct.CRCPoly = 7;
+  LL_SPI_Init(SPI1, &SPI_InitStruct);
+
+  LL_SPI_SetStandard(SPI1, LL_SPI_PROTOCOL_MOTOROLA);
+
+  LL_SPI_SetRxFIFOThreshold(SPI1,LL_SPI_RX_FIFO_TH_QUARTER);
+//  LL_SPI_EnableNSSPulseMgt(SPI1);	
+
+#else
+
   SPI_InitStruct.TransferDirection = LL_SPI_FULL_DUPLEX;
   SPI_InitStruct.Mode = LL_SPI_MODE_MASTER;
   SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_8BIT;
@@ -350,9 +428,12 @@
   LL_SPI_Init(SPI1, &SPI_InitStruct);
 
   LL_SPI_SetStandard(SPI1, LL_SPI_PROTOCOL_MOTOROLA);
-
+	
+  LL_SPI_SetRxFIFOThreshold(SPI1,LL_SPI_RX_FIFO_TH_QUARTER);
   LL_SPI_EnableNSSPulseMgt(SPI1);
-  /* USER CODE BEGIN SPI1_Init 2 */
+
+#endif
+
 	LL_SPI_Enable(SPI1);
   /* USER CODE END SPI1_Init 2 */
 }
@@ -560,7 +641,7 @@
 //  LL_USART_SetDESignalPolarity(USART2, LL_USART_DE_POLARITY_HIGH);
   LL_USART_SetDEAssertionTime(USART2, 3);
   LL_USART_SetDEDeassertionTime(USART2, 3);
-  LL_USART_EnableOneBitSamp(USART2);
+//  LL_USART_EnableOneBitSamp(USART2);
 //  LL_USART_EnableAutoBaudRate(USART2);
 //  LL_USART_SetAutoBaudRateMode(USART2, LL_USART_AUTOBAUD_DETECT_ON_FALLINGEDGE);
   LL_USART_DisableOverrunDetect(USART2);
@@ -601,11 +682,12 @@
   LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOA);
   LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOB);
   LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOC);
+  LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOF);
 	/**/
 
 
   /**/
-	GPIO_InitStruct.Pin = LL_GPIO_PIN_6 ; //|LL_GPIO_PIN_7;
+	GPIO_InitStruct.Pin = LL_GPIO_PIN_6 |LL_GPIO_PIN_7;
   GPIO_InitStruct.Mode = LL_GPIO_MODE_INPUT;
   GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_HIGH;
   GPIO_InitStruct.Pull = LL_GPIO_PULL_UP;
@@ -642,26 +724,29 @@
 	if (GetBoardType()==2)
 	{
 		GPIO_InitStruct.Pin = LL_GPIO_PIN_3|LL_GPIO_PIN_4|LL_GPIO_PIN_5|LL_GPIO_PIN_6|LL_GPIO_PIN_7|
-													LL_GPIO_PIN_12|LL_GPIO_PIN_13|LL_GPIO_PIN_15;
+		LL_GPIO_PIN_12|LL_GPIO_PIN_13|LL_GPIO_PIN_15;
 		
 	}
 	else if (GetBoardType()==9 || GetBoardType()==10 )
 	{
-		GPIO_InitStruct.Pin = LL_GPIO_PIN_3|LL_GPIO_PIN_4|LL_GPIO_PIN_5|LL_GPIO_PIN_6|LL_GPIO_PIN_7|
-													LL_GPIO_PIN_11|LL_GPIO_PIN_1|LL_GPIO_PIN_2|LL_GPIO_PIN_10|
-													LL_GPIO_PIN_12|LL_GPIO_PIN_13|LL_GPIO_PIN_15;
+		GPIO_InitStruct.Pin = LL_GPIO_PIN_3|LL_GPIO_PIN_5|LL_GPIO_PIN_6|LL_GPIO_PIN_7|
+		LL_GPIO_PIN_11|LL_GPIO_PIN_1|LL_GPIO_PIN_2|LL_GPIO_PIN_10|
+		LL_GPIO_PIN_12|LL_GPIO_PIN_13|LL_GPIO_PIN_15;
 	}
 	else if ( GetBoardType() == 11 )
 	{	
 		GPIO_InitStruct.Pin = LL_GPIO_PIN_3|LL_GPIO_PIN_4|LL_GPIO_PIN_5|LL_GPIO_PIN_6|LL_GPIO_PIN_7|
-													LL_GPIO_PIN_2|LL_GPIO_PIN_10|
-													LL_GPIO_PIN_12|LL_GPIO_PIN_13|LL_GPIO_PIN_15;
-	} else	
+		LL_GPIO_PIN_2|LL_GPIO_PIN_10|LL_GPIO_PIN_12|LL_GPIO_PIN_13|LL_GPIO_PIN_15;
+	} else	if (BOARD_TYPE == 14)
 	{	
+		GPIO_InitStruct.Pin = LL_GPIO_PIN_6|LL_GPIO_PIN_7|
+		LL_GPIO_PIN_10|LL_GPIO_PIN_11|LL_GPIO_PIN_12|LL_GPIO_PIN_13|LL_GPIO_PIN_14|LL_GPIO_PIN_15;
+	} else
+	{
 		GPIO_InitStruct.Pin = LL_GPIO_PIN_3|LL_GPIO_PIN_4|LL_GPIO_PIN_5|LL_GPIO_PIN_6|LL_GPIO_PIN_7|
-													LL_GPIO_PIN_0|LL_GPIO_PIN_1|LL_GPIO_PIN_2|LL_GPIO_PIN_10|
-													LL_GPIO_PIN_12|LL_GPIO_PIN_13|LL_GPIO_PIN_15;
-	}	
+		LL_GPIO_PIN_0|LL_GPIO_PIN_1|LL_GPIO_PIN_2|LL_GPIO_PIN_10|
+		LL_GPIO_PIN_12|LL_GPIO_PIN_13|LL_GPIO_PIN_15;
+	}
 	
   GPIO_InitStruct.Mode = LL_GPIO_MODE_OUTPUT;
   GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_HIGH;
@@ -669,9 +754,7 @@
   GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
   LL_GPIO_Init(GPIOB, &GPIO_InitStruct);
 
-  LL_GPIO_SetOutputPin(GPIOB, LL_GPIO_PIN_3);
-	
-  GPIO_InitStruct.Pin = LL_GPIO_PIN_13|LL_GPIO_PIN_14;
+  GPIO_InitStruct.Pin = LL_GPIO_PIN_13|LL_GPIO_PIN_14|LL_GPIO_PIN_15;
   GPIO_InitStruct.Mode = LL_GPIO_MODE_OUTPUT;
   GPIO_InitStruct.Speed = LL_GPIO_SPEED_LOW;
   GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
@@ -682,5 +765,54 @@
 //    PWR_BackupAccessCmd( ENABLE );/* ????RTC??????*/
 //    RCC_LSEConfig( RCC_LSE_OFF ); /* ????????,PC14+PC15??????IO*/
  //   BKP_TamperPinCmd(DISABLE);  /* ????????,PC13??????IO*/
+	
+#if (BORAD_TYPE ==12)
+
+	GPIO_InitStruct.Pin = LL_GPIO_PIN_4|LL_GPIO_PIN_5|LL_GPIO_PIN_6|LL_GPIO_PIN_7;
+  GPIO_InitStruct.Mode = LL_GPIO_MODE_INPUT;
+  GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_HIGH;
+  GPIO_InitStruct.Pull = LL_GPIO_PULL_UP;
+  LL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+  LL_GPIO_SetOutputPin(GPIOA, LL_GPIO_PIN_8);	
+	
+	GPIO_InitStruct.Pin = LL_GPIO_PIN_9 ;								//RST_PIN in
+  GPIO_InitStruct.Mode = LL_GPIO_MODE_INPUT;
+  GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_HIGH;
+  GPIO_InitStruct.Pull = LL_GPIO_PULL_UP;
+  LL_GPIO_Init(GPIOB, &GPIO_InitStruct);
+	
+	GPIO_InitStruct.Pin = SYN_PIN ;								//SYN_PIN Pin in
+  GPIO_InitStruct.Mode = LL_GPIO_MODE_INPUT;
+  GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_HIGH;
+  GPIO_InitStruct.Pull = LL_GPIO_PULL_UP;
+  LL_GPIO_Init(SYN_PORT, &GPIO_InitStruct);
+	
+	GPIO_InitStruct.Pin = ACK_PIN ;								//ACK_PIN Pin out
+  GPIO_InitStruct.Mode = LL_GPIO_MODE_OUTPUT;
+  GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_HIGH;
+  GPIO_InitStruct.Pull = LL_GPIO_OUTPUT_PUSHPULL;
+  LL_GPIO_Init(ACK_PORT, &GPIO_InitStruct);
+
+  GPIO_InitStruct.Pin = LL_GPIO_PIN_7 ;								//485DE Pin out
+  GPIO_InitStruct.Mode = LL_GPIO_MODE_OUTPUT;
+  GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_HIGH;
+  GPIO_InitStruct.Pull = LL_GPIO_OUTPUT_PUSHPULL;
+  LL_GPIO_Init(GPIOF, &GPIO_InitStruct);
+	
+	GPIO_InitStruct.Pin = OE_PIN ;							// OE Pin in
+  GPIO_InitStruct.Mode = LL_GPIO_MODE_INPUT;
+  GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_HIGH;
+  GPIO_InitStruct.Pull = LL_GPIO_PULL_UP;
+  LL_GPIO_Init(OE_PORT, &GPIO_InitStruct);
+
+#elif (BOARD_TYPE == 13)
+
+  GPIO_InitStruct.Pin = LL_GPIO_PIN_15 ;
+  GPIO_InitStruct.Mode = LL_GPIO_MODE_OUTPUT;
+  GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_HIGH;
+  GPIO_InitStruct.Pull = LL_GPIO_OUTPUT_PUSHPULL;
+  LL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+
+#endif
 
 }
diff --git a/Src/Ethernet/W5500/w5500.c b/Src/Ethernet/W5500/w5500.c
new file mode 100644
index 0000000..2a44636
--- /dev/null
+++ b/Src/Ethernet/W5500/w5500.c
@@ -0,0 +1,367 @@
+//*****************************************************************************
+//
+//! \file w5500.c
+//! \brief W5500 HAL Interface.
+//! \version 1.0.2
+//! \date 2013/10/21
+//! \par  Revision history
+//!       <2014/05/01> V1.0.2
+//!         1. Implicit type casting -> Explicit type casting. Refer to M20140501
+//!            Fixed the problem on porting into under 32bit MCU
+//!            Issued by Mathias ClauBen, wizwiki forum ID Think01 and bobh
+//!            Thank for your interesting and serious advices.
+//!       <2013/12/20> V1.0.1
+//!         1. Remove warning
+//!         2. WIZCHIP_READ_BUF WIZCHIP_WRITE_BUF in case _WIZCHIP_IO_MODE_SPI_FDM_
+//!            for loop optimized(removed). refer to M20131220
+//!       <2013/10/21> 1st Release
+//! \author MidnightCow
+//! \copyright
+//!
+//! Copyright (c)  2013, WIZnet Co., LTD.
+//! All rights reserved.
+//! 
+//! Redistribution and use in source and binary forms, with or without 
+//! modification, are permitted provided that the following conditions 
+//! are met: 
+//! 
+//!     * Redistributions of source code must retain the above copyright 
+//! notice, this list of conditions and the following disclaimer. 
+//!     * Redistributions in binary form must reproduce the above copyright
+//! notice, this list of conditions and the following disclaimer in the
+//! documentation and/or other materials provided with the distribution. 
+//!     * Neither the name of the <ORGANIZATION> nor the names of its 
+//! contributors may be used to endorse or promote products derived 
+//! from this software without specific prior written permission. 
+//! 
+//! THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+//! AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 
+//! IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+//! ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 
+//! LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 
+//! CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 
+//! SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+//! INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 
+//! CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 
+//! ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 
+//! THE POSSIBILITY OF SUCH DAMAGE.
+//
+//*****************************************************************************
+//#include <stdio.h>
+#include "w5500.h"
+
+
+#define _W5500_SPI_VDM_OP_          0x00
+#define _W5500_SPI_FDM_OP_LEN1_     0x01
+#define _W5500_SPI_FDM_OP_LEN2_     0x02
+#define _W5500_SPI_FDM_OP_LEN4_     0x03
+
+////////////////////////////////////////////////////
+
+uint8_t  WIZCHIP_READ(uint32_t AddrSel)
+{
+   uint8_t ret;
+
+   WIZCHIP_CRITICAL_ENTER();
+   WIZCHIP.CS._select();
+
+#if( (_WIZCHIP_IO_MODE_ & _WIZCHIP_IO_MODE_SPI_))
+
+   #if  ( _WIZCHIP_IO_MODE_ == _WIZCHIP_IO_MODE_SPI_VDM_ )
+   	   AddrSel |= (_W5500_SPI_READ_ | _W5500_SPI_VDM_OP_);
+   #elif( _WIZCHIP_IO_MODE_ == _WIZCHIP_IO_MODE_SPI_FDM_ )
+   	   AddrSel |= (_W5500_SPI_READ_ | _W5500_SPI_FDM_OP_LEN1_);
+   #else
+      #error "Unsupported _WIZCHIP_IO_SPI_ in W5500 !!!"
+   #endif
+
+   WIZCHIP.IF.SPI._write_byte((AddrSel & 0x00FF0000) >> 16);
+   WIZCHIP.IF.SPI._write_byte((AddrSel & 0x0000FF00) >>  8);
+   WIZCHIP.IF.SPI._write_byte((AddrSel & 0x000000FF) >>  0);
+   ret = WIZCHIP.IF.SPI._read_byte();
+
+#elif ( (_WIZCHIP_IO_MODE_ & _WIZCHIP_IO_MODE_BUS_) )
+
+   #if  (_WIZCHIP_IO_MODE_ == _WIZCHIP_IO_MODE_BUS_DIR_)
+
+   #elif(_WIZCHIP_IO_MODE_ == _WIZCHIP_IO_MODE_BUS_INDIR_)
+
+   #else
+      #error "Unsupported _WIZCHIP_IO_MODE_BUS_ in W5500 !!!"
+   #endif
+#else
+   #error "Unknown _WIZCHIP_IO_MODE_ in W5000. !!!"   
+#endif
+
+   WIZCHIP.CS._deselect();
+   WIZCHIP_CRITICAL_EXIT();
+   return ret;
+}
+
+void     WIZCHIP_WRITE(uint32_t AddrSel, uint8_t wb )
+{
+    WIZCHIP_CRITICAL_ENTER();
+    WIZCHIP.CS._select();
+
+#if( (_WIZCHIP_IO_MODE_ & _WIZCHIP_IO_MODE_SPI_))
+
+   #if  ( _WIZCHIP_IO_MODE_ == _WIZCHIP_IO_MODE_SPI_VDM_ )
+   	   AddrSel |= (_W5500_SPI_WRITE_ | _W5500_SPI_VDM_OP_);
+   #elif( _WIZCHIP_IO_MODE_ == _WIZCHIP_IO_MODE_SPI_FDM_ )
+   	   AddrSel |= (_W5500_SPI_WRITE_ | _W5500_SPI_FDM_OP_LEN1_);
+   #else
+      #error "Unsupported _WIZCHIP_IO_SPI_ in W5500 !!!"
+   #endif
+
+   WIZCHIP.IF.SPI._write_byte((AddrSel & 0x00FF0000) >> 16);
+   WIZCHIP.IF.SPI._write_byte((AddrSel & 0x0000FF00) >>  8);
+   WIZCHIP.IF.SPI._write_byte((AddrSel & 0x000000FF) >>  0);
+   WIZCHIP.IF.SPI._write_byte(wb);
+
+#elif ( (_WIZCHIP_IO_MODE_ & _WIZCHIP_IO_MODE_BUS_) )
+
+   #if  (_WIZCHIP_IO_MODE_ == _WIZCHIP_IO_MODE_BUS_DIR_)
+
+   #elif(_WIZCHIP_IO_MODE_ == _WIZCHIP_IO_MODE_BUS_INDIR_)
+
+   #else
+      #error "Unsupported _WIZCHIP_IO_MODE_BUS_ in W5500 !!!"
+   #endif
+#else
+   #error "Unknown _WIZCHIP_IO_MODE_ in W5500. !!!"
+#endif
+
+   WIZCHIP.CS._deselect();
+   WIZCHIP_CRITICAL_EXIT();
+}
+         
+void     WIZCHIP_READ_BUF (uint32_t AddrSel, uint8_t* pBuf, uint16_t len)
+{
+   uint16_t i = 0;
+   uint16_t j = 0;
+   WIZCHIP_CRITICAL_ENTER();
+   WIZCHIP.CS._select();
+
+#if( (_WIZCHIP_IO_MODE_ & _WIZCHIP_IO_MODE_SPI_))
+
+   #if  ( _WIZCHIP_IO_MODE_ == _WIZCHIP_IO_MODE_SPI_VDM_ )
+      AddrSel |= (_W5500_SPI_READ_ | _W5500_SPI_VDM_OP_);
+      WIZCHIP.IF.SPI._write_byte((AddrSel & 0x00FF0000) >> 16);
+      WIZCHIP.IF.SPI._write_byte((AddrSel & 0x0000FF00) >>  8);
+      WIZCHIP.IF.SPI._write_byte((AddrSel & 0x000000FF) >>  0);
+      for(i = 0; i < len; i++,j)
+        pBuf[i] = WIZCHIP.IF.SPI._read_byte();
+   #elif( _WIZCHIP_IO_MODE_ == _WIZCHIP_IO_MODE_SPI_FDM_ )
+      AddrSel |= (_W5500_SPI_READ_ | _W5500_SPI_FDM_OP_LEN4_);
+      for(i = 0; i < len/4; i++, j)
+      {
+         WIZCHIP.IF.SPI._write_byte((AddrSel & 0x00FF0000) >> 16);
+         WIZCHIP.IF.SPI._write_byte((AddrSel & 0x0000FF00) >>  8);
+         WIZCHIP.IF.SPI._write_byte((AddrSel & 0x000000FF) >>  0);
+         pBuf[i*4]   = WIZCHIP.IF.SPI._read_byte();
+         pBuf[i*4+1] = WIZCHIP.IF.SPI._read_byte();
+         pBuf[i*4+2] = WIZCHIP.IF.SPI._read_byte();            
+         pBuf[i*4+3] = WIZCHIP.IF.SPI._read_byte();            
+         AddrSel = WIZCHIP_OFFSET_INC(AddrSel,4);
+      }
+      len %= 4;      // for the rest data
+      // M20131220 : remove for loop
+      i *= 4;        
+      if(len >= 2)
+      {
+         AddrSel -= 1;  // change _W5500_SPI_FDM_OP_LEN4_ to _W5500_SPI_FDM_OP_LEN2_
+
+       //for(j = 0; j < len/2 ; j++)
+         {
+            WIZCHIP.IF.SPI._write_byte((AddrSel & 0x00FF0000) >> 16);
+            WIZCHIP.IF.SPI._write_byte((AddrSel & 0x0000FF00) >>  8);
+            WIZCHIP.IF.SPI._write_byte((AddrSel & 0x000000FF) >>  0);
+            pBuf[i]   = WIZCHIP.IF.SPI._read_byte();
+            pBuf[i+1] = WIZCHIP.IF.SPI._read_byte();
+            i += 2;
+            AddrSel = WIZCHIP_OFFSET_INC(AddrSel,2);
+         }
+      }
+      len %= 2;
+      if(len)
+      {
+        AddrSel -= 1;  // change _W5500_SPI_FDM_OP_LEN2_ to _W5500_SPI_FDM_OP_LEN1_
+        WIZCHIP.IF.SPI._write_byte((AddrSel & 0x00FF0000) >> 16);
+        WIZCHIP.IF.SPI._write_byte((AddrSel & 0x0000FF00) >>  8);
+        WIZCHIP.IF.SPI._write_byte((AddrSel & 0x000000FF) >>  0);
+        pBuf[i]   = WIZCHIP.IF.SPI._read_byte();
+      }      
+   #else
+      #error "Unsupported _WIZCHIP_IO_MODE_SPI_ in W5500 !!!"
+   #endif
+
+#elif ( (_WIZCHIP_IO_MODE_ & _WIZCHIP_IO_MODE_BUS_) )
+
+   #if  (_WIZCHIP_IO_MODE_ == _WIZCHIP_IO_MODE_BUS_DIR_)
+
+   #elif(_WIZCHIP_IO_MODE_ == _WIZCHIP_IO_MODE_BUS_INDIR_)
+
+   #else
+      #error "Unsupported _WIZCHIP_IO_MODE_BUS_ in W5500 !!!"
+   #endif
+#else
+   #error "Unknown _WIZCHIP_IO_MODE_ in W5500. !!!!"
+#endif
+
+   WIZCHIP.CS._deselect();
+   WIZCHIP_CRITICAL_EXIT();
+}
+
+void     WIZCHIP_WRITE_BUF(uint32_t AddrSel, uint8_t* pBuf, uint16_t len)
+{
+   uint16_t i = 0;
+   uint16_t j = 0;
+   WIZCHIP_CRITICAL_ENTER();
+   WIZCHIP.CS._select();
+
+#if( (_WIZCHIP_IO_MODE_ & _WIZCHIP_IO_MODE_SPI_))
+
+   #if  ( _WIZCHIP_IO_MODE_ == _WIZCHIP_IO_MODE_SPI_VDM_ )
+      AddrSel |= (_W5500_SPI_WRITE_ | _W5500_SPI_VDM_OP_);
+      WIZCHIP.IF.SPI._write_byte((AddrSel & 0x00FF0000) >> 16);
+      WIZCHIP.IF.SPI._write_byte((AddrSel & 0x0000FF00) >>  8);
+      WIZCHIP.IF.SPI._write_byte((AddrSel & 0x000000FF) >>  0);
+      for(i = 0; i < len; i++,j)
+         WIZCHIP.IF.SPI._write_byte(pBuf[i]);
+   #elif( _WIZCHIP_IO_MODE_ == _WIZCHIP_IO_MODE_SPI_FDM_ )
+      AddrSel |= (_W5500_SPI_WRITE_ | _W5500_SPI_FDM_OP_LEN4_);
+      for(i = 0; i < len/4; i++, j)
+      {
+         WIZCHIP.IF.SPI._write_byte((AddrSel & 0x00FF0000) >> 16);
+         WIZCHIP.IF.SPI._write_byte((AddrSel & 0x0000FF00) >>  8);
+         WIZCHIP.IF.SPI._write_byte((AddrSel & 0x000000FF) >>  0);
+         WIZCHIP.IF.SPI._write_byte(pBuf[i*4]  );
+         WIZCHIP.IF.SPI._write_byte(pBuf[i*4+1]);
+         WIZCHIP.IF.SPI._write_byte(pBuf[i*4+2]);            
+         WIZCHIP.IF.SPI._write_byte(pBuf[i*4+3]);            
+         AddrSel = WIZCHIP_OFFSET_INC(AddrSel,4);
+      }
+      len %= 4;      // for the rest data
+      // M20131220 : Remove for loop
+      i *= 4;
+      if(len >= 2)
+      {
+         AddrSel -= 1;  // change _W5500_SPI_FDM_OP_LEN4_ to _W5500_SPI_FDM_OP_LEN2_
+
+       //for(j = 0; j < len/2 ; j++)
+         {
+            WIZCHIP.IF.SPI._write_byte((AddrSel & 0x00FF0000) >> 16);
+            WIZCHIP.IF.SPI._write_byte((AddrSel & 0x0000FF00) >>  8);
+            WIZCHIP.IF.SPI._write_byte((AddrSel & 0x000000FF) >>  0);
+            WIZCHIP.IF.SPI._write_byte(pBuf[i]  );
+            WIZCHIP.IF.SPI._write_byte(pBuf[i+1]);
+            i += 2;
+            AddrSel = WIZCHIP_OFFSET_INC(AddrSel, 2);
+         }
+         len %= 2;
+         if(len)
+         {
+            AddrSel -= 1;  // change _W5500_SPI_FDM_OP_LEN2_ to _W5500_SPI_FDM_OP_LEN1_
+            WIZCHIP.IF.SPI._write_byte((AddrSel & 0x00FF0000) >> 16);
+            WIZCHIP.IF.SPI._write_byte((AddrSel & 0x0000FF00) >>  8);
+            WIZCHIP.IF.SPI._write_byte((AddrSel & 0x000000FF) >>  0);
+            WIZCHIP.IF.SPI._write_byte(pBuf[i]);
+         }      
+      }
+   #else
+      #error "Unsupported _WIZCHIP_IO_SPI_ in W5500 !!!"
+   #endif
+
+#elif ( (_WIZCHIP_IO_MODE_ & _WIZCHIP_IO_MODE_BUS_) )
+
+   #if  (_WIZCHIP_IO_MODE_ == _WIZCHIP_IO_MODE_BUS_DIR_)
+
+   #elif(_WIZCHIP_IO_MODE_ == _WIZCHIP_IO_MODE_BUS_INDIR_)
+
+   #else
+      #error "Unsupported _WIZCHIP_IO_MODE_BUS_ in W5500 !!!"
+   #endif
+#else
+   #error "Unknown _WIZCHIP_IO_MODE_ in W5500. !!!!"
+#endif
+
+   WIZCHIP.CS._deselect();
+   WIZCHIP_CRITICAL_EXIT();
+}
+
+
+uint16_t getSn_TX_FSR(uint8_t sn)
+{
+   uint16_t val=0,val1=0;
+   do
+   {
+      val1 = WIZCHIP_READ(Sn_TX_FSR(sn));
+      val1 = (val1 << 8) + WIZCHIP_READ(WIZCHIP_OFFSET_INC(Sn_TX_FSR(sn),1));
+      if (val1 != 0)
+      {
+        val = WIZCHIP_READ(Sn_TX_FSR(sn));
+        val = (val << 8) + WIZCHIP_READ(WIZCHIP_OFFSET_INC(Sn_TX_FSR(sn),1));
+      }
+   }while (val != val1);
+   return val;
+}
+
+
+uint16_t getSn_RX_RSR(uint8_t sn)
+{
+   uint16_t val=0,val1=0;
+   do
+   {
+      val1 = WIZCHIP_READ(Sn_RX_RSR(sn));
+      val1 = (val1 << 8) + WIZCHIP_READ(WIZCHIP_OFFSET_INC(Sn_RX_RSR(sn),1));
+      if (val1 != 0)
+      {
+        val = WIZCHIP_READ(Sn_RX_RSR(sn));
+        val = (val << 8) + WIZCHIP_READ(WIZCHIP_OFFSET_INC(Sn_RX_RSR(sn),1));
+      }
+   }while (val != val1);
+   return val;
+}
+
+void wiz_send_data(uint8_t sn, uint8_t *wizdata, uint16_t len)
+{
+   uint16_t ptr = 0;
+   uint32_t addrsel = 0;
+   if(len == 0)  return;
+   ptr = getSn_TX_WR(sn);
+   //M20140501 : implict type casting -> explict type casting
+   //addrsel = (ptr << 8) + (WIZCHIP_TXBUF_BLOCK(sn) << 3);
+   addrsel = ((uint32_t)ptr << 8) + (WIZCHIP_TXBUF_BLOCK(sn) << 3);
+   //
+   WIZCHIP_WRITE_BUF(addrsel,wizdata, len);
+   
+   ptr += len;
+   setSn_TX_WR(sn,ptr);
+}
+
+void wiz_recv_data(uint8_t sn, uint8_t *wizdata, uint16_t len)
+{
+   uint16_t ptr = 0;
+   uint32_t addrsel = 0;
+   
+   if(len == 0) return;
+   ptr = getSn_RX_RD(sn);
+   //M20140501 : implict type casting -> explict type casting
+   //addrsel = ((ptr << 8) + (WIZCHIP_RXBUF_BLOCK(sn) << 3);
+   addrsel = ((uint32_t)ptr << 8) + (WIZCHIP_RXBUF_BLOCK(sn) << 3);
+   //
+   WIZCHIP_READ_BUF(addrsel, wizdata, len);
+   ptr += len;
+   
+   setSn_RX_RD(sn,ptr);
+}
+
+
+void wiz_recv_ignore(uint8_t sn, uint16_t len)
+{
+   uint16_t ptr = 0;
+   ptr = getSn_RX_RD(sn);
+   ptr += len;
+   setSn_RX_RD(sn,ptr);
+}
+
diff --git a/Src/Ethernet/W5500/w5500.h b/Src/Ethernet/W5500/w5500.h
new file mode 100644
index 0000000..5a581ce
--- /dev/null
+++ b/Src/Ethernet/W5500/w5500.h
@@ -0,0 +1,2054 @@
+//*****************************************************************************
+//
+//! \file w5500.h
+//! \brief W5500 HAL Header File.
+//! \version 1.0.0
+//! \date 2013/10/21
+//! \par  Revision history
+//!       <2013/10/21> 1st Release
+//! \author MidnightCow
+//! \copyright
+//!
+//! Copyright (c)  2013, WIZnet Co., LTD.
+//! All rights reserved.
+//! 
+//! Redistribution and use in source and binary forms, with or without 
+//! modification, are permitted provided that the following conditions 
+//! are met: 
+//! 
+//!     * Redistributions of source code must retain the above copyright 
+//! notice, this list of conditions and the following disclaimer. 
+//!     * Redistributions in binary form must reproduce the above copyright
+//! notice, this list of conditions and the following disclaimer in the
+//! documentation and/or other materials provided with the distribution. 
+//!     * Neither the name of the <ORGANIZATION> nor the names of its 
+//! contributors may be used to endorse or promote products derived 
+//! from this software without specific prior written permission. 
+//! 
+//! THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+//! AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 
+//! IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+//! ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 
+//! LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 
+//! CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 
+//! SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+//! INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 
+//! CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 
+//! ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 
+//! THE POSSIBILITY OF SUCH DAMAGE.
+//
+//*****************************************************************************
+
+#ifndef  _W5500_H_
+#define  _W5500_H_
+
+#include <stdint.h>
+#include "Ethernet/wizchip_conf.h"
+
+#define _W5500_IO_BASE_              0x00000000
+
+#define _W5500_SPI_READ_			   (0x00 << 2) //< SPI interface Read operation in Control Phase
+#define _W5500_SPI_WRITE_			   (0x01 << 2) //< SPI interface Write operation in Control Phase
+
+#define WIZCHIP_CREG_BLOCK          0x00 	//< Common register block
+#define WIZCHIP_SREG_BLOCK(N)       (1+4*N) //< Socket N register block
+#define WIZCHIP_TXBUF_BLOCK(N)      (2+4*N) //< Socket N Tx buffer address block
+#define WIZCHIP_RXBUF_BLOCK(N)      (3+4*N) //< Socket N Rx buffer address block
+
+#define WIZCHIP_OFFSET_INC(ADDR, N)    (ADDR + (N<<8)) //< Increase offset address
+
+
+///////////////////////////////////////
+// Definition For Legacy Chip Driver //
+///////////////////////////////////////
+#define IINCHIP_READ(ADDR)                WIZCHIP_READ(ADDR)               ///< The defined for legacy chip driver
+#define IINCHIP_WRITE(ADDR,VAL)           WIZCHIP_WRITE(ADDR,VAL)          ///< The defined for legacy chip driver
+#define IINCHIP_READ_BUF(ADDR,BUF,LEN)    WIZCHIP_READ_BUF(ADDR,BUF,LEN)   ///< The defined for legacy chip driver
+#define IINCHIP_WRITE_BUF(ADDR,BUF,LEN)   WIZCHIP_WRITE(ADDR,BUF,LEN)      ///< The defined for legacy chip driver
+
+//////////////////////////////
+//--------------------------  defgroup ---------------------------------
+/**
+ * @defgroup W5500 W5500
+ *
+ * @brief WHIZCHIP register defines and I/O functions of @b W5500.
+ *
+ * - @ref WIZCHIP_register : @ref Common_register_group and @ref Socket_register_group
+ * - @ref WIZCHIP_IO_Functions : @ref Basic_IO_function, @ref Common_register_access_function and @ref Socket_register_access_function
+ */
+ 
+ 
+/**
+ * @defgroup WIZCHIP_register WIZCHIP register
+ * @ingroup W5500
+ *
+ * @brief WHIZCHIP register defines register group of @b W5500.
+ *
+ * - @ref Common_register_group : Common register group
+ * - @ref Socket_register_group : \c SOCKET n register group
+ */
+
+
+/**
+ * @defgroup WIZCHIP_IO_Functions WIZCHIP I/O functions
+ * @ingroup W5500
+ *
+ * @brief This supports the basic I/O functions for @ref WIZCHIP_register.
+ *
+ * - <b> Basic I/O function </b> \n
+ *   WIZCHIP_READ(), WIZCHIP_WRITE(), WIZCHIP_READ_BUF(), WIZCHIP_WRITE_BUF() \n\n
+ *
+ * - @ref Common_register_group <b>access functions</b> \n
+ * 	-# @b Mode \n
+ *    getMR(), setMR()
+ * 	-# @b Interrupt \n
+ *    getIR(), setIR(), getIMR(), setIMR(), getSIR(), setSIR(), getSIMR(), setSIMR(), getINTLEVEL(), setINTLEVEL()
+ * 	-# <b> Network Information </b> \n
+ *    getSHAR(), setSHAR(), getGAR(), setGAR(), getSUBR(), setSUBR(), getSIPR(), setSIPR()
+ * 	-# @b Retransmission \n
+ *    getRCR(), setRCR(), getRTR(), setRTR()
+ * 	-# @b PPPoE \n
+ *    getPTIMER(), setPTIMER(), getPMAGIC(), getPMAGIC(), getPSID(), setPSID(), getPHAR(), setPHAR(), getPMRU(), setPMRU()
+ * 	-# <b> ICMP packet </b>\n
+ *    getUIPR(), getUPORTR()
+ * 	-# @b etc. \n
+ *    getPHYCFGR(), setPHYCFGR(), getVERSIONR() \n\n
+ *
+ * - \ref Socket_register_group <b>access functions</b> \n
+ *   -# <b> SOCKET control</b> \n
+ *      getSn_MR(), setSn_MR(), getSn_CR(), setSn_CR(), getSn_IMR(), setSn_IMR(), getSn_IR(), setSn_IR()
+ *   -# <b> SOCKET information</b> \n
+ *      getSn_SR(), getSn_DHAR(), setSn_DHAR(), getSn_PORT(), setSn_PORT(), getSn_DIPR(), setSn_DIPR(), getSn_DPORT(), setSn_DPORT()
+ *      getSn_MSSR(), setSn_MSSR()
+ *   -# <b> SOCKET communication </b> \n
+ *      getSn_RXBUF_SIZE(), setSn_RXBUF_SIZE(), getSn_TXBUF_SIZE(), setSn_TXBUF_SIZE() \n
+ *      getSn_TX_RD(), getSn_TX_WR(), setSn_TX_WR() \n
+ *      getSn_RX_RD(), setSn_RX_RD(), getSn_RX_WR() \n
+ *      getSn_TX_FSR(), getSn_RX_RSR(), getSn_KPALVTR(), setSn_KPALVTR()
+ *   -# <b> IP header field </b> \n
+ *      getSn_FRAG(), setSn_FRAG(),  getSn_TOS(), setSn_TOS() \n
+ *      getSn_TTL(), setSn_TTL()
+ */
+
+
+
+/**
+ * @defgroup Common_register_group Common register
+ * @ingroup WIZCHIP_register
+ *
+ * @brief Common register group\n
+ * It set the basic for the networking\n
+ * It set the configuration such as interrupt, network information, ICMP, etc.
+ * @details
+ * @sa MR : Mode register.
+ * @sa GAR, SUBR, SHAR, SIPR
+ * @sa INTLEVEL, IR, IMR, SIR, SIMR : Interrupt.
+ * @sa RTR, RCR : Data retransmission.
+ * @sa PTIMER, PMAGIC, PHAR, PSID, PMRU : PPPoE.
+ * @sa UIPR, UPORTR : ICMP message.
+ * @sa PHYCFGR, VERSIONR : etc.
+ */
+ 
+  
+ 
+/**
+ * @defgroup Socket_register_group Socket register
+ * @ingroup WIZCHIP_register
+ *
+ * @brief Socket register group.\n
+ * Socket register configures and control SOCKETn which is necessary to data communication.
+ * @details
+ * @sa Sn_MR, Sn_CR, Sn_IR, Sn_IMR : SOCKETn Control
+ * @sa Sn_SR, Sn_PORT, Sn_DHAR, Sn_DIPR, Sn_DPORT : SOCKETn Information
+ * @sa Sn_MSSR, Sn_TOS, Sn_TTL, Sn_KPALVTR, Sn_FRAG : Internet protocol.
+ * @sa Sn_RXBUF_SIZE, Sn_TXBUF_SIZE, Sn_TX_FSR, Sn_TX_RD, Sn_TX_WR, Sn_RX_RSR, Sn_RX_RD, Sn_RX_WR : Data communication
+ */
+ 
+ 
+ 
+ /**
+ * @defgroup Basic_IO_function Basic I/O function
+ * @ingroup WIZCHIP_IO_Functions
+ * @brief These are basic input/output functions to read values from register or write values to register.
+ */
+
+/**
+ * @defgroup Common_register_access_function Common register access functions
+ * @ingroup WIZCHIP_IO_Functions
+ * @brief These are functions to access <b>common registers</b>.
+ */
+
+/**
+ * @defgroup Socket_register_access_function Socket register access functions
+ * @ingroup WIZCHIP_IO_Functions
+ * @brief These are functions to access <b>socket registers</b>.
+ */
+ 
+//------------------------------- defgroup end --------------------------------------------
+//----------------------------- W5500 Common Registers IOMAP -----------------------------
+/**
+ * @ingroup Common_register_group
+ * @brief Mode Register address(R/W)\n
+ * @ref MR is used for S/W reset, ping block mode, PPPoE mode and etc.
+ * @details Each bit of @ref MR defined as follows.
+ * <table>
+ * 		<tr>  <td>7</td> <td>6</td> <td>5</td> <td>4</td> <td>3</td> <td>2</td> <td>1</td> <td>0</td>   </tr>
+ * 		<tr>  <td>RST</td> <td>Reserved</td> <td>WOL</td> <td>PB</td> <td>PPPoE</td> <td>Reserved</td> <td>FARP</td> <td>Reserved</td> </tr>
+ * </table>
+ * - \ref MR_RST		 	: Reset
+ * - \ref MR_WOL       		: Wake on LAN
+ * - \ref MR_PB         	: Ping block
+ * - \ref MR_PPPOE      	: PPPoE mode
+ * - \ref MR_FARP			: Force ARP mode
+ */
+#define MR                 (_W5500_IO_BASE_ + (0x0000 << 8) + (WIZCHIP_CREG_BLOCK << 3))
+
+/**
+ * @ingroup Common_register_group
+ * @brief Gateway IP Register address(R/W)
+ * @details @ref GAR configures the default gateway address.
+ */
+#define GAR                (_W5500_IO_BASE_ + (0x0001 << 8) + (WIZCHIP_CREG_BLOCK << 3))
+
+/**
+ * @ingroup Common_register_group
+ * @brief Subnet mask Register address(R/W)
+ * @details @ref SUBR configures the subnet mask address.
+ */
+#define SUBR               (_W5500_IO_BASE_ + (0x0005 << 8) + (WIZCHIP_CREG_BLOCK << 3))
+
+/**
+ * @ingroup Common_register_group
+ * @brief Source MAC Register address(R/W)
+ * @details @ref SHAR configures the source hardware address.
+ */
+#define SHAR               (_W5500_IO_BASE_ + (0x0009 << 8) + (WIZCHIP_CREG_BLOCK << 3))
+
+/**
+ * @ingroup Common_register_group
+ * @brief Source IP Register address(R/W)
+ * @details @ref SIPR configures the source IP address.
+ */
+#define SIPR               (_W5500_IO_BASE_ + (0x000F << 8) + (WIZCHIP_CREG_BLOCK << 3))
+
+/**
+ * @ingroup Common_register_group
+ * @brief Set Interrupt low level timer register address(R/W)
+ * @details @ref INTLEVEL configures the Interrupt Assert Time.
+ */
+#define INTLEVEL           (_W5500_IO_BASE_ + (0x0013 << 8) + (WIZCHIP_CREG_BLOCK << 3))
+
+/**
+ * @ingroup Common_register_group
+ * @brief Interrupt Register(R/W)
+ * @details @ref IR indicates the interrupt status. Each bit of @ref IR will be still until the bit will be written to by the host.
+ * If @ref IR is not equal to x00 INTn PIN is asserted to low until it is x00\n\n
+ * Each bit of @ref IR defined as follows.
+ * <table>
+ * 		<tr>  <td>7</td> <td>6</td> <td>5</td> <td>4</td> <td>3</td> <td>2</td> <td>1</td> <td>0</td>   </tr>
+ * 		<tr>  <td>CONFLICT</td> <td>UNREACH</td> <td>PPPoE</td> <td>MP</td> <td>Reserved</td> <td>Reserved</td> <td>Reserved</td> <td>Reserved</td> </tr>
+ * </table>
+ * - \ref IR_CONFLICT : IP conflict
+ * - \ref IR_UNREACH  : Destination unreachable
+ * - \ref IR_PPPoE	  : PPPoE connection close
+ * - \ref IR_MP		  : Magic packet
+ */
+#define IR                 (_W5500_IO_BASE_ + (0x0015 << 8) + (WIZCHIP_CREG_BLOCK << 3))
+
+/**
+ * @ingroup Common_register_group
+ * @brief Interrupt mask register(R/W)
+ * @details @ref IMR is used to mask interrupts. Each bit of @ref IMR corresponds to each bit of @ref IR.
+ * When a bit of @ref IMR is and the corresponding bit of @ref IR is  an interrupt will be issued. In other words,
+ * if a bit of @ref IMR is  an interrupt will not be issued even if the corresponding bit of @ref IR is \n\n
+ * Each bit of @ref IMR defined as the following.
+ * <table>
+ * 		<tr>  <td>7</td> <td>6</td> <td>5</td> <td>4</td> <td>3</td> <td>2</td> <td>1</td> <td>0</td>   </tr>
+ * 		<tr>  <td>IM_IR7</td> <td>IM_IR6</td> <td>IM_IR5</td> <td>IM_IR4</td> <td>Reserved</td> <td>Reserved</td> <td>Reserved</td> <td>Reserved</td> </tr>
+ * </table>
+ * - \ref IM_IR7 : IP Conflict Interrupt Mask
+ * - \ref IM_IR6 : Destination unreachable Interrupt Mask
+ * - \ref IM_IR5 : PPPoE Close Interrupt Mask
+ * - \ref IM_IR4 : Magic Packet Interrupt Mask
+ */
+#define IMR                (_W5500_IO_BASE_ + (0x0016 << 8) + (WIZCHIP_CREG_BLOCK << 3))
+
+/**
+ * @ingroup Common_register_group
+ * @brief Socket Interrupt Register(R/W)
+ * @details @ref SIR indicates the interrupt status of Socket.\n
+ * Each bit of @ref SIR be still until @ref Sn_IR is cleared by the host.\n
+ * If @ref Sn_IR is not equal to x00 the n-th bit of @ref SIR is and INTn PIN is asserted until @ref SIR is x00 */
+#define SIR                (_W5500_IO_BASE_ + (0x0017 << 8) + (WIZCHIP_CREG_BLOCK << 3))
+
+/**
+ * @ingroup Common_register_group
+ * @brief Socket Interrupt Mask Register(R/W)
+ * @details Each bit of @ref SIMR corresponds to each bit of @ref SIR.
+ * When a bit of @ref SIMR is and the corresponding bit of @ref SIR is  Interrupt will be issued.
+ * In other words, if a bit of @ref SIMR is  an interrupt will be not issued even if the corresponding bit of @ref SIR is 
+ */
+#define SIMR               (_W5500_IO_BASE_ + (0x0018 << 8) + (WIZCHIP_CREG_BLOCK << 3))
+
+/**
+ * @ingroup Common_register_group
+ * @brief Timeout register address( 1 is 100us )(R/W)
+ * @details @ref RTR configures the retransmission timeout period. The unit of timeout period is 100us and the default of @ref RTR is x07D0or 000
+ * And so the default timeout period is 200ms(100us X 2000). During the time configured by @ref RTR, W5500 waits for the peer response
+ * to the packet that is transmitted by \ref Sn_CR (CONNECT, DISCON, CLOSE, SEND, SEND_MAC, SEND_KEEP command).
+ * If the peer does not respond within the @ref RTR time, W5500 retransmits the packet or issues timeout.
+ */
+#define RTR                (_W5500_IO_BASE_ + (0x0019 << 8) + (WIZCHIP_CREG_BLOCK << 3))
+
+/**
+ * @ingroup Common_register_group
+ * @brief Retry count register(R/W)
+ * @details @ref RCR configures the number of time of retransmission.
+ * When retransmission occurs as many as ref RCR+1 Timeout interrupt is issued (@ref Sn_IR[TIMEOUT] = .
+ */
+#define RCR                (_W5500_IO_BASE_ + (0x001B << 8) + (WIZCHIP_CREG_BLOCK << 3))
+
+/**
+ * @ingroup Common_register_group
+ * @brief PPP LCP Request Timer register  in PPPoE mode(R/W)
+ * @details @ref PTIMER configures the time for sending LCP echo request. The unit of time is 25ms.
+ */
+#define PTIMER             (_W5500_IO_BASE_ + (0x001C << 8) + (WIZCHIP_CREG_BLOCK << 3))
+
+/**
+ * @ingroup Common_register_group
+ * @brief PPP LCP Magic number register  in PPPoE mode(R/W)
+ * @details @ref PMAGIC configures the 4bytes magic number to be used in LCP negotiation.
+ */
+#define PMAGIC             (_W5500_IO_BASE_ + (0x001D << 8) + (WIZCHIP_CREG_BLOCK << 3))
+
+/**
+ * @ingroup Common_register_group
+ * @brief PPP Destination MAC Register address(R/W)
+ * @details @ref PHAR configures the PPPoE server hardware address that is acquired during PPPoE connection process.
+ */
+#define PHAR                (_W5500_IO_BASE_ + (0x001E << 8) + (WIZCHIP_CREG_BLOCK << 3))
+
+/**
+ * @ingroup Common_register_group
+ * @brief PPP Session Identification Register(R/W)
+ * @details @ref PSID configures the PPPoE sever session ID acquired during PPPoE connection process.
+ */
+#define PSID               (_W5500_IO_BASE_ + (0x0024 << 8) + (WIZCHIP_CREG_BLOCK << 3))
+
+/**
+ * @ingroup Common_register_group
+ * @brief PPP Maximum Segment Size(MSS) register(R/W)
+ * @details @ref PMRU configures the maximum receive unit of PPPoE.
+ */
+#define PMRU               (_W5500_IO_BASE_ + (0x0026 << 8) + (WIZCHIP_CREG_BLOCK << 3))
+
+/**
+ * @ingroup Common_register_group
+ * @brief Unreachable IP register address in UDP mode(R)
+ * @details W5500 receives an ICMP packet(Destination port unreachable) when data is sent to a port number
+ * which socket is not open and @ref UNREACH bit of @ref IR becomes and @ref UIPR & @ref UPORTR indicates
+ * the destination IP address & port number respectively.
+ */
+#define UIPR               (_W5500_IO_BASE_ + (0x0028 << 8) + (WIZCHIP_CREG_BLOCK << 3))
+
+/**
+ * @ingroup Common_register_group
+ * @brief Unreachable Port register address in UDP mode(R)
+ * @details W5500 receives an ICMP packet(Destination port unreachable) when data is sent to a port number
+ * which socket is not open and @ref UNREACH bit of @ref IR becomes and @ref UIPR & @ref UPORTR
+ * indicates the destination IP address & port number respectively.
+ */
+#define UPORTR              (_W5500_IO_BASE_ + (0x002C << 8) + (WIZCHIP_CREG_BLOCK << 3))
+
+/**
+ * @ingroup Common_register_group
+ * @brief PHY Status Register(R/W)
+ * @details @ref PHYCFGR configures PHY operation mode and resets PHY. In addition, @ref PHYCFGR indicates the status of PHY such as duplex, Speed, Link.
+ */
+#define PHYCFGR            (_W5500_IO_BASE_ + (0x002E << 8) + (WIZCHIP_CREG_BLOCK << 3))
+
+// Reserved			         (_W5500_IO_BASE_ + (0x002F << 8) + (WIZCHIP_CREG_BLOCK << 3))
+// Reserved			         (_W5500_IO_BASE_ + (0x0030 << 8) + (WIZCHIP_CREG_BLOCK << 3))
+// Reserved			         (_W5500_IO_BASE_ + (0x0031 << 8) + (WIZCHIP_CREG_BLOCK << 3))
+// Reserved			         (_W5500_IO_BASE_ + (0x0032 << 8) + (WIZCHIP_CREG_BLOCK << 3))
+// Reserved			         (_W5500_IO_BASE_ + (0x0033 << 8) + (WIZCHIP_CREG_BLOCK << 3))
+// Reserved			         (_W5500_IO_BASE_ + (0x0034 << 8) + (WIZCHIP_CREG_BLOCK << 3))
+// Reserved			         (_W5500_IO_BASE_ + (0x0035 << 8) + (WIZCHIP_CREG_BLOCK << 3))
+// Reserved			         (_W5500_IO_BASE_ + (0x0036 << 8) + (WIZCHIP_CREG_BLOCK << 3))
+// Reserved			         (_W5500_IO_BASE_ + (0x0037 << 8) + (WIZCHIP_CREG_BLOCK << 3))
+// Reserved			         (_W5500_IO_BASE_ + (0x0038 << 8) + (WIZCHIP_CREG_BLOCK << 3))
+
+/**
+ * @ingroup Common_register_group
+ * @brief chip version register address(R)
+ * @details @ref VERSIONR always indicates the W5500 version as @b 0x04.
+ */
+#define VERSIONR           (_W5500_IO_BASE_ + (0x0039 << 8) + (WIZCHIP_CREG_BLOCK << 3))
+
+
+//----------------------------- W5500 Socket Registers IOMAP -----------------------------
+/**
+ * @ingroup Socket_register_group
+ * @brief socket Mode register(R/W)
+ * @details @ref Sn_MR configures the option or protocol type of Socket n.\n\n
+ * Each bit of @ref Sn_MR defined as the following.
+ * <table>
+ * 		<tr>  <td>7</td> <td>6</td> <td>5</td> <td>4</td> <td>3</td> <td>2</td> <td>1</td> <td>0</td>   </tr>
+ * 		<tr>  <td>MULTI/MFEN</td> <td>BCASTB</td> <td>ND/MC/MMB</td> <td>UCASTB/MIP6B</td> <td>Protocol[3]</td> <td>Protocol[2]</td> <td>Protocol[1]</td> <td>Protocol[0]</td> </tr>
+ * </table>
+ * - @ref Sn_MR_MULTI	: Support UDP Multicasting
+ * - @ref Sn_MR_BCASTB	: Broadcast block <b>in UDP Multicasting</b>
+ * - @ref Sn_MR_ND		: No Delayed Ack(TCP) flag
+ * - @ref Sn_MR_MC   	: IGMP version used <b>in UDP mulitcasting</b>
+ * - @ref Sn_MR_MMB    	: Multicast Blocking <b>in @ref Sn_MR_MACRAW mode</b>
+ * - @ref Sn_MR_UCASTB	: Unicast Block <b>in UDP Multicating</b>
+ * - @ref Sn_MR_MIP6B   : IPv6 packet Blocking <b>in @ref Sn_MR_MACRAW mode</b>
+ * - <b>Protocol</b>
+ * <table>
+ * 		<tr>   <td><b>Protocol[3]</b></td> <td><b>Protocol[2]</b></td> <td><b>Protocol[1]</b></td> <td><b>Protocol[0]</b></td> <td>@b Meaning</td>   </tr>
+ * 		<tr>   <td>0</td> <td>0</td> <td>0</td> <td>0</td> <td>Closed</td>   </tr>
+ * 		<tr>   <td>0</td> <td>0</td> <td>0</td> <td>1</td> <td>TCP</td>   </tr>
+ * 		<tr>   <td>0</td> <td>0</td> <td>1</td> <td>0</td> <td>UDP</td>   </tr>
+ * 		<tr>   <td>0</td> <td>1</td> <td>0</td> <td>0</td> <td>MACRAW</td>   </tr>
+ * </table>
+ *	- @ref Sn_MR_MACRAW	: MAC LAYER RAW SOCK \n
+ *  - @ref Sn_MR_UDP		: UDP
+ *  - @ref Sn_MR_TCP		: TCP
+ *  - @ref Sn_MR_CLOSE	: Unused socket
+ *  @note MACRAW mode should be only used in Socket 0.
+ */
+#define Sn_MR(N)           (_W5500_IO_BASE_ + (0x0000 << 8) + (WIZCHIP_SREG_BLOCK(N) << 3))
+
+/**
+ * @ingroup Socket_register_group
+ * @brief Socket command register(R/W)
+ * @details This is used to set the command for Socket n such as OPEN, CLOSE, CONNECT, LISTEN, SEND, and RECEIVE.\n
+ * After W5500 accepts the command, the @ref Sn_CR register is automatically cleared to 0x00.
+ * Even though @ref Sn_CR is cleared to 0x00, the command is still being processed.\n
+ * To check whether the command is completed or not, please check the @ref Sn_IR or @ref Sn_SR.
+ * - @ref Sn_CR_OPEN 		: Initialize or open socket.
+ * - @ref Sn_CR_LISTEN 		: Wait connection request in TCP mode(<b>Server mode</b>)
+ * - @ref Sn_CR_CONNECT 	: Send connection request in TCP mode(<b>Client mode</b>)
+ * - @ref Sn_CR_DISCON 		: Send closing request in TCP mode.
+ * - @ref Sn_CR_CLOSE   	: Close socket.
+ * - @ref Sn_CR_SEND    	: Update TX buffer pointer and send data.
+ * - @ref Sn_CR_SEND_MAC	: Send data with MAC address, so without ARP process.
+ * - @ref Sn_CR_SEND_KEEP 	: Send keep alive message.
+ * - @ref Sn_CR_RECV		: Update RX buffer pointer and receive data.
+ */
+#define Sn_CR(N)           (_W5500_IO_BASE_ + (0x0001 << 8) + (WIZCHIP_SREG_BLOCK(N) << 3))
+
+/**
+ * @ingroup Socket_register_group
+ * @brief Socket interrupt register(R)
+ * @details @ref Sn_IR indicates the status of Socket Interrupt such as establishment, termination, receiving data, timeout).\n
+ * When an interrupt occurs and the corresponding bit of @ref Sn_IMR is  the corresponding bit of @ref Sn_IR becomes \n
+ * In order to clear the @ref Sn_IR bit, the host should write the bit to \n
+ * <table>
+ * 		<tr>  <td>7</td> <td>6</td> <td>5</td> <td>4</td> <td>3</td> <td>2</td> <td>1</td> <td>0</td>   </tr>
+ * 		<tr>  <td>Reserved</td> <td>Reserved</td> <td>Reserved</td> <td>SEND_OK</td> <td>TIMEOUT</td> <td>RECV</td> <td>DISCON</td> <td>CON</td> </tr>
+ * </table>
+ * - \ref Sn_IR_SENDOK : <b>SEND_OK Interrupt</b>
+ * - \ref Sn_IR_TIMEOUT : <b>TIMEOUT Interrupt</b>
+ * - \ref Sn_IR_RECV : <b>RECV Interrupt</b>
+ * - \ref Sn_IR_DISCON : <b>DISCON Interrupt</b>
+ * - \ref Sn_IR_CON : <b>CON Interrupt</b>
+ */
+#define Sn_IR(N)           (_W5500_IO_BASE_ + (0x0002 << 8) + (WIZCHIP_SREG_BLOCK(N) << 3))
+
+/**
+ * @ingroup Socket_register_group
+ * @brief Socket status register(R)
+ * @details @ref Sn_SR indicates the status of Socket n.\n
+ * The status of Socket n is changed by @ref Sn_CR or some special control packet as SYN, FIN packet in TCP.
+ * @par Normal status
+ * - @ref SOCK_CLOSED 		: Closed
+ * - @ref SOCK_INIT   		: Initiate state
+ * - @ref SOCK_LISTEN    	: Listen state
+ * - @ref SOCK_ESTABLISHED 	: Success to connect
+ * - @ref SOCK_CLOSE_WAIT   : Closing state
+ * - @ref SOCK_UDP   		: UDP socket
+ * - @ref SOCK_MACRAW  		: MAC raw mode socket
+ *@par Temporary status during changing the status of Socket n.
+ * - @ref SOCK_SYNSENT   	: This indicates Socket n sent the connect-request packet (SYN packet) to a peer.
+ * - @ref SOCK_SYNRECV    	: It indicates Socket n successfully received the connect-request packet (SYN packet) from a peer.
+ * - @ref SOCK_FIN_WAIT		: Connection state
+ * - @ref SOCK_CLOSING		: Closing state
+ * - @ref SOCK_TIME_WAIT	: Closing state
+ * - @ref SOCK_LAST_ACK 	: Closing state
+ */
+#define Sn_SR(N)           (_W5500_IO_BASE_ + (0x0003 << 8) + (WIZCHIP_SREG_BLOCK(N) << 3))
+
+/**
+ * @ingroup Socket_register_group
+ * @brief source port register(R/W)
+ * @details @ref Sn_PORT configures the source port number of Socket n.
+ * It is valid when Socket n is used in TCP/UPD mode. It should be set before OPEN command is ordered.
+ */
+#define Sn_PORT(N)         (_W5500_IO_BASE_ + (0x0004 << 8) + (WIZCHIP_SREG_BLOCK(N) << 3))
+
+/**
+ * @ingroup Socket_register_group
+ * @brief Peer MAC register address(R/W)
+ * @details @ref Sn_DHAR configures the destination hardware address of Socket n when using SEND_MAC command in UDP mode or
+ * it indicates that it is acquired in ARP-process by CONNECT/SEND command.
+ */
+#define Sn_DHAR(N)         (_W5500_IO_BASE_ + (0x0006 << 8) + (WIZCHIP_SREG_BLOCK(N) << 3))
+
+/**
+ * @ingroup Socket_register_group
+ * @brief Peer IP register address(R/W)
+ * @details @ref Sn_DIPR configures or indicates the destination IP address of Socket n. It is valid when Socket n is used in TCP/UDP mode.
+ * In TCP client mode, it configures an IP address of 锟絋CP serverbefore CONNECT command.
+ * In TCP server mode, it indicates an IP address of 锟絋CP clientafter successfully establishing connection.
+ * In UDP mode, it configures an IP address of peer to be received the UDP packet by SEND or SEND_MAC command.
+ */
+#define Sn_DIPR(N)         (_W5500_IO_BASE_ + (0x000C << 8) + (WIZCHIP_SREG_BLOCK(N) << 3))
+
+/**
+ * @ingroup Socket_register_group
+ * @brief Peer port register address(R/W)
+ * @details @ref Sn_DPORT configures or indicates the destination port number of Socket n. It is valid when Socket n is used in TCP/UDP mode.
+ * In 锟絋CP clientmode, it configures the listen port number of 锟絋CP serverbefore CONNECT command.
+ * In 锟絋CP Servermode, it indicates the port number of TCP client after successfully establishing connection.
+ * In UDP mode, it configures the port number of peer to be transmitted the UDP packet by SEND/SEND_MAC command.
+ */
+#define Sn_DPORT(N)        (_W5500_IO_BASE_ + (0x0010 << 8) + (WIZCHIP_SREG_BLOCK(N) << 3))
+
+/**
+ * @ingroup Socket_register_group
+ * @brief Maximum Segment Size(Sn_MSSR0) register address(R/W)
+ * @details @ref Sn_MSSR configures or indicates the MTU(Maximum Transfer Unit) of Socket n.
+ */
+#define Sn_MSSR(N)         (_W5500_IO_BASE_ + (0x0012 << 8) + (WIZCHIP_SREG_BLOCK(N) << 3))
+
+// Reserved			         (_W5500_IO_BASE_ + (0x0014 << 8) + (WIZCHIP_SREG_BLOCK(N) << 3))
+
+/**
+ * @ingroup Socket_register_group
+ * @brief IP Type of Service(TOS) Register(R/W)
+ * @details @ref Sn_TOS configures the TOS(Type Of Service field in IP Header) of Socket n.
+ * It is set before OPEN command.
+ */
+#define Sn_TOS(N)          (_W5500_IO_BASE_ + (0x0015 << 8) + (WIZCHIP_SREG_BLOCK(N) << 3))
+/**
+ * @ingroup Socket_register_group
+ * @brief IP Time to live(TTL) Register(R/W)
+ * @details @ref Sn_TTL configures the TTL(Time To Live field in IP header) of Socket n.
+ * It is set before OPEN command.
+ */
+#define Sn_TTL(N)          (_W5500_IO_BASE_ + (0x0016 << 8) + (WIZCHIP_SREG_BLOCK(N) << 3))
+// Reserved			         (_W5500_IO_BASE_ + (0x0017 << 8) + (WIZCHIP_SREG_BLOCK(N) << 3))
+// Reserved			         (_W5500_IO_BASE_ + (0x0018 << 8) + (WIZCHIP_SREG_BLOCK(N) << 3)) 
+// Reserved			         (_W5500_IO_BASE_ + (0x0019 << 8) + (WIZCHIP_SREG_BLOCK(N) << 3))
+// Reserved			         (_W5500_IO_BASE_ + (0x001A << 8) + (WIZCHIP_SREG_BLOCK(N) << 3))
+// Reserved			         (_W5500_IO_BASE_ + (0x001B << 8) + (WIZCHIP_SREG_BLOCK(N) << 3))
+// Reserved			         (_W5500_IO_BASE_ + (0x001C << 8) + (WIZCHIP_SREG_BLOCK(N) << 3))
+// Reserved			         (_W5500_IO_BASE_ + (0x001D << 8) + (WIZCHIP_SREG_BLOCK(N) << 3))
+
+/**
+ * @ingroup Socket_register_group
+ * @brief Receive memory size register(R/W)
+ * @details @ref Sn_RXBUF_SIZE configures the RX buffer block size of Socket n.
+ * Socket n RX Buffer Block size can be configured with 1,2,4,8, and 16 Kbytes.
+ * If a different size is configured, the data cannot be normally received from a peer.
+ * Although Socket n RX Buffer Block size is initially configured to 2Kbytes,
+ * user can re-configure its size using @ref Sn_RXBUF_SIZE. The total sum of @ref Sn_RXBUF_SIZE can not be exceed 16Kbytes.
+ * When exceeded, the data reception error is occurred.
+ */
+#define Sn_RXBUF_SIZE(N)   (_W5500_IO_BASE_ + (0x001E << 8) + (WIZCHIP_SREG_BLOCK(N) << 3))
+
+/**
+ * @ingroup Socket_register_group
+ * @brief Transmit memory size register(R/W)
+ * @details @ref Sn_TXBUF_SIZE configures the TX buffer block size of Socket n. Socket n TX Buffer Block size can be configured with 1,2,4,8, and 16 Kbytes.
+ * If a different size is configured, the data can锟絫 be normally transmitted to a peer.
+ * Although Socket n TX Buffer Block size is initially configured to 2Kbytes,
+ * user can be re-configure its size using @ref Sn_TXBUF_SIZE. The total sum of @ref Sn_TXBUF_SIZE can not be exceed 16Kbytes.
+ * When exceeded, the data transmission error is occurred.
+ */
+#define Sn_TXBUF_SIZE(N)   (_W5500_IO_BASE_ + (0x001F << 8) + (WIZCHIP_SREG_BLOCK(N) << 3))
+
+/**
+ * @ingroup Socket_register_group
+ * @brief Transmit free memory size register(R)
+ * @details @ref Sn_TX_FSR indicates the free size of Socket n TX Buffer Block. It is initialized to the configured size by @ref Sn_TXBUF_SIZE.
+ * Data bigger than @ref Sn_TX_FSR should not be saved in the Socket n TX Buffer because the bigger data overwrites the previous saved data not yet sent.
+ * Therefore, check before saving the data to the Socket n TX Buffer, and if data is equal or smaller than its checked size,
+ * transmit the data with SEND/SEND_MAC command after saving the data in Socket n TX buffer. But, if data is bigger than its checked size,
+ * transmit the data after dividing into the checked size and saving in the Socket n TX buffer.
+ */
+#define Sn_TX_FSR(N)       (_W5500_IO_BASE_ + (0x0020 << 8) + (WIZCHIP_SREG_BLOCK(N) << 3))
+
+/**
+ * @ingroup Socket_register_group
+ * @brief Transmit memory read pointer register address(R)
+ * @details @ref Sn_TX_RD is initialized by OPEN command. However, if Sn_MR(P[3:0]) is TCP mode(001, it is re-initialized while connecting with TCP.
+ * After its initialization, it is auto-increased by SEND command.
+ * SEND command transmits the saved data from the current @ref Sn_TX_RD to the @ref Sn_TX_WR in the Socket n TX Buffer.
+ * After transmitting the saved data, the SEND command increases the @ref Sn_TX_RD as same as the @ref Sn_TX_WR.
+ * If its increment value exceeds the maximum value 0xFFFF, (greater than 0x10000 and the carry bit occurs),
+ * then the carry bit is ignored and will automatically update with the lower 16bits value.
+ */
+#define Sn_TX_RD(N)        (_W5500_IO_BASE_ + (0x0022 << 8) + (WIZCHIP_SREG_BLOCK(N) << 3))
+
+/**
+ * @ingroup Socket_register_group
+ * @brief Transmit memory write pointer register address(R/W)
+ * @details @ref Sn_TX_WR is initialized by OPEN command. However, if Sn_MR(P[3:0]) is TCP mode(001, it is re-initialized while connecting with TCP.\n
+ * It should be read or be updated like as follows.\n
+ * 1. Read the starting address for saving the transmitting data.\n
+ * 2. Save the transmitting data from the starting address of Socket n TX buffer.\n
+ * 3. After saving the transmitting data, update @ref Sn_TX_WR to the increased value as many as transmitting data size.
+ * If the increment value exceeds the maximum value 0xFFFF(greater than 0x10000 and the carry bit occurs),
+ * then the carry bit is ignored and will automatically update with the lower 16bits value.\n
+ * 4. Transmit the saved data in Socket n TX Buffer by using SEND/SEND command
+ */
+#define Sn_TX_WR(N)        (_W5500_IO_BASE_ + (0x0024 << 8) + (WIZCHIP_SREG_BLOCK(N) << 3))
+
+/**
+ * @ingroup Socket_register_group
+ * @brief Received data size register(R)
+ * @details @ref Sn_RX_RSR indicates the data size received and saved in Socket n RX Buffer.
+ * @ref Sn_RX_RSR does not exceed the @ref Sn_RXBUF_SIZE and is calculated as the difference between
+ * 锟絊ocket n RX Write Pointer (@ref Sn_RX_WR)and 锟絊ocket n RX Read Pointer (@ref Sn_RX_RD)
+ */
+#define Sn_RX_RSR(N)       (_W5500_IO_BASE_ + (0x0026 << 8) + (WIZCHIP_SREG_BLOCK(N) << 3))
+
+/**
+ * @ingroup Socket_register_group
+ * @brief Read point of Receive memory(R/W)
+ * @details @ref Sn_RX_RD is initialized by OPEN command. Make sure to be read or updated as follows.\n
+ * 1. Read the starting save address of the received data.\n
+ * 2. Read data from the starting address of Socket n RX Buffer.\n
+ * 3. After reading the received data, Update @ref Sn_RX_RD to the increased value as many as the reading size.
+ * If the increment value exceeds the maximum value 0xFFFF, that is, is greater than 0x10000 and the carry bit occurs,
+ * update with the lower 16bits value ignored the carry bit.\n
+ * 4. Order RECV command is for notifying the updated @ref Sn_RX_RD to W5500.
+ */
+#define Sn_RX_RD(N)        (_W5500_IO_BASE_ + (0x0028 << 8) + (WIZCHIP_SREG_BLOCK(N) << 3))
+
+/**
+ * @ingroup Socket_register_group
+ * @brief Write point of Receive memory(R)
+ * @details @ref Sn_RX_WR is initialized by OPEN command and it is auto-increased by the data reception.
+ * If the increased value exceeds the maximum value 0xFFFF, (greater than 0x10000 and the carry bit occurs),
+ * then the carry bit is ignored and will automatically update with the lower 16bits value.
+ */
+#define Sn_RX_WR(N)        (_W5500_IO_BASE_ + (0x002A << 8) + (WIZCHIP_SREG_BLOCK(N) << 3))
+
+/**
+ * @ingroup Socket_register_group
+ * @brief socket interrupt mask register(R)
+ * @details @ref Sn_IMR masks the interrupt of Socket n.
+ * Each bit corresponds to each bit of @ref Sn_IR. When a Socket n Interrupt is occurred and the corresponding bit of @ref Sn_IMR is 
+ * the corresponding bit of @ref Sn_IR becomes  When both the corresponding bit of @ref Sn_IMR and @ref Sn_IR are and the n-th bit of @ref IR is 
+ * Host is interrupted by asserted INTn PIN to low.
+ */
+#define Sn_IMR(N)          (_W5500_IO_BASE_ + (0x002C << 8) + (WIZCHIP_SREG_BLOCK(N) << 3))
+
+/**
+ * @ingroup Socket_register_group
+ * @brief Fragment field value in IP header register(R/W)
+ * @details @ref Sn_FRAG configures the FRAG(Fragment field in IP header).
+ */
+#define Sn_FRAG(N)         (_W5500_IO_BASE_ + (0x002D << 8) + (WIZCHIP_SREG_BLOCK(N) << 3))
+
+/**
+ * @ingroup Socket_register_group
+ * @brief Keep Alive Timer register(R/W)
+ * @details @ref Sn_KPALVTR configures the transmitting timer of 锟終EEP ALIVE(KA)packet of SOCKETn. It is valid only in TCP mode,
+ * and ignored in other modes. The time unit is 5s.
+ * KA packet is transmittable after @ref Sn_SR is changed to SOCK_ESTABLISHED and after the data is transmitted or received to/from a peer at least once.
+ * In case of '@ref Sn_KPALVTR > 0', W5500 automatically transmits KA packet after time-period for checking the TCP connection (Auto-keepalive-process).
+ * In case of '@ref Sn_KPALVTR = 0', Auto-keep-alive-process will not operate,
+ * and KA packet can be transmitted by SEND_KEEP command by the host (Manual-keep-alive-process).
+ * Manual-keep-alive-process is ignored in case of '@ref Sn_KPALVTR > 0'.
+ */
+#define Sn_KPALVTR(N)      (_W5500_IO_BASE_ + (0x002F << 8) + (WIZCHIP_SREG_BLOCK(N) << 3))
+
+//#define Sn_TSR(N)          (_W5500_IO_BASE_ + (0x0030 << 8) + (WIZCHIP_SREG_BLOCK(N) << 3))
+
+
+//----------------------------- W5500 Register values  -----------------------------
+
+/* MODE register values */
+/**
+ * @brief Reset
+ * @details If this bit is  All internal registers will be initialized. It will be automatically cleared as after S/W reset.
+ */
+#define MR_RST                       0x80
+
+/**
+ * @brief Wake on LAN
+ * @details 0 : Disable WOL mode\n
+ * 1 : Enable WOL mode\n
+ * If WOL mode is enabled and the received magic packet over UDP has been normally processed, the Interrupt PIN (INTn) asserts to low.
+ * When using WOL mode, the UDP Socket should be opened with any source port number. (Refer to Socket n Mode Register (@ref Sn_MR) for opening Socket.)
+ * @note The magic packet over UDP supported by W5500 consists of 6 bytes synchronization stream (xFFFFFFFFFFFF and
+ * 16 times Target MAC address stream in UDP payload. The options such like password are ignored. You can use any UDP source port number for WOL mode.
+ */
+#define MR_WOL                       0x20
+
+/**
+ * @brief Ping block
+ * @details 0 : Disable Ping block\n
+ * 1 : Enable Ping block\n
+ * If the bit is  it blocks the response to a ping request.
+ */
+#define MR_PB                        0x10
+
+/**
+ * @brief Enable PPPoE
+ * @details 0 : DisablePPPoE mode\n
+ * 1 : EnablePPPoE mode\n
+ * If you use ADSL, this bit should be 
+ */
+#define MR_PPPOE                     0x08
+
+/**
+ * @brief Enable UDP_FORCE_ARP CHECHK
+ * @details 0 : Disable Force ARP mode\n
+ * 1 : Enable Force ARP mode\n
+ * In Force ARP mode, It forces on sending ARP Request whenever data is sent.
+ */
+#define MR_FARP                      0x02
+
+/* IR register values */
+/**
+ * @brief Check IP conflict.
+ * @details Bit is set as when own source IP address is same with the sender IP address in the received ARP request.
+ */
+#define IR_CONFLICT                  0x80
+
+/**
+ * @brief Get the destination unreachable message in UDP sending.
+ * @details When receiving the ICMP (Destination port unreachable) packet, this bit is set as 
+ * When this bit is  Destination Information such as IP address and Port number may be checked with the corresponding @ref UIPR & @ref UPORTR.
+ */
+#define IR_UNREACH                   0x40
+
+/**
+ * @brief Get the PPPoE close message.
+ * @details When PPPoE is disconnected during PPPoE mode, this bit is set.
+ */
+#define IR_PPPoE                     0x20
+
+/**
+ * @brief Get the magic packet interrupt.
+ * @details When WOL mode is enabled and receives the magic packet over UDP, this bit is set.
+ */
+#define IR_MP                        0x10
+
+
+/* PHYCFGR register value */
+#define PHYCFGR_RST                  ~(1<<7)  //< For PHY reset, must operate AND mask.
+#define PHYCFGR_OPMD                 (1<<6)   // Configre PHY with OPMDC value
+#define PHYCFGR_OPMDC_ALLA           (7<<3)
+#define PHYCFGR_OPMDC_PDOWN          (6<<3)
+#define PHYCFGR_OPMDC_NA             (5<<3)
+#define PHYCFGR_OPMDC_100FA          (4<<3)
+#define PHYCFGR_OPMDC_100F           (3<<3)
+#define PHYCFGR_OPMDC_100H           (2<<3)
+#define PHYCFGR_OPMDC_10F            (1<<3)
+#define PHYCFGR_OPMDC_10H            (0<<3)           
+#define PHYCFGR_DPX_FULL             (1<<2)
+#define PHYCFGR_DPX_HALF             (0<<2)
+#define PHYCFGR_SPD_100              (1<<1)
+#define PHYCFGR_SPD_10               (0<<1)
+#define PHYCFGR_LNK_ON               (1<<0)
+#define PHYCFGR_LNK_OFF              (0<<0)
+
+/* IMR register values */
+/**
+ * @brief IP Conflict Interrupt Mask.
+ * @details 0: Disable IP Conflict Interrupt\n
+ * 1: Enable IP Conflict Interrupt
+ */
+#define IM_IR7                  	 0x80
+
+/**
+ * @brief Destination unreachable Interrupt Mask.
+ * @details 0: Disable Destination unreachable Interrupt\n
+ * 1: Enable Destination unreachable Interrupt
+ */
+#define IM_IR6                  	 0x40
+
+/**
+ * @brief PPPoE Close Interrupt Mask.
+ * @details 0: Disable PPPoE Close Interrupt\n
+ * 1: Enable PPPoE Close Interrupt
+ */
+#define IM_IR5                  	 0x20
+
+/**
+ * @brief Magic Packet Interrupt Mask.
+ * @details 0: Disable Magic Packet Interrupt\n
+ * 1: Enable Magic Packet Interrupt
+ */
+#define IM_IR4                  	 0x10
+
+/* Sn_MR Default values */
+/**
+ * @brief Support UDP Multicasting
+ * @details 0 : disable Multicasting\n
+ * 1 : enable Multicasting\n
+ * This bit is applied only during UDP mode(P[3:0] = 010.\n
+ * To use multicasting, @ref Sn_DIPR & @ref Sn_DPORT should be respectively configured with the multicast group IP address & port number
+ * before Socket n is opened by OPEN command of @ref Sn_CR.
+ */
+#define Sn_MR_MULTI                  0x80
+
+/**
+ * @brief Broadcast block in UDP Multicasting.
+ * @details 0 : disable Broadcast Blocking\n
+ * 1 : enable Broadcast Blocking\n
+ * This bit blocks to receive broadcasting packet during UDP mode(P[3:0] = 010.\m
+ * In addition, This bit does when MACRAW mode(P[3:0] = 100
+ */
+#define Sn_MR_BCASTB                 0x40
+
+/**
+ * @brief No Delayed Ack(TCP), Multicast flag
+ * @details 0 : Disable No Delayed ACK option\n
+ * 1 : Enable No Delayed ACK option\n
+ * This bit is applied only during TCP mode (P[3:0] = 001.\n
+ * When this bit is  It sends the ACK packet without delay as soon as a Data packet is received from a peer.\n
+ * When this bit is  It sends the ACK packet after waiting for the timeout time configured by @ref RTR.
+ */
+#define Sn_MR_ND                     0x20
+
+/**
+ * @brief Unicast Block in UDP Multicasting
+ * @details 0 : disable Unicast Blocking\n
+ * 1 : enable Unicast Blocking\n
+ * This bit blocks receiving the unicast packet during UDP mode(P[3:0] = 010 and MULTI = 
+ */
+#define Sn_MR_UCASTB                 0x10
+
+/**
+ * @brief MAC LAYER RAW SOCK
+ * @details This configures the protocol mode of Socket n.
+ * @note MACRAW mode should be only used in Socket 0.
+ */
+#define Sn_MR_MACRAW                 0x04
+
+//#define Sn_MR_IPRAW                  0x03     /**< IP LAYER RAW SOCK */
+
+/**
+ * @brief UDP
+ * @details This configures the protocol mode of Socket n.
+ */
+#define Sn_MR_UDP                    0x02
+
+/**
+ * @brief TCP
+ * @details This configures the protocol mode of Socket n.
+ */
+#define Sn_MR_TCP                    0x01
+
+/**
+ * @brief Unused socket
+ * @details This configures the protocol mode of Socket n.
+ */
+#define Sn_MR_CLOSE                  0x00
+
+/* Sn_MR values used with Sn_MR_MACRAW */
+/**
+ * @brief MAC filter enable in @ref Sn_MR_MACRAW mode
+ * @details 0 : disable MAC Filtering\n
+ * 1 : enable MAC Filtering\n
+ * This bit is applied only during MACRAW mode(P[3:0] = 100.\n
+ * When set as  W5500 can only receive broadcasting packet or packet sent to itself.
+ * When this bit is  W5500 can receive all packets on Ethernet.
+ * If user wants to implement Hybrid TCP/IP stack,
+ * it is recommended that this bit is set as for reducing host overhead to process the all received packets.
+ */
+#define Sn_MR_MFEN                   Sn_MR_MULTI
+
+/**
+ * @brief Multicast Blocking in @ref Sn_MR_MACRAW mode
+ * @details 0 : using IGMP version 2\n
+ * 1 : using IGMP version 1\n
+ * This bit is applied only during UDP mode(P[3:0] = 010 and MULTI = 
+ * It configures the version for IGMP messages (Join/Leave/Report).
+ */
+#define Sn_MR_MMB                    Sn_MR_ND
+
+/**
+ * @brief IPv6 packet Blocking in @ref Sn_MR_MACRAW mode
+ * @details 0 : disable IPv6 Blocking\n
+ * 1 : enable IPv6 Blocking\n
+ * This bit is applied only during MACRAW mode (P[3:0] = 100. It blocks to receiving the IPv6 packet.
+ */
+#define Sn_MR_MIP6B                  Sn_MR_UCASTB
+
+/* Sn_MR value used with Sn_MR_UDP & Sn_MR_MULTI */
+/**
+ * @brief IGMP version used in UDP mulitcasting
+ * @details 0 : disable Multicast Blocking\n
+ * 1 : enable Multicast Blocking\n
+ * This bit is applied only when MACRAW mode(P[3:0] = 100. It blocks to receive the packet with multicast MAC address.
+ */
+#define Sn_MR_MC                     Sn_MR_ND
+
+/* Sn_MR alternate values */
+/**
+ * @brief For Berkeley Socket API
+ */
+#define SOCK_STREAM                  Sn_MR_TCP
+
+/**
+ * @brief For Berkeley Socket API
+ */
+#define SOCK_DGRAM                   Sn_MR_UDP
+
+
+/* Sn_CR values */
+/**
+ * @brief Initialize or open socket
+ * @details Socket n is initialized and opened according to the protocol selected in Sn_MR(P3:P0).
+ * The table below shows the value of @ref Sn_SR corresponding to @ref Sn_MR.\n
+ * <table>
+ *   <tr>  <td>\b Sn_MR (P[3:0])</td> <td>\b Sn_SR</td>            		 </tr>
+ *   <tr>  <td>Sn_MR_CLOSE  (000</td> <td></td>         	   		 </tr>
+ *   <tr>  <td>Sn_MR_TCP  (001</td> <td>SOCK_INIT (0x13)</td>  		 </tr>
+ *   <tr>  <td>Sn_MR_UDP  (010</td>  <td>SOCK_UDP (0x22)</td>  		 </tr>
+ *   <tr>  <td>S0_MR_MACRAW  (100</td>  <td>SOCK_MACRAW (0x02)</td>  </tr>
+ * </table>
+ */
+#define Sn_CR_OPEN                   0x01
+
+/**
+ * @brief Wait connection request in TCP mode(Server mode)
+ * @details This is valid only in TCP mode (Sn_MR(P3:P0) = Sn_MR_TCP).
+ * In this mode, Socket n operates as a 锟絋CP serverand waits for  connection-request (SYN packet) from any 锟絋CP client
+ * The @ref Sn_SR changes the state from SOCK_INIT to SOCKET_LISTEN.
+ * When a 锟絋CP clientconnection request is successfully established,
+ * the @ref Sn_SR changes from SOCK_LISTEN to SOCK_ESTABLISHED and the Sn_IR(0) becomes 
+ * But when a 锟絋CP clientconnection request is failed, Sn_IR(3) becomes and the status of @ref Sn_SR changes to SOCK_CLOSED.
+ */
+#define Sn_CR_LISTEN                 0x02
+
+/**
+ * @brief Send connection request in TCP mode(Client mode)
+ * @details  To connect, a connect-request (SYN packet) is sent to b>TCP server</b>configured by @ref Sn_DIPR & Sn_DPORT(destination address & port).
+ * If the connect-request is successful, the @ref Sn_SR is changed to @ref SOCK_ESTABLISHED and the Sn_IR(0) becomes \n\n
+ * The connect-request fails in the following three cases.\n
+ * 1. When a @b ARPTO occurs (@ref Sn_IR[3] =  ) because destination hardware address is not acquired through the ARP-process.\n
+ * 2. When a @b SYN/ACK packet is not received and @b TCPTO (Sn_IR(3) =  )\n
+ * 3. When a @b RST packet is received instead of a @b SYN/ACK packet. In these cases, @ref Sn_SR is changed to @ref SOCK_CLOSED.
+ * @note This is valid only in TCP mode and operates when Socket n acts as b>TCP client</b>
+ */
+#define Sn_CR_CONNECT                0x04
+
+/**
+ * @brief Send closing request in TCP mode
+ * @details Regardless of b>TCP server</b>or b>TCP client</b> the DISCON command processes the disconnect-process (b>Active close</b>or b>Passive close</b>.\n
+ * @par Active close
+ * it transmits disconnect-request(FIN packet) to the connected peer\n
+ * @par Passive close
+ * When FIN packet is received from peer, a FIN packet is replied back to the peer.\n
+ * @details When the disconnect-process is successful (that is, FIN/ACK packet is received successfully), @ref Sn_SR is changed to @ref SOCK_CLOSED.\n
+ * Otherwise, TCPTO occurs (Sn_IR(3)=)= and then @ref Sn_SR is changed to @ref SOCK_CLOSED.
+ * @note Valid only in TCP mode.
+ */
+#define Sn_CR_DISCON                 0x08
+
+/**
+ * @brief Close socket
+ * @details Sn_SR is changed to @ref SOCK_CLOSED.
+ */
+#define Sn_CR_CLOSE                  0x10
+
+/**
+ * @brief Update TX buffer pointer and send data
+ * @details SEND transmits all the data in the Socket n TX buffer.\n
+ * For more details, please refer to Socket n TX Free Size Register (@ref Sn_TX_FSR), Socket n,
+ * TX Write Pointer Register(@ref Sn_TX_WR), and Socket n TX Read Pointer Register(@ref Sn_TX_RD).
+ */
+#define Sn_CR_SEND                   0x20
+
+/**
+ * @brief Send data with MAC address, so without ARP process
+ * @details The basic operation is same as SEND.\n
+ * Normally SEND transmits data after destination hardware address is acquired by the automatic ARP-process(Address Resolution Protocol).\n
+ * But SEND_MAC transmits data without the automatic ARP-process.\n
+ * In this case, the destination hardware address is acquired from @ref Sn_DHAR configured by host, instead of APR-process.
+ * @note Valid only in UDP mode.
+ */
+#define Sn_CR_SEND_MAC               0x21
+
+/**
+ * @brief Send keep alive message
+ * @details It checks the connection status by sending 1byte keep-alive packet.\n
+ * If the peer can not respond to the keep-alive packet during timeout time, the connection is terminated and the timeout interrupt will occur.
+ * @note Valid only in TCP mode.
+ */
+#define Sn_CR_SEND_KEEP              0x22
+
+/**
+ * @brief Update RX buffer pointer and receive data
+ * @details RECV completes the processing of the received data in Socket n RX Buffer by using a RX read pointer register (@ref Sn_RX_RD).\n
+ * For more details, refer to Socket n RX Received Size Register (@ref Sn_RX_RSR), Socket n RX Write Pointer Register (@ref Sn_RX_WR),
+ * and Socket n RX Read Pointer Register (@ref Sn_RX_RD).
+ */
+#define Sn_CR_RECV                   0x40
+
+/* Sn_IR values */
+/**
+ * @brief SEND_OK Interrupt
+ * @details This is issued when SEND command is completed.
+ */
+#define Sn_IR_SENDOK                 0x10
+
+/**
+ * @brief TIMEOUT Interrupt
+ * @details This is issued when ARPTO or TCPTO occurs.
+ */
+#define Sn_IR_TIMEOUT                0x08
+
+/**
+ * @brief RECV Interrupt
+ * @details This is issued whenever data is received from a peer.
+ */
+#define Sn_IR_RECV                   0x04
+
+/**
+ * @brief DISCON Interrupt
+ * @details This is issued when FIN or FIN/ACK packet is received from a peer.
+ */
+#define Sn_IR_DISCON                 0x02
+
+/**
+ * @brief CON Interrupt
+ * @details This is issued one time when the connection with peer is successful and then @ref Sn_SR is changed to @ref SOCK_ESTABLISHED.
+ */
+#define Sn_IR_CON                    0x01
+
+/* Sn_SR values */
+/**
+ * @brief Closed
+ * @details This indicates that Socket n is released.\N
+ * When DICON, CLOSE command is ordered, or when a timeout occurs, it is changed to @ref SOCK_CLOSED regardless of previous status.
+ */
+#define SOCK_CLOSED                  0x00
+
+/**
+ * @brief Initiate state
+ * @details This indicates Socket n is opened with TCP mode.\N
+ * It is changed to @ref SOCK_INIT when Sn_MR(P[3:0]) = 001and OPEN command is ordered.\N
+ * After @ref SOCK_INIT, user can use LISTEN /CONNECT command.
+ */
+#define SOCK_INIT                    0x13
+
+/**
+ * @brief Listen state
+ * @details This indicates Socket n is operating as b>TCP server</b>mode and waiting for connection-request (SYN packet) from a peer (b>TCP client</b>.\n
+ * It will change to @ref SOCK_ESTALBLISHED when the connection-request is successfully accepted.\n
+ * Otherwise it will change to @ref SOCK_CLOSED after TCPTO occurred (Sn_IR(TIMEOUT) = .
+ */
+#define SOCK_LISTEN                  0x14
+
+/**
+ * @brief Connection state
+ * @details This indicates Socket n sent the connect-request packet (SYN packet) to a peer.\n
+ * It is temporarily shown when @ref Sn_SR is changed from @ref SOCK_INIT to @ref SOCK_ESTABLISHED by CONNECT command.\n
+ * If connect-accept(SYN/ACK packet) is received from the peer at SOCK_SYNSENT, it changes to @ref SOCK_ESTABLISHED.\n
+ * Otherwise, it changes to @ref SOCK_CLOSED after TCPTO (@ref Sn_IR[TIMEOUT] =  is occurred.
+ */
+#define SOCK_SYNSENT                 0x15
+
+/**
+ * @brief Connection state
+ * @details It indicates Socket n successfully received the connect-request packet (SYN packet) from a peer.\n
+ * If socket n sends the response (SYN/ACK  packet) to the peer successfully,  it changes to @ref SOCK_ESTABLISHED. \n
+ * If not, it changes to @ref SOCK_CLOSED after timeout occurs (@ref Sn_IR[TIMEOUT] = .
+ */
+#define SOCK_SYNRECV                 0x16
+
+/**
+ * @brief Success to connect
+ * @details This indicates the status of the connection of Socket n.\n
+ * It changes to @ref SOCK_ESTABLISHED when the b>TCP SERVER</b>processed the SYN packet from the b>TCP CLIENT</b>during @ref SOCK_LISTEN, or
+ * when the CONNECT command is successful.\n
+ * During @ref SOCK_ESTABLISHED, DATA packet can be transferred using SEND or RECV command.
+ */
+#define SOCK_ESTABLISHED             0x17
+
+/**
+ * @brief Closing state
+ * @details These indicate Socket n is closing.\n
+ * These are shown in disconnect-process such as active-close and passive-close.\n
+ * When Disconnect-process is successfully completed, or when timeout occurs, these change to @ref SOCK_CLOSED.
+ */
+#define SOCK_FIN_WAIT                0x18
+
+/**
+ * @brief Closing state
+ * @details These indicate Socket n is closing.\n
+ * These are shown in disconnect-process such as active-close and passive-close.\n
+ * When Disconnect-process is successfully completed, or when timeout occurs, these change to @ref SOCK_CLOSED.
+ */
+#define SOCK_CLOSING                 0x1A
+
+/**
+ * @brief Closing state
+ * @details These indicate Socket n is closing.\n
+ * These are shown in disconnect-process such as active-close and passive-close.\n
+ * When Disconnect-process is successfully completed, or when timeout occurs, these change to @ref SOCK_CLOSED.
+ */
+#define SOCK_TIME_WAIT               0x1B
+
+/**
+ * @brief Closing state
+ * @details This indicates Socket n received the disconnect-request (FIN packet) from the connected peer.\n
+ * This is half-closing status, and data can be transferred.\n
+ * For full-closing, DISCON command is used. But For just-closing, CLOSE command is used.
+ */
+#define SOCK_CLOSE_WAIT              0x1C
+
+/**
+ * @brief Closing state
+ * @details This indicates Socket n is waiting for the response (FIN/ACK packet) to the disconnect-request (FIN packet) by passive-close.\n
+ * It changes to @ref SOCK_CLOSED when Socket n received the response successfully, or when timeout occurs  (@ref Sn_IR[TIMEOUT] = .
+ */
+#define SOCK_LAST_ACK                0x1D
+
+/**
+ * @brief UDP socket
+ * @details This indicates Socket n is opened in UDP mode(Sn_MR(P[3:0]) = 010.\n
+ * It changes to SOCK_UPD when Sn_MR(P[3:0]) = 010 and OPEN command is ordered.\n
+ * Unlike TCP mode, data can be transfered without the connection-process.
+ */
+#define SOCK_UDP                     0x22
+
+//#define SOCK_IPRAW                   0x32     /**< IP raw mode socket */
+
+/**
+ * @brief MAC raw mode socket
+ * @details This indicates Socket 0 is opened in MACRAW mode (S0_MR(P[3:0]) = 100and is valid only in Socket 0.\n
+ * It changes to SOCK_MACRAW when S0_MR(P[3:0] = 100and OPEN command is ordered.\n
+ * Like UDP mode socket, MACRAW mode Socket 0 can transfer a MAC packet (Ethernet frame) without the connection-process.
+ */
+#define SOCK_MACRAW                  0x42
+
+//#define SOCK_PPPOE                   0x5F
+
+/* IP PROTOCOL */
+#define IPPROTO_IP                   0        //< Dummy for IP 
+#define IPPROTO_ICMP                 1        //< Control message protocol
+#define IPPROTO_IGMP                 2        //< Internet group management protocol
+#define IPPROTO_GGP                  3        //< Gateway^2 (deprecated)
+#define IPPROTO_TCP                  6        //< TCP
+#define IPPROTO_PUP                  12       //< PUP
+#define IPPROTO_UDP                  17       //< UDP
+#define IPPROTO_IDP                  22       //< XNS idp
+#define IPPROTO_ND                   77       //< UNOFFICIAL net disk protocol
+#define IPPROTO_RAW                  255      //< Raw IP packet
+
+
+/**
+ * @brief Enter a critical section
+ *
+ * @details It is provided to protect your shared code which are executed without distribution. \n \n
+ *
+ * In non-OS environment, It can be just implemented by disabling whole interrupt.\n
+ * In OS environment, You can replace it to critical section api supported by OS.
+ *
+ * \sa WIZCHIP_READ(), WIZCHIP_WRITE(), WIZCHIP_READ_BUF(), WIZCHIP_WRITE_BUF()
+ * \sa WIZCHIP_CRITICAL_EXIT()
+ */
+#define WIZCHIP_CRITICAL_ENTER()    WIZCHIP.CRIS._enter()
+
+/**
+ * @brief Exit a critical section
+ *
+ * @details It is provided to protect your shared code which are executed without distribution. \n\n
+ *
+ * In non-OS environment, It can be just implemented by disabling whole interrupt. \n
+ * In OS environment, You can replace it to critical section api supported by OS.
+ *
+ * @sa WIZCHIP_READ(), WIZCHIP_WRITE(), WIZCHIP_READ_BUF(), WIZCHIP_WRITE_BUF()
+ * @sa WIZCHIP_CRITICAL_ENTER()
+ */
+#define WIZCHIP_CRITICAL_EXIT()     WIZCHIP.CRIS._exit()
+
+
+
+////////////////////////
+// Basic I/O Function //
+////////////////////////
+
+/**
+ * @ingroup Basic_IO_function
+ * @brief It reads 1 byte value from a register.
+ * @param AddrSel Register address
+ * @return The value of register
+ */
+uint8_t  WIZCHIP_READ (uint32_t AddrSel);
+
+/**
+ * @ingroup Basic_IO_function
+ * @brief It writes 1 byte value to a register.
+ * @param AddrSel Register address
+ * @param wb Write data
+ * @return void
+ */
+void     WIZCHIP_WRITE(uint32_t AddrSel, uint8_t wb );
+
+/**
+ * @ingroup Basic_IO_function
+ * @brief It reads sequence data from registers.
+ * @param AddrSel Register address
+ * @param pBuf Pointer buffer to read data
+ * @param len Data length
+ */
+void     WIZCHIP_READ_BUF (uint32_t AddrSel, uint8_t* pBuf, uint16_t len);
+
+/**
+ * @ingroup Basic_IO_function
+ * @brief It writes sequence data to registers.
+ * @param AddrSel Register address
+ * @param pBuf Pointer buffer to write data
+ * @param len Data length
+ */
+void     WIZCHIP_WRITE_BUF(uint32_t AddrSel, uint8_t* pBuf, uint16_t len);
+
+/////////////////////////////////
+// Common Register I/O function //
+/////////////////////////////////
+/**
+ * @ingroup Common_register_access_function
+ * @brief Set Mode Register
+ * @param (uint8_t)mr The value to be set.
+ * @sa getMR()
+ */
+#define setMR(mr) \
+	WIZCHIP_WRITE(MR,mr)
+
+
+/**
+ * @ingroup Common_register_access_function
+ * @brief Get Mode Register
+ * @return uint8_t. The value of Mode register.
+ * @sa setMR()
+ */
+#define getMR() \
+		WIZCHIP_READ(MR)
+
+/**
+ * @ingroup Common_register_access_function
+ * @brief Set gateway IP address
+ * @param (uint8_t*)gar Pointer variable to set gateway IP address. It should be allocated 4 bytes.
+ * @sa getGAR()
+ */
+#define setGAR(gar) \
+		WIZCHIP_WRITE_BUF(GAR,gar,4)
+
+/**
+ * @ingroup Common_register_access_function
+ * @brief Get gateway IP address
+ * @param (uint8_t*)gar Pointer variable to get gateway IP address. It should be allocated 4 bytes.
+ * @sa setGAR()
+ */
+#define getGAR(gar) \
+		WIZCHIP_READ_BUF(GAR,gar,4)
+
+/**
+ * @ingroup Common_register_access_function
+ * @brief Set subnet mask address
+ * @param (uint8_t*)subr Pointer variable to set subnet mask address. It should be allocated 4 bytes.
+ * @sa getSUBR()
+ */
+#define setSUBR(subr) \
+		WIZCHIP_WRITE_BUF(SUBR, subr,4)
+
+
+/**
+ * @ingroup Common_register_access_function
+ * @brief Get subnet mask address
+ * @param (uint8_t*)subr Pointer variable to get subnet mask address. It should be allocated 4 bytes.
+ * @sa setSUBR()
+ */
+#define getSUBR(subr) \
+		WIZCHIP_READ_BUF(SUBR, subr, 4)
+
+/**
+ * @ingroup Common_register_access_function
+ * @brief Set local MAC address
+ * @param (uint8_t*)shar Pointer variable to set local MAC address. It should be allocated 6 bytes.
+ * @sa getSHAR()
+ */
+#define setSHAR(shar) \
+		WIZCHIP_WRITE_BUF(SHAR, shar, 6)
+
+/**
+ * @ingroup Common_register_access_function
+ * @brief Get local MAC address
+ * @param (uint8_t*)shar Pointer variable to get local MAC address. It should be allocated 6 bytes.
+ * @sa setSHAR()
+ */
+#define getSHAR(shar) \
+		WIZCHIP_READ_BUF(SHAR, shar, 6)
+
+/**
+ * @ingroup Common_register_access_function
+ * @brief Set local IP address
+ * @param (uint8_t*)sipr Pointer variable to set local IP address. It should be allocated 4 bytes.
+ * @sa getSIPR()
+ */
+#define setSIPR(sipr) \
+		WIZCHIP_WRITE_BUF(SIPR, sipr, 4)
+
+/**
+ * @ingroup Common_register_access_function
+ * @brief Get local IP address
+ * @param (uint8_t*)sipr Pointer variable to get local IP address. It should be allocated 4 bytes.
+ * @sa setSIPR()
+ */
+#define getSIPR(sipr) \
+		WIZCHIP_READ_BUF(SIPR, sipr, 4)
+
+/**
+ * @ingroup Common_register_access_function
+ * @brief Set INTLEVEL register
+ * @param (uint16_t)intlevel Value to set @ref INTLEVEL register.
+ * @sa getINTLEVEL()
+ */
+#define setINTLEVEL(intlevel)  {\
+		WIZCHIP_WRITE(INTLEVEL,   (uint8_t)(intlevel >> 8)); \
+		WIZCHIP_WRITE(WIZCHIP_OFFSET_INC(INTLEVEL,1), (uint8_t) intlevel); \
+	}
+
+
+/**
+ * @ingroup Common_register_access_function
+ * @brief Get INTLEVEL register
+ * @return uint16_t. Value of @ref INTLEVEL register.
+ * @sa setINTLEVEL()
+ */
+#define getINTLEVEL() \
+		((WIZCHIP_READ(INTLEVEL) << 8) + WIZCHIP_READ(WIZCHIP_OFFSET_INC(INTLEVEL,1)))
+
+/**
+ * @ingroup Common_register_access_function
+ * @brief Set @ref IR register
+ * @param (uint8_t)ir Value to set @ref IR register.
+ * @sa getIR()
+ */
+#define setIR(ir) \
+		WIZCHIP_WRITE(IR, (ir & 0xF0))
+
+/**
+ * @ingroup Common_register_access_function
+ * @brief Get @ref IR register
+ * @return uint8_t. Value of @ref IR register.
+ * @sa setIR()
+ */
+#define getIR() \
+		(WIZCHIP_READ(IR) & 0xF0)
+/**
+ * @ingroup Common_register_access_function
+ * @brief Set @ref IMR register
+ * @param (uint8_t)imr Value to set @ref IMR register.
+ * @sa getIMR()
+ */
+#define setIMR(imr) \
+		WIZCHIP_WRITE(IMR, imr)
+
+/**
+ * @ingroup Common_register_access_function
+ * @brief Get @ref IMR register
+ * @return uint8_t. Value of @ref IMR register.
+ * @sa setIMR()
+ */
+#define getIMR() \
+		WIZCHIP_READ(IMR)
+
+
+/**
+ * @ingroup Common_register_access_function
+ * @brief Set @ref SIR register
+ * @param (uint8_t)sir Value to set @ref SIR register.
+ * @sa getSIR()
+ */
+#define setSIR(sir) \
+		WIZCHIP_WRITE(SIR, sir)
+
+/**
+ * @ingroup Common_register_access_function
+ * @brief Get @ref SIR register
+ * @return uint8_t. Value of @ref SIR register.
+ * @sa setSIR()
+ */
+#define getSIR() \
+		WIZCHIP_READ(SIR)
+/**
+ * @ingroup Common_register_access_function
+ * @brief Set @ref SIMR register
+ * @param (uint8_t)simr Value to set @ref SIMR register.
+ * @sa getSIMR()
+ */
+#define setSIMR(simr) \
+		WIZCHIP_WRITE(SIMR, simr)
+
+/**
+ * @ingroup Common_register_access_function
+ * @brief Get @ref SIMR register
+ * @return uint8_t. Value of @ref SIMR register.
+ * @sa setSIMR()
+ */
+#define getSIMR() \
+		WIZCHIP_READ(SIMR)
+
+/**
+ * @ingroup Common_register_access_function
+ * @brief Set @ref RTR register
+ * @param (uint16_t)rtr Value to set @ref RTR register.
+ * @sa getRTR()
+ */
+#define setRTR(rtr)   {\
+		WIZCHIP_WRITE(RTR,   (uint8_t)(rtr >> 8)); \
+		WIZCHIP_WRITE(WIZCHIP_OFFSET_INC(RTR,1), (uint8_t) rtr); \
+	}
+
+/**
+ * @ingroup Common_register_access_function
+ * @brief Get @ref RTR register
+ * @return uint16_t. Value of @ref RTR register.
+ * @sa setRTR()
+ */
+#define getRTR() \
+		((WIZCHIP_READ(RTR) << 8) + WIZCHIP_READ(WIZCHIP_OFFSET_INC(RTR,1)))
+
+/**
+ * @ingroup Common_register_access_function
+ * @brief Set @ref RCR register
+ * @param (uint8_t)rcr Value to set @ref RCR register.
+ * @sa getRCR()
+ */
+#define setRCR(rcr) \
+		WIZCHIP_WRITE(RCR, rcr)
+
+/**
+ * @ingroup Common_register_access_function
+ * @brief Get @ref RCR register
+ * @return uint8_t. Value of @ref RCR register.
+ * @sa setRCR()
+ */
+#define getRCR() \
+		WIZCHIP_READ(RCR)
+
+//================================================== test done ===========================================================
+
+/**
+ * @ingroup Common_register_access_function
+ * @brief Set @ref PTIMER register
+ * @param (uint8_t)ptimer Value to set @ref PTIMER register.
+ * @sa getPTIMER()
+ */
+#define setPTIMER(ptimer) \
+		WIZCHIP_WRITE(PTIMER, ptimer)
+
+/**
+ * @ingroup Common_register_access_function
+ * @brief Get @ref PTIMER register
+ * @return uint8_t. Value of @ref PTIMER register.
+ * @sa setPTIMER()
+ */
+#define getPTIMER() \
+		WIZCHIP_READ(PTIMER)
+
+/**
+ * @ingroup Common_register_access_function
+ * @brief Set @ref PMAGIC register
+ * @param (uint8_t)pmagic Value to set @ref PMAGIC register.
+ * @sa getPMAGIC()
+ */
+#define setPMAGIC(pmagic) \
+		WIZCHIP_WRITE(PMAGIC, pmagic)
+
+/**
+ * @ingroup Common_register_access_function
+ * @brief Get @ref PMAGIC register
+ * @return uint8_t. Value of @ref PMAGIC register.
+ * @sa setPMAGIC()
+ */
+#define getPMAGIC() \
+		WIZCHIP_READ(PMAGIC)
+
+/**
+ * @ingroup Common_register_access_function
+ * @brief Set PHAR address
+ * @param (uint8_t*)phar Pointer variable to set PPP destination MAC register address. It should be allocated 6 bytes.
+ * @sa getPHAR()
+ */
+#define setPHAR(phar) \
+		WIZCHIP_WRITE_BUF(PHAR, phar, 6)
+
+/**
+ * @ingroup Common_register_access_function
+ * @brief Get local IP address
+ * @param (uint8_t*)phar Pointer variable to PPP destination MAC register address. It should be allocated 6 bytes.
+ * @sa setPHAR()
+ */
+#define getPHAR(phar) \
+		WIZCHIP_READ_BUF(PHAR, phar, 6)
+
+/**
+ * @ingroup Common_register_access_function
+ * @brief Set @ref PSID register
+ * @param (uint16_t)psid Value to set @ref PSID register.
+ * @sa getPSID()
+ */
+#define setPSID(psid)  {\
+		WIZCHIP_WRITE(PSID,   (uint8_t)(psid >> 8)); \
+		WIZCHIP_WRITE(WIZCHIP_OFFSET_INC(PSID,1), (uint8_t) psid); \
+	}
+
+/**
+ * @ingroup Common_register_access_function
+ * @brief Get @ref PSID register
+ * @return uint16_t. Value of @ref PSID register.
+ * @sa setPSID()
+ */
+//uint16_t getPSID(void);
+#define getPSID() \
+		((WIZCHIP_READ(PSID) << 8) + WIZCHIP_READ(WIZCHIP_OFFSET_INC(PSID,1)))
+
+/**
+ * @ingroup Common_register_access_function
+ * @brief Set @ref PMRU register
+ * @param (uint16_t)pmru Value to set @ref PMRU register.
+ * @sa getPMRU()
+ */
+#define setPMRU(pmru) { \
+		WIZCHIP_WRITE(PMRU,   (uint8_t)(pmru>>8)); \
+		WIZCHIP_WRITE(WIZCHIP_OFFSET_INC(PMRU,1), (uint8_t) pmru); \
+	}
+
+/**
+ * @ingroup Common_register_access_function
+ * @brief Get @ref PMRU register
+ * @return uint16_t. Value of @ref PMRU register.
+ * @sa setPMRU()
+ */
+#define getPMRU() \
+		((WIZCHIP_READ(PMRU) << 8) + WIZCHIP_READ(WIZCHIP_OFFSET_INC(PMRU,1)))
+
+/**
+ * @ingroup Common_register_access_function
+ * @brief Get unreachable IP address
+ * @param (uint8_t*)uipr Pointer variable to get unreachable IP address. It should be allocated 4 bytes.
+ */
+#define getUIPR(uipr) \
+		WIZCHIP_READ_BUF(UIPR,uipr,6)
+
+/**
+ * @ingroup Common_register_access_function
+ * @brief Get @ref UPORTR register
+ * @return uint16_t. Value of @ref UPORTR register.
+ */
+#define getUPORTR() \
+	((WIZCHIP_READ(UPORTR) << 8) + WIZCHIP_READ(WIZCHIP_OFFSET_INC(UPORTR,1)))
+
+/**
+ * @ingroup Common_register_access_function
+ * @brief Set @ref PHYCFGR register
+ * @param (uint8_t)phycfgr Value to set @ref PHYCFGR register.
+ * @sa getPHYCFGR()
+ */
+#define setPHYCFGR(phycfgr) \
+		WIZCHIP_WRITE(PHYCFGR, phycfgr)
+
+/**
+ * @ingroup Common_register_access_function
+ * @brief Get @ref PHYCFGR register
+ * @return uint8_t. Value of @ref PHYCFGR register.
+ * @sa setPHYCFGR()
+ */
+#define getPHYCFGR() \
+		WIZCHIP_READ(PHYCFGR)
+
+/**
+ * @ingroup Common_register_access_function
+ * @brief Get @ref VERSIONR register
+ * @return uint8_t. Value of @ref VERSIONR register.
+ */
+#define getVERSIONR() \
+		WIZCHIP_READ(VERSIONR)
+
+/////////////////////////////////////
+
+///////////////////////////////////
+// Socket N register I/O function //
+///////////////////////////////////
+/**
+ * @ingroup Socket_register_access_function
+ * @brief Set @ref Sn_MR register
+ * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>.
+ * @param (uint8_t)mr Value to set @ref Sn_MR
+ * @sa getSn_MR()
+ */
+#define setSn_MR(sn, mr) \
+		WIZCHIP_WRITE(Sn_MR(sn),mr)
+
+/**
+ * @ingroup Socket_register_access_function
+ * @brief Get @ref Sn_MR register
+ * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>.
+ * @return uint8_t. Value of @ref Sn_MR.
+ * @sa setSn_MR()
+ */
+#define getSn_MR(sn) \
+	WIZCHIP_READ(Sn_MR(sn))
+
+/**
+ * @ingroup Socket_register_access_function
+ * @brief Set @ref Sn_CR register
+ * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>.
+ * @param (uint8_t)cr Value to set @ref Sn_CR
+ * @sa getSn_CR()
+ */
+#define setSn_CR(sn, cr) \
+		WIZCHIP_WRITE(Sn_CR(sn), cr)
+
+/**
+ * @ingroup Socket_register_access_function
+ * @brief Get @ref Sn_CR register
+ * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>.
+ * @return uint8_t. Value of @ref Sn_CR.
+ * @sa setSn_CR()
+ */
+#define getSn_CR(sn) \
+		WIZCHIP_READ(Sn_CR(sn))
+
+/**
+ * @ingroup Socket_register_access_function
+ * @brief Set @ref Sn_IR register
+ * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>.
+ * @param (uint8_t)ir Value to set @ref Sn_IR
+ * @sa getSn_IR()
+ */
+#define setSn_IR(sn, ir) \
+		WIZCHIP_WRITE(Sn_IR(sn), (ir & 0x1F))
+
+/**
+ * @ingroup Socket_register_access_function
+ * @brief Get @ref Sn_IR register
+ * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>.
+ * @return uint8_t. Value of @ref Sn_IR.
+ * @sa setSn_IR()
+ */
+#define getSn_IR(sn) \
+		(WIZCHIP_READ(Sn_IR(sn)) & 0x1F)
+
+/**
+ * @ingroup Socket_register_access_function
+ * @brief Set @ref Sn_IMR register
+ * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>.
+ * @param (uint8_t)imr Value to set @ref Sn_IMR
+ * @sa getSn_IMR()
+ */
+#define setSn_IMR(sn, imr) \
+		WIZCHIP_WRITE(Sn_IMR(sn), (imr & 0x1F))
+
+/**
+ * @ingroup Socket_register_access_function
+ * @brief Get @ref Sn_IMR register
+ * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>.
+ * @return uint8_t. Value of @ref Sn_IMR.
+ * @sa setSn_IMR()
+ */
+#define getSn_IMR(sn) \
+		(WIZCHIP_READ(Sn_IMR(sn)) & 0x1F)
+
+/**
+ * @ingroup Socket_register_access_function
+ * @brief Get @ref Sn_SR register
+ * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>.
+ * @return uint8_t. Value of @ref Sn_SR.
+ */
+#define getSn_SR(sn) \
+		WIZCHIP_READ(Sn_SR(sn))
+
+/**
+ * @ingroup Socket_register_access_function
+ * @brief Set @ref Sn_PORT register
+ * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>.
+ * @param (uint16_t)port Value to set @ref Sn_PORT.
+ * @sa getSn_PORT()
+ */
+#define setSn_PORT(sn, port)  { \
+		WIZCHIP_WRITE(Sn_PORT(sn),   (uint8_t)(port >> 8)); \
+		WIZCHIP_WRITE(WIZCHIP_OFFSET_INC(Sn_PORT(sn),1), (uint8_t) port); \
+	}
+
+/**
+ * @ingroup Socket_register_access_function
+ * @brief Get @ref Sn_PORT register
+ * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>.
+ * @return uint16_t. Value of @ref Sn_PORT.
+ * @sa setSn_PORT()
+ */
+#define getSn_PORT(sn) \
+		((WIZCHIP_READ(Sn_PORT(sn)) << 8) + WIZCHIP_READ(WIZCHIP_OFFSET_INC(Sn_PORT(sn),1)))
+
+/**
+ * @ingroup Socket_register_access_function
+ * @brief Set @ref Sn_DHAR register
+ * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>.
+ * @param (uint8_t*)dhar Pointer variable to set socket n destination hardware address. It should be allocated 6 bytes.
+ * @sa getSn_DHAR()
+ */
+#define setSn_DHAR(sn, dhar) \
+		WIZCHIP_WRITE_BUF(Sn_DHAR(sn), dhar, 6)
+
+/**
+ * @ingroup Socket_register_access_function
+ * @brief Get @ref Sn_MR register
+ * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>.
+ * @param (uint8_t*)dhar Pointer variable to get socket n destination hardware address. It should be allocated 6 bytes.
+ * @sa setSn_DHAR()
+ */
+#define getSn_DHAR(sn, dhar) \
+		WIZCHIP_READ_BUF(Sn_DHAR(sn), dhar, 6)
+
+/**
+ * @ingroup Socket_register_access_function
+ * @brief Set @ref Sn_DIPR register
+ * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>.
+ * @param (uint8_t*)dipr Pointer variable to set socket n destination IP address. It should be allocated 4 bytes.
+ * @sa getSn_DIPR()
+ */
+#define setSn_DIPR(sn, dipr) \
+		WIZCHIP_WRITE_BUF(Sn_DIPR(sn), dipr, 4)
+
+/**
+ * @ingroup Socket_register_access_function
+ * @brief Get @ref Sn_DIPR register
+ * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>.
+ * @param (uint8_t*)dipr Pointer variable to get socket n destination IP address. It should be allocated 4 bytes.
+ * @sa SetSn_DIPR()
+ */
+#define getSn_DIPR(sn, dipr) \
+		WIZCHIP_READ_BUF(Sn_DIPR(sn), dipr, 4)
+
+/**
+ * @ingroup Socket_register_access_function
+ * @brief Set @ref Sn_DPORT register
+ * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>.
+ * @param (uint16_t)dport Value to set @ref Sn_DPORT
+ * @sa getSn_DPORT()
+ */
+#define setSn_DPORT(sn, dport) { \
+		WIZCHIP_WRITE(Sn_DPORT(sn),   (uint8_t) (dport>>8)); \
+		WIZCHIP_WRITE(WIZCHIP_OFFSET_INC(Sn_DPORT(sn),1), (uint8_t)  dport); \
+	}
+
+/**
+ * @ingroup Socket_register_access_function
+ * @brief Get @ref Sn_DPORT register
+ * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>.
+ * @return uint16_t. Value of @ref Sn_DPORT.
+ * @sa setSn_DPORT()
+ */
+#define getSn_DPORT(sn) \
+		((WIZCHIP_READ(Sn_DPORT(sn)) << 8) + WIZCHIP_READ(WIZCHIP_OFFSET_INC(Sn_DPORT(sn),1)))
+
+/**
+ * @ingroup Socket_register_access_function
+ * @brief Set @ref Sn_MSSR register
+ * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>.
+ * @param (uint16_t)mss Value to set @ref Sn_MSSR
+ * @sa setSn_MSSR()
+ */
+#define setSn_MSSR(sn, mss) { \
+		WIZCHIP_WRITE(Sn_MSSR(sn),   (uint8_t)(mss>>8)); \
+		WIZCHIP_WRITE(WIZCHIP_OFFSET_INC(Sn_MSSR(sn),1), (uint8_t) mss); \
+	}
+
+/**
+ * @ingroup Socket_register_access_function
+ * @brief Get @ref Sn_MSSR register
+ * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>.
+ * @return uint16_t. Value of @ref Sn_MSSR.
+ * @sa setSn_MSSR()
+ */
+#define getSn_MSSR(sn) \
+		((WIZCHIP_READ(Sn_MSSR(sn)) << 8) + WIZCHIP_READ(WIZCHIP_OFFSET_INC(Sn_MSSR(sn),1)))
+
+/**
+ * @ingroup Socket_register_access_function
+ * @brief Set @ref Sn_TOS register
+ * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>.
+ * @param (uint8_t)tos Value to set @ref Sn_TOS
+ * @sa getSn_TOS()
+ */
+#define setSn_TOS(sn, tos) \
+		WIZCHIP_WRITE(Sn_TOS(sn), tos)
+
+/**
+ * @ingroup Socket_register_access_function
+ * @brief Get @ref Sn_TOS register
+ * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>.
+ * @return uint8_t. Value of Sn_TOS.
+ * @sa setSn_TOS()
+ */
+#define getSn_TOS(sn) \
+		WIZCHIP_READ(Sn_TOS(sn))
+
+/**
+ * @ingroup Socket_register_access_function
+ * @brief Set @ref Sn_TTL register
+ * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>.
+ * @param (uint8_t)ttl Value to set @ref Sn_TTL
+ * @sa getSn_TTL()
+ */
+#define setSn_TTL(sn, ttl) \
+		WIZCHIP_WRITE(Sn_TTL(sn), ttl)
+
+
+/**
+ * @ingroup Socket_register_access_function
+ * @brief Get @ref Sn_TTL register
+ * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>.
+ * @return uint8_t. Value of @ref Sn_TTL.
+ * @sa setSn_TTL()
+ */
+#define getSn_TTL(sn) \
+		WIZCHIP_READ(Sn_TTL(sn))
+
+
+/**
+ * @ingroup Socket_register_access_function
+ * @brief Set @ref Sn_RXBUF_SIZE register
+ * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>.
+ * @param (uint8_t)rxbufsize Value to set @ref Sn_RXBUF_SIZE
+ * @sa getSn_RXBUF_SIZE()
+ */
+#define setSn_RXBUF_SIZE(sn, rxbufsize) \
+		WIZCHIP_WRITE(Sn_RXBUF_SIZE(sn),rxbufsize)
+
+
+/**
+ * @ingroup Socket_register_access_function
+ * @brief Get @ref Sn_RXBUF_SIZE register
+ * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>.
+ * @return uint8_t. Value of @ref Sn_RXBUF_SIZE.
+ * @sa setSn_RXBUF_SIZE()
+ */
+#define getSn_RXBUF_SIZE(sn) \
+		WIZCHIP_READ(Sn_RXBUF_SIZE(sn))
+
+/**
+ * @ingroup Socket_register_access_function
+ * @brief Set @ref Sn_TXBUF_SIZE register
+ * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>.
+ * @param (uint8_t)txbufsize Value to set @ref Sn_TXBUF_SIZE
+ * @sa getSn_TXBUF_SIZE()
+ */
+#define setSn_TXBUF_SIZE(sn, txbufsize) \
+		WIZCHIP_WRITE(Sn_TXBUF_SIZE(sn), txbufsize)
+
+/**
+ * @ingroup Socket_register_access_function
+ * @brief Get @ref Sn_TXBUF_SIZE register
+ * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>.
+ * @return uint8_t. Value of @ref Sn_TXBUF_SIZE.
+ * @sa setSn_TXBUF_SIZE()
+ */
+#define getSn_TXBUF_SIZE(sn) \
+		WIZCHIP_READ(Sn_TXBUF_SIZE(sn))
+
+/**
+ * @ingroup Socket_register_access_function
+ * @brief Get @ref Sn_TX_FSR register
+ * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>.
+ * @return uint16_t. Value of @ref Sn_TX_FSR.
+ */
+uint16_t getSn_TX_FSR(uint8_t sn);
+
+/**
+ * @ingroup Socket_register_access_function
+ * @brief Get @ref Sn_TX_RD register
+ * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>.
+ * @return uint16_t. Value of @ref Sn_TX_RD.
+ */
+#define getSn_TX_RD(sn) \
+		((WIZCHIP_READ(Sn_TX_RD(sn)) << 8) + WIZCHIP_READ(WIZCHIP_OFFSET_INC(Sn_TX_RD(sn),1)))
+
+/**
+ * @ingroup Socket_register_access_function
+ * @brief Set @ref Sn_TX_WR register
+ * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>.
+ * @param (uint16_t)txwr Value to set @ref Sn_TX_WR
+ * @sa GetSn_TX_WR()
+ */
+#define setSn_TX_WR(sn, txwr) { \
+		WIZCHIP_WRITE(Sn_TX_WR(sn),   (uint8_t)(txwr>>8)); \
+		WIZCHIP_WRITE(WIZCHIP_OFFSET_INC(Sn_TX_WR(sn),1), (uint8_t) txwr); \
+		}
+
+/**
+ * @ingroup Socket_register_access_function
+ * @brief Get @ref Sn_TX_WR register
+ * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>.
+ * @return uint16_t. Value of @ref Sn_TX_WR.
+ * @sa setSn_TX_WR()
+ */
+#define getSn_TX_WR(sn) \
+		((WIZCHIP_READ(Sn_TX_WR(sn)) << 8) + WIZCHIP_READ(WIZCHIP_OFFSET_INC(Sn_TX_WR(sn),1)))
+
+
+/**
+ * @ingroup Socket_register_access_function
+ * @brief Get @ref Sn_RX_RSR register
+ * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>.
+ * @return uint16_t. Value of @ref Sn_RX_RSR.
+ */
+uint16_t getSn_RX_RSR(uint8_t sn);
+
+
+/**
+ * @ingroup Socket_register_access_function
+ * @brief Set @ref Sn_RX_RD register
+ * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>.
+ * @param (uint16_t)rxrd Value to set @ref Sn_RX_RD
+ * @sa getSn_RX_RD()
+ */
+#define setSn_RX_RD(sn, rxrd) { \
+		WIZCHIP_WRITE(Sn_RX_RD(sn),   (uint8_t)(rxrd>>8)); \
+		WIZCHIP_WRITE(WIZCHIP_OFFSET_INC(Sn_RX_RD(sn),1), (uint8_t) rxrd); \
+	}
+
+/**
+ * @ingroup Socket_register_access_function
+ * @brief Get @ref Sn_RX_RD register
+ * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>.
+ * @regurn uint16_t. Value of @ref Sn_RX_RD.
+ * @sa setSn_RX_RD()
+ */
+#define getSn_RX_RD(sn) \
+		((WIZCHIP_READ(Sn_RX_RD(sn)) << 8) + WIZCHIP_READ(WIZCHIP_OFFSET_INC(Sn_RX_RD(sn),1)))
+
+/**
+ * @ingroup Socket_register_access_function
+ * @brief Get @ref Sn_RX_WR register
+ * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>.
+ * @return uint16_t. Value of @ref Sn_RX_WR.
+ */
+#define getSn_RX_WR(sn) \
+		((WIZCHIP_READ(Sn_RX_WR(sn)) << 8) + WIZCHIP_READ(WIZCHIP_OFFSET_INC(Sn_RX_WR(sn),1)))
+
+
+/**
+ * @ingroup Socket_register_access_function
+ * @brief Set @ref Sn_FRAG register
+ * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>.
+ * @param (uint16_t)frag Value to set @ref Sn_FRAG
+ * @sa getSn_FRAD()
+ */
+#define setSn_FRAG(sn, frag) { \
+		WIZCHIP_WRITE(Sn_FRAG(sn),  (uint8_t)(frag >>8)); \
+		WIZCHIP_WRITE(WIZCHIP_OFFSET_INC(Sn_FRAG(sn),1), (uint8_t) frag); \
+	}
+
+/**
+ * @ingroup Socket_register_access_function
+ * @brief Get @ref Sn_FRAG register
+ * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>.
+ * @return uint16_t. Value of @ref Sn_FRAG.
+ * @sa setSn_FRAG()
+ */
+#define getSn_FRAG(sn) \
+		((WIZCHIP_READ(Sn_FRAG(sn)) << 8) + WIZCHIP_READ(WIZCHIP_OFFSET_INC(Sn_FRAG(sn),1)))
+
+/**
+ * @ingroup Socket_register_access_function
+ * @brief Set @ref Sn_KPALVTR register
+ * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>.
+ * @param (uint8_t)kpalvt Value to set @ref Sn_KPALVTR
+ * @sa getSn_KPALVTR()
+ */
+#define setSn_KPALVTR(sn, kpalvt) \
+		WIZCHIP_WRITE(Sn_KPALVTR(sn), kpalvt)
+
+/**
+ * @ingroup Socket_register_access_function
+ * @brief Get @ref Sn_KPALVTR register
+ * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>.
+ * @return uint8_t. Value of @ref Sn_KPALVTR.
+ * @sa setSn_KPALVTR()
+ */
+#define getSn_KPALVTR(sn) \
+		WIZCHIP_READ(Sn_KPALVTR(sn))
+
+//////////////////////////////////////
+
+/////////////////////////////////////
+// Sn_TXBUF & Sn_RXBUF IO function //
+/////////////////////////////////////
+/**  
+ * @brief Gets the max buffer size of socket sn passed as parameter.
+ * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>.
+ * @return uint16_t. Value of Socket n RX max buffer size.
+ */
+#define getSn_RxMAX(sn) \
+		(getSn_RXBUF_SIZE(sn) << 10)
+
+/**  
+ * @brief Gets the max buffer size of socket sn passed as parameters.
+ * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>.
+ * @return uint16_t. Value of Socket n TX max buffer size.
+ */
+//uint16_t getSn_TxMAX(uint8_t sn);
+#define getSn_TxMAX(sn) \
+		(getSn_TXBUF_SIZE(sn) << 10)
+
+/**
+ * @ingroup Basic_IO_function
+ * @brief It copies data to internal TX memory
+ *
+ * @details This function reads the Tx write pointer register and after that,
+ * it copies the <i>wizdata(pointer buffer)</i> of the length of <i>len(variable)</i> bytes to internal TX memory
+ * and updates the Tx write pointer register.
+ * This function is being called by send() and sendto() function also.
+ *
+ * @note User should read upper byte first and lower byte later to get proper value.
+ * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>.
+ * @param wizdata Pointer buffer to write data
+ * @param len Data length
+ * @sa wiz_recv_data()
+ */
+void wiz_send_data(uint8_t sn, uint8_t *wizdata, uint16_t len);
+
+/**
+ * @ingroup Basic_IO_function
+ * @brief It copies data to your buffer from internal RX memory
+ *
+ * @details This function read the Rx read pointer register and after that,
+ * it copies the received data from internal RX memory
+ * to <i>wizdata(pointer variable)</i> of the length of <i>len(variable)</i> bytes.
+ * This function is being called by recv() also.
+ *
+ * @note User should read upper byte first and lower byte later to get proper value.
+ * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>.
+ * @param wizdata Pointer buffer to read data
+ * @param len Data length
+ * @sa wiz_send_data()
+ */
+void wiz_recv_data(uint8_t sn, uint8_t *wizdata, uint16_t len);
+
+/**
+ * @ingroup Basic_IO_function
+ * @brief It discard the received data in RX memory.
+ * @details It discards the data of the length of <i>len(variable)</i> bytes in internal RX memory.
+ * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>.
+ * @param len Data length
+ */
+void wiz_recv_ignore(uint8_t sn, uint16_t len);
+
+#endif   // _W5500_H_
diff --git a/Src/Ethernet/loopback.c b/Src/Ethernet/loopback.c
new file mode 100644
index 0000000..a921092
--- /dev/null
+++ b/Src/Ethernet/loopback.c
@@ -0,0 +1,225 @@
+#include <stdio.h>
+#include "loopback.h"
+#include "socket.h"
+#include "wizchip_conf.h"
+
+#if LOOPBACK_MODE == LOOPBACK_MAIN_NOBLCOK
+
+int32_t loopback_tcps(uint8_t sn, uint8_t* buf, uint16_t port)
+{
+   int32_t ret;
+   uint16_t size = 0, sentsize=0;
+
+#ifdef _LOOPBACK_DEBUG_
+   uint8_t destip[4];
+   uint16_t destport;
+#endif
+
+   switch(getSn_SR(sn))
+   {
+      case SOCK_ESTABLISHED :
+         if(getSn_IR(sn) & Sn_IR_CON)
+         {
+#ifdef _LOOPBACK_DEBUG_
+			getSn_DIPR(sn, destip);
+			destport = getSn_DPORT(sn);
+
+			printf("%d:Connected - %d.%d.%d.%d : %d\r\n",sn, destip[0], destip[1], destip[2], destip[3], destport);
+#endif
+			setSn_IR(sn,Sn_IR_CON);
+         }
+		 if((size = getSn_RX_RSR(sn)) > 0) // Don't need to check SOCKERR_BUSY because it doesn't not occur.
+         {
+			if(size > DATA_BUF_SIZE) size = DATA_BUF_SIZE;
+			ret = recv(sn, buf, size);
+
+			if(ret <= 0) return ret;      // check SOCKERR_BUSY & SOCKERR_XXX. For showing the occurrence of SOCKERR_BUSY.
+			size = (uint16_t) ret;
+			sentsize = 0;
+
+			while(size != sentsize)
+			{
+				ret = send(sn, buf+sentsize, size-sentsize);
+				if(ret < 0)
+				{
+					close(sn);
+					return ret;
+				}
+				sentsize += ret; // Don't care SOCKERR_BUSY, because it is zero.
+			}
+         }
+         break;
+      case SOCK_CLOSE_WAIT :
+#ifdef _LOOPBACK_DEBUG_
+         //printf("%d:CloseWait\r\n",sn);
+#endif
+         if((ret = disconnect(sn)) != SOCK_OK) return ret;
+#ifdef _LOOPBACK_DEBUG_
+         printf("%d:Socket Closed\r\n", sn);
+#endif
+         break;
+      case SOCK_INIT :
+#ifdef _LOOPBACK_DEBUG_
+    	 printf("%d:Listen, TCP server loopback, port [%d]\r\n", sn, port);
+#endif
+         if( (ret = listen(sn)) != SOCK_OK) return ret;
+         break;
+      case SOCK_CLOSED:
+#ifdef _LOOPBACK_DEBUG_
+         //printf("%d:TCP server loopback start\r\n",sn);
+#endif
+         if((ret = socket(sn, Sn_MR_TCP, port, 0x00)) != sn) return ret;
+#ifdef _LOOPBACK_DEBUG_
+         //printf("%d:Socket opened\r\n",sn);
+#endif
+         break;
+      default:
+         break;
+   }
+   return 1;
+}
+
+
+int32_t loopback_tcpc(uint8_t sn, uint8_t* buf, uint8_t* destip, uint16_t destport)
+{
+   int32_t ret; // return value for SOCK_ERRORs
+   uint16_t size = 0, sentsize=0;
+
+   // Destination (TCP Server) IP info (will be connected)
+   // >> loopback_tcpc() function parameter
+   // >> Ex)
+   //	uint8_t destip[4] = 	{192, 168, 0, 214};
+   //	uint16_t destport = 	5000;
+
+   // Port number for TCP client (will be increased)
+   static uint16_t any_port = 	50000;
+
+   // Socket Status Transitions
+   // Check the W5500 Socket n status register (Sn_SR, The 'Sn_SR' controlled by Sn_CR command or Packet send/recv status)
+   switch(getSn_SR(sn))
+   {
+      case SOCK_ESTABLISHED :
+         if(getSn_IR(sn) & Sn_IR_CON)	// Socket n interrupt register mask; TCP CON interrupt = connection with peer is successful
+         {
+#ifdef _LOOPBACK_DEBUG_
+			printf("%d:Connected to - %d.%d.%d.%d : %d\r\n",sn, destip[0], destip[1], destip[2], destip[3], destport);
+#endif
+			setSn_IR(sn, Sn_IR_CON);  // this interrupt should be write the bit cleared to '1'
+         }
+
+         //////////////////////////////////////////////////////////////////////////////////////////////
+         // Data Transaction Parts; Handle the [data receive and send] process
+         //////////////////////////////////////////////////////////////////////////////////////////////
+		 if((size = getSn_RX_RSR(sn)) > 0) // Sn_RX_RSR: Socket n Received Size Register, Receiving data length
+         {
+			if(size > DATA_BUF_SIZE) size = DATA_BUF_SIZE; // DATA_BUF_SIZE means user defined buffer size (array)
+			ret = recv(sn, buf, size); // Data Receive process (H/W Rx socket buffer -> User's buffer)
+
+			if(ret <= 0) return ret; // If the received data length <= 0, receive failed and process end
+			size = (uint16_t) ret;
+			sentsize = 0;
+
+			// Data sentsize control
+			while(size != sentsize)
+			{
+				ret = send(sn, buf+sentsize, size-sentsize); // Data send process (User's buffer -> Destination through H/W Tx socket buffer)
+				if(ret < 0) // Send Error occurred (sent data length < 0)
+				{
+					close(sn); // socket close
+					return ret;
+				}
+				sentsize += ret; // Don't care SOCKERR_BUSY, because it is zero.
+			}
+         }
+		 //////////////////////////////////////////////////////////////////////////////////////////////
+         break;
+
+      case SOCK_CLOSE_WAIT :
+#ifdef _LOOPBACK_DEBUG_
+         //printf("%d:CloseWait\r\n",sn);
+#endif
+         if((ret=disconnect(sn)) != SOCK_OK) return ret;
+#ifdef _LOOPBACK_DEBUG_
+         printf("%d:Socket Closed\r\n", sn);
+#endif
+         break;
+
+      case SOCK_INIT :
+#ifdef _LOOPBACK_DEBUG_
+    	 printf("%d:Try to connect to the %d.%d.%d.%d : %d\r\n", sn, destip[0], destip[1], destip[2], destip[3], destport);
+#endif
+    	 if( (ret = connect(sn, destip, destport)) != SOCK_OK) return ret;	//	Try to TCP connect to the TCP server (destination)
+         break;
+
+      case SOCK_CLOSED:
+    	  close(sn);
+    	  if((ret=socket(sn, Sn_MR_TCP, any_port++, 0x00)) != sn){
+         if(any_port == 0xffff) any_port = 50000;
+         return ret; // TCP socket open with 'any_port' port number
+        } 
+#ifdef _LOOPBACK_DEBUG_
+    	 //printf("%d:TCP client loopback start\r\n",sn);
+         //printf("%d:Socket opened\r\n",sn);
+#endif
+         break;
+      default:
+         break;
+   }
+   return 1;
+}
+
+
+int32_t loopback_udps(uint8_t sn, uint8_t* buf, uint16_t port)
+{
+   int32_t  ret;
+   uint16_t size, sentsize;
+   uint8_t  destip[4];
+   uint16_t destport;
+
+   switch(getSn_SR(sn))
+   {
+      case SOCK_UDP :
+         if((size = getSn_RX_RSR(sn)) > 0)
+         {
+            if(size > DATA_BUF_SIZE) size = DATA_BUF_SIZE;
+            ret = recvfrom(sn, buf, size, destip, (uint16_t*)&destport);
+            if(ret <= 0)
+            {
+#ifdef _LOOPBACK_DEBUG_
+               printf("%d: recvfrom error. %ld\r\n",sn,ret);
+#endif
+               return ret;
+            }
+            size = (uint16_t) ret;
+            sentsize = 0;
+            while(sentsize != size)
+            {
+               ret = sendto(sn, buf+sentsize, size-sentsize, destip, destport);
+               if(ret < 0)
+               {
+#ifdef _LOOPBACK_DEBUG_
+                  printf("%d: sendto error. %ld\r\n",sn,ret);
+#endif
+                  return ret;
+               }
+               sentsize += ret; // Don't care SOCKERR_BUSY, because it is zero.
+            }
+         }
+         break;
+      case SOCK_CLOSED:
+#ifdef _LOOPBACK_DEBUG_
+         //printf("%d:UDP loopback start\r\n",sn);
+#endif
+         if((ret = socket(sn, Sn_MR_UDP, port, 0x00)) != sn)
+            return ret;
+#ifdef _LOOPBACK_DEBUG_
+         printf("%d:Opened, UDP loopback, port [%d]\r\n", sn, port);
+#endif
+         break;
+      default :
+         break;
+   }
+   return 1;
+}
+
+#endif
diff --git a/Src/Ethernet/loopback.h b/Src/Ethernet/loopback.h
new file mode 100644
index 0000000..45c0283
--- /dev/null
+++ b/Src/Ethernet/loopback.h
@@ -0,0 +1,38 @@
+#ifndef _LOOPBACK_H_
+#define _LOOPBACK_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdint.h>
+
+/* Loopback test debug message printout enable */
+// #define	_LOOPBACK_DEBUG_
+
+/* DATA_BUF_SIZE define for Loopback example */
+#ifndef DATA_BUF_SIZE
+	#define DATA_BUF_SIZE			256
+#endif
+
+/************************/
+/* Select LOOPBACK_MODE */
+/************************/
+#define LOOPBACK_MAIN_NOBLOCK    0
+#define LOOPBACK_MODE   LOOPBACK_MAIN_NOBLOCK
+
+
+/* TCP server Loopback test example */
+int32_t loopback_tcps(uint8_t sn, uint8_t* buf, uint16_t port);
+
+/* TCP client Loopback test example */
+int32_t loopback_tcpc(uint8_t sn, uint8_t* buf, uint8_t* destip, uint16_t destport);
+
+/* UDP Loopback test example */
+int32_t loopback_udps(uint8_t sn, uint8_t* buf, uint16_t port);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/Src/Ethernet/socket.c b/Src/Ethernet/socket.c
new file mode 100644
index 0000000..9f7cd84
--- /dev/null
+++ b/Src/Ethernet/socket.c
@@ -0,0 +1,688 @@
+//*****************************************************************************
+//
+//! \file socket.c
+//! \brief SOCKET APIs Implements file.
+//! \details SOCKET APIs like as Berkeley Socket APIs. 
+//! \version 1.0.3
+//! \date 2013/10/21
+//! \par  Revision history
+//!       <2014/05/01> V1.0.3. Refer to M20140501
+//!         1. Implicit type casting -> Explicit type casting.
+//!         2. replace 0x01 with PACK_REMAINED in recvfrom()
+//!         3. Validation a destination ip in connect() & sendto(): 
+//!            It occurs a fatal error on converting unint32 address if uint8* addr parameter is not aligned by 4byte address.
+//!            Copy 4 byte addr value into temporary uint32 variable and then compares it.
+//!       <2013/12/20> V1.0.2 Refer to M20131220
+//!                    Remove Warning.
+//!       <2013/11/04> V1.0.1 2nd Release. Refer to "20131104".
+//!                    In sendto(), Add to clear timeout interrupt status (Sn_IR_TIMEOUT)
+//!       <2013/10/21> 1st Release
+//! \author MidnightCow
+//! \copyright
+//!
+//! Copyright (c)  2013, WIZnet Co., LTD.
+//! All rights reserved.
+//! 
+//! Redistribution and use in source and binary forms, with or without 
+//! modification, are permitted provided that the following conditions 
+//! are met: 
+//! 
+//!     * Redistributions of source code must retain the above copyright 
+//! notice, this list of conditions and the following disclaimer. 
+//!     * Redistributions in binary form must reproduce the above copyright
+//! notice, this list of conditions and the following disclaimer in the
+//! documentation and/or other materials provided with the distribution. 
+//!     * Neither the name of the <ORGANIZATION> nor the names of its 
+//! contributors may be used to endorse or promote products derived 
+//! from this software without specific prior written permission. 
+//! 
+//! THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+//! AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 
+//! IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+//! ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 
+//! LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 
+//! CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 
+//! SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+//! INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 
+//! CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 
+//! ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 
+//! THE POSSIBILITY OF SUCH DAMAGE.
+//
+//*****************************************************************************
+#include "socket.h"
+
+#define SOCK_ANY_PORT_NUM  0xC000;
+
+static uint16_t sock_any_port = SOCK_ANY_PORT_NUM;
+static uint16_t sock_io_mode = 0;
+static uint16_t sock_is_sending = 0;
+static uint16_t sock_remained_size[_WIZCHIP_SOCK_NUM_] = {0,0,};
+static uint8_t  sock_pack_info[_WIZCHIP_SOCK_NUM_] = {0,};
+
+#if _WIZCHIP_ == 5200
+   static uint16_t sock_next_rd[_WIZCHIP_SOCK_NUM_] ={0,};
+#endif
+
+#define CHECK_SOCKNUM()   \
+   do{                    \
+      if(sn > _WIZCHIP_SOCK_NUM_) return SOCKERR_SOCKNUM;   \
+   }while(0);             \
+
+#define CHECK_SOCKMODE(mode)  \
+   do{                     \
+      if((getSn_MR(sn) & 0x0F) != mode) return SOCKERR_SOCKMODE;  \
+   }while(0);              \
+
+#define CHECK_SOCKINIT()   \
+   do{                     \
+      if((getSn_SR(sn) != SOCK_INIT)) return SOCKERR_SOCKINIT; \
+   }while(0);              \
+
+#define CHECK_SOCKDATA()   \
+   do{                     \
+      if(len == 0) return SOCKERR_DATALEN;   \
+   }while(0);              \
+
+
+
+int8_t socket(uint8_t sn, uint8_t protocol, uint16_t port, uint8_t flag)
+{
+	CHECK_SOCKNUM();
+	switch(protocol)
+	{
+      case Sn_MR_TCP :
+      case Sn_MR_UDP :
+      case Sn_MR_MACRAW :
+         break;
+   #if ( _WIZCHIP_ < 5200 )
+      case Sn_MR_IPRAW :
+      case Sn_MR_PPPoE :
+         break;
+   #endif
+      default :
+         return SOCKERR_SOCKMODE;
+	}
+	if((flag & 0x06) != 0) return SOCKERR_SOCKFLAG;
+#if _WIZCHIP_ == 5200
+   if(flag & 0x10) return SOCKERR_SOCKFLAG;
+#endif
+	   
+	if(flag != 0)
+	{
+   	switch(protocol)
+   	{
+   	   case Sn_MR_TCP:
+   	      if((flag & (SF_TCP_NODELAY|SF_IO_NONBLOCK))==0) return SOCKERR_SOCKFLAG;
+   	      break;
+   	   case Sn_MR_UDP:
+   	      if(flag & SF_IGMP_VER2)
+   	      {
+   	         if((flag & SF_MULTI_ENABLE)==0) return SOCKERR_SOCKFLAG;
+   	      }
+   	      #if _WIZCHIP_ == 5500
+      	      if(flag & SF_UNI_BLOCK)
+      	      {
+      	         if((flag & SF_MULTI_ENABLE) == 0) return SOCKERR_SOCKFLAG;
+      	      }
+   	      #endif
+   	      break;
+   	   default:
+   	      break;
+   	}
+   }
+	close(sn);
+	setSn_MR(sn, (protocol | (flag & 0xF0)));
+	if(!port)
+	{
+	   port = sock_any_port++;
+	   if(sock_any_port == 0xFFF0) sock_any_port = SOCK_ANY_PORT_NUM;
+	}
+   setSn_PORT(sn,port);	
+   setSn_CR(sn,Sn_CR_OPEN);
+   while(getSn_CR(sn));
+	sock_io_mode |= ((flag & SF_IO_NONBLOCK) << sn);   
+   sock_is_sending &= ~(1<<sn);
+   sock_remained_size[sn] = 0;
+   sock_pack_info[sn] = 0;
+   while(getSn_SR(sn) == SOCK_CLOSED);
+   return (int8_t)sn;
+}	   
+
+int8_t close(uint8_t sn)
+{
+	CHECK_SOCKNUM();
+	
+	setSn_CR(sn,Sn_CR_CLOSE);
+   /* wait to process the command... */
+	while( getSn_CR(sn) );
+	/* clear all interrupt of the socket. */
+	setSn_IR(sn, 0xFF);
+	sock_is_sending &= ~(1<<sn);
+	sock_remained_size[sn] = 0;
+	sock_pack_info[sn] = 0;
+	while(getSn_SR(sn) != SOCK_CLOSED);
+	return SOCK_OK;
+}
+
+int8_t listen(uint8_t sn)
+{
+	CHECK_SOCKNUM();
+   CHECK_SOCKMODE(Sn_MR_TCP);
+	CHECK_SOCKINIT();
+	setSn_CR(sn,Sn_CR_LISTEN);
+	while(getSn_CR(sn));
+   while(getSn_SR(sn) != SOCK_LISTEN)
+   {
+      if(getSn_CR(sn) == SOCK_CLOSED)
+      {
+         close(sn);
+         return SOCKERR_SOCKCLOSED;
+      }
+   }
+   return SOCK_OK;
+}
+
+
+int8_t connect(uint8_t sn, uint8_t * addr, uint16_t port)
+{
+   CHECK_SOCKNUM();
+   CHECK_SOCKMODE(Sn_MR_TCP);
+   CHECK_SOCKINIT();
+   //M20140501 : For avoiding fatal error on memory align mismatched
+   //if( *((uint32_t*)addr) == 0xFFFFFFFF || *((uint32_t*)addr) == 0) return SOCKERR_IPINVALID;
+   {
+      uint32_t taddr;
+      taddr = ((uint32_t)addr[0] & 0x000000FF);
+      taddr = (taddr << 8) + ((uint32_t)addr[1] & 0x000000FF);
+      taddr = (taddr << 8) + ((uint32_t)addr[2] & 0x000000FF);
+      taddr = (taddr << 8) + ((uint32_t)addr[0] & 0x000000FF);
+      if( taddr == 0xFFFFFFFF || taddr == 0) return SOCKERR_IPINVALID;
+   }
+   //
+	
+	if(port == 0) return SOCKERR_PORTZERO;
+	setSn_DIPR(sn,addr);
+	setSn_DPORT(sn,port);
+   #if _WIZCHIP_ == 5200   // for W5200 ARP errata 
+      setSUBR(0);
+   #endif
+	setSn_CR(sn,Sn_CR_CONNECT);
+   while(getSn_CR(sn));
+   if(sock_io_mode & (1<<sn)) return SOCK_BUSY;
+   while(getSn_SR(sn) != SOCK_ESTABLISHED)
+   {   
+		if (getSn_IR(sn) & Sn_IR_TIMEOUT)
+		{
+			setSn_IR(sn, Sn_IR_TIMEOUT);
+         #if _WIZCHIP_ == 5200   // for W5200 ARP errata 
+            setSUBR((uint8_t*)"\x00\x00\x00\x00");
+         #endif
+         return SOCKERR_TIMEOUT;
+		}
+	}
+   #if _WIZCHIP_ == 5200   // for W5200 ARP errata 
+      setSUBR((uint8_t*)"\x00\x00\x00\x00");
+   #endif
+   
+   return SOCK_OK;
+}
+
+int8_t disconnect(uint8_t sn)
+{
+   CHECK_SOCKNUM();
+   CHECK_SOCKMODE(Sn_MR_TCP);
+	setSn_CR(sn,Sn_CR_DISCON);
+	/* wait to process the command... */
+	while(getSn_CR(sn));
+	sock_is_sending &= ~(1<<sn);
+   if(sock_io_mode & (1<<sn)) return SOCK_BUSY;
+	while(getSn_SR(sn) != SOCK_CLOSED)
+	{
+	   if(getSn_IR(sn) & Sn_IR_TIMEOUT)
+	   {
+	      close(sn);
+	      return SOCKERR_TIMEOUT;
+	   }
+	}
+	return SOCK_OK;
+}
+
+int32_t send(uint8_t sn, uint8_t * buf, uint16_t len)
+{
+   uint8_t tmp=0;
+   uint16_t freesize=0;
+   
+   CHECK_SOCKNUM();
+   CHECK_SOCKMODE(Sn_MR_TCP);
+   CHECK_SOCKDATA();
+   tmp = getSn_SR(sn);
+   if(tmp != SOCK_ESTABLISHED && tmp != SOCK_CLOSE_WAIT) return SOCKERR_SOCKSTATUS;
+   if( sock_is_sending & (1<<sn) )
+   {
+      tmp = getSn_IR(sn);
+      if(tmp & Sn_IR_SENDOK)
+      {
+         setSn_IR(sn, Sn_IR_SENDOK);
+         #if _WZICHIP_ == 5200
+            if(getSn_TX_RD(sn) != sock_next_rd[sn])
+            {
+               setSn_CR(sn,Sn_CR_SEND);
+               while(getSn_CR(sn));
+               return SOCKERR_BUSY;
+            }
+         #endif
+         sock_is_sending &= ~(1<<sn);         
+      }
+      else if(tmp & Sn_IR_TIMEOUT)
+      {
+         close(sn);
+         return SOCKERR_TIMEOUT;
+      }
+      else return SOCK_BUSY;
+   }
+   freesize = getSn_TxMAX(sn);
+   if (len > freesize) len = freesize; // check size not to exceed MAX size.
+   while(1)
+   {
+      freesize = getSn_TX_FSR(sn);
+      tmp = getSn_SR(sn);
+      if ((tmp != SOCK_ESTABLISHED) && (tmp != SOCK_CLOSE_WAIT))
+      {
+         close(sn);
+         return SOCKERR_SOCKSTATUS;
+      }
+      if( (sock_io_mode & (1<<sn)) && (len > freesize) ) return SOCK_BUSY;
+      if(len <= freesize) break;
+   }
+   wiz_send_data(sn, buf, len);
+   #if _WIZCHIP_ == 5200
+      sock_next_rd[sn] = getSn_TX_RD(sn) + len;
+   #endif
+   setSn_CR(sn,Sn_CR_SEND);
+   /* wait to process the command... */
+   while(getSn_CR(sn));
+   sock_is_sending |= (1 << sn);
+   return len;
+}
+
+
+int32_t recv(uint8_t sn, uint8_t * buf, uint16_t len)
+{
+   uint8_t  tmp = 0;
+   uint16_t recvsize = 0;
+   CHECK_SOCKNUM();
+   CHECK_SOCKMODE(Sn_MR_TCP);
+   CHECK_SOCKDATA();
+   
+   recvsize = getSn_RxMAX(sn);
+   if(recvsize < len) len = recvsize;
+   while(1)
+   {
+      recvsize = getSn_RX_RSR(sn);
+      tmp = getSn_SR(sn);
+      if (tmp != SOCK_ESTABLISHED)
+      {
+         if(tmp == SOCK_CLOSE_WAIT)
+         {
+            if(recvsize != 0) break;
+            else if(getSn_TX_FSR(sn) == getSn_TxMAX(sn))
+            {
+               close(sn);
+               return SOCKERR_SOCKSTATUS;
+            }
+         }
+         else
+         {
+            close(sn);
+            return SOCKERR_SOCKSTATUS;
+         }
+      }
+      if((sock_io_mode & (1<<sn)) && (recvsize == 0)) return SOCK_BUSY;
+      if(recvsize != 0) break;
+   };
+   if(recvsize < len) len = recvsize;
+   wiz_recv_data(sn, buf, len);
+   setSn_CR(sn,Sn_CR_RECV);
+   while(getSn_CR(sn));
+   return len;
+}
+
+int32_t sendto(uint8_t sn, uint8_t * buf, uint16_t len, uint8_t * addr, uint16_t port)
+{
+   uint8_t tmp = 0;
+   uint16_t freesize = 0;
+   CHECK_SOCKNUM();
+   switch(getSn_MR(sn) & 0x0F)
+   {
+      case Sn_MR_UDP:
+      case Sn_MR_MACRAW:
+         break;
+      default:
+         return SOCKERR_SOCKMODE;
+   }
+   CHECK_SOCKDATA();
+   //M20140501 : For avoiding fatal error on memory align mismatched
+   //if(*((uint32_t*)addr) == 0) return SOCKERR_IPINVALID;
+   {
+      uint32_t taddr;
+      taddr = ((uint32_t)addr[0]) & 0x000000FF;
+      taddr = (taddr << 8) + ((uint32_t)addr[1] & 0x000000FF);
+      taddr = (taddr << 8) + ((uint32_t)addr[2] & 0x000000FF);
+      taddr = (taddr << 8) + ((uint32_t)addr[3] & 0x000000FF);
+   }
+   //
+   if(*((uint32_t*)addr) == 0) return SOCKERR_IPINVALID;
+   if(port == 0)               return SOCKERR_PORTZERO;
+   tmp = getSn_SR(sn);
+   if(tmp != SOCK_MACRAW && tmp != SOCK_UDP) return SOCKERR_SOCKSTATUS;
+      
+   setSn_DIPR(sn,addr);
+   setSn_DPORT(sn,port);      
+   freesize = getSn_TxMAX(sn);
+   if (len > freesize) len = freesize; // check size not to exceed MAX size.
+   while(1)
+   {
+      freesize = getSn_TX_FSR(sn);
+      if(getSn_SR(sn) == SOCK_CLOSED) return SOCKERR_SOCKCLOSED;
+      if( (sock_io_mode & (1<<sn)) && (len > freesize) ) return SOCK_BUSY;
+      if(len <= freesize) break;
+   };
+	wiz_send_data(sn, buf, len);
+
+   #if _WIZCHIP_ == 5200   // for W5200 ARP errata 
+      setSUBR(0);
+   #endif
+
+	setSn_CR(sn,Sn_CR_SEND);
+	/* wait to process the command... */
+	while(getSn_CR(sn));
+   #if _WIZCHIP_ == 5200   // for W5200 ARP errata 
+      setSUBR((uint8_t*)"\x00\x00\x00\x00");
+   #endif
+   while(1)
+   {
+      tmp = getSn_IR(sn);
+      if(tmp & Sn_IR_SENDOK)
+      {
+         setSn_IR(sn, Sn_IR_SENDOK);
+         break;
+      }
+      //M:20131104
+      //else if(tmp & Sn_IR_TIMEOUT) return SOCKERR_TIMEOUT;
+      else if(tmp & Sn_IR_TIMEOUT)
+      {
+         setSn_IR(sn, Sn_IR_TIMEOUT);
+         return SOCKERR_TIMEOUT;
+      }
+      ////////////
+   }
+	return len;
+}
+
+
+
+int32_t recvfrom(uint8_t sn, uint8_t * buf, uint16_t len, uint8_t * addr, uint16_t *port)
+{
+   uint8_t  mr;
+   uint8_t  head[8];
+	uint16_t pack_len=0;
+
+   CHECK_SOCKNUM();
+   //CHECK_SOCKMODE(Sn_MR_UDP);
+   switch((mr=getSn_MR(sn)) & 0x0F)
+   {
+      case Sn_MR_UDP:
+      case Sn_MR_MACRAW:
+         break;
+   #if ( _WIZCHIP_ < 5200 )         
+      case Sn_MR_IPRAW:
+      case Sn_MR_PPPoE:
+         break;
+   #endif
+      default:
+         return SOCKERR_SOCKMODE;
+   }
+   CHECK_SOCKDATA();
+   if(sock_remained_size[sn] == 0)
+   {
+      while(1)
+      {
+         pack_len = getSn_RX_RSR(sn);
+         if(getSn_SR(sn) == SOCK_CLOSED) return SOCKERR_SOCKCLOSED;
+         if( (sock_io_mode & (1<<sn)) && (pack_len == 0) ) return SOCK_BUSY;
+         if(pack_len != 0) break;
+      };
+   }
+   sock_pack_info[sn] = PACK_COMPLETED;
+	switch (mr & 0x07)
+	{
+	   case Sn_MR_UDP :
+	      if(sock_remained_size[sn] == 0)
+	      {
+   			wiz_recv_data(sn, head, 8);
+   			setSn_CR(sn,Sn_CR_RECV);
+   			while(getSn_CR(sn));
+   			// read peer's IP address, port number & packet length
+    			addr[0] = head[0];
+   			addr[1] = head[1];
+   			addr[2] = head[2];
+   			addr[3] = head[3];
+   			*port = head[4];
+   			*port = (*port << 8) + head[5];
+   			sock_remained_size[sn] = head[6];
+   			sock_remained_size[sn] = (sock_remained_size[sn] << 8) + head[7];
+   			sock_pack_info[sn] = PACK_FIRST;
+   	   }
+			if(len < sock_remained_size[sn]) pack_len = len;
+			else pack_len = sock_remained_size[sn];
+			//
+			// Need to packet length check (default 1472)
+			//
+   		wiz_recv_data(sn, buf, pack_len); // data copy.
+			break;
+	   case Sn_MR_MACRAW :
+	      if(sock_remained_size[sn] == 0)
+	      {
+   			wiz_recv_data(sn, head, 2);
+   			setSn_CR(sn,Sn_CR_RECV);
+   			while(getSn_CR(sn));
+   			// read peer's IP address, port number & packet length
+    			sock_remained_size[sn] = head[0];
+   			sock_remained_size[sn] = (sock_remained_size[sn] <<8) + head[1];
+   			if(sock_remained_size[sn] > 1514) 
+   			{
+   			   close(sn);
+   			   return SOCKFATAL_PACKLEN;
+   			}
+   			sock_pack_info[sn] = PACK_FIRST;
+   	   }
+			if(len < sock_remained_size[sn]) pack_len = len;
+			else pack_len = sock_remained_size[sn];
+			wiz_recv_data(sn,buf,pack_len);
+		   break;
+   #if ( _WIZCHIP_ < 5200 )
+		case Sn_MR_IPRAW:
+		   if(sock_remained_size[sn] == 0)
+		   {
+   			wiz_recv_data(sn, head, 6);
+   			setSn_CR(sn,Sn_CR_RECV);
+   			while(getSn_CR(sn));
+   			addr[0] = head[0];
+   			addr[1] = head[1];
+   			addr[2] = head[2];
+   			addr[3] = head[3];
+   			sock_remained_size[sn] = head[4];
+   			sock_remaiend_size[sn] = (sock_remained_size[sn] << 8) + head[5];
+   			sock_pack_info[sn] = PACK_FIRST;
+         }
+			//
+			// Need to packet length check
+			//
+			if(len < sock_remained_size[sn]) pack_len = len;
+			else pack_len = sock_remained_size[sn];
+   		wiz_recv_data(sn, buf, pack_len); // data copy.
+			break;
+   #endif
+      default:
+         wiz_recv_ignore(sn, pack_len); // data copy.
+         sock_remained_size[sn] = pack_len;
+         break;
+   }
+	setSn_CR(sn,Sn_CR_RECV);
+	/* wait to process the command... */
+	while(getSn_CR(sn)) ;
+	sock_remained_size[sn] -= pack_len;
+	//M20140501 : replace 0x01 with PACK_REMAINED
+	//if(sock_remained_size[sn] != 0) sock_pack_info[sn] |= 0x01;
+	if(sock_remained_size[sn] != 0) sock_pack_info[sn] |= PACK_REMAINED;
+   //
+ 	return pack_len;
+}
+
+
+int8_t  ctlsocket(uint8_t sn, ctlsock_type cstype, void* arg)
+{
+   uint8_t tmp = 0;
+   CHECK_SOCKNUM();
+   switch(cstype)
+   {
+      case CS_SET_IOMODE:
+         tmp = *((uint8_t*)arg);
+         if(tmp == SOCK_IO_NONBLOCK)  sock_io_mode |= (1<<sn);
+         else if(tmp == SOCK_IO_BLOCK) sock_io_mode &= ~(1<<sn);
+         else return SOCKERR_ARG;
+         break;
+      case CS_GET_IOMODE:   
+         //M20140501 : implict type casting -> explict type casting
+         //*((uint8_t*)arg) = (sock_io_mode >> sn) & 0x0001;
+         *((uint8_t*)arg) = (uint8_t)((sock_io_mode >> sn) & 0x0001);
+         //
+         break;
+      case CS_GET_MAXTXBUF:
+         *((uint16_t*)arg) = getSn_TxMAX(sn);
+         break;
+      case CS_GET_MAXRXBUF:    
+         *((uint16_t*)arg) = getSn_RxMAX(sn);
+         break;
+      case CS_CLR_INTERRUPT:
+         if( (*(uint8_t*)arg) > SIK_ALL) return SOCKERR_ARG;
+         setSn_IR(sn,*(uint8_t*)arg);
+         break;
+      case CS_GET_INTERRUPT:
+         *((uint8_t*)arg) = getSn_IR(sn);
+         break;
+      case CS_SET_INTMASK:  
+         if( (*(uint8_t*)arg) > SIK_ALL) return SOCKERR_ARG;
+         setSn_IMR(sn,*(uint8_t*)arg);
+         break;
+      case CS_GET_INTMASK:   
+         *((uint8_t*)arg) = getSn_IMR(sn);
+      default:
+         return SOCKERR_ARG;
+   }
+   return SOCK_OK;
+}
+
+int8_t  setsockopt(uint8_t sn, sockopt_type sotype, void* arg)
+{
+ // M20131220 : Remove warning
+ //uint8_t tmp;
+   CHECK_SOCKNUM();
+   switch(sotype)
+   {
+      case SO_TTL:
+         setSn_TTL(sn,*(uint8_t*)arg);
+         break;
+      case SO_TOS:
+         setSn_TOS(sn,*(uint8_t*)arg);
+         break;
+      case SO_MSS:
+         setSn_MSSR(sn,*(uint16_t*)arg);
+         break;
+      case SO_DESTIP:
+         setSn_DIPR(sn, (uint8_t*)arg);
+         break;
+      case SO_DESTPORT:
+         setSn_DPORT(sn, *(uint16_t*)arg);
+         break;
+#if _WIZCHIP_ != 5100
+      case SO_KEEPALIVESEND:
+         CHECK_SOCKMODE(Sn_MR_TCP);
+         #if _WIZCHIP_ > 5200
+            if(getSn_KPALVTR(sn) != 0) return SOCKERR_SOCKOPT;
+         #endif
+            setSn_CR(sn,Sn_CR_SEND_KEEP);
+            while(getSn_CR(sn) != 0)
+            {
+               // M20131220
+         		//if ((tmp = getSn_IR(sn)) & Sn_IR_TIMEOUT)
+               if (getSn_IR(sn) & Sn_IR_TIMEOUT)
+         		{
+         			setSn_IR(sn, Sn_IR_TIMEOUT);
+                  return SOCKERR_TIMEOUT;
+         		}
+            }
+         break;
+   #if _WIZCHIP_ > 5200
+      case SO_KEEPALIVEAUTO:
+         CHECK_SOCKMODE(Sn_MR_TCP);
+         setSn_KPALVTR(sn,*(uint8_t*)arg);
+         break;
+   #endif      
+#endif   
+      default:
+         return SOCKERR_ARG;
+   }   
+   return SOCK_OK;
+}
+
+int8_t  getsockopt(uint8_t sn, sockopt_type sotype, void* arg)
+{
+   CHECK_SOCKNUM();
+   switch(sotype)
+   {
+      case SO_FLAG:
+         *(uint8_t*)arg = getSn_MR(sn) & 0xF0;
+         break;
+      case SO_TTL:
+         *(uint8_t*) arg = getSn_TTL(sn);
+         break;
+      case SO_TOS:
+         *(uint8_t*) arg = getSn_TOS(sn);
+         break;
+      case SO_MSS:   
+         *(uint8_t*) arg = getSn_MSSR(sn);
+      case SO_DESTIP:
+         getSn_DIPR(sn, (uint8_t*)arg);
+         break;
+      case SO_DESTPORT:  
+         *(uint16_t*) arg = getSn_DPORT(sn);
+         break;
+   #if _WIZCHIP_ > 5200   
+      case SO_KEEPALIVEAUTO:
+         CHECK_SOCKMODE(Sn_MR_TCP);
+         *(uint16_t*) arg = getSn_KPALVTR(sn);
+         break;
+   #endif      
+      case SO_SENDBUF:
+         *(uint16_t*) arg = getSn_TX_FSR(sn);
+      case SO_RECVBUF:
+         *(uint16_t*) arg = getSn_RX_RSR(sn);
+      case SO_STATUS:
+         *(uint8_t*) arg = getSn_SR(sn);
+         break;
+      case SO_REMAINSIZE:
+         if(getSn_MR(sn) == Sn_MR_TCP)
+            *(uint16_t*)arg = getSn_RX_RSR(sn);
+         else
+            *(uint16_t*)arg = sock_remained_size[sn];
+         break;
+      case SO_PACKINFO:
+         CHECK_SOCKMODE(Sn_MR_TCP);
+         *(uint8_t*)arg = sock_pack_info[sn];
+         break;
+      default:
+         return SOCKERR_SOCKOPT;
+   }
+   return SOCK_OK;
+}
diff --git a/Src/Ethernet/socket.h b/Src/Ethernet/socket.h
new file mode 100644
index 0000000..f85e3c9
--- /dev/null
+++ b/Src/Ethernet/socket.h
@@ -0,0 +1,466 @@
+//*****************************************************************************
+//
+//! \file socket.h
+//! \brief SOCKET APIs Header file.
+//! \details SOCKET APIs like as berkeley socket api. 
+//! \version 1.0.2
+//! \date 2013/10/21
+//! \par  Revision history
+//!       <2014/05/01> V1.0.2. Refer to M20140501
+//!         1. Modify the comment : SO_REMAINED -> PACK_REMAINED
+//!         2. Add the comment as zero byte udp data reception in getsockopt(). 
+//!       <2013/10/21> 1st Release
+//! \author MidnightCow
+//! \copyright
+//!
+//! Copyright (c)  2013, WIZnet Co., LTD.
+//! All rights reserved.
+//! 
+//! Redistribution and use in source and binary forms, with or without 
+//! modification, are permitted provided that the following conditions 
+//! are met: 
+//! 
+//!     * Redistributions of source code must retain the above copyright 
+//! notice, this list of conditions and the following disclaimer. 
+//!     * Redistributions in binary form must reproduce the above copyright
+//! notice, this list of conditions and the following disclaimer in the
+//! documentation and/or other materials provided with the distribution. 
+//!     * Neither the name of the <ORGANIZATION> nor the names of its 
+//! contributors may be used to endorse or promote products derived 
+//! from this software without specific prior written permission. 
+//! 
+//! THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+//! AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 
+//! IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+//! ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 
+//! LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 
+//! CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 
+//! SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+//! INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 
+//! CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 
+//! ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 
+//! THE POSSIBILITY OF SUCH DAMAGE.
+//
+//*****************************************************************************
+/**
+ * @defgroup WIZnet_socket_APIs 1. WIZnet socket APIs
+ * @brief WIZnet socket APIs are based on Berkeley socket APIs,  thus it has much similar name and interface.
+ *        But there is a little bit of difference.
+ * @details
+ * <b> Comparison between WIZnet and Berkeley SOCKET APIs </b>
+ * <table>
+ *    <tr>   <td><b>API</b></td> <td><b>WIZnet</b></td> <td><b>Berkeley</b></td>   </tr>
+ *    <tr>   <td>socket()</td> <td>O</td> <td>O</td>   </tr>
+ *    <tr>   <td><b>bind()</b></td> <td>X</td> <td>O</td>   </tr>
+ *    <tr>   <td><b>listen()</b></td> <td>O</td> <td>O</td>   </tr>
+ *    <tr>   <td><b>connect()</b></td> <td>O</td> <td>O</td>   </tr>
+ *    <tr>   <td><b>accept()</b></td> <td>X</td> <td>O</td>   </tr>
+ *    <tr>   <td><b>recv()</b></td> <td>O</td> <td>O</td>    </tr>
+ *    <tr>   <td><b>send()</b></td> <td>O</td> <td>O</td>   </tr>
+ *    <tr>   <td><b>recvfrom()</b></td> <td>O</td> <td>O</td>   </tr>
+ *    <tr>   <td><b>sendto()</b></td> <td>O</td> <td>O</td>    </tr>
+ *    <tr>   <td><b>closesocket()</b></td> <td>O<br>close() & disconnect()</td> <td>O</td>   </tr>
+ * </table>
+ * There are @b bind() and @b accept() functions in @b Berkeley SOCKET API but,
+ * not in @b WIZnet SOCKET API. Because socket() of WIZnet is not only creating a SOCKET but also binding a local port number,
+ * and listen() of WIZnet is not only listening to connection request from client but also accepting the connection request. \n
+ * When you program "TCP SERVER" with Berkeley SOCKET API, you can use only one listen port.
+ * When the listen SOCKET accepts a connection request from a client, it keeps listening.
+ * After accepting the connection request, a new SOCKET is created and the new SOCKET is used in communication with the client. \n
+ * Following figure shows network flow diagram by Berkeley SOCKET API.
+ * @image html Berkeley_SOCKET.jpg "<Berkeley SOCKET API>"
+ * But, When you program "TCP SERVER" with WIZnet SOCKET API, you can use as many as 8 listen SOCKET with same port number. \n
+ * Because there's no accept() in WIZnet SOCKET APIs, when the listen SOCKET accepts a connection request from a client,
+ * it is changed in order to communicate with the client.
+ * And the changed SOCKET is not listening any more and is dedicated for communicating with the client. \n
+ * If there're many listen SOCKET with same listen port number and a client requests a connection,
+ * the SOCKET which has the smallest SOCKET number accepts the request and is changed as communication SOCKET. \n
+ * Following figure shows network flow diagram by WIZnet SOCKET API.
+ * @image html WIZnet_SOCKET.jpg "<WIZnet SOCKET API>"
+ */
+#ifndef _SOCKET_H_
+#define _SOCKET_H_
+
+#include "Ethernet/wizchip_conf.h"
+
+#define SOCKET                uint8_t  ///< SOCKET type define for legacy driver
+
+#define SOCK_OK               1        ///< Result is OK about socket process.
+#define SOCK_BUSY             0        ///< Socket is busy on processing the operation. Valid only Non-block IO Mode.
+#define SOCK_FATAL            -1000    ///< Result is fatal error about socket process.
+
+#define SOCK_ERROR            0        
+#define SOCKERR_SOCKNUM       (SOCK_ERROR - 1)     ///< Invalid socket number
+#define SOCKERR_SOCKOPT       (SOCK_ERROR - 2)     ///< Invalid socket option
+#define SOCKERR_SOCKINIT      (SOCK_ERROR - 3)     ///< Socket is not initialized
+#define SOCKERR_SOCKCLOSED    (SOCK_ERROR - 4)     ///< Socket unexpectedly closed.
+#define SOCKERR_SOCKMODE      (SOCK_ERROR - 5)     ///< Invalid socket mode for socket operation.
+#define SOCKERR_SOCKFLAG      (SOCK_ERROR - 6)     ///< Invalid socket flag
+#define SOCKERR_SOCKSTATUS    (SOCK_ERROR - 7)     ///< Invalid socket status for socket operation.
+#define SOCKERR_ARG           (SOCK_ERROR - 10)    ///< Invalid argrument.
+#define SOCKERR_PORTZERO      (SOCK_ERROR - 11)    ///< Port number is zero
+#define SOCKERR_IPINVALID     (SOCK_ERROR - 12)    ///< Invalid IP address
+#define SOCKERR_TIMEOUT       (SOCK_ERROR - 13)    ///< Timeout occurred
+#define SOCKERR_DATALEN       (SOCK_ERROR - 14)    ///< Data length is zero or greater than buffer max size.
+#define SOCKERR_BUFFER        (SOCK_ERROR - 15)    ///< Socket buffer is not enough for data communication.
+
+#define SOCKFATAL_PACKLEN     (SOCK_FATAL - 1)     ///< Invalid packet length. Fatal Error.
+
+/*
+ * SOCKET FLAG
+ */
+#define SF_ETHER_OWN           (Sn_MR_MFEN)        ///< In \ref Sn_MR_MACRAW, Receive only the packet as broadcast, multicast and own packet
+#define SF_IGMP_VER2           (Sn_MR_MC)          ///< In \ref Sn_MR_UDP with \ref SF_MULTI_ENABLE, Select IGMP version 2.   
+#define SF_TCP_NODELAY         (Sn_MR_ND)          ///< In \ref Sn_MR_TCP, Use to nodelayed ack.
+#define SF_MULTI_ENABLE        (Sn_MR_MULTI)       ///< In \ref Sn_MR_UDP, Enable multicast mode.
+
+#if _WIZCHIP_ == 5500
+   #define SF_BROAD_BLOCK         (Sn_MR_BCASTB)   ///< In \ref Sn_MR_UDP or \ref Sn_MR_MACRAW, Block broadcast packet. Valid only in W5500
+   #define SF_MULTI_BLOCK         (Sn_MR_MMB)      ///< In \ref Sn_MR_MACRAW, Block multicast packet. Valid only in W5500
+   #define SF_IPv6_BLOCK          (Sn_MR_MIP6B)    ///< In \ref Sn_MR_MACRAW, Block IPv6 packet. Valid only in W5500
+   #define SF_UNI_BLOCK           (Sn_MR_UCASTB)   ///< In \ref Sn_MR_UDP with \ref SF_MULTI_ENABLE. Valid only in W5500
+#endif
+
+#define SF_IO_NONBLOCK           0x01              ///< Socket nonblock io mode. It used parameter in \ref socket().
+
+/*
+ * UDP & MACRAW Packet Infomation
+ */
+#define PACK_FIRST               0x80              ///< In Non-TCP packet, It indicates to start receiving a packet.
+#define PACK_REMAINED            0x01              ///< In Non-TCP packet, It indicates to remain a packet to be received.
+#define PACK_COMPLETED           0x00              ///< In Non-TCP packet, It indicates to complete to receive a packet.
+
+/**
+ * @ingroup WIZnet_socket_APIs
+ * @brief Open a socket.
+ * @details Initializes the socket with 'sn' passed as parameter and open.
+ *
+ * @param sn Socket number. It should be <b>0 ~ @ref \_WIZCHIP_SOCK_NUM_</b>.
+ * @param protocol Protocol type to operate such as TCP, UDP and MACRAW.
+ * @param port Port number to be bined.
+ * @param flag Socket flags as \ref SF_ETHER_OWN, \ref SF_IGMP_VER2, \ref SF_TCP_NODELAY, \ref SF_MULTI_ENABLE, \ref SF_IO_NONBLOCK and so on.\n
+ *             Valid flags only in W5500 : @ref SF_BROAD_BLOCK, @ref SF_MULTI_BLOCK, @ref SF_IPv6_BLOCK, and @ref SF_UNI_BLOCK.
+ * @sa Sn_MR
+ *
+ * @return @b Success : The socket number @b 'sn' passed as parameter\n
+ *         @b Fail    :\n @ref SOCKERR_SOCKNUM     - Invalid socket number\n
+ *                        @ref SOCKERR_SOCKMODE    - Not support socket mode as TCP, UDP, and so on. \n
+ *                        @ref SOCKERR_SOCKFLAG    - Invaild socket flag.
+ */
+int8_t  socket(uint8_t sn, uint8_t protocol, uint16_t port, uint8_t flag);
+
+/**
+ * @ingroup WIZnet_socket_APIs
+ * @brief Close a socket.
+ * @details It closes the socket  with @b'sn' passed as parameter.
+ *
+ * @param sn Socket number. It should be <b>0 ~ @ref \_WIZCHIP_SOCK_NUM_</b>.
+ *
+ * @return @b Success : @ref SOCK_OK \n
+ *         @b Fail    : @ref SOCKERR_SOCKNUM - Invalid socket number
+ */
+int8_t  close(uint8_t sn);
+
+/**
+ * @ingroup WIZnet_socket_APIs
+ * @brief Listen to a connection request from a client.
+ * @details It is listening to a connection request from a client.
+ * If connection request is accepted successfully, the connection is established. Socket sn is used in passive(server) mode.
+ *
+ * @param sn Socket number. It should be <b>0 ~ @ref \_WIZCHIP_SOCK_NUM_</b>.
+ * @return @b Success : @ref SOCK_OK \n
+ *         @b Fail    :\n @ref SOCKERR_SOCKINIT   - Socket is not initialized \n
+ *                        @ref SOCKERR_SOCKCLOSED - Socket closed unexpectedly.
+ */
+int8_t  listen(uint8_t sn);
+
+/**
+ * @ingroup WIZnet_socket_APIs
+ * @brief Try to connect a server.
+ * @details It requests connection to the server with destination IP address and port number passed as parameter.\n
+ * @note It is valid only in TCP client mode. 
+ *       In block io mode, it does not return until connection is completed.
+ *       In Non-block io mode, it return @ref SOCK_BUSY immediatly.
+ *
+ * @param sn Socket number. It should be <b>0 ~ @ref \_WIZCHIP_SOCK_NUM_</b>.
+ * @param addr Pointer variable of destination IP address. It should be allocated 4 bytes.
+ * @param port Destination port number.
+ *
+ * @return @b Success : @ref SOCK_OK \n
+ * @b Fail    :\n @ref SOCKERR_SOCKNUM   - Invalid socket number\n
+ *                @ref SOCKERR_SOCKMODE  - Invalid socket mode\n
+ *                @ref SOCKERR_SOCKINIT  - Socket is not initialized\n
+ *                @ref SOCKERR_IPINVALID - Wrong server IP address\n
+ *                @ref SOCKERR_PORTZERO  - Server port zero\n
+ *                @ref SOCKERR_TIMEOUT   - Timeout occurred during request connection\n
+ *                @ref SOCK_BUSY         - In non-block io mode, it returned immediatly\n 
+ */
+int8_t  connect(uint8_t sn, uint8_t * addr, uint16_t port);
+
+/**
+ * @ingroup WIZnet_socket_APIs
+ * @brief Try to disconnect a connection socket.
+ * @details It sends request message to disconnect the TCP socket 'sn' passed as parameter to the server or client.
+ * @note It is valid only in TCP server or client mode. \n
+ *       In block io mode, it does not return until disconnection is completed. \n
+ *       In Non-block io mode, it return @ref SOCK_BUSY immediatly. \n
+
+ * @param sn Socket number. It should be <b>0 ~ @ref \_WIZCHIP_SOCK_NUM_</b>.
+ * @return @b Success :   @ref SOCK_OK \n
+ *         @b Fail    :\n @ref SOCKERR_SOCKNUM  - Invalid socket number \n
+ *                        @ref SOCKERR_SOCKMODE - Invalid operation in the socket \n
+ *                        @ref SOCKERR_TIMEOUT  - Timeout occurred \n
+ *                        @ref SOCK_BUSY        - Socket is busy.
+ */
+int8_t  disconnect(uint8_t sn);
+
+/**
+ * @ingroup WIZnet_socket_APIs
+ * @brief	Send data to the connected peer in TCP socket.
+ * @details It is used to send outgoing data to the connected socket.
+ * @note    It is valid only in TCP server or client mode. It can't send data greater than socket buffer size. \n
+ *          In block io mode, It doesn't return until data send is completed - socket buffer size is greater than data. \n
+ *          In non-block io mode, It return @ref SOCK_BUSY immediatly when socket buffer is not enough. \n
+ * @param sn Socket number. It should be <b>0 ~ @ref \_WIZCHIP_SOCK_NUM_</b>.
+ * @param buf Pointer buffer containing data to be sent.
+ * @param len The byte length of data in buf.
+ * @return	@b Success : The sent data size \n
+ *          @b Fail    : \n @ref SOCKERR_SOCKSTATUS - Invalid socket status for socket operation \n
+ *                          @ref SOCKERR_TIMEOUT    - Timeout occurred \n
+ *                          @ref SOCKERR_SOCKMODE 	- Invalid operation in the socket \n
+ *                          @ref SOCKERR_SOCKNUM    - Invalid socket number \n
+ *                          @ref SOCKERR_DATALEN    - zero data length \n
+ *                          @ref SOCK_BUSY          - Socket is busy.
+ */
+int32_t send(uint8_t sn, uint8_t * buf, uint16_t len);
+
+/**
+ * @ingroup WIZnet_socket_APIs
+ * @brief	Receive data from the connected peer.
+ * @details It is used to read incoming data from the connected socket.\n
+ *          It waits for data as much as the application wants to receive.
+ * @note    It is valid only in TCP server or client mode. It can't receive data greater than socket buffer size. \n
+ *          In block io mode, it doesn't return until data reception is completed - data is filled as <I>len</I> in socket buffer. \n
+ *          In non-block io mode, it return @ref SOCK_BUSY immediatly when <I>len</I> is greater than data size in socket buffer. \n
+ *
+ * @param sn  Socket number. It should be <b>0 ~ @ref \_WIZCHIP_SOCK_NUM_</b>.
+ * @param buf Pointer buffer to read incoming data.
+ * @param len The max data length of data in buf.
+ * @return	@b Success : The real received data size \n
+ *          @b Fail    :\n
+ *                     @ref SOCKERR_SOCKSTATUS - Invalid socket status for socket operation \n
+ *                     @ref SOCKERR_SOCKMODE   - Invalid operation in the socket \n
+ *                     @ref SOCKERR_SOCKNUM    - Invalid socket number \n
+ *                     @ref SOCKERR_DATALEN    - zero data length \n
+ *                     @ref SOCK_BUSY          - Socket is busy.
+ */
+int32_t recv(uint8_t sn, uint8_t * buf, uint16_t len);
+
+/**
+ * @ingroup WIZnet_socket_APIs
+ * @brief	Sends datagram to the peer with destination IP address and port number passed as parameter.
+ * @details It sends datagram of UDP or MACRAW to the peer with destination IP address and port number passed as parameter.\n
+ *          Even if the connectionless socket has been previously connected to a specific address,
+ *          the address and port number parameters override the destination address for that particular datagram only.
+ * @note    In block io mode, It doesn't return until data send is completed - socket buffer size is greater than <I>len</I>.
+ *          In non-block io mode, It return @ref SOCK_BUSY immediatly when socket buffer is not enough.
+ *
+ * @param sn    Socket number. It should be <b>0 ~ @ref \_WIZCHIP_SOCK_NUM_</b>.
+ * @param buf   Pointer buffer to send outgoing data.
+ * @param len   The byte length of data in buf.
+ * @param addr  Pointer variable of destination IP address. It should be allocated 4 bytes.
+ * @param port  Destination port number.
+ *
+ * @return @b Success : The sent data size \n
+ *         @b Fail    :\n @ref SOCKERR_SOCKNUM     - Invalid socket number \n
+ *                        @ref SOCKERR_SOCKMODE    - Invalid operation in the socket \n
+ *                        @ref SOCKERR_SOCKSTATUS  - Invalid socket status for socket operation \n
+ *                        @ref SOCKERR_DATALEN     - zero data length \n
+ *                        @ref SOCKERR_IPINVALID   - Wrong server IP address\n
+ *                        @ref SOCKERR_PORTZERO    - Server port zero\n
+ *                        @ref SOCKERR_SOCKCLOSED  - Socket unexpectedly closed \n
+ *                        @ref SOCKERR_TIMEOUT     - Timeout occurred \n
+ *                        @ref SOCK_BUSY           - Socket is busy. 
+ */
+int32_t sendto(uint8_t sn, uint8_t * buf, uint16_t len, uint8_t * addr, uint16_t port);
+
+/**
+ * @ingroup WIZnet_socket_APIs
+ * @brief Receive datagram of UDP or MACRAW
+ * @details This function is an application I/F function which is used to receive the data in other then TCP mode. \n
+ *          This function is used to receive UDP and MAC_RAW mode, and handle the header as well. 
+ *          This function can divide to received the packet data.
+ *          On the MACRAW SOCKET, the addr and port parameters are ignored.
+ * @note    In block io mode, it doesn't return until data reception is completed - data is filled as <I>len</I> in socket buffer
+ *          In non-block io mode, it return @ref SOCK_BUSY immediatly when <I>len</I> is greater than data size in socket buffer.
+ *
+ * @param sn   Socket number. It should be <b>0 ~ @ref \_WIZCHIP_SOCK_NUM_</b>.
+ * @param buf  Pointer buffer to read incoming data.
+ * @param len  The max data length of data in buf. 
+ *             When the received packet size <= len, receives data as packet sized.
+ *             When others, receives data as len.
+ * @param addr Pointer variable of destination IP address. It should be allocated 4 bytes.
+ *             It is valid only when the first call recvfrom for receiving the packet.
+ *             When it is valid, @ref  packinfo[7] should be set as '1' after call @ref getsockopt(sn, SO_PACKINFO, &packinfo).
+ * @param port Pointer variable of destination port number.
+ *             It is valid only when the first call recvform for receiving the packet.
+*             When it is valid, @ref  packinfo[7] should be set as '1' after call @ref getsockopt(sn, SO_PACKINFO, &packinfo).
+ *
+ * @return	@b Success : This function return real received data size for success.\n
+ *          @b Fail    : @ref SOCKERR_DATALEN    - zero data length \n
+ *                       @ref SOCKERR_SOCKMODE   - Invalid operation in the socket \n
+ *                       @ref SOCKERR_SOCKNUM    - Invalid socket number \n
+ *                       @ref SOCKBUSY           - Socket is busy.
+ */
+int32_t recvfrom(uint8_t sn, uint8_t * buf, uint16_t len, uint8_t * addr, uint16_t *port);
+
+
+/////////////////////////////
+// SOCKET CONTROL & OPTION //
+/////////////////////////////
+#define SOCK_IO_BLOCK         0  ///< Socket Block IO Mode in @ref setsockopt().
+#define SOCK_IO_NONBLOCK      1  ///< Socket Non-block IO Mode in @ref setsockopt().
+
+/**
+ * @defgroup DATA_TYPE DATA TYPE
+ */
+
+/**
+ * @ingroup DATA_TYPE
+ * @brief The kind of Socket Interrupt.
+ * @sa Sn_IR, Sn_IMR, setSn_IR(), getSn_IR(), setSn_IMR(), getSn_IMR()
+ */
+typedef enum
+{
+   SIK_CONNECTED     = (1 << 0),    ///< conntected
+   SIK_DISCONNECTED  = (1 << 1),    ///< disconnected
+   SIK_RECEIVED      = (1 << 2),    ///< data received
+   SIK_TIMEOUT       = (1 << 3),    ///< timeout occured
+   SIK_SENT          = (1 << 4),    ///< send ok
+   SIK_ALL           = 0x1F,        ///< all interrupt
+}sockint_kind;
+
+/**
+ * @ingroup DATA_TYPE
+ * @brief The type of @ref ctlsocket().
+ */
+typedef enum
+{
+   CS_SET_IOMODE,          ///< set socket IO mode with @ref SOCK_IO_BLOCK or @ref SOCK_IO_NONBLOCK
+   CS_GET_IOMODE,          ///< get socket IO mode
+   CS_GET_MAXTXBUF,        ///< get the size of socket buffer allocated in TX memory
+   CS_GET_MAXRXBUF,        ///< get the size of socket buffer allocated in RX memory
+   CS_CLR_INTERRUPT,       ///< clear the interrupt of socket with @ref sockint_kind
+   CS_GET_INTERRUPT,       ///< get the socket interrupt. refer to @ref sockint_kind
+   CS_SET_INTMASK,         ///< set the interrupt mask of socket with @ref sockint_kind
+   CS_GET_INTMASK          ///< get the masked interrupt of socket. refer to @ref sockint_kind
+}ctlsock_type;
+
+
+/**
+ * @ingroup DATA_TYPE
+ * @brief The type of socket option in @ref setsockopt() or @ref getsockopt()
+ */ 
+typedef enum
+{
+   SO_FLAG,           ///< Valid only in getsockopt(), For set flag of socket refer to <I>flag</I> in @ref socket().
+   SO_TTL,              ///< Set/Get TTL. @ref Sn_TTL  ( @ref setSn_TTL(), @ref getSn_TTL() )
+   SO_TOS,              ///< Set/Get TOS. @ref Sn_TOS  ( @ref setSn_TOS(), @ref getSn_TOS() )
+   SO_MSS,              ///< Set/Get MSS. @ref Sn_MSSR ( @ref setSn_MSSR(), @ref getSn_MSSR() )
+   SO_DESTIP,           ///< Set/Get the destination IP address. @ref Sn_DIPR ( @ref setSn_DIPR(), @ref getSn_DIPR() )
+   SO_DESTPORT,         ///< Set/Get the destionation Port number. @ref Sn_DPORT ( @ref setSn_DPORT(), @ref getSn_DPORT() )
+#if _WIZCHIP_ != 5100   
+   SO_KEEPALIVESEND,    ///< Valid only in setsockopt. Manually send keep-alive packet in TCP mode
+   #if _WIZCHIP_ > 5200   
+      SO_KEEPALIVEAUTO, ///< Set/Get keep-alive auto transmittion timer in TCP mode
+   #endif      
+#endif
+   SO_SENDBUF,          ///< Valid only in getsockopt. Get the free data size of Socekt TX buffer. @ref Sn_TX_FSR, @ref getSn_TX_FSR()
+   SO_RECVBUF,          ///< Valid only in getsockopt. Get the received data size in socket RX buffer. @ref Sn_RX_RSR, @ref getSn_RX_RSR()
+   SO_STATUS,           ///< Valid only in getsockopt. Get the socket status. @ref Sn_SR, @ref getSn_SR()
+   SO_REMAINSIZE,       ///< Valid only in getsockopt. Get the remained packet size in other then TCP mode.
+   SO_PACKINFO          ///< Valid only in getsockopt. Get the packet information as @ref PACK_FIRST, @ref PACK_REMAINED, and @ref PACK_COMPLETED in other then TCP mode.
+}sockopt_type;
+
+/**
+ * @ingroup WIZnet_socket_APIs
+ *  @brief Control socket.
+ *  @details Control IO mode, Interrupt & Mask of socket and get the socket buffer information.
+ *           Refer to @ref ctlsock_type.
+ *  @param sn socket number
+ *  @param cstype type of control socket. refer to @ref ctlsock_type.
+ *  @param arg Data type and value is determined according to @ref ctlsock_type. \n
+ *             <table>
+ *                  <tr> <td> @b cstype </td> <td> @b data type</td><td>@b value</td></tr>
+ *                  <tr> <td> @ref CS_SET_IOMODE \n @ref CS_GET_IOMODE </td> <td> uint8_t </td><td>@ref SOCK_IO_BLOCK @ref SOCK_IO_NONBLOCK</td></tr>
+ *                  <tr> <td> @ref CS_GET_MAXTXBUF \n @ref CS_GET_MAXRXBUF </td> <td> uint16_t </td><td> 0 ~ 16K </td></tr>
+ *                  <tr> <td> @ref CS_CLR_INTERRUPT \n @ref CS_GET_INTERRUPT \n @ref CS_SET_INTMASK \n @ref CS_GET_INTMASK </td> <td> @ref sockint_kind </td><td> @ref SIK_CONNECTED, etc.  </td></tr> 
+ *             </table>
+ *  @return @b Success @ref SOCK_OK \n
+ *          @b fail    @ref SOCKERR_ARG         - Invalid argument\n
+ */
+int8_t  ctlsocket(uint8_t sn, ctlsock_type cstype, void* arg);
+
+/** 
+ * @ingroup WIZnet_socket_APIs
+ *  @brief set socket options
+ *  @details Set socket option like as TTL, MSS, TOS, and so on. Refer to @ref sockopt_type.
+ *               
+ *  @param sn socket number
+ *  @param sotype socket option type. refer to @ref sockopt_type
+ *  @param arg Data type and value is determined according to <I>sotype</I>. \n
+ *             <table>
+ *                  <tr> <td> @b sotype </td> <td> @b data type</td><td>@b value</td></tr> 
+ *                  <tr> <td> @ref SO_TTL </td> <td> uint8_t </td><td> 0 ~ 255 </td> </tr>
+ *                  <tr> <td> @ref SO_TOS </td> <td> uint8_t </td><td> 0 ~ 255 </td> </tr>
+ *                  <tr> <td> @ref SO_MSS </td> <td> uint16_t </td><td> 0 ~ 65535 </td> </tr>
+ *                  <tr> <td> @ref SO_DESTIP </td> <td> uint8_t[4] </td><td>  </td></tr> 
+ *                  <tr> <td> @ref SO_DESTPORT </td> <td> uint16_t </td><td> 0 ~ 65535 </td></tr> 
+ *                  <tr> <td> @ref SO_KEEPALIVESEND </td> <td> null </td><td> null </td></tr> 
+ *                  <tr> <td> @ref SO_KEEPALIVEAUTO </td> <td> uint8_t </td><td> 0 ~ 255 </td></tr> 
+ *             </table>
+ * @return 
+ * - @b Success : @ref SOCK_OK \n
+ * - @b Fail 
+ *  - @ref SOCKERR_SOCKNUM     - Invalid Socket number \n
+ *  - @ref SOCKERR_SOCKMODE    - Invalid socket mode \n
+ *  - @ref SOCKERR_SOCKOPT     - Invalid socket option or its value \n
+ *  - @ref SOCKERR_TIMEOUT     - Timeout occurred when sending keep-alive packet \n
+ */
+int8_t  setsockopt(uint8_t sn, sockopt_type sotype, void* arg);
+
+/** 
+ * @ingroup WIZnet_socket_APIs
+ *  @brief get socket options
+ *  @details Get socket option like as FLAG, TTL, MSS, and so on. Refer to @ref sockopt_type
+ *  @param sn socket number
+ *  @param sotype socket option type. refer to @ref sockopt_type
+ *  @param arg Data type and value is determined according to <I>sotype</I>. \n
+ *             <table>
+ *                  <tr> <td> @b sotype </td> <td>@b data type</td><td>@b value</td></tr>
+ *                  <tr> <td> @ref SO_FLAG </td> <td> uint8_t </td><td> @ref SF_ETHER_OWN, etc... </td> </tr>
+ *                  <tr> <td> @ref SO_TOS </td> <td> uint8_t </td><td> 0 ~ 255 </td> </tr>
+ *                  <tr> <td> @ref SO_MSS </td> <td> uint16_t </td><td> 0 ~ 65535 </td> </tr>
+ *                  <tr> <td> @ref SO_DESTIP </td> <td> uint8_t[4] </td><td>  </td></tr> 
+ *                  <tr> <td> @ref SO_DESTPORT </td> <td> uint16_t </td><td>  </td></tr> 
+ *                  <tr> <td> @ref SO_KEEPALIVEAUTO </td> <td> uint8_t </td><td> 0 ~ 255 </td></tr> 
+ *                  <tr> <td> @ref SO_SENDBUF </td> <td> uint16_t </td><td> 0 ~ 65535 </td></tr>  
+ *                  <tr> <td> @ref SO_RECVBUF </td> <td> uint16_t </td><td> 0 ~ 65535 </td></tr>  
+ *                  <tr> <td> @ref SO_STATUS </td> <td> uint8_t </td><td> @ref SOCK_ESTABLISHED, etc.. </td></tr>  
+ *                  <tr> <td> @ref SO_REMAINSIZE </td> <td> uint16_t </td><td> 0~ 65535 </td></tr>
+ *                  <tr> <td> @ref SO_PACKINFO </td> <td> uint8_t </td><td> @ref PACK_FIRST, etc... </td></tr>
+ *             </table>
+ * @return 
+ * - @b Success : @ref SOCK_OK \n
+ * - @b Fail 
+ *  - @ref SOCKERR_SOCKNUM     - Invalid Socket number \n
+ *  - @ref SOCKERR_SOCKOPT     - Invalid socket option or its value \n
+ *  - @ref SOCKERR_SOCKMODE    - Invalid socket mode \n
+ * @note
+ *   The option as PACK_REMAINED and SO_PACKINFO is valid only in NON-TCP mode and after call @ref recvfrom(). \n
+ *   When SO_PACKINFO value is PACK_FIRST and the return value of recvfrom() is zero, 
+ *   This means the zero byte UDP data(UDP Header only) received.
+  */
+int8_t  getsockopt(uint8_t sn, sockopt_type sotype, void* arg);
+
+#endif   // _SOCKET_H_
diff --git a/Src/Ethernet/wizchip_conf.c b/Src/Ethernet/wizchip_conf.c
new file mode 100644
index 0000000..d63e21b
--- /dev/null
+++ b/Src/Ethernet/wizchip_conf.c
@@ -0,0 +1,636 @@
+//****************************************************************************/ 
+//!
+//! \file wizchip_conf.c
+//! \brief WIZCHIP Config Header File.
+//! \version 1.0.1
+//! \date 2013/10/21
+//! \par  Revision history
+//!       <2014/05/01> V1.0.1  Refer to M20140501
+//!        1. Explicit type casting in wizchip_bus_readbyte() & wizchip_bus_writebyte()
+//            Issued by Mathias ClauBen.
+//!           uint32_t type converts into ptrdiff_t first. And then recoverting it into uint8_t*
+//!           For remove the warning when pointer type size is not 32bit.
+//!           If ptrdiff_t doesn't support in your complier, You should must replace ptrdiff_t into your suitable pointer type.
+//!       <2013/10/21> 1st Release
+//! \author MidnightCow
+//! \copyright
+//!
+//! Copyright (c)  2013, WIZnet Co., LTD.
+//! All rights reserved.
+//! 
+//! Redistribution and use in source and binary forms, with or without 
+//! modification, are permitted provided that the following conditions 
+//! are met: 
+//! 
+//!     * Redistributions of source code must retain the above copyright 
+//! notice, this list of conditions and the following disclaimer. 
+//!     * Redistributions in binary form must reproduce the above copyright
+//! notice, this list of conditions and the following disclaimer in the
+//! documentation and/or other materials provided with the distribution. 
+//!     * Neither the name of the <ORGANIZATION> nor the names of its 
+//! contributors may be used to endorse or promote products derived 
+//! from this software without specific prior written permission. 
+//! 
+//! THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+//! AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 
+//! IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+//! ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 
+//! LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 
+//! CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 
+//! SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+//! INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 
+//! CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 
+//! ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 
+//! THE POSSIBILITY OF SUCH DAMAGE.
+//
+//*****************************************************************************/
+//A20140501 : for use the type - ptrdiff_t
+#include <stddef.h>
+//
+
+#include "wizchip_conf.h"
+/**
+ * @brief Default function to enable interrupt.
+ * @note This function help not to access wrong address. If you do not describe this function or register any functions,
+ * null function is called.
+ */
+void 	  wizchip_cris_enter(void)           {};
+/**
+ * @brief Default function to disable interrupt.
+ * @note This function help not to access wrong address. If you do not describe this function or register any functions,
+ * null function is called.
+ */
+void 	  wizchip_cris_exit(void)          {};
+/**
+ * @brief Default function to select chip.
+ * @note This function help not to access wrong address. If you do not describe this function or register any functions,
+ * null function is called.
+ */
+void 	wizchip_cs_select(void)            {};
+/**
+ * @brief Default function to deselect chip.
+ * @note This function help not to access wrong address. If you do not describe this function or register any functions,
+ * null function is called.
+ */
+void 	wizchip_cs_deselect(void)          {};
+/**
+ * @brief Default function to read in direct or indirect interface.
+ * @note This function help not to access wrong address. If you do not describe this function or register any functions,
+ * null function is called.
+ */
+ //M20140501 : Explict pointer type casting
+//uint8_t wizchip_bus_readbyte(uint32_t AddrSel) { return * ((volatile uint8_t *) AddrSel); };
+uint8_t wizchip_bus_readbyte(uint32_t AddrSel) { return * ((volatile uint8_t *)((ptrdiff_t) AddrSel)); };
+/**
+ * @brief Default function to write in direct or indirect interface.
+ * @note This function help not to access wrong address. If you do not describe this function or register any functions,
+ * null function is called.
+ */
+ 
+//M20140501 : Explict pointer type casting
+//void 	wizchip_bus_writebyte(uint32_t AddrSel, uint8_t wb)  { *((volatile uint8_t*) AddrSel) = wb; };
+void 	wizchip_bus_writebyte(uint32_t AddrSel, uint8_t wb)  { *((volatile uint8_t*)((ptrdiff_t)AddrSel)) = wb; };
+
+/**
+ * @brief Default function to read in SPI interface.
+ * @note This function help not to access wrong address. If you do not describe this function or register any functions,
+ * null function is called.
+ */
+uint8_t wizchip_spi_readbyte(void)        {return 0;};
+/**
+ * @brief Default function to write in SPI interface.
+ * @note This function help not to access wrong address. If you do not describe this function or register any functions,
+ * null function is called.
+ */
+void 	wizchip_spi_writebyte(uint8_t wb) {};
+
+/**
+ * @\ref _WIZCHIP instance
+ */
+_WIZCHIP  WIZCHIP =
+      {
+      .id                  = _WIZCHIP_ID_,
+      .if_mode             = _WIZCHIP_IO_MODE_,
+      .CRIS._enter         = wizchip_cris_enter,
+      .CRIS._exit          = wizchip_cris_exit,
+      .CS._select          = wizchip_cs_select,
+      .CS._deselect        = wizchip_cs_deselect,
+      .IF.BUS._read_byte   = wizchip_bus_readbyte,
+      .IF.BUS._write_byte  = wizchip_bus_writebyte
+//    .IF.SPI._read_byte   = wizchip_spi_readbyte,
+//    .IF.SPI._write_byte  = wizchip_spi_writebyte
+      };
+
+static uint8_t    _DNS_[4];      // DNS server ip address
+static dhcp_mode  _DHCP_;        // DHCP mode
+
+void reg_wizchip_cris_cbfunc(void(*cris_en)(void), void(*cris_ex)(void))
+{
+   if(!cris_en || !cris_ex)
+   {
+      WIZCHIP.CRIS._enter = wizchip_cris_enter;
+      WIZCHIP.CRIS._exit  = wizchip_cris_exit;
+   }
+   else
+   {
+      WIZCHIP.CRIS._enter = cris_en;
+      WIZCHIP.CRIS._exit  = cris_ex;
+   }
+}
+
+void reg_wizchip_cs_cbfunc(void(*cs_sel)(void), void(*cs_desel)(void))
+{
+   if(!cs_sel || !cs_desel)
+   {
+      WIZCHIP.CS._select   = wizchip_cs_select;
+      WIZCHIP.CS._deselect = wizchip_cs_deselect;
+   }
+   else
+   {
+      WIZCHIP.CS._select   = cs_sel;
+      WIZCHIP.CS._deselect = cs_desel;
+   }
+}
+
+void reg_wizchip_bus_cbfunc(uint8_t(*bus_rb)(uint32_t addr), void (*bus_wb)(uint32_t addr, uint8_t wb))
+{
+   while(!(WIZCHIP.if_mode & _WIZCHIP_IO_MODE_BUS_));
+   
+   if(!bus_rb || !bus_wb)
+   {
+      WIZCHIP.IF.BUS._read_byte   = wizchip_bus_readbyte;
+      WIZCHIP.IF.BUS._write_byte  = wizchip_bus_writebyte;
+   }
+   else
+   {
+      WIZCHIP.IF.BUS._read_byte   = bus_rb;
+      WIZCHIP.IF.BUS._write_byte  = bus_wb;
+   }
+}
+
+void reg_wizchip_spi_cbfunc(uint8_t (*spi_rb)(void), void (*spi_wb)(uint8_t wb))
+{
+   while(!(WIZCHIP.if_mode & _WIZCHIP_IO_MODE_SPI_));
+   
+   if(!spi_rb || !spi_wb)
+   {
+      WIZCHIP.IF.SPI._read_byte   = wizchip_spi_readbyte;
+      WIZCHIP.IF.SPI._write_byte  = wizchip_spi_writebyte;
+   }
+   else
+   {
+      WIZCHIP.IF.SPI._read_byte   = spi_rb;
+      WIZCHIP.IF.SPI._write_byte  = spi_wb;
+   }
+}
+
+int8_t ctlwizchip(ctlwizchip_type cwtype, void* arg)
+{
+   uint8_t tmp = 0;
+   uint8_t* ptmp[2] = {0,0};
+   switch(cwtype)
+   {
+      case CW_RESET_WIZCHIP:
+         wizchip_sw_reset();
+         break;
+      case CW_INIT_WIZCHIP:
+         if(arg != 0) 
+         {
+            ptmp[0] = (uint8_t*)arg;
+            ptmp[1] = ptmp[0] + _WIZCHIP_SOCK_NUM_;
+         }
+         return wizchip_init(ptmp[0], ptmp[1]);
+      case CW_CLR_INTERRUPT:
+         wizchip_clrinterrupt(*((intr_kind*)arg));
+         break;
+      case CW_GET_INTERRUPT:
+        *((intr_kind*)arg) = wizchip_getinterrupt();
+         break;
+      case CW_SET_INTRMASK:
+         wizchip_setinterruptmask(*((intr_kind*)arg));
+         break;         
+      case CW_GET_INTRMASK:
+         *((intr_kind*)arg) = wizchip_getinterruptmask();
+         break;
+   #if _WIZCHIP_ > 5100
+      case CW_SET_INTRTIME:
+         setINTLEVEL(*(uint16_t*)arg);
+         break;
+      case CW_GET_INTRTIME:
+         *(uint16_t*)arg = getINTLEVEL();
+         break;
+   #endif
+      case CW_GET_ID:
+         ((uint8_t*)arg)[0] = WIZCHIP.id[0];
+         ((uint8_t*)arg)[1] = WIZCHIP.id[1];
+         ((uint8_t*)arg)[2] = WIZCHIP.id[2];
+         ((uint8_t*)arg)[3] = WIZCHIP.id[3];
+         ((uint8_t*)arg)[4] = WIZCHIP.id[4];
+         ((uint8_t*)arg)[5] = 0;
+         break;
+   #if _WIZCHIP_ ==  5500
+      case CW_RESET_PHY:
+         wizphy_reset();
+         break;
+      case CW_SET_PHYCONF:
+         wizphy_setphyconf((wiz_PhyConf*)arg);
+         break;
+      case CW_GET_PHYCONF:
+         wizphy_getphyconf((wiz_PhyConf*)arg);
+         break;
+      case CW_GET_PHYSTATUS:
+         break;
+      case CW_SET_PHYPOWMODE:
+         return wizphy_setphypmode(*(uint8_t*)arg);
+   #endif
+      case CW_GET_PHYPOWMODE:
+         tmp = wizphy_getphypmode();
+         if((int8_t)tmp == -1) return -1;
+         *(uint8_t*)arg = tmp;
+         break;
+      case CW_GET_PHYLINK:
+         tmp = wizphy_getphylink();
+         if((int8_t)tmp == -1) return -1;
+         *(uint8_t*)arg = tmp;
+         break;
+      default:
+         return -1;
+   }
+   return 0;
+}
+
+
+int8_t ctlnetwork(ctlnetwork_type cntype, void* arg)
+{
+   
+   switch(cntype)
+   {
+      case CN_SET_NETINFO:
+         wizchip_setnetinfo((wiz_NetInfo*)arg);
+         break;
+      case CN_GET_NETINFO:
+         wizchip_getnetinfo((wiz_NetInfo*)arg);
+         break;
+      case CN_SET_NETMODE:
+         return wizchip_setnetmode(*(netmode_type*)arg);
+      case CN_GET_NETMODE:
+         *(netmode_type*)arg = wizchip_getnetmode();
+         break;
+      case CN_SET_TIMEOUT:
+         wizchip_settimeout((wiz_NetTimeout*)arg);
+         break;
+      case CN_GET_TIMEOUT:
+         wizchip_gettimeout((wiz_NetTimeout*)arg);
+         break;
+      default:
+         return -1;
+   }
+   return 0;
+}
+
+void wizchip_sw_reset(void)
+{
+   uint8_t gw[4], sn[4], sip[4];
+   uint8_t mac[6];
+   getSHAR(mac);
+   getGAR(gw);  getSUBR(sn);  getSIPR(sip);
+   setMR(MR_RST);
+   getMR(); // for delay
+   setSHAR(mac);
+   setGAR(gw);
+   setSUBR(sn);
+   setSIPR(sip);
+}
+
+int8_t wizchip_init(uint8_t* txsize, uint8_t* rxsize)
+{
+   int8_t i;
+   int8_t tmp = 0;
+   wizchip_sw_reset();
+   if(txsize)
+   {
+      tmp = 0;
+      for(i = 0 ; i < _WIZCHIP_SOCK_NUM_; i++)
+         tmp += txsize[i];
+      if(tmp > 16) return -1;
+      for(i = 0 ; i < _WIZCHIP_SOCK_NUM_; i++)
+         setSn_TXBUF_SIZE(i, txsize[i]);
+   }
+   if(rxsize)
+   {
+      tmp = 0;
+      for(i = 0 ; i < _WIZCHIP_SOCK_NUM_; i++)
+         tmp += rxsize[i];
+      if(tmp > 16) return -1;
+      for(i = 0 ; i < _WIZCHIP_SOCK_NUM_; i++)
+         setSn_RXBUF_SIZE(i, rxsize[i]);
+   }
+   return 0;
+}
+
+void wizchip_clrinterrupt(intr_kind intr)
+{
+   uint8_t ir  = (uint8_t)intr;
+   uint8_t sir = (uint8_t)((uint16_t)intr >> 8);
+#if _WIZCHIP_ < 5500
+   ir |= (1<<4); // IK_WOL
+#endif
+#if _WIZCHIP_ == 5200
+   ir |= (1 << 6);
+#endif
+   
+#if _WIZCHIP_ < 5200
+   sir &= 0x0F;
+#endif
+
+#if _WIZCHIP_ == 5100
+   ir |= sir;
+   setIR(ir);
+#else
+   setIR(ir);
+   setSIR(sir);
+#endif   
+}
+
+intr_kind wizchip_getinterrupt(void)
+{
+   uint8_t ir  = 0;
+   uint8_t sir = 0;
+   uint16_t ret = 0;
+#if _WIZCHIP_ == 5100
+   ir = getIR();
+   sir = ir 0x0F;
+#else
+   ir  = getIR();
+   sir = getSIR();
+#endif         
+
+#if _WIZCHIP_ < 5500
+   ir &= ~(1<<4); // IK_WOL
+#endif
+#if _WIZCHIP_ == 5200
+   ir &= ~(1 << 6);
+#endif
+  ret = sir;
+  ret = (ret << 8) + ir;
+  return (intr_kind)ret;
+}
+
+void wizchip_setinterruptmask(intr_kind intr)
+{
+   uint8_t imr  = (uint8_t)intr;
+   uint8_t simr = (uint8_t)((uint16_t)intr >> 8);
+#if _WIZCHIP_ < 5500
+   imr &= ~(1<<4); // IK_WOL
+#endif
+#if _WIZCHIP_ == 5200
+   imr &= ~(1 << 6);
+#endif
+   
+#if _WIZCHIP_ < 5200
+   simr &= 0x0F;
+#endif
+
+#if _WIZCHIP_ == 5100
+   imr |= simr;
+   setIMR(imr);
+#else
+   setIMR(imr);
+   setSIMR(simr);
+#endif   
+}
+
+intr_kind wizchip_getinterruptmask(void)
+{
+   uint8_t imr  = 0;
+   uint8_t simr = 0;
+   uint16_t ret = 0;
+#if _WIZCHIP_ == 5100
+   imr  = getIMR();
+   simr = imr 0x0F;
+#else
+   imr  = getIMR();
+   simr = getSIMR();
+#endif         
+
+#if _WIZCHIP_ < 5500
+   imr &= ~(1<<4); // IK_WOL
+#endif
+#if _WIZCHIP_ == 5200
+   imr &= ~(1 << 6);  // IK_DEST_UNREACH
+#endif
+  ret = simr;
+  ret = (ret << 8) + imr;
+  return (intr_kind)ret;
+}
+
+int8_t wizphy_getphylink(void)
+{
+   int8_t tmp;
+#if   _WIZCHIP_ == 5200
+   if(getPHYSTATUS() & PHYSTATUS_LINK)
+      tmp = PHY_LINK_ON;
+   else
+      tmp = PHY_LINK_OFF;
+#elif _WIZCHIP_ == 5500
+   if(getPHYCFGR() & PHYCFGR_LNK_ON)
+      tmp = PHY_LINK_ON;
+   else
+      tmp = PHY_LINK_OFF;
+#else
+   tmp = -1;
+#endif
+   return tmp;
+}
+
+#if _WIZCHIP_ > 5100
+
+int8_t wizphy_getphypmode(void)
+{
+   int8_t tmp = 0;
+   #if   _WIZCHIP_ == 5200
+      if(getPHYSTATUS() & PHYSTATUS_POWERDOWN)
+         tmp = PHY_POWER_DOWN;
+      else          
+         tmp = PHY_POWER_NORM;
+   #elif _WIZCHIP_ == 5500
+      if(getPHYCFGR() & PHYCFGR_OPMDC_PDOWN)
+         tmp = PHY_POWER_DOWN;
+      else 
+         tmp = PHY_POWER_NORM;
+   #else
+      tmp = -1;
+   #endif
+   return tmp;
+}
+#endif
+
+#if _WIZCHIP_ == 5500
+void wizphy_reset(void)
+{
+   uint8_t tmp = getPHYCFGR();
+   tmp &= PHYCFGR_RST;
+   setPHYCFGR(tmp);
+   tmp = getPHYCFGR(); 
+   tmp |= ~PHYCFGR_RST;
+   setPHYCFGR(tmp);
+}
+
+void wizphy_setphyconf(wiz_PhyConf* phyconf)
+{
+   uint8_t tmp = 0;
+   if(phyconf->by == PHY_CONFBY_SW)
+      tmp |= PHYCFGR_OPMD;
+   else
+      tmp &= ~PHYCFGR_OPMD;
+   if(phyconf->mode == PHY_MODE_AUTONEGO)
+      tmp |= PHYCFGR_OPMDC_ALLA;
+   else
+   {
+      if(phyconf->duplex == PHY_DUPLEX_FULL)
+      {
+         if(phyconf->speed == PHY_SPEED_100)
+            tmp |= PHYCFGR_OPMDC_100F;
+         else
+            tmp |= PHYCFGR_OPMDC_10F;
+      }   
+      else
+      {
+         if(phyconf->speed == PHY_SPEED_100)
+            tmp |= PHYCFGR_OPMDC_100H;
+         else
+            tmp |= PHYCFGR_OPMDC_10H;
+      }
+   }
+   setPHYCFGR(tmp);
+   wizphy_reset();
+}
+
+void wizphy_getphyconf(wiz_PhyConf* phyconf)
+{
+   uint8_t tmp = 0;
+   tmp = getPHYCFGR();
+   phyconf->by   = (tmp & PHYCFGR_OPMD) ? PHY_CONFBY_SW : PHY_CONFBY_HW;
+   switch(tmp & PHYCFGR_OPMDC_ALLA)
+   {
+      case PHYCFGR_OPMDC_ALLA:
+      case PHYCFGR_OPMDC_100FA: 
+         phyconf->mode = PHY_MODE_AUTONEGO;
+         break;
+      default:
+         phyconf->mode = PHY_MODE_MANUAL;
+         break;
+   }
+   switch(tmp & PHYCFGR_OPMDC_ALLA)
+   {
+      case PHYCFGR_OPMDC_100FA:
+      case PHYCFGR_OPMDC_100F:
+      case PHYCFGR_OPMDC_100H:
+         phyconf->speed = PHY_SPEED_100;
+         break;
+      default:
+         phyconf->speed = PHY_SPEED_10;
+         break;
+   }
+   switch(tmp & PHYCFGR_OPMDC_ALLA)
+   {
+      case PHYCFGR_OPMDC_100FA:
+      case PHYCFGR_OPMDC_100F:
+      case PHYCFGR_OPMDC_10F:
+         phyconf->duplex = PHY_DUPLEX_FULL;
+         break;
+      default:
+         phyconf->duplex = PHY_DUPLEX_HALF;
+         break;
+   }
+}
+
+void wizphy_getphystat(wiz_PhyConf* phyconf)
+{
+   uint8_t tmp = getPHYCFGR();
+   phyconf->duplex = (tmp & PHYCFGR_DPX_FULL) ? PHY_DUPLEX_FULL : PHY_DUPLEX_HALF;
+   phyconf->speed  = (tmp & PHYCFGR_SPD_100) ? PHY_SPEED_100 : PHY_SPEED_10;
+}
+
+int8_t wizphy_setphypmode(uint8_t pmode)
+{
+   uint8_t tmp = 0;
+   tmp = getPHYCFGR();
+   if((tmp & PHYCFGR_OPMD)== 0) return -1;
+   tmp &= ~PHYCFGR_OPMDC_ALLA;         
+   if( pmode == PHY_POWER_DOWN)
+      tmp |= PHYCFGR_OPMDC_PDOWN;
+   else
+      tmp |= PHYCFGR_OPMDC_ALLA;
+   setPHYCFGR(tmp);
+   wizphy_reset();
+   tmp = getPHYCFGR();
+   if( pmode == PHY_POWER_DOWN)
+   {
+      if(tmp & PHYCFGR_OPMDC_PDOWN) return 0;
+   }
+   else
+   {
+      if(tmp & PHYCFGR_OPMDC_ALLA) return 0;
+   }
+   return -1;
+}
+#endif
+
+
+void wizchip_setnetinfo(wiz_NetInfo* pnetinfo)
+{
+   setSHAR(pnetinfo->mac);
+   setGAR(pnetinfo->gw);
+   setSUBR(pnetinfo->sn);
+   setSIPR(pnetinfo->ip);
+   _DNS_[0] = pnetinfo->dns[0];
+   _DNS_[1] = pnetinfo->dns[1];
+   _DNS_[2] = pnetinfo->dns[2];
+   _DNS_[3] = pnetinfo->dns[3];
+   _DHCP_   = pnetinfo->dhcp;
+}
+
+void wizchip_getnetinfo(wiz_NetInfo* pnetinfo)
+{
+   getSHAR(pnetinfo->mac);
+   getGAR(pnetinfo->gw);
+   getSUBR(pnetinfo->sn);
+   getSIPR(pnetinfo->ip);
+   pnetinfo->dns[0]= _DNS_[0];
+   pnetinfo->dns[1]= _DNS_[1];
+   pnetinfo->dns[2]= _DNS_[2];
+   pnetinfo->dns[3]= _DNS_[3];
+   pnetinfo->dhcp  = _DHCP_;
+}
+
+int8_t wizchip_setnetmode(netmode_type netmode)
+{
+   uint8_t tmp = 0;
+#if _WIZCHIP_ != 5500   
+   if(netmode & ~(NM_WAKEONLAN | NM_PPPOE | NM_PINGBLOCK)) return -1;
+#else
+   if(netmode & ~(NM_WAKEONLAN | NM_PPPOE | NM_PINGBLOCK | NM_FORCEARP)) return -1;
+#endif      
+   tmp = getMR();
+   tmp |= (uint8_t)netmode;
+   setMR(tmp);
+   return 0;
+}
+
+netmode_type wizchip_getnetmode(void)
+{
+   return (netmode_type) getMR();
+}
+
+void wizchip_settimeout(wiz_NetTimeout* nettime)
+{
+   setRCR(nettime->retry_cnt);
+   setRTR(nettime->time_100us);
+}
+
+void wizchip_gettimeout(wiz_NetTimeout* nettime)
+{
+   nettime->retry_cnt = getRCR();
+   nettime->time_100us = getRTR();
+}
diff --git a/Src/Ethernet/wizchip_conf.h b/Src/Ethernet/wizchip_conf.h
new file mode 100644
index 0000000..301cb32
--- /dev/null
+++ b/Src/Ethernet/wizchip_conf.h
@@ -0,0 +1,548 @@
+//*****************************************************************************
+//
+//! \file wizchip_conf.h
+//! \brief WIZCHIP Config Header File.
+//! \version 1.0.0
+//! \date 2013/10/21
+//! \par  Revision history
+//!       <2013/10/21> 1st Release
+//! \author MidnightCow
+//! \copyright
+//!
+//! Copyright (c)  2013, WIZnet Co., LTD.
+//! All rights reserved.
+//! 
+//! Redistribution and use in source and binary forms, with or without 
+//! modification, are permitted provided that the following conditions 
+//! are met: 
+//! 
+//!     * Redistributions of source code must retain the above copyright 
+//! notice, this list of conditions and the following disclaimer. 
+//!     * Redistributions in binary form must reproduce the above copyright
+//! notice, this list of conditions and the following disclaimer in the
+//! documentation and/or other materials provided with the distribution. 
+//!     * Neither the name of the <ORGANIZATION> nor the names of its 
+//! contributors may be used to endorse or promote products derived 
+//! from this software without specific prior written permission. 
+//! 
+//! THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+//! AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 
+//! IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+//! ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 
+//! LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 
+//! CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 
+//! SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+//! INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 
+//! CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 
+//! ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 
+//! THE POSSIBILITY OF SUCH DAMAGE.
+//
+//*****************************************************************************
+
+/**
+ * @defgroup extra_functions 2. WIZnet Extra Functions
+ *
+ * @brief These functions is optional function. It could be replaced at WIZCHIP I/O function because they were made by WIZCHIP I/O functions.  
+ * @details There are functions of configuring WIZCHIP, network, interrupt, phy, network information and timer. \n
+ * 
+ */
+
+#ifndef  _WIZCHIP_CONF_H_
+#define  _WIZCHIP_CONF_H_
+
+#include <stdint.h>
+/**
+ * @brief Select WIZCHIP.
+ * @todo You should select one, \b 5100, \b 5200 ,\b 5500 or etc. \n\n
+ *       ex> <code> #define \_WIZCHIP_      5500 </code>
+ */
+#define _WIZCHIP_                      5500   // 5100, 5200, 5500
+
+#define _WIZCHIP_IO_MODE_NONE_         0x0000
+#define _WIZCHIP_IO_MODE_BUS_          0x0100 /**< Bus interface mode */
+#define _WIZCHIP_IO_MODE_SPI_          0x0200 /**< SPI interface mode */
+//#define _WIZCHIP_IO_MODE_IIC_          0x0400
+//#define _WIZCHIP_IO_MODE_SDIO_         0x0800
+// Add to
+//
+
+#define _WIZCHIP_IO_MODE_BUS_DIR_      (_WIZCHIP_IO_MODE_BUS_ + 1) /**< BUS interface mode for direct  */
+#define _WIZCHIP_IO_MODE_BUS_INDIR_    (_WIZCHIP_IO_MODE_BUS_ + 2) /**< BUS interface mode for indirect */
+
+#define _WIZCHIP_IO_MODE_SPI_VDM_      (_WIZCHIP_IO_MODE_SPI_ + 1) /**< SPI interface mode for variable length data*/
+#define _WIZCHIP_IO_MODE_SPI_FDM_      (_WIZCHIP_IO_MODE_SPI_ + 2) /**< SPI interface mode for fixed length data mode*/
+
+
+#if   (_WIZCHIP_ == 5100)
+   #define _WIZCHIP_ID_                "W5100\0"
+/**
+ * @brief Define interface mode.
+ * @todo you should select interface mode as chip. Select one of @ref \_WIZCHIP_IO_MODE_SPI_ , @ref \_WIZCHIP_IO_MODE_BUS_DIR_ or @ref \_WIZCHIP_IO_MODE_BUS_INDIR_
+ */
+
+// #define _WIZCHIP_IO_MODE_           _WIZCHIP_IO_MODE_BUS_DIR_
+// #define _WIZCHIP_IO_MODE_           _WIZCHIP_IO_MODE_BUS_INDIR_
+   #define _WIZCHIP_IO_MODE_           _WIZCHIP_IO_MODE_SPI_
+
+#elif (_WIZCHIP_ == 5200)
+   #define _WIZCHIP_ID_                "W5200\0"
+/**
+ * @brief Define interface mode.
+ * @todo you should select interface mode as chip. Select one of @ref \_WIZCHIP_IO_MODE_SPI_ or @ref \_WIZCHIP_IO_MODE_BUS_INDIR_
+ */
+// #define _WIZCHIP_IO_MODE_           _WIZCHIP_IO_MODE_BUS_INDIR_
+   #define _WIZCHIP_IO_MODE_           _WIZCHIP_IO_MODE_SPI_
+   #include "W5200/w5200.h"
+#elif (_WIZCHIP_ == 5500)
+  #define _WIZCHIP_ID_                 "W5500\0"
+  
+/**
+ * @brief Define interface mode. \n
+ * @todo Should select interface mode as chip. 
+ *        - @ref \_WIZCHIP_IO_MODE_SPI_ \n
+ *          -@ref \_WIZCHIP_IO_MODE_SPI_VDM_ : Valid only in @ref \_WIZCHIP_ == 5500 \n
+ *          -@ref \_WIZCHIP_IO_MODE_SPI_FDM_ : Valid only in @ref \_WIZCHIP_ == 5500 \n
+ *        - @ref \_WIZCHIP_IO_MODE_BUS_ \n
+ *          - @ref \_WIZCHIP_IO_MODE_BUS_DIR_ \n
+ *          - @ref \_WIZCHIP_IO_MODE_BUS_INDIR_ \n
+ *        - Others will be defined in future. \n\n
+ *        ex> <code> #define \_WIZCHIP_IO_MODE_ \_WIZCHIP_IO_MODE_SPI_VDM_ </code>
+ *       
+ */
+   //#define _WIZCHIP_IO_MODE_           _WIZCHIP_IO_MODE_SPI_FDM_
+   #define _WIZCHIP_IO_MODE_           _WIZCHIP_IO_MODE_SPI_VDM_
+   #include "W5500/w5500.h"
+#else 
+   #error "Unknown defined _WIZCHIP_. You should define one of 5100, 5200, and 5500 !!!"
+#endif
+
+#ifndef _WIZCHIP_IO_MODE_
+   #error "Undefined _WIZCHIP_IO_MODE_. You should define it !!!"
+#endif
+
+/**
+ * @brief Define I/O base address when BUS IF mode.
+ * @todo Should re-define it to fit your system when BUS IF Mode (@ref \_WIZCHIP_IO_MODE_BUS_,
+ *       @ref \_WIZCHIP_IO_MODE_BUS_DIR_, @ref \_WIZCHIP_IO_MODE_BUS_INDIR_). \n\n
+ *       ex> <code> #define \_WIZCHIP_IO_BASE_      0x00008000 </code>
+ */
+#define _WIZCHIP_IO_BASE_              0x00000000  // 
+
+#if _WIZCHIP_IO_MODE_ & _WIZCHIP_IO_MODE_BUS
+   #ifndef _WIZCHIP_IO_BASE_
+      #error "You should be define _WIZCHIP_IO_BASE to fit your system memory map."
+   #endif
+#endif   
+
+#if _WIZCHIP_ > 5100
+   #define _WIZCHIP_SOCK_NUM_   8   ///< The count of independant socket of @b WIZCHIP
+#else
+   #define _WIZCHIP_SOCK_NUM_   4   ///< The count of independant socket of @b WIZCHIP
+#endif      
+
+
+/********************************************************
+* WIZCHIP BASIC IF functions for SPI, SDIO, I2C , ETC.
+*********************************************************/
+/**
+ * @ingroup DATA_TYPE
+ * @brief The set of callback functions for W5500:@ref WIZCHIP_IO_Functions W5200:@ref WIZCHIP_IO_Functions_W5200
+ */
+typedef struct __WIZCHIP
+{
+   uint16_t  if_mode;               ///< host interface mode
+   uint8_t   id[6];                 ///< @b WIZCHIP ID such as @b 5100, @b 5200, @b 5500, and so on.
+   /**
+    * The set of critical section callback func.
+    */
+   struct _CRIS
+   {
+      void (*_enter)  (void);       ///< crtical section enter 
+      void (*_exit) (void);         ///< critial section exit  
+   }CRIS;  
+   /**
+    *  The set of @ref\_WIZCHIP_ select control callback func.
+    */
+   struct _CS
+   {
+      void (*_select)  (void);      ///< @ref \_WIZCHIP_ selected
+      void (*_deselect)(void);      ///< @ref \_WIZCHIP_ deselected
+   }CS;  
+   /**
+    * The set of interface IO callback func.
+    */
+   union _IF
+   {	 
+      /**
+       * For BUS interface IO
+       */  
+      struct
+      {
+         uint8_t  (*_read_byte)  (uint32_t AddrSel);
+         void     (*_write_byte) (uint32_t AddrSel, uint8_t wb);
+      }BUS;      
+      /**
+       * For SPI interface IO
+       */
+      struct
+      {
+         uint8_t (*_read_byte)   (void);
+         void    (*_write_byte)  (uint8_t wb);
+      }SPI;
+      // To be added
+      //
+   }IF;
+}_WIZCHIP;
+
+extern _WIZCHIP  WIZCHIP;
+
+/**
+ * @ingroup DATA_TYPE
+ *  WIZCHIP control type enumration used in @ref ctlwizchip().
+ */
+typedef enum
+{
+   CW_RESET_WIZCHIP,   ///< Resets WIZCHIP by softly
+   CW_INIT_WIZCHIP,    ///< Inializes to WIZCHIP with SOCKET buffer size 2 or 1 dimension array typed uint8_t.
+   CW_GET_INTERRUPT,   ///< Get Interrupt status of WIZCHIP
+   CW_CLR_INTERRUPT,   ///< Clears interrupt
+   CW_SET_INTRMASK,    ///< Masks interrupt
+   CW_GET_INTRMASK,    ///< Get interrupt mask
+   CW_SET_INTRTIME,    ///< Set interval time between the current and next interrupt. 
+   CW_GET_INTRTIME,    ///< Set interval time between the current and next interrupt. 
+   CW_GET_ID,          ///< Gets WIZCHIP name.
+
+#if _WIZCHIP_ ==  5500
+   CW_RESET_PHY,       ///< Resets internal PHY. Valid Only W5000
+   CW_SET_PHYCONF,     ///< When PHY configured by interal register, PHY operation mode (Manual/Auto, 10/100, Half/Full). Valid Only W5000 
+   CW_GET_PHYCONF,     ///< Get PHY operation mode in interal register. Valid Only W5000
+   CW_GET_PHYSTATUS,   ///< Get real PHY status on operating. Valid Only W5000
+   CW_SET_PHYPOWMODE,  ///< Set PHY power mode as noraml and down when PHYSTATUS.OPMD == 1. Valid Only W5000
+#endif
+   CW_GET_PHYPOWMODE,  ///< Get PHY Power mode as down or normal
+   CW_GET_PHYLINK      ///< Get PHY Link status
+}ctlwizchip_type;
+
+/**
+ * @ingroup DATA_TYPE
+ *  Network control type enumration used in @ref ctlnetwork().
+ */
+typedef enum
+{
+   CN_SET_NETINFO,  ///< Set Network with @ref wiz_NetInfo
+   CN_GET_NETINFO,  ///< Get Network with @ref wiz_NetInfo
+   CN_SET_NETMODE,  ///< Set network mode as WOL, PPPoE, Ping Block, and Force ARP mode
+   CN_GET_NETMODE,  ///< Get network mode as WOL, PPPoE, Ping Block, and Force ARP mode
+   CN_SET_TIMEOUT,  ///< Set network timeout as retry count and time.
+   CN_GET_TIMEOUT,  ///< Get network timeout as retry count and time.
+}ctlnetwork_type;
+
+/**
+ * @ingroup DATA_TYPE
+ *  Interrupt kind when CW_SET_INTRRUPT, CW_GET_INTERRUPT, CW_SET_INTRMASK
+ *  and CW_GET_INTRMASK is used in @ref ctlnetwork().
+ *  It can be used with OR operation.
+ */
+typedef enum
+{
+#if _WIZCHIP_ > 5200
+   IK_WOL               = (1 << 4),   ///< Wake On Lan by receiving the magic packet. Valid in W500.
+#endif   
+
+   IK_PPPOE_TERMINATED  = (1 << 5),   ///< PPPoE Disconnected
+
+#if _WIZCHIP_ != 5200
+   IK_DEST_UNREACH      = (1 << 6),   ///< Destination IP & Port Unreable, No use in W5200
+#endif   
+
+   IK_IP_CONFLICT       = (1 << 7),   ///< IP conflict occurred
+
+   IK_SOCK_0            = (1 << 8),   ///< Socket 0 interrupt
+   IK_SOCK_1            = (1 << 9),   ///< Socket 1 interrupt
+   IK_SOCK_2            = (1 << 10),  ///< Socket 2 interrupt
+   IK_SOCK_3            = (1 << 11),  ///< Socket 3 interrupt
+#if _WIZCHIP_ > 5100   
+   IK_SOCK_4            = (1 << 12),  ///< Socket 4 interrupt, No use in 5100
+   IK_SOCK_5            = (1 << 13),  ///< Socket 5 interrupt, No use in 5100
+   IK_SOCK_6            = (1 << 14),  ///< Socket 6 interrupt, No use in 5100
+   IK_SOCK_7            = (1 << 15),  ///< Socket 7 interrupt, No use in 5100
+#endif   
+
+#if _WIZCHIP_ > 5100
+   IK_SOCK_ALL          = (0xFF << 8) ///< All Socket interrpt
+#else
+   IK_SOCK_ALL          = (0x0F << 8) ///< All Socket interrpt 
+#endif      
+}intr_kind;
+
+#define PHY_CONFBY_HW            0     ///< Configured PHY operation mode by HW pin
+#define PHY_CONFBY_SW            1     ///< Configured PHY operation mode by SW register   
+#define PHY_MODE_MANUAL          0     ///< Configured PHY operation mode with user setting.
+#define PHY_MODE_AUTONEGO        1     ///< Configured PHY operation mode with auto-negotiation
+#define PHY_SPEED_10             0     ///< Link Speed 10
+#define PHY_SPEED_100            1     ///< Link Speed 100
+#define PHY_DUPLEX_HALF          0     ///< Link Half-Duplex
+#define PHY_DUPLEX_FULL          1     ///< Link Full-Duplex
+#define PHY_LINK_OFF             0     ///< Link Off
+#define PHY_LINK_ON              1     ///< Link On
+#define PHY_POWER_NORM           0     ///< PHY power normal mode
+#define PHY_POWER_DOWN           1     ///< PHY power down mode 
+
+
+#if _WIZCHIP_ == 5500 
+/**
+ * @ingroup DATA_TYPE
+ *  It configures PHY configuration when CW_SET PHYCONF or CW_GET_PHYCONF in W5500,  
+ *  and it indicates the real PHY status configured by HW or SW in all WIZCHIP. \n
+ *  Valid only in W5500.
+ */
+typedef struct wiz_PhyConf_t
+{
+      uint8_t by;       ///< set by @ref PHY_CONFBY_HW or @ref PHY_CONFBY_SW
+      uint8_t mode;     ///< set by @ref PHY_MODE_MANUAL or @ref PHY_MODE_AUTONEGO
+      uint8_t speed;    ///< set by @ref PHY_SPEED_10 or @ref PHY_SPEED_100
+      uint8_t duplex;   ///< set by @ref PHY_DUPLEX_HALF @ref PHY_DUPLEX_FULL 
+      //uint8_t power;  ///< set by @ref PHY_POWER_NORM or @ref PHY_POWER_DOWN
+      //uint8_t link;   ///< Valid only in CW_GET_PHYSTATUS. set by @ref PHY_LINK_ON or PHY_DUPLEX_OFF 
+   }wiz_PhyConf;
+#endif   
+
+/**
+ * @ingroup DATA_TYPE
+ *  It used in setting dhcp_mode of @ref wiz_NetInfo.
+ */
+typedef enum
+{
+   NETINFO_STATIC = 1,    ///< Static IP configuration by manually.
+   NETINFO_DHCP           ///< Dynamic IP configruation from a DHCP sever
+}dhcp_mode;
+
+/**
+ * @ingroup DATA_TYPE
+ *  Network Information for WIZCHIP
+ */
+typedef struct wiz_NetInfo_t
+{
+   uint8_t mac[6];  ///< Source Mac Address
+   uint8_t ip[4];   ///< Source IP Address
+   uint8_t sn[4];   ///< Subnet Mask 
+   uint8_t gw[4];   ///< Gateway IP Address
+   uint8_t dns[4];  ///< DNS server IP Address
+   dhcp_mode dhcp;  ///< 1 - Static, 2 - DHCP
+}wiz_NetInfo;
+
+/**
+ * @ingroup DATA_TYPE
+ *  Network mode
+ */
+typedef enum
+{
+#if _WIZCHIP_ == 5500   
+   NM_FORCEARP    = (1<<1),  ///< Force to APP send whenever udp data is sent. Valid only in W5500
+#endif   
+   NM_WAKEONLAN   = (1<<5),  ///< Wake On Lan 
+   NM_PINGBLOCK   = (1<<4),  ///< Block ping-request
+   NM_PPPOE       = (1<<3),  ///< PPPoE mode
+}netmode_type;
+
+/**
+ * @ingroup DATA_TYPE
+ *  Used in CN_SET_TIMEOUT or CN_GET_TIMEOUT of @ref ctlwizchip() for timeout configruation.
+ */
+typedef struct wiz_NetTimeout_t
+{
+   uint8_t  retry_cnt;     ///< retry count 
+   uint16_t time_100us;    ///< time unit 100us
+}wiz_NetTimeout;
+
+/**
+ *@brief Registers call back function for critical section of I/O functions such as
+ *\ref WIZCHIP_READ, @ref WIZCHIP_WRITE, @ref WIZCHIP_READ_BUF and @ref WIZCHIP_WRITE_BUF.
+ *@param cris_en : callback function for critical section enter.
+ *@param cris_ex : callback function for critical section exit.
+ *@todo Describe @ref WIZCHIP_CRITICAL_ENTER and @ref WIZCHIP_CRITICAL_EXIT marco or register your functions.
+ *@note If you do not describe or register, default functions(@ref wizchip_cris_enter & @ref wizchip_cris_exit) is called.
+ */
+void reg_wizchip_cris_cbfunc(void(*cris_en)(void), void(*cris_ex)(void));
+
+
+/**
+ *@brief Registers call back function for WIZCHIP select & deselect.
+ *@param cs_sel : callback function for WIZCHIP select
+ *@param cs_desel : callback fucntion for WIZCHIP deselect
+ *@todo Describe @ref wizchip_cs_select and @ref wizchip_cs_deselect function or register your functions.
+ *@note If you do not describe or register, null function is called.
+ */
+void reg_wizchip_cs_cbfunc(void(*cs_sel)(void), void(*cs_desel)(void));
+
+/**
+ *@brief Registers call back function for bus interface.
+ *@param bus_rb   : callback function to read byte data using system bus
+ *@param bus_wb   : callback function to write byte data using system bus
+ *@todo Describe @ref wizchip_bus_readbyte and @ref wizchip_bus_writebyte function
+ *or register your functions.
+ *@note If you do not describe or register, null function is called.
+ */
+void reg_wizchip_bus_cbfunc(uint8_t (*bus_rb)(uint32_t addr), void (*bus_wb)(uint32_t addr, uint8_t wb));
+
+/**
+ *@brief Registers call back function for SPI interface.
+ *@param spi_rb : callback function to read byte usig SPI 
+ *@param spi_wb : callback function to write byte usig SPI 
+ *@todo Describe \ref wizchip_spi_readbyte and \ref wizchip_spi_writebyte function
+ *or register your functions.
+ *@note If you do not describe or register, null function is called.
+ */
+void reg_wizchip_spi_cbfunc(uint8_t (*spi_rb)(void), void (*spi_wb)(uint8_t wb));
+
+/**
+ * @ingroup extra_functions
+ * @brief Controls to the WIZCHIP.
+ * @details Resets WIZCHIP & internal PHY, Configures PHY mode, Monitor PHY(Link,Speed,Half/Full/Auto),
+ * controls interrupt & mask and so on.
+ * @param cwtype : Decides to the control type
+ * @param arg : arg type is dependent on cwtype.
+ * @return  0 : Success \n
+ *         -1 : Fail because of invalid \ref ctlwizchip_type or unsupported \ref ctlwizchip_type in WIZCHIP 
+ */          
+int8_t ctlwizchip(ctlwizchip_type cwtype, void* arg);
+
+/**
+ * @ingroup extra_functions
+ * @brief Controls to network.
+ * @details Controls to network environment, mode, timeout and so on.
+ * @param cntype : Input. Decides to the control type
+ * @param arg : Inout. arg type is dependent on cntype.
+ * @return -1 : Fail because of invalid \ref ctlnetwork_type or unsupported \ref ctlnetwork_type in WIZCHIP \n
+ *          0 : Success      
+ */          
+int8_t ctlnetwork(ctlnetwork_type cntype, void* arg);
+
+
+/* 
+ * The following functions are implemented for internal use. 
+ * but You can call these functions for code size reduction instead of ctlwizchip() and ctlnetwork().
+ */
+ 
+/**
+ * @ingroup extra_functions
+ * @brief Reset WIZCHIP by softly.
+ */ 
+void   wizchip_sw_reset(void);
+
+/**
+ * @ingroup extra_functions
+ * @brief Initializes WIZCHIP with socket buffer size
+ * @param txsize Socket tx buffer sizes. If null, initialized the default size 2KB.
+ * @param rxsize Socket rx buffer sizes. If null, initialized the default size 2KB.
+ * @return 0 : succcess \n
+ *        -1 : fail. Invalid buffer size
+ */
+int8_t wizchip_init(uint8_t* txsize, uint8_t* rxsize);
+
+/** 
+ * @ingroup extra_functions
+ * @brief Clear Interrupt of WIZCHIP.
+ * @param intr : @ref intr_kind value operated OR. It can type-cast to uint16_t.
+ */
+void wizchip_clrinterrupt(intr_kind intr);
+
+/** 
+ * @ingroup extra_functions
+ * @brief Get Interrupt of WIZCHIP.
+ * @return @ref intr_kind value operated OR. It can type-cast to uint16_t.
+ */
+intr_kind wizchip_getinterrupt(void);
+
+/** 
+ * @ingroup extra_functions
+ * @brief Mask or Unmask Interrupt of WIZCHIP.
+ * @param intr : @ref intr_kind value operated OR. It can type-cast to uint16_t.
+ */
+void wizchip_setinterruptmask(intr_kind intr);
+
+/** 
+ * @ingroup extra_functions
+ * @brief Get Interrupt mask of WIZCHIP.
+ * @return : The operated OR vaule of @ref intr_kind. It can type-cast to uint16_t.
+ */
+intr_kind wizchip_getinterruptmask(void);
+
+#if _WIZCHIP_ > 5100
+   int8_t wizphy_getphylink(void);              ///< get the link status of phy in WIZCHIP. No use in W5100
+   int8_t wizphy_getphypmode(void);             ///< get the power mode of PHY in WIZCHIP. No use in W5100
+#endif
+
+#if _WIZCHIP_ == 5500
+   void   wizphy_reset(void);                   ///< Reset phy. Vailid only in W5500
+/**
+ * @ingroup extra_functions
+ * @brief Set the phy information for WIZCHIP without power mode
+ * @param phyconf : @ref wiz_PhyConf
+ */
+   void   wizphy_setphyconf(wiz_PhyConf* phyconf);  
+ /**
+ * @ingroup extra_functions
+ * @brief Get phy configuration information.
+ * @param phyconf : @ref wiz_PhyConf
+ */
+   void   wizphy_getphyconf(wiz_PhyConf* phyconf); 
+ /**
+ * @ingroup extra_functions
+ * @brief Get phy status.
+ * @param phyconf : @ref wiz_PhyConf
+ */ 
+   void   wizphy_getphystat(wiz_PhyConf* phyconf);
+ /**
+ * @ingroup extra_functions
+ * @brief set the power mode of phy inside WIZCHIP. Refer to @ref PHYCFGR in W5500, @ref PHYSTATUS in W5200
+ * @param pmode Settig value of power down mode.
+ */   
+   int8_t wizphy_setphypmode(uint8_t pmode);    
+#endif
+
+/**
+* @ingroup extra_functions
+ * @brief Set the network information for WIZCHIP
+ * @param pnetinfo : @ref wizNetInfo
+ */
+void wizchip_setnetinfo(wiz_NetInfo* pnetinfo);
+
+/**
+ * @ingroup extra_functions
+ * @brief Get the network information for WIZCHIP
+ * @param pnetinfo : @ref wizNetInfo
+ */
+void wizchip_getnetinfo(wiz_NetInfo* pnetinfo);
+
+/**
+ * @ingroup extra_functions
+ * @brief Set the network mode such WOL, PPPoE, Ping Block, and etc. 
+ * @param pnetinfo Value of network mode. Refer to @ref netmode_type.
+ */
+int8_t wizchip_setnetmode(netmode_type netmode);
+
+/**
+ * @ingroup extra_functions
+ * @brief Get the network mode such WOL, PPPoE, Ping Block, and etc. 
+ * @return Value of network mode. Refer to @ref netmode_type.
+ */
+netmode_type wizchip_getnetmode(void);
+
+/**
+ * @ingroup extra_functions
+ * @brief Set retry time value(@ref RTR) and retry count(@ref RCR).
+ * @details @ref RTR configures the retransmission timeout period and @ref RCR configures the number of time of retransmission.  
+ * @param nettime @ref RTR value and @ref RCR value. Refer to @ref wiz_NetTimeout. 
+ */
+void wizchip_settimeout(wiz_NetTimeout* nettime);
+
+/**
+ * @ingroup extra_functions
+ * @brief Get retry time value(@ref RTR) and retry count(@ref RCR).
+ * @details @ref RTR configures the retransmission timeout period and @ref RCR configures the number of time of retransmission.  
+ * @param nettime @ref RTR value and @ref RCR value. Refer to @ref wiz_NetTimeout. 
+ */
+void wizchip_gettimeout(wiz_NetTimeout* nettime);
+
+#endif   // _WIZCHIP_CONF_H_
diff --git a/Src/GlobalDef.c b/Src/GlobalDef.c
index 2b852a1..5478adc 100644
--- a/Src/GlobalDef.c
+++ b/Src/GlobalDef.c
@@ -12,9 +12,10 @@
 stUartStat Uart1Stat={0};
 stUartStat Uart2Stat={0};
 
-const unsigned int DefaultUart1Baud = 230400;
-unsigned int Uart1Baud = 230400;
-unsigned int Uart2Baud = 2000000;
+//const unsigned int DefaultUart1Baud = 230400;
+
+unsigned int Uart1Baud = DefaultUart1Baud;
+unsigned int Uart2Baud = DefaultUart2Baud;
 
 unsigned char Uart1RecvBuf1[128];
 int Uart1RecvBuf1DataLen=0;
@@ -35,6 +36,7 @@
 
 volatile int SysConfigs;
 
+/*
 int GetBoardType(void )
 {
 	int BoardType=0;
@@ -46,7 +48,7 @@
 	BoardType = BOARD_TYPE;
 	return BoardType;
 }
-
+*/
 /*
 int sintab[256]={
 	 0,    1,   3,   4,   6,   7,   9,  10,  12,  14,  15,  17,  18,  20,  21,  23, 
diff --git a/Src/Internet/DHCP/dhcp.c b/Src/Internet/DHCP/dhcp.c
new file mode 100644
index 0000000..65cfa13
--- /dev/null
+++ b/Src/Internet/DHCP/dhcp.c
@@ -0,0 +1,976 @@
+//*****************************************************************************
+//
+//! \file dhcp.c
+//! \brief DHCP APIs implement file.
+//! \details Processig DHCP protocol as DISCOVER, OFFER, REQUEST, ACK, NACK and DECLINE.
+//! \version 1.1.0
+//! \date 2013/11/18
+//! \par  Revision history
+//!       <2013/11/18> 1st Release
+//!       <2012/12/20> V1.1.0
+//!         1. Optimize code
+//!         2. Add reg_dhcp_cbfunc()
+//!         3. Add DHCP_stop() 
+//!         4. Integrate check_DHCP_state() & DHCP_run() to DHCP_run()
+//!         5. Don't care system endian
+//!         6. Add comments
+//!       <2012/12/26> V1.1.1
+//!         1. Modify variable declaration: dhcp_tick_1s is declared volatile for code optimization
+//! \author Eric Jung & MidnightCow
+//! \copyright
+//!
+//! Copyright (c)  2013, WIZnet Co., LTD.
+//! All rights reserved.
+//! 
+//! Redistribution and use in source and binary forms, with or without 
+//! modification, are permitted provided that the following conditions 
+//! are met: 
+//! 
+//!     * Redistributions of source code must retain the above copyright 
+//! notice, this list of conditions and the following disclaimer. 
+//!     * Redistributions in binary form must reproduce the above copyright
+//! notice, this list of conditions and the following disclaimer in the
+//! documentation and/or other materials provided with the distribution. 
+//!     * Neither the name of the <ORGANIZATION> nor the names of its 
+//! contributors may be used to endorse or promote products derived 
+//! from this software without specific prior written permission. 
+//! 
+//! THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+//! AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 
+//! IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+//! ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 
+//! LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 
+//! CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 
+//! SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+//! INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 
+//! CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 
+//! ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 
+//! THE POSSIBILITY OF SUCH DAMAGE.
+//
+//*****************************************************************************
+
+#include "Ethernet/socket.h"
+#include "Internet/DHCP/dhcp.h"
+
+/* If you want to display debug & procssing message, Define _DHCP_DEBUG_ in dhcp.h */
+
+#ifdef _DHCP_DEBUG_
+   #include <stdio.h>
+#endif   
+
+/* DHCP state machine. */
+#define STATE_DHCP_INIT          0        ///< Initialize
+#define STATE_DHCP_DISCOVER      1        ///< send DISCOVER and wait OFFER
+#define STATE_DHCP_REQUEST       2        ///< send REQEUST and wait ACK or NACK
+#define STATE_DHCP_LEASED        3        ///< ReceiveD ACK and IP leased
+#define STATE_DHCP_REREQUEST     4        ///< send REQUEST for maintaining leased IP
+#define STATE_DHCP_RELEASE       5        ///< No use
+#define STATE_DHCP_STOP          6        ///< Stop procssing DHCP
+
+#define DHCP_FLAGSBROADCAST      0x8000   ///< The broadcast value of flags in @ref RIP_MSG 
+#define DHCP_FLAGSUNICAST        0x0000   ///< The unicast   value of flags in @ref RIP_MSG
+
+/* DHCP message OP code */
+#define DHCP_BOOTREQUEST         1        ///< Request Message used in op of @ref RIP_MSG
+#define DHCP_BOOTREPLY           2        ///< Reply Message used i op of @ref RIP_MSG
+
+/* DHCP message type */
+#define DHCP_DISCOVER            1        ///< DISCOVER message in OPT of @ref RIP_MSG
+#define DHCP_OFFER               2        ///< OFFER message in OPT of @ref RIP_MSG
+#define DHCP_REQUEST             3        ///< REQUEST message in OPT of @ref RIP_MSG
+#define DHCP_DECLINE             4        ///< DECLINE message in OPT of @ref RIP_MSG
+#define DHCP_ACK                 5        ///< ACK message in OPT of @ref RIP_MSG
+#define DHCP_NAK                 6        ///< NACK message in OPT of @ref RIP_MSG
+#define DHCP_RELEASE             7        ///< RELEASE message in OPT of @ref RIP_MSG. No use
+#define DHCP_INFORM              8        ///< INFORM message in OPT of @ref RIP_MSG. No use
+
+#define DHCP_HTYPE10MB           1        ///< Used in type of @ref RIP_MSG
+#define DHCP_HTYPE100MB          2        ///< Used in type of @ref RIP_MSG
+
+#define DHCP_HLENETHERNET        6        ///< Used in hlen of @ref RIP_MSG
+#define DHCP_HOPS                0        ///< Used in hops of @ref RIP_MSG
+#define DHCP_SECS                0        ///< Used in secs of @ref RIP_MSG
+
+#define INFINITE_LEASETIME       0xffffffff	///< Infinite lease time
+
+#define OPT_SIZE                 312               /// Max OPT size of @ref RIP_MSG
+#define RIP_MSG_SIZE             (236+OPT_SIZE)    /// Max size of @ref RIP_MSG
+
+/* 
+ * @brief DHCP option and value (cf. RFC1533)
+ */
+enum
+{
+   padOption               = 0,
+   subnetMask              = 1,
+   timerOffset             = 2,
+   routersOnSubnet         = 3,
+   timeServer              = 4,
+   nameServer              = 5,
+   dns                     = 6,
+   logServer               = 7,
+   cookieServer            = 8,
+   lprServer               = 9,
+   impressServer           = 10,
+   resourceLocationServer	= 11,
+   hostName                = 12,
+   bootFileSize            = 13,
+   meritDumpFile           = 14,
+   domainName              = 15,
+   swapServer              = 16,
+   rootPath                = 17,
+   extentionsPath          = 18,
+   IPforwarding            = 19,
+   nonLocalSourceRouting   = 20,
+   policyFilter            = 21,
+   maxDgramReasmSize       = 22,
+   defaultIPTTL            = 23,
+   pathMTUagingTimeout     = 24,
+   pathMTUplateauTable     = 25,
+   ifMTU                   = 26,
+   allSubnetsLocal         = 27,
+   broadcastAddr           = 28,
+   performMaskDiscovery    = 29,
+   maskSupplier            = 30,
+   performRouterDiscovery  = 31,
+   routerSolicitationAddr  = 32,
+   staticRoute             = 33,
+   trailerEncapsulation    = 34,
+   arpCacheTimeout         = 35,
+   ethernetEncapsulation   = 36,
+   tcpDefaultTTL           = 37,
+   tcpKeepaliveInterval    = 38,
+   tcpKeepaliveGarbage     = 39,
+   nisDomainName           = 40,
+   nisServers              = 41,
+   ntpServers              = 42,
+   vendorSpecificInfo      = 43,
+   netBIOSnameServer       = 44,
+   netBIOSdgramDistServer	= 45,
+   netBIOSnodeType         = 46,
+   netBIOSscope            = 47,
+   xFontServer             = 48,
+   xDisplayManager         = 49,
+   dhcpRequestedIPaddr     = 50,
+   dhcpIPaddrLeaseTime     = 51,
+   dhcpOptionOverload      = 52,
+   dhcpMessageType         = 53,
+   dhcpServerIdentifier    = 54,
+   dhcpParamRequest        = 55,
+   dhcpMsg                 = 56,
+   dhcpMaxMsgSize          = 57,
+   dhcpT1value             = 58,
+   dhcpT2value             = 59,
+   dhcpClassIdentifier     = 60,
+   dhcpClientIdentifier    = 61,
+   endOption               = 255
+};
+
+/*
+ * @brief DHCP message format
+ */ 
+typedef struct {
+	uint8_t  op;            ///< @ref DHCP_BOOTREQUEST or @ref DHCP_BOOTREPLY
+	uint8_t  htype;         ///< @ref DHCP_HTYPE10MB or @ref DHCP_HTYPE100MB
+	uint8_t  hlen;          ///< @ref DHCP_HLENETHERNET
+	uint8_t  hops;          ///< @ref DHCP_HOPS
+	uint32_t xid;           ///< @ref DHCP_XID  This increase one every DHCP transaction.
+	uint16_t secs;          ///< @ref DHCP_SECS
+	uint16_t flags;         ///< @ref DHCP_FLAGSBROADCAST or @ref DHCP_FLAGSUNICAST
+	uint8_t  ciaddr[4];     ///< @ref Request IP to DHCP sever
+	uint8_t  yiaddr[4];     ///< @ref Offered IP from DHCP server
+	uint8_t  siaddr[4];     ///< No use 
+	uint8_t  giaddr[4];     ///< No use
+	uint8_t  chaddr[16];    ///< DHCP client 6bytes MAC address. Others is filled to zero
+	uint8_t  sname[64];     ///< No use
+	uint8_t  file[128];     ///< No use
+	uint8_t  OPT[OPT_SIZE]; ///< Option
+} RIP_MSG;
+
+
+
+uint8_t DHCP_SOCKET;                      // Socket number for DHCP
+
+uint8_t DHCP_SIP[4];                      // DHCP Server IP address
+
+// Network information from DHCP Server
+uint8_t OLD_allocated_ip[4]   = {0, };    // Previous IP address
+uint8_t DHCP_allocated_ip[4]  = {0, };    // IP address from DHCP
+uint8_t DHCP_allocated_gw[4]  = {0, };    // Gateway address from DHCP
+uint8_t DHCP_allocated_sn[4]  = {0, };    // Subnet mask from DHCP
+uint8_t DHCP_allocated_dns[4] = {0, };    // DNS address from DHCP
+
+
+int8_t   dhcp_state        = STATE_DHCP_INIT;   // DHCP state
+int8_t   dhcp_retry_count  = 0;                 
+
+uint32_t dhcp_lease_time   			= INFINITE_LEASETIME;
+volatile uint32_t dhcp_tick_1s      = 0;                 // unit 1 second
+uint32_t dhcp_tick_next    			= DHCP_WAIT_TIME ;
+
+uint32_t DHCP_XID;      // Any number
+
+RIP_MSG* pDHCPMSG;      // Buffer pointer for DHCP processing
+
+uint8_t HOST_NAME[] = DCHP_HOST_NAME;  
+
+uint8_t DHCP_CHADDR[6]; // DHCP Client MAC address.
+
+/* The default callback function */
+void default_ip_assign(void);
+void default_ip_update(void);
+void default_ip_conflict(void);
+
+/* Callback handler */
+void (*dhcp_ip_assign)(void)   = default_ip_assign;     /* handler to be called when the IP address from DHCP server is first assigned */
+void (*dhcp_ip_update)(void)   = default_ip_update;     /* handler to be called when the IP address from DHCP server is updated */
+void (*dhcp_ip_conflict)(void) = default_ip_conflict;   /* handler to be called when the IP address from DHCP server is conflict */
+
+void reg_dhcp_cbfunc(void(*ip_assign)(void), void(*ip_update)(void), void(*ip_conflict)(void));
+
+
+/* send DISCOVER message to DHCP server */
+void     send_DHCP_DISCOVER(void);
+
+/* send REQEUST message to DHCP server */
+void     send_DHCP_REQUEST(void);
+
+/* send DECLINE message to DHCP server */
+void     send_DHCP_DECLINE(void);
+
+/* IP conflict check by sending ARP-request to leased IP and wait ARP-response. */
+int8_t   check_DHCP_leasedIP(void);
+
+/* check the timeout in DHCP process */
+uint8_t  check_DHCP_timeout(void);
+
+/* Intialize to timeout process.  */
+void     reset_DHCP_timeout(void);
+
+/* Parse message as OFFER and ACK and NACK from DHCP server.*/
+int8_t   parseDHCPCMSG(void);
+
+/* The default handler of ip assign first */
+void default_ip_assign(void)
+{
+   setSIPR(DHCP_allocated_ip);
+   setSUBR(DHCP_allocated_sn);
+   setGAR (DHCP_allocated_gw);
+}
+
+/* The default handler of ip chaged */
+void default_ip_update(void)
+{
+	/* WIZchip Software Reset */
+   setMR(MR_RST);
+   getMR(); // for delay
+   default_ip_assign();
+   setSHAR(DHCP_CHADDR);
+}
+
+/* The default handler of ip chaged */
+void default_ip_conflict(void)
+{
+	// WIZchip Software Reset
+	setMR(MR_RST);
+	getMR(); // for delay
+	setSHAR(DHCP_CHADDR);
+}
+
+/* register the call back func. */
+void reg_dhcp_cbfunc(void(*ip_assign)(void), void(*ip_update)(void), void(*ip_conflict)(void))
+{
+   dhcp_ip_assign   = default_ip_assign;
+   dhcp_ip_update   = default_ip_update;
+   dhcp_ip_conflict = default_ip_conflict;
+   if(ip_assign)   dhcp_ip_assign = ip_assign;
+   if(ip_update)   dhcp_ip_update = ip_update;
+   if(ip_conflict) dhcp_ip_conflict = ip_conflict;
+}
+
+/* make the common DHCP message */
+void makeDHCPMSG(void)
+{
+   uint8_t  bk_mac[6];
+   uint8_t* ptmp;
+   uint8_t  i;
+   getSHAR(bk_mac);
+	pDHCPMSG->op      = DHCP_BOOTREQUEST;
+	pDHCPMSG->htype   = DHCP_HTYPE10MB;
+	pDHCPMSG->hlen    = DHCP_HLENETHERNET;
+	pDHCPMSG->hops    = DHCP_HOPS;
+	ptmp              = (uint8_t*)(&pDHCPMSG->xid);
+	*(ptmp+0)         = (uint8_t)((DHCP_XID & 0xFF000000) >> 24);
+	*(ptmp+1)         = (uint8_t)((DHCP_XID & 0x00FF0000) >> 16);
+   *(ptmp+2)         = (uint8_t)((DHCP_XID & 0x0000FF00) >>  8);
+	*(ptmp+3)         = (uint8_t)((DHCP_XID & 0x000000FF) >>  0);   
+	pDHCPMSG->secs    = DHCP_SECS;
+	ptmp              = (uint8_t*)(&pDHCPMSG->flags);	
+	*(ptmp+0)         = (uint8_t)((DHCP_FLAGSBROADCAST & 0xFF00) >> 8);
+	*(ptmp+1)         = (uint8_t)((DHCP_FLAGSBROADCAST & 0x00FF) >> 0);
+
+	pDHCPMSG->ciaddr[0] = 0;
+	pDHCPMSG->ciaddr[1] = 0;
+	pDHCPMSG->ciaddr[2] = 0;
+	pDHCPMSG->ciaddr[3] = 0;
+
+	pDHCPMSG->yiaddr[0] = 0;
+	pDHCPMSG->yiaddr[1] = 0;
+	pDHCPMSG->yiaddr[2] = 0;
+	pDHCPMSG->yiaddr[3] = 0;
+
+	pDHCPMSG->siaddr[0] = 0;
+	pDHCPMSG->siaddr[1] = 0;
+	pDHCPMSG->siaddr[2] = 0;
+	pDHCPMSG->siaddr[3] = 0;
+
+	pDHCPMSG->giaddr[0] = 0;
+	pDHCPMSG->giaddr[1] = 0;
+	pDHCPMSG->giaddr[2] = 0;
+	pDHCPMSG->giaddr[3] = 0;
+
+	pDHCPMSG->chaddr[0] = DHCP_CHADDR[0];
+	pDHCPMSG->chaddr[1] = DHCP_CHADDR[1];
+	pDHCPMSG->chaddr[2] = DHCP_CHADDR[2];
+	pDHCPMSG->chaddr[3] = DHCP_CHADDR[3];
+	pDHCPMSG->chaddr[4] = DHCP_CHADDR[4];
+	pDHCPMSG->chaddr[5] = DHCP_CHADDR[5];
+
+	for (i = 6; i < 16; i++)  pDHCPMSG->chaddr[i] = 0;
+	for (i = 0; i < 64; i++)  pDHCPMSG->sname[i]  = 0;
+	for (i = 0; i < 128; i++) pDHCPMSG->file[i]   = 0;
+
+	// MAGIC_COOKIE
+	pDHCPMSG->OPT[0] = (uint8_t)((MAGIC_COOKIE & 0xFF000000) >> 24);
+	pDHCPMSG->OPT[1] = (uint8_t)((MAGIC_COOKIE & 0x00FF0000) >> 16);
+	pDHCPMSG->OPT[2] = (uint8_t)((MAGIC_COOKIE & 0x0000FF00) >>  8);
+	pDHCPMSG->OPT[3] = (uint8_t) (MAGIC_COOKIE & 0x000000FF) >>  0;
+}
+
+/* SEND DHCP DISCOVER */
+void send_DHCP_DISCOVER(void)
+{
+	uint16_t i;
+	uint8_t ip[4];
+	uint16_t k = 0;
+   
+   makeDHCPMSG();
+
+   k = 4;     // beacaue MAGIC_COOKIE already made by makeDHCPMSG()
+   
+	// Option Request Param
+	pDHCPMSG->OPT[k++] = dhcpMessageType;
+	pDHCPMSG->OPT[k++] = 0x01;
+	pDHCPMSG->OPT[k++] = DHCP_DISCOVER;
+	
+	// Client identifier
+	pDHCPMSG->OPT[k++] = dhcpClientIdentifier;
+	pDHCPMSG->OPT[k++] = 0x07;
+	pDHCPMSG->OPT[k++] = 0x01;
+	pDHCPMSG->OPT[k++] = DHCP_CHADDR[0];
+	pDHCPMSG->OPT[k++] = DHCP_CHADDR[1];
+	pDHCPMSG->OPT[k++] = DHCP_CHADDR[2];
+	pDHCPMSG->OPT[k++] = DHCP_CHADDR[3];
+	pDHCPMSG->OPT[k++] = DHCP_CHADDR[4];
+	pDHCPMSG->OPT[k++] = DHCP_CHADDR[5];
+	
+	// host name
+	pDHCPMSG->OPT[k++] = hostName;
+	pDHCPMSG->OPT[k++] = 0;          // fill zero length of hostname 
+	for(i = 0 ; HOST_NAME[i] != 0; i++)
+   	pDHCPMSG->OPT[k++] = HOST_NAME[i];
+	pDHCPMSG->OPT[k++] = DHCP_CHADDR[3];
+	pDHCPMSG->OPT[k++] = DHCP_CHADDR[4];
+	pDHCPMSG->OPT[k++] = DHCP_CHADDR[5];
+	pDHCPMSG->OPT[k - (i+3+1)] = i+3; // length of hostname
+
+	pDHCPMSG->OPT[k++] = dhcpParamRequest;
+	pDHCPMSG->OPT[k++] = 0x06;	// length of request
+	pDHCPMSG->OPT[k++] = subnetMask;
+	pDHCPMSG->OPT[k++] = routersOnSubnet;
+	pDHCPMSG->OPT[k++] = dns;
+	pDHCPMSG->OPT[k++] = domainName;
+	pDHCPMSG->OPT[k++] = dhcpT1value;
+	pDHCPMSG->OPT[k++] = dhcpT2value;
+	pDHCPMSG->OPT[k++] = endOption;
+
+	for (i = k; i < OPT_SIZE; i++) pDHCPMSG->OPT[i] = 0;
+
+	// send broadcasting packet
+	ip[0] = 255;
+	ip[1] = 255;
+	ip[2] = 255;
+	ip[3] = 255;
+
+#ifdef _DHCP_DEBUG_
+	printf("> Send DHCP_DISCOVER\r\n");
+#endif
+
+	sendto(DHCP_SOCKET, (uint8_t *)pDHCPMSG, RIP_MSG_SIZE, ip, DHCP_SERVER_PORT);
+}
+
+/* SEND DHCP REQUEST */
+void send_DHCP_REQUEST(void)
+{
+	int i;
+	uint8_t ip[4];
+	uint16_t k = 0;
+
+   makeDHCPMSG();
+
+   if(dhcp_state == STATE_DHCP_LEASED || dhcp_state == STATE_DHCP_REREQUEST)
+   {
+   	*((uint8_t*)(&pDHCPMSG->flags))   = ((DHCP_FLAGSUNICAST & 0xFF00)>> 8);
+   	*((uint8_t*)(&pDHCPMSG->flags)+1) = (DHCP_FLAGSUNICAST & 0x00FF);
+   	pDHCPMSG->ciaddr[0] = DHCP_allocated_ip[0];
+   	pDHCPMSG->ciaddr[1] = DHCP_allocated_ip[1];
+   	pDHCPMSG->ciaddr[2] = DHCP_allocated_ip[2];
+   	pDHCPMSG->ciaddr[3] = DHCP_allocated_ip[3];
+   	ip[0] = DHCP_SIP[0];
+   	ip[1] = DHCP_SIP[1];
+   	ip[2] = DHCP_SIP[2];
+   	ip[3] = DHCP_SIP[3];   	   	   	
+   }
+   else
+   {
+   	ip[0] = 255;
+   	ip[1] = 255;
+   	ip[2] = 255;
+   	ip[3] = 255;   	   	   	
+   }
+   
+   k = 4;      // beacaue MAGIC_COOKIE already made by makeDHCPMSG()
+	
+	// Option Request Param.
+	pDHCPMSG->OPT[k++] = dhcpMessageType;
+	pDHCPMSG->OPT[k++] = 0x01;
+	pDHCPMSG->OPT[k++] = DHCP_REQUEST;
+
+	pDHCPMSG->OPT[k++] = dhcpClientIdentifier;
+	pDHCPMSG->OPT[k++] = 0x07;
+	pDHCPMSG->OPT[k++] = 0x01;
+	pDHCPMSG->OPT[k++] = DHCP_CHADDR[0];
+	pDHCPMSG->OPT[k++] = DHCP_CHADDR[1];
+	pDHCPMSG->OPT[k++] = DHCP_CHADDR[2];
+	pDHCPMSG->OPT[k++] = DHCP_CHADDR[3];
+	pDHCPMSG->OPT[k++] = DHCP_CHADDR[4];
+	pDHCPMSG->OPT[k++] = DHCP_CHADDR[5];
+
+   if(ip[3] == 255)  // if(dchp_state == STATE_DHCP_LEASED || dchp_state == DHCP_REREQUEST_STATE)
+   {
+		pDHCPMSG->OPT[k++] = dhcpRequestedIPaddr;
+		pDHCPMSG->OPT[k++] = 0x04;
+		pDHCPMSG->OPT[k++] = DHCP_allocated_ip[0];
+		pDHCPMSG->OPT[k++] = DHCP_allocated_ip[1];
+		pDHCPMSG->OPT[k++] = DHCP_allocated_ip[2];
+		pDHCPMSG->OPT[k++] = DHCP_allocated_ip[3];
+	
+		pDHCPMSG->OPT[k++] = dhcpServerIdentifier;
+		pDHCPMSG->OPT[k++] = 0x04;
+		pDHCPMSG->OPT[k++] = DHCP_SIP[0];
+		pDHCPMSG->OPT[k++] = DHCP_SIP[1];
+		pDHCPMSG->OPT[k++] = DHCP_SIP[2];
+		pDHCPMSG->OPT[k++] = DHCP_SIP[3];
+	}
+
+	// host name
+	pDHCPMSG->OPT[k++] = hostName;
+	pDHCPMSG->OPT[k++] = 0; // length of hostname
+	for(i = 0 ; HOST_NAME[i] != 0; i++)
+   	pDHCPMSG->OPT[k++] = HOST_NAME[i];
+	pDHCPMSG->OPT[k++] = DHCP_CHADDR[3];
+	pDHCPMSG->OPT[k++] = DHCP_CHADDR[4];
+	pDHCPMSG->OPT[k++] = DHCP_CHADDR[5];
+	pDHCPMSG->OPT[k - (i+3+1)] = i+3; // length of hostname
+	
+	pDHCPMSG->OPT[k++] = dhcpParamRequest;
+	pDHCPMSG->OPT[k++] = 0x08;
+	pDHCPMSG->OPT[k++] = subnetMask;
+	pDHCPMSG->OPT[k++] = routersOnSubnet;
+	pDHCPMSG->OPT[k++] = dns;
+	pDHCPMSG->OPT[k++] = domainName;
+	pDHCPMSG->OPT[k++] = dhcpT1value;
+	pDHCPMSG->OPT[k++] = dhcpT2value;
+	pDHCPMSG->OPT[k++] = performRouterDiscovery;
+	pDHCPMSG->OPT[k++] = staticRoute;
+	pDHCPMSG->OPT[k++] = endOption;
+
+	for (i = k; i < OPT_SIZE; i++) pDHCPMSG->OPT[i] = 0;
+
+#ifdef _DHCP_DEBUG_
+	printf("> Send DHCP_REQUEST\r\n");
+#endif
+	
+	sendto(DHCP_SOCKET, (uint8_t *)pDHCPMSG, RIP_MSG_SIZE, ip, DHCP_SERVER_PORT);
+
+}
+
+/* SEND DHCP DHCPDECLINE */
+void send_DHCP_DECLINE(void)
+{
+	int i;
+	uint8_t ip[4];
+	uint16_t k = 0;
+	
+	makeDHCPMSG();
+
+   k = 4;      // beacaue MAGIC_COOKIE already made by makeDHCPMSG()
+   
+	*((uint8_t*)(&pDHCPMSG->flags))   = ((DHCP_FLAGSUNICAST & 0xFF00)>> 8);
+	*((uint8_t*)(&pDHCPMSG->flags)+1) = (DHCP_FLAGSUNICAST & 0x00FF);
+
+	// Option Request Param.
+	pDHCPMSG->OPT[k++] = dhcpMessageType;
+	pDHCPMSG->OPT[k++] = 0x01;
+	pDHCPMSG->OPT[k++] = DHCP_DECLINE;
+
+	pDHCPMSG->OPT[k++] = dhcpClientIdentifier;
+	pDHCPMSG->OPT[k++] = 0x07;
+	pDHCPMSG->OPT[k++] = 0x01;
+	pDHCPMSG->OPT[k++] = DHCP_CHADDR[0];
+	pDHCPMSG->OPT[k++] = DHCP_CHADDR[1];
+	pDHCPMSG->OPT[k++] = DHCP_CHADDR[2];
+	pDHCPMSG->OPT[k++] = DHCP_CHADDR[3];
+	pDHCPMSG->OPT[k++] = DHCP_CHADDR[4];
+	pDHCPMSG->OPT[k++] = DHCP_CHADDR[5];
+
+	pDHCPMSG->OPT[k++] = dhcpRequestedIPaddr;
+	pDHCPMSG->OPT[k++] = 0x04;
+	pDHCPMSG->OPT[k++] = DHCP_allocated_ip[0];
+	pDHCPMSG->OPT[k++] = DHCP_allocated_ip[1];
+	pDHCPMSG->OPT[k++] = DHCP_allocated_ip[2];
+	pDHCPMSG->OPT[k++] = DHCP_allocated_ip[3];
+
+	pDHCPMSG->OPT[k++] = dhcpServerIdentifier;
+	pDHCPMSG->OPT[k++] = 0x04;
+	pDHCPMSG->OPT[k++] = DHCP_SIP[0];
+	pDHCPMSG->OPT[k++] = DHCP_SIP[1];
+	pDHCPMSG->OPT[k++] = DHCP_SIP[2];
+	pDHCPMSG->OPT[k++] = DHCP_SIP[3];
+
+	pDHCPMSG->OPT[k++] = endOption;
+
+	for (i = k; i < OPT_SIZE; i++) pDHCPMSG->OPT[i] = 0;
+
+	//send broadcasting packet
+	ip[0] = 0xFF;
+	ip[1] = 0xFF;
+	ip[2] = 0xFF;
+	ip[3] = 0xFF;
+
+#ifdef _DHCP_DEBUG_
+	printf("\r\n> Send DHCP_DECLINE\r\n");
+#endif
+
+	sendto(DHCP_SOCKET, (uint8_t *)pDHCPMSG, RIP_MSG_SIZE, ip, DHCP_SERVER_PORT);
+}
+
+/* PARSE REPLY pDHCPMSG */
+int8_t parseDHCPMSG(void)
+{
+	uint8_t svr_addr[6];
+	uint16_t  svr_port;
+	uint16_t len;
+
+	uint8_t * p;
+	uint8_t * e;
+	uint8_t type;
+	uint8_t opt_len;
+   
+   if((len = getSn_RX_RSR(DHCP_SOCKET)) > 0)
+   {
+   	len = recvfrom(DHCP_SOCKET, (uint8_t *)pDHCPMSG, len, svr_addr, &svr_port);
+   #ifdef _DHCP_DEBUG_   
+      printf("DHCP message : %d.%d.%d.%d(%d) %d received. \r\n",svr_addr[0],svr_addr[1],svr_addr[2], svr_addr[3],svr_port, len);
+   #endif   
+   }
+   else return 0;
+	if (svr_port == DHCP_SERVER_PORT) {
+      // compare mac address
+		if ( (pDHCPMSG->chaddr[0] != DHCP_CHADDR[0]) || (pDHCPMSG->chaddr[1] != DHCP_CHADDR[1]) ||
+		     (pDHCPMSG->chaddr[2] != DHCP_CHADDR[2]) || (pDHCPMSG->chaddr[3] != DHCP_CHADDR[3]) ||
+		     (pDHCPMSG->chaddr[4] != DHCP_CHADDR[4]) || (pDHCPMSG->chaddr[5] != DHCP_CHADDR[5])   )
+         return 0;
+      type = 0;
+		p = (uint8_t *)(&pDHCPMSG->op);
+		p = p + 240;      // 240 = sizeof(RIP_MSG) + MAGIC_COOKIE size in RIP_MSG.opt - sizeof(RIP_MSG.opt)
+		e = p + (len - 240);
+
+		while ( p < e ) {
+
+			switch ( *p ) {
+
+   			case endOption :
+   			   p = e;   // for break while(p < e)
+   				break;
+            case padOption :
+   				p++;
+   				break;
+   			case dhcpMessageType :
+   				p++;
+   				p++;
+   				type = *p++;
+   				break;
+   			case subnetMask :
+   				p++;
+   				p++;
+   				DHCP_allocated_sn[0] = *p++;
+   				DHCP_allocated_sn[1] = *p++;
+   				DHCP_allocated_sn[2] = *p++;
+   				DHCP_allocated_sn[3] = *p++;
+   				break;
+   			case routersOnSubnet :
+   				p++;
+   				opt_len = *p++;       
+   				DHCP_allocated_gw[0] = *p++;
+   				DHCP_allocated_gw[1] = *p++;
+   				DHCP_allocated_gw[2] = *p++;
+   				DHCP_allocated_gw[3] = *p++;
+   				p = p + (opt_len - 4);
+   				break;
+   			case dns :
+   				p++;                  
+   				opt_len = *p++;       
+   				DHCP_allocated_dns[0] = *p++;
+   				DHCP_allocated_dns[1] = *p++;
+   				DHCP_allocated_dns[2] = *p++;
+   				DHCP_allocated_dns[3] = *p++;
+   				p = p + (opt_len - 4);
+   				break;
+   			case dhcpIPaddrLeaseTime :
+   				p++;
+   				opt_len = *p++;
+   				dhcp_lease_time  = *p++;
+   				dhcp_lease_time  = (dhcp_lease_time << 8) + *p++;
+   				dhcp_lease_time  = (dhcp_lease_time << 8) + *p++;
+   				dhcp_lease_time  = (dhcp_lease_time << 8) + *p++;
+            #ifdef _DHCP_DEBUG_  
+               dhcp_lease_time = 10;
+ 				#endif
+   				break;
+   			case dhcpServerIdentifier :
+   				p++;
+   				opt_len = *p++;
+   				DHCP_SIP[0] = *p++;
+   				DHCP_SIP[1] = *p++;
+   				DHCP_SIP[2] = *p++;
+   				DHCP_SIP[3] = *p++;
+   				break;
+   			default :
+   				p++;
+   				opt_len = *p++;
+   				p += opt_len;
+   				break;
+			} // switch
+		} // while
+	} // if
+	return	type;
+}
+
+uint8_t DHCP_run(void)
+{
+	uint8_t  type;
+	uint8_t  ret;
+
+	if(dhcp_state == STATE_DHCP_STOP) return DHCP_STOPPED;
+
+	if(getSn_SR(DHCP_SOCKET) != SOCK_UDP)
+	   socket(DHCP_SOCKET, Sn_MR_UDP, DHCP_CLIENT_PORT, 0x00);
+
+	ret = DHCP_RUNNING;
+	type = parseDHCPMSG();
+
+	switch ( dhcp_state ) {
+	   case STATE_DHCP_INIT     :
+         DHCP_allocated_ip[0] = 0;
+         DHCP_allocated_ip[1] = 0;
+         DHCP_allocated_ip[2] = 0;
+         DHCP_allocated_ip[3] = 0;
+   		send_DHCP_DISCOVER();
+   		dhcp_state = STATE_DHCP_DISCOVER;
+   		break;
+		case STATE_DHCP_DISCOVER :
+			if (type == DHCP_OFFER){
+#ifdef _DHCP_DEBUG_
+				printf("> Receive DHCP_OFFER\r\n");
+#endif
+            DHCP_allocated_ip[0] = pDHCPMSG->yiaddr[0];
+            DHCP_allocated_ip[1] = pDHCPMSG->yiaddr[1];
+            DHCP_allocated_ip[2] = pDHCPMSG->yiaddr[2];
+            DHCP_allocated_ip[3] = pDHCPMSG->yiaddr[3];
+
+				send_DHCP_REQUEST();
+				dhcp_state = STATE_DHCP_REQUEST;
+			} else ret = check_DHCP_timeout();
+         break;
+
+		case STATE_DHCP_REQUEST :
+			if (type == DHCP_ACK) {
+
+#ifdef _DHCP_DEBUG_
+				printf("> Receive DHCP_ACK\r\n");
+#endif
+				if (check_DHCP_leasedIP()) {
+					// Network info assignment from DHCP
+					dhcp_ip_assign();
+					reset_DHCP_timeout();
+
+					dhcp_state = STATE_DHCP_LEASED;
+				} else {
+					// IP address conflict occurred
+					reset_DHCP_timeout();
+					dhcp_ip_conflict();
+				    dhcp_state = STATE_DHCP_INIT;
+				}
+			} else if (type == DHCP_NAK) {
+
+#ifdef _DHCP_DEBUG_
+				printf("> Receive DHCP_NACK\r\n");
+#endif
+
+				reset_DHCP_timeout();
+
+				dhcp_state = STATE_DHCP_DISCOVER;
+			} else ret = check_DHCP_timeout();
+		break;
+
+		case STATE_DHCP_LEASED :
+		   ret = DHCP_IP_LEASED;
+			if ((dhcp_lease_time != INFINITE_LEASETIME) && ((dhcp_lease_time/2) < dhcp_tick_1s)) {
+				
+#ifdef _DHCP_DEBUG_
+ 				printf("> Maintains the IP address \r\n");
+#endif
+
+				type = 0;
+				OLD_allocated_ip[0] = DHCP_allocated_ip[0];
+				OLD_allocated_ip[1] = DHCP_allocated_ip[1];
+				OLD_allocated_ip[2] = DHCP_allocated_ip[2];
+				OLD_allocated_ip[3] = DHCP_allocated_ip[3];
+				
+				DHCP_XID++;
+
+				send_DHCP_REQUEST();
+
+				reset_DHCP_timeout();
+
+				dhcp_state = STATE_DHCP_REREQUEST;
+			}
+		break;
+
+		case STATE_DHCP_REREQUEST :
+		   ret = DHCP_IP_LEASED;
+			if (type == DHCP_ACK) {
+				dhcp_retry_count = 0;
+				if (OLD_allocated_ip[0] != DHCP_allocated_ip[0] || 
+				    OLD_allocated_ip[1] != DHCP_allocated_ip[1] ||
+				    OLD_allocated_ip[2] != DHCP_allocated_ip[2] ||
+				    OLD_allocated_ip[3] != DHCP_allocated_ip[3]) 
+				{
+					ret = DHCP_IP_CHANGED;
+					dhcp_ip_update();
+               #ifdef _DHCP_DEBUG_
+                  printf(">IP changed.\r\n");
+               #endif
+					
+				}
+         #ifdef _DHCP_DEBUG_
+            else printf(">IP is continued.\r\n");
+         #endif            				
+				reset_DHCP_timeout();
+				dhcp_state = STATE_DHCP_LEASED;
+			} else if (type == DHCP_NAK) {
+
+#ifdef _DHCP_DEBUG_
+				printf("> Receive DHCP_NACK, Failed to maintain ip\r\n");
+#endif
+
+				reset_DHCP_timeout();
+
+				dhcp_state = STATE_DHCP_DISCOVER;
+			} else ret = check_DHCP_timeout();
+	   	break;
+		default :
+   		break;
+	}
+
+	return ret;
+}
+
+void    DHCP_stop(void)
+{
+   close(DHCP_SOCKET);
+   dhcp_state = STATE_DHCP_STOP;
+}
+
+uint8_t check_DHCP_timeout(void)
+{
+	uint8_t ret = DHCP_RUNNING;
+	
+	if (dhcp_retry_count < MAX_DHCP_RETRY) {
+		if (dhcp_tick_next < dhcp_tick_1s) {
+
+			switch ( dhcp_state ) {
+				case STATE_DHCP_DISCOVER :
+//					printf("<<timeout>> state : STATE_DHCP_DISCOVER\r\n");
+					send_DHCP_DISCOVER();
+				break;
+		
+				case STATE_DHCP_REQUEST :
+//					printf("<<timeout>> state : STATE_DHCP_REQUEST\r\n");
+
+					send_DHCP_REQUEST();
+				break;
+
+				case STATE_DHCP_REREQUEST :
+//					printf("<<timeout>> state : STATE_DHCP_REREQUEST\r\n");
+					
+					send_DHCP_REQUEST();
+				break;
+		
+				default :
+				break;
+			}
+
+			dhcp_tick_1s = 0;
+			dhcp_tick_next = dhcp_tick_1s + DHCP_WAIT_TIME;
+			dhcp_retry_count++;
+		}
+	} else { // timeout occurred
+
+		switch(dhcp_state) {
+			case STATE_DHCP_DISCOVER:
+				dhcp_state = STATE_DHCP_INIT;
+				ret = DHCP_FAILED;
+				break;
+			case STATE_DHCP_REQUEST:
+			case STATE_DHCP_REREQUEST:
+				send_DHCP_DISCOVER();
+				dhcp_state = STATE_DHCP_DISCOVER;
+				break;
+			default :
+				break;
+		}
+		reset_DHCP_timeout();
+	}
+	return ret;
+}
+
+int8_t check_DHCP_leasedIP(void)
+{
+	uint8_t tmp;
+	int32_t ret;
+
+	//WIZchip RCR value changed for ARP Timeout count control
+	tmp = getRCR();
+	setRCR(0x03);
+
+	// IP conflict detection : ARP request - ARP reply
+	// Broadcasting ARP Request for check the IP conflict using UDP sendto() function
+	ret = sendto(DHCP_SOCKET, (uint8_t *)"CHECK_IP_CONFLICT", 17, DHCP_allocated_ip, 5000);
+
+	// RCR value restore
+	setRCR(tmp);
+
+	if(ret == SOCKERR_TIMEOUT) {
+		// UDP send Timeout occurred : allocated IP address is unique, DHCP Success
+
+#ifdef _DHCP_DEBUG_
+		printf("\r\n> Check leased IP - OK\r\n");
+#endif
+
+		return 1;
+	} else {
+		// Received ARP reply or etc : IP address conflict occur, DHCP Failed
+		send_DHCP_DECLINE();
+
+		ret = dhcp_tick_1s;
+		while((dhcp_tick_1s - ret) < 2) ;   // wait for 1s over; wait to complete to send DECLINE message;
+
+		return 0;
+	}
+}	
+
+void DHCP_init(uint8_t s, uint8_t * buf)
+{
+   uint8_t zeroip[4] = {0,0,0,0};
+   getSHAR(DHCP_CHADDR);
+   if((DHCP_CHADDR[0] | DHCP_CHADDR[1]  | DHCP_CHADDR[2] | DHCP_CHADDR[3] | DHCP_CHADDR[4] | DHCP_CHADDR[5]) == 0x00)
+   {
+      // assing temporary mac address, you should be set SHAR before call this function. 
+      DHCP_CHADDR[0] = 0x00;
+      DHCP_CHADDR[1] = 0x08;
+      DHCP_CHADDR[2] = 0xdc;      
+      DHCP_CHADDR[3] = 0x00;
+      DHCP_CHADDR[4] = 0x00;
+      DHCP_CHADDR[5] = 0x00; 
+      setSHAR(DHCP_CHADDR);     
+   }
+
+	DHCP_SOCKET = s; // SOCK_DHCP
+	pDHCPMSG = (RIP_MSG*)buf;
+	DHCP_XID = 0x12345678;
+
+	// WIZchip Netinfo Clear
+	setSIPR(zeroip);
+	setSIPR(zeroip);
+	setGAR(zeroip);
+
+	reset_DHCP_timeout();
+	dhcp_state = STATE_DHCP_INIT;
+}
+
+
+/* Rset the DHCP timeout count and retry count. */
+void reset_DHCP_timeout(void)
+{
+	dhcp_tick_1s = 0;
+	dhcp_tick_next = DHCP_WAIT_TIME;
+	dhcp_retry_count = 0;
+}
+
+void DHCP_time_handler(void)
+{
+	dhcp_tick_1s++;
+}
+
+void getIPfromDHCP(uint8_t* ip)
+{
+	ip[0] = DHCP_allocated_ip[0];
+	ip[1] = DHCP_allocated_ip[1];
+	ip[2] = DHCP_allocated_ip[2];	
+	ip[3] = DHCP_allocated_ip[3];
+}
+
+void getGWfromDHCP(uint8_t* ip)
+{
+	ip[0] =DHCP_allocated_gw[0];
+	ip[1] =DHCP_allocated_gw[1];
+	ip[2] =DHCP_allocated_gw[2];
+	ip[3] =DHCP_allocated_gw[3];			
+}
+
+void getSNfromDHCP(uint8_t* ip)
+{
+   ip[0] = DHCP_allocated_sn[0];
+   ip[1] = DHCP_allocated_sn[1];
+   ip[2] = DHCP_allocated_sn[2];
+   ip[3] = DHCP_allocated_sn[3];         
+}
+
+void getDNSfromDHCP(uint8_t* ip)
+{
+   ip[0] = DHCP_allocated_dns[0];
+   ip[1] = DHCP_allocated_dns[1];
+   ip[2] = DHCP_allocated_dns[2];
+   ip[3] = DHCP_allocated_dns[3];         
+}
+
+uint32_t getDHCPLeasetime(void)
+{
+	return dhcp_lease_time;
+}
+
+
+
+
diff --git a/Src/Internet/DHCP/dhcp.h b/Src/Internet/DHCP/dhcp.h
new file mode 100644
index 0000000..7b03f68
--- /dev/null
+++ b/Src/Internet/DHCP/dhcp.h
@@ -0,0 +1,152 @@
+//*****************************************************************************
+//
+//! \file dhcp.h
+//! \brief DHCP APIs Header file.
+//! \details Processig DHCP protocol as DISCOVER, OFFER, REQUEST, ACK, NACK and DECLINE.
+//! \version 1.1.0
+//! \date 2013/11/18
+//! \par  Revision history
+//!       <2013/11/18> 1st Release
+//!       <2012/12/20> V1.1.0
+//!         1. Move unreferenced DEFINE to dhcp.c
+//!       <2012/12/26> V1.1.1
+//! \author Eric Jung & MidnightCow
+//! \copyright
+//!
+//! Copyright (c)  2013, WIZnet Co., LTD.
+//! All rights reserved.
+//! 
+//! Redistribution and use in source and binary forms, with or without 
+//! modification, are permitted provided that the following conditions 
+//! are met: 
+//! 
+//!     * Redistributions of source code must retain the above copyright 
+//! notice, this list of conditions and the following disclaimer. 
+//!     * Redistributions in binary form must reproduce the above copyright
+//! notice, this list of conditions and the following disclaimer in the
+//! documentation and/or other materials provided with the distribution. 
+//!     * Neither the name of the <ORGANIZATION> nor the names of its 
+//! contributors may be used to endorse or promote products derived 
+//! from this software without specific prior written permission. 
+//! 
+//! THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+//! AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 
+//! IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+//! ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 
+//! LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 
+//! CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 
+//! SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+//! INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 
+//! CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 
+//! ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 
+//! THE POSSIBILITY OF SUCH DAMAGE.
+//
+//*****************************************************************************
+#ifndef _DHCP_H_
+#define _DHCP_H_
+
+/*
+ * @brief 
+ * @details If you want to display debug & procssing message, Define _DHCP_DEBUG_ 
+ * @note    If defined, it dependens on <stdio.h>
+ */
+//#define _DHCP_DEBUG_
+
+
+/* Retry to processing DHCP */
+#define	MAX_DHCP_RETRY          2        ///< Maxium retry count
+#define	DHCP_WAIT_TIME          10       ///< Wait Time 10s
+
+
+/* UDP port numbers for DHCP */
+#define DHCP_SERVER_PORT      	67	      ///< DHCP server port number
+#define DHCP_CLIENT_PORT         68	      ///< DHCP client port number
+
+
+#define MAGIC_COOKIE             0x63825363  ///< Any number. You can be modifyed it any number
+
+#define DCHP_HOST_NAME           "WIZnet\0"
+
+/* 
+ * @brief return value of @ref DHCP_run()
+ */
+enum
+{
+   DHCP_FAILED = 0,  ///< Procssing Fail
+   DHCP_RUNNING,     ///< Procssing DHCP proctocol
+   DHCP_IP_ASSIGN,   ///< First Occupy IP from DHPC server      (if cbfunc == null, act as default default_ip_assign)
+   DHCP_IP_CHANGED,  ///< Change IP address by new ip from DHCP (if cbfunc == null, act as default default_ip_update)
+   DHCP_IP_LEASED,   ///< Stand by 
+   DHCP_STOPPED      ///< Stop procssing DHCP protocol
+};
+
+/*
+ * @brief DHCP client initialization (outside of the main loop)
+ * @param s   - socket number
+ * @param buf - buffer for procssing DHCP message
+ */
+void DHCP_init(uint8_t s, uint8_t * buf);
+
+/*
+ * @brief DHCP 1s Tick Timer handler
+ * @note SHOULD BE register to your system 1s Tick timer handler 
+ */
+void DHCP_time_handler(void);
+
+/* 
+ * @brief Register call back function 
+ * @param ip_assign   - callback func when IP is assigned from DHCP server first
+ * @param ip_update   - callback func when IP is changed
+ * @prarm ip_conflict - callback func when the assigned IP is conflict with others.
+ */
+void reg_dhcp_cbfunc(void(*ip_assign)(void), void(*ip_update)(void), void(*ip_conflict)(void));
+
+/*
+ * @brief DHCP client in the main loop
+ * @return    The value is as the follow \n
+ *            @ref DHCP_FAILED     \n
+ *            @ref DHCP_RUNNING    \n
+ *            @ref DHCP_IP_ASSIGN  \n
+ *            @ref DHCP_IP_CHANGED \n
+ * 			  @ref DHCP_IP_LEASED  \n
+ *            @ref DHCP_STOPPED    \n
+ *
+ * @note This function is always called by you main task.
+ */ 
+uint8_t DHCP_run(void);
+
+/*
+ * @brief Stop DHCP procssing
+ * @note If you want to restart. call DHCP_init() and DHCP_run()
+ */ 
+void    DHCP_stop(void);
+
+/* Get Network information assigned from DHCP server */
+/*
+ * @brief Get IP address
+ * @param ip  - IP address to be returned
+ */
+void getIPfromDHCP(uint8_t* ip);
+/*
+ * @brief Get Gateway address
+ * @param ip  - Gateway address to be returned
+ */
+void getGWfromDHCP(uint8_t* ip);
+/*
+ * @brief Get Subnet mask value
+ * @param ip  - Subnet mask to be returned
+ */
+void getSNfromDHCP(uint8_t* ip);
+/*
+ * @brief Get DNS address
+ * @param ip  - DNS address to be returned
+ */
+void getDNSfromDHCP(uint8_t* ip);
+
+/*
+ * @brief Get the leased time by DHCP sever
+ * @retrun unit 1s
+ */
+uint32_t getDHCPLeasetime(void);
+
+#endif	/* _DHCP_H_ */
diff --git a/Src/Internet/DNS/dns.c b/Src/Internet/DNS/dns.c
new file mode 100644
index 0000000..1ccb5cf
--- /dev/null
+++ b/Src/Internet/DNS/dns.c
@@ -0,0 +1,563 @@
+//*****************************************************************************
+//
+//! \file dns.c
+//! \brief DNS APIs Implement file.
+//! \details Send DNS query & Receive DNS reponse.  \n
+//!          It depends on stdlib.h & string.h in ansi-c library
+//! \version 1.1.0
+//! \date 2013/11/18
+//! \par  Revision history
+//!       <2013/10/21> 1st Release
+//!       <2013/12/20> V1.1.0
+//!         1. Remove secondary DNS server in DNS_run
+//!            If 1st DNS_run failed, call DNS_run with 2nd DNS again
+//!         2. DNS_timerHandler -> DNS_time_handler
+//!         3. Remove the unused define
+//!         4. Integrated dns.h dns.c & dns_parse.h dns_parse.c into dns.h & dns.c
+//!       <2013/12/20> V1.1.0
+//!
+//! \author Eric Jung & MidnightCow
+//! \copyright
+//!
+//! Copyright (c)  2013, WIZnet Co., LTD.
+//! All rights reserved.
+//! 
+//! Redistribution and use in source and binary forms, with or without 
+//! modification, are permitted provided that the following conditions 
+//! are met: 
+//! 
+//!     * Redistributions of source code must retain the above copyright 
+//! notice, this list of conditions and the following disclaimer. 
+//!     * Redistributions in binary form must reproduce the above copyright
+//! notice, this list of conditions and the following disclaimer in the
+//! documentation and/or other materials provided with the distribution. 
+//!     * Neither the name of the <ORGANIZATION> nor the names of its 
+//! contributors may be used to endorse or promote products derived 
+//! from this software without specific prior written permission. 
+//! 
+//! THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+//! AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 
+//! IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+//! ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 
+//! LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 
+//! CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 
+//! SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+//! INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 
+//! CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 
+//! ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 
+//! THE POSSIBILITY OF SUCH DAMAGE.
+//
+//*****************************************************************************
+
+#include <string.h>
+#include <stdlib.h>
+
+#include "Ethernet/socket.h"
+#include "Internet/DNS/dns.h"
+
+#ifdef _DNS_DEBUG_
+   #include <stdio.h>
+#endif
+
+#define	INITRTT		2000L	/* Initial smoothed response time */
+#define	MAXCNAME	   (MAX_DOMAIN_NAME + (MAX_DOMAIN_NAME>>1))	   /* Maximum amount of cname recursion */
+
+#define	TYPE_A		1	   /* Host address */
+#define	TYPE_NS		2	   /* Name server */
+#define	TYPE_MD		3	   /* Mail destination (obsolete) */
+#define	TYPE_MF		4	   /* Mail forwarder (obsolete) */
+#define	TYPE_CNAME	5	   /* Canonical name */
+#define	TYPE_SOA	   6	   /* Start of Authority */
+#define	TYPE_MB		7	   /* Mailbox name (experimental) */
+#define	TYPE_MG		8	   /* Mail group member (experimental) */
+#define	TYPE_MR		9	   /* Mail rename name (experimental) */
+#define	TYPE_NULL	10	   /* Null (experimental) */
+#define	TYPE_WKS	   11	   /* Well-known sockets */
+#define	TYPE_PTR	   12	   /* Pointer record */
+#define	TYPE_HINFO	13	   /* Host information */
+#define	TYPE_MINFO	14	   /* Mailbox information (experimental)*/
+#define	TYPE_MX		15	   /* Mail exchanger */
+#define	TYPE_TXT	   16	   /* Text strings */
+#define	TYPE_ANY	   255	/* Matches any type */
+
+#define	CLASS_IN	   1	   /* The ARPA Internet */
+
+/* Round trip timing parameters */
+#define	AGAIN	      8     /* Average RTT gain = 1/8 */
+#define	LAGAIN      3     /* Log2(AGAIN) */
+#define	DGAIN       4     /* Mean deviation gain = 1/4 */
+#define	LDGAIN      2     /* log2(DGAIN) */
+
+/* Header for all domain messages */
+struct dhdr
+{
+	uint16_t id;   /* Identification */
+	uint8_t	qr;      /* Query/Response */
+#define	QUERY    0
+#define	RESPONSE 1
+	uint8_t	opcode;
+#define	IQUERY   1
+	uint8_t	aa;      /* Authoratative answer */
+	uint8_t	tc;      /* Truncation */
+	uint8_t	rd;      /* Recursion desired */
+	uint8_t	ra;      /* Recursion available */
+	uint8_t	rcode;   /* Response code */
+#define	NO_ERROR       0
+#define	FORMAT_ERROR   1
+#define	SERVER_FAIL    2
+#define	NAME_ERROR     3
+#define	NOT_IMPL       4
+#define	REFUSED        5
+	uint16_t qdcount;	/* Question count */
+	uint16_t ancount;	/* Answer count */
+	uint16_t nscount;	/* Authority (name server) count */
+	uint16_t arcount;	/* Additional record count */
+};
+
+
+uint8_t* pDNSMSG;       // DNS message buffer
+uint8_t  DNS_SOCKET;    // SOCKET number for DNS
+uint16_t DNS_MSGID;     // DNS message ID
+
+uint32_t dns_1s_tick;   // for timout of DNS processing
+
+/* converts uint16_t from network buffer to a host byte order integer. */
+uint16_t get16(uint8_t * s)
+{
+	uint16_t i;
+	i = *s++ << 8;
+	i = i + *s;
+	return i;
+}
+
+/* copies uint16_t to the network buffer with network byte order. */
+uint8_t * put16(uint8_t * s, uint16_t i)
+{
+	*s++ = i >> 8;
+	*s++ = i;
+	return s;
+}
+
+
+/*
+ *              CONVERT A DOMAIN NAME TO THE HUMAN-READABLE FORM
+ *
+ * Description : This function converts a compressed domain name to the human-readable form
+ * Arguments   : msg        - is a pointer to the reply message
+ *               compressed - is a pointer to the domain name in reply message.
+ *               buf        - is a pointer to the buffer for the human-readable form name.
+ *               len        - is the MAX. size of buffer.
+ * Returns     : the length of compressed message
+ */
+int parse_name(uint8_t * msg, uint8_t * compressed, char * buf, int16_t len)
+{
+	uint16_t slen;		/* Length of current segment */
+	uint8_t * cp;
+	int clen = 0;		/* Total length of compressed name */
+	int indirect = 0;	/* Set if indirection encountered */
+	int nseg = 0;		/* Total number of segments in name */
+
+	cp = compressed;
+
+	for (;;)
+	{
+		slen = *cp++;	/* Length of this segment */
+
+		if (!indirect) clen++;
+
+		if ((slen & 0xc0) == 0xc0)
+		{
+			if (!indirect)
+				clen++;
+			indirect = 1;
+			/* Follow indirection */
+			cp = &msg[((slen & 0x3f)<<8) + *cp];
+			slen = *cp++;
+		}
+
+		if (slen == 0)	/* zero length == all done */
+			break;
+
+		len -= slen + 1;
+
+		if (len < 0) return -1;
+
+		if (!indirect) clen += slen;
+
+		while (slen-- != 0) *buf++ = (char)*cp++;
+		*buf++ = '.';
+		nseg++;
+	}
+
+	if (nseg == 0)
+	{
+		/* Root name; represent as single dot */
+		*buf++ = '.';
+		len--;
+	}
+
+	*buf++ = '\0';
+	len--;
+
+	return clen;	/* Length of compressed message */
+}
+
+/*
+ *              PARSE QUESTION SECTION
+ *
+ * Description : This function parses the qeustion record of the reply message.
+ * Arguments   : msg - is a pointer to the reply message
+ *               cp  - is a pointer to the qeustion record.
+ * Returns     : a pointer the to next record.
+ */
+uint8_t * dns_question(uint8_t * msg, uint8_t * cp)
+{
+	int len;
+	char name[MAXCNAME];
+
+	len = parse_name(msg, cp, name, MAXCNAME);
+
+
+	if (len == -1) return 0;
+
+	cp += len;
+	cp += 2;		/* type */
+	cp += 2;		/* class */
+
+	return cp;
+}
+
+
+/*
+ *              PARSE ANSER SECTION
+ *
+ * Description : This function parses the answer record of the reply message.
+ * Arguments   : msg - is a pointer to the reply message
+ *               cp  - is a pointer to the answer record.
+ * Returns     : a pointer the to next record.
+ */
+uint8_t * dns_answer(uint8_t * msg, uint8_t * cp, uint8_t * ip_from_dns)
+{
+	int len, type;
+	char name[MAXCNAME];
+
+	len = parse_name(msg, cp, name, MAXCNAME);
+
+	if (len == -1) return 0;
+
+	cp += len;
+	type = get16(cp);
+	cp += 2;		/* type */
+	cp += 2;		/* class */
+	cp += 4;		/* ttl */
+	cp += 2;		/* len */
+
+
+	switch (type)
+	{
+	case TYPE_A:
+		/* Just read the address directly into the structure */
+		ip_from_dns[0] = *cp++;
+		ip_from_dns[1] = *cp++;
+		ip_from_dns[2] = *cp++;
+		ip_from_dns[3] = *cp++;
+		break;
+	case TYPE_CNAME:
+	case TYPE_MB:
+	case TYPE_MG:
+	case TYPE_MR:
+	case TYPE_NS:
+	case TYPE_PTR:
+		/* These types all consist of a single domain name */
+		/* convert it to ascii format */
+		len = parse_name(msg, cp, name, MAXCNAME);
+		if (len == -1) return 0;
+
+		cp += len;
+		break;
+	case TYPE_HINFO:
+		len = *cp++;
+		cp += len;
+
+		len = *cp++;
+		cp += len;
+		break;
+	case TYPE_MX:
+		cp += 2;
+		/* Get domain name of exchanger */
+		len = parse_name(msg, cp, name, MAXCNAME);
+		if (len == -1) return 0;
+
+		cp += len;
+		break;
+	case TYPE_SOA:
+		/* Get domain name of name server */
+		len = parse_name(msg, cp, name, MAXCNAME);
+		if (len == -1) return 0;
+
+		cp += len;
+
+		/* Get domain name of responsible person */
+		len = parse_name(msg, cp, name, MAXCNAME);
+		if (len == -1) return 0;
+
+		cp += len;
+
+		cp += 4;
+		cp += 4;
+		cp += 4;
+		cp += 4;
+		cp += 4;
+		break;
+	case TYPE_TXT:
+		/* Just stash */
+		break;
+	default:
+		/* Ignore */
+		break;
+	}
+
+	return cp;
+}
+
+/*
+ *              PARSE THE DNS REPLY
+ *
+ * Description : This function parses the reply message from DNS server.
+ * Arguments   : dhdr - is a pointer to the header for DNS message
+ *               buf  - is a pointer to the reply message.
+ *               len  - is the size of reply message.
+ * Returns     : -1 - Domain name lenght is too big 
+ *                0 - Fail (Timout or parse error)
+ *                1 - Success, 
+ */
+int8_t parseDNSMSG(struct dhdr * pdhdr, uint8_t * pbuf, uint8_t * ip_from_dns)
+{
+	uint16_t tmp;
+	uint16_t i;
+	uint8_t * msg;
+	uint8_t * cp;
+
+	msg = pbuf;
+	memset(pdhdr, 0, sizeof(pdhdr));
+
+	pdhdr->id = get16(&msg[0]);
+	tmp = get16(&msg[2]);
+	if (tmp & 0x8000) pdhdr->qr = 1;
+
+	pdhdr->opcode = (tmp >> 11) & 0xf;
+
+	if (tmp & 0x0400) pdhdr->aa = 1;
+	if (tmp & 0x0200) pdhdr->tc = 1;
+	if (tmp & 0x0100) pdhdr->rd = 1;
+	if (tmp & 0x0080) pdhdr->ra = 1;
+
+	pdhdr->rcode = tmp & 0xf;
+	pdhdr->qdcount = get16(&msg[4]);
+	pdhdr->ancount = get16(&msg[6]);
+	pdhdr->nscount = get16(&msg[8]);
+	pdhdr->arcount = get16(&msg[10]);
+
+
+	/* Now parse the variable length sections */
+	cp = &msg[12];
+
+	/* Question section */
+	for (i = 0; i < pdhdr->qdcount; i++)
+	{
+		cp = dns_question(msg, cp);
+   #ifdef _DNS_DEUBG_
+      printf("MAX_DOMAIN_NAME is too small, it should be redfine in dns.h"
+   #endif
+		if(!cp) return -1;
+	}
+
+	/* Answer section */
+	for (i = 0; i < pdhdr->ancount; i++)
+	{
+		cp = dns_answer(msg, cp, ip_from_dns);
+   #ifdef _DNS_DEUBG_
+      printf("MAX_DOMAIN_NAME is too small, it should be redfine in dns.h"
+   #endif
+		if(!cp) return -1;
+	}
+
+	/* Name server (authority) section */
+	for (i = 0; i < pdhdr->nscount; i++)
+	{
+		;
+	}
+
+	/* Additional section */
+	for (i = 0; i < pdhdr->arcount; i++)
+	{
+		;
+	}
+
+	if(pdhdr->rcode == 0) return 1;		// No error
+	else return 0;
+}
+
+
+/*
+ *              MAKE DNS QUERY MESSAGE
+ *
+ * Description : This function makes DNS query message.
+ * Arguments   : op   - Recursion desired
+ *               name - is a pointer to the domain name.
+ *               buf  - is a pointer to the buffer for DNS message.
+ *               len  - is the MAX. size of buffer.
+ * Returns     : the pointer to the DNS message.
+ */
+int16_t dns_makequery(uint16_t op, char * name, uint8_t * buf, uint16_t len)
+{
+	uint8_t *cp;
+	char *cp1;
+	char sname[MAXCNAME];
+	char *dname;
+	uint16_t p;
+	uint16_t dlen;
+
+	cp = buf;
+
+	DNS_MSGID++;
+	cp = put16(cp, DNS_MSGID);
+	p = (op << 11) | 0x0100;			/* Recursion desired */
+	cp = put16(cp, p);
+	cp = put16(cp, 1);
+	cp = put16(cp, 0);
+	cp = put16(cp, 0);
+	cp = put16(cp, 0);
+
+	strcpy(sname, name);
+	dname = sname;
+	dlen = strlen(dname);
+	for (;;)
+	{
+		/* Look for next dot */
+		cp1 = strchr(dname, '.');
+
+		if (cp1 != NULL) len = cp1 - dname;	/* More to come */
+		else len = dlen;			/* Last component */
+
+		*cp++ = len;				/* Write length of component */
+		if (len == 0) break;
+
+		/* Copy component up to (but not including) dot */
+		strncpy((char *)cp, dname, len);
+		cp += len;
+		if (cp1 == NULL)
+		{
+			*cp++ = 0;			/* Last one; write null and finish */
+			break;
+		}
+		dname += len+1;
+		dlen -= len+1;
+	}
+
+	cp = put16(cp, 0x0001);				/* type */
+	cp = put16(cp, 0x0001);				/* class */
+
+	return ((int16_t)((uint32_t)(cp) - (uint32_t)(buf)));
+}
+
+/*
+ *              CHECK DNS TIMEOUT
+ *
+ * Description : This function check the DNS timeout
+ * Arguments   : None.
+ * Returns     : -1 - timeout occurred, 0 - timer over, but no timeout, 1 - no timer over, no timeout occur
+ * Note        : timeout : retry count and timer both over.
+ */
+
+int8_t check_DNS_timeout(void)
+{
+	static uint8_t retry_count;
+
+	if(dns_1s_tick >= DNS_WAIT_TIME)
+	{
+		dns_1s_tick = 0;
+		if(retry_count >= MAX_DNS_RETRY) {
+			retry_count = 0;
+			return -1; // timeout occurred
+		}
+		retry_count++;
+		return 0; // timer over, but no timeout
+	}
+
+	return 1; // no timer over, no timeout occur
+}
+
+
+
+/* DNS CLIENT INIT */
+void DNS_init(uint8_t s, uint8_t * buf)
+{
+	DNS_SOCKET = s; // SOCK_DNS
+	pDNSMSG = buf; // User's shared buffer
+	DNS_MSGID = DNS_MSG_ID;
+}
+
+/* DNS CLIENT RUN */
+int8_t DNS_run(uint8_t * dns_ip, uint8_t * name, uint8_t * ip_from_dns)
+{
+	int8_t ret;
+	struct dhdr dhp;
+	uint8_t ip[4];
+	uint16_t len, port;
+	int8_t ret_check_timeout;
+   
+   // Socket open
+   socket(DNS_SOCKET, Sn_MR_UDP, 0, 0);
+
+#ifdef _DNS_DEBUG_
+	printf("> DNS Query to DNS Server : %d.%d.%d.%d\r\n", dns_ip[0], dns_ip[1], dns_ip[2], dns_ip[3]);
+#endif
+   
+	len = dns_makequery(0, (char *)name, pDNSMSG, MAX_DNS_BUF_SIZE);
+	sendto(DNS_SOCKET, pDNSMSG, len, dns_ip, IPPORT_DOMAIN);
+
+	while (1)
+	{
+		if ((len = getSn_RX_RSR(DNS_SOCKET)) > 0)
+		{
+			if (len > MAX_DNS_BUF_SIZE) len = MAX_DNS_BUF_SIZE;
+			len = recvfrom(DNS_SOCKET, pDNSMSG, len, ip, &port);
+      #ifdef _DNS_DEBUG_
+	      printf("> Receive DNS message from %d.%d.%d.%d(%d). len = %d\r\n", ip[0], ip[1], ip[2], ip[3],port,len);
+      #endif
+         ret = parseDNSMSG(&dhp, pDNSMSG, ip_from_dns);
+			break;
+		}
+		// Check Timeout
+		ret_check_timeout = check_DNS_timeout();
+		if (ret_check_timeout < 0) {
+
+#ifdef _DNS_DEBUG_
+			printf("> DNS Server is not responding : %d.%d.%d.%d\r\n", dns_ip[0], dns_ip[1], dns_ip[2], dns_ip[3]);
+#endif
+			return 0; // timeout occurred
+		}
+		else if (ret_check_timeout == 0) {
+
+#ifdef _DNS_DEBUG_
+			printf("> DNS Timeout\r\n");
+#endif
+			sendto(DNS_SOCKET, pDNSMSG, len, dns_ip, IPPORT_DOMAIN);
+		}
+	}
+	close(DNS_SOCKET);
+	// Return value
+	// 0 > :  failed / 1 - success
+	return ret;
+}
+
+
+/* DNS TIMER HANDLER */
+void DNS_time_handler(void)
+{
+	dns_1s_tick++;
+}
+
+
+
diff --git a/Src/Internet/DNS/dns.h b/Src/Internet/DNS/dns.h
new file mode 100644
index 0000000..df26b7f
--- /dev/null
+++ b/Src/Internet/DNS/dns.h
@@ -0,0 +1,101 @@
+//*****************************************************************************
+//
+//! \file dns.h
+//! \brief DNS APIs Header file.
+//! \details Send DNS query & Receive DNS reponse. 
+//! \version 1.1.0
+//! \date 2013/11/18
+//! \par  Revision history
+//!       <2013/10/21> 1st Release
+//!       <2013/12/20> V1.1.0
+//!         1. Remove secondary DNS server in DNS_run
+//!            If 1st DNS_run failed, call DNS_run with 2nd DNS again
+//!         2. DNS_timerHandler -> DNS_time_handler
+//!         3. Move the no reference define to dns.c
+//!         4. Integrated dns.h dns.c & dns_parse.h dns_parse.c into dns.h & dns.c
+//!       <2013/12/20> V1.1.0
+//!
+//! \author Eric Jung & MidnightCow
+//! \copyright
+//!
+//! Copyright (c)  2013, WIZnet Co., LTD.
+//! All rights reserved.
+//! 
+//! Redistribution and use in source and binary forms, with or without 
+//! modification, are permitted provided that the following conditions 
+//! are met: 
+//! 
+//!     * Redistributions of source code must retain the above copyright 
+//! notice, this list of conditions and the following disclaimer. 
+//!     * Redistributions in binary form must reproduce the above copyright
+//! notice, this list of conditions and the following disclaimer in the
+//! documentation and/or other materials provided with the distribution. 
+//!     * Neither the name of the <ORGANIZATION> nor the names of its 
+//! contributors may be used to endorse or promote products derived 
+//! from this software without specific prior written permission. 
+//! 
+//! THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+//! AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 
+//! IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+//! ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 
+//! LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 
+//! CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 
+//! SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+//! INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 
+//! CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 
+//! ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 
+//! THE POSSIBILITY OF SUCH DAMAGE.
+//
+//*****************************************************************************
+
+#ifndef	_DNS_H_
+#define	_DNS_H_
+
+#include <stdint.h>
+/*
+ * @brief Define it for Debug & Monitor DNS processing.
+ * @note If defined, it dependens on <stdio.h>
+ */
+//#define _DNS_DEBUG_
+
+#define	MAX_DNS_BUF_SIZE	256		///< maximum size of DNS buffer. */
+/*
+ * @brief Maxium length of your queried Domain name 
+ * @todo SHOULD BE defined it equal as or greater than your Domain name lenght + null character(1)
+ * @note SHOULD BE careful to stack overflow because it is allocated 1.5 times as MAX_DOMAIN_NAME in stack.
+ */
+#define  MAX_DOMAIN_NAME   16       // for example "www.google.com"
+
+#define	MAX_DNS_RETRY     2        ///< Requery Count
+#define	DNS_WAIT_TIME     3        ///< Wait response time. unit 1s.
+
+#define	IPPORT_DOMAIN     53       ///< DNS server port number
+
+#define DNS_MSG_ID         0x1122   ///< ID for DNS message. You can be modifyed it any number
+/*
+ * @brief DNS process initialize
+ * @param s   : Socket number for DNS
+ * @param buf : Buffer for DNS message
+ */
+void DNS_init(uint8_t s, uint8_t * buf);
+
+/*
+ * @brief DNS process
+ * @details Send DNS query and receive DNS response
+ * @param dns_ip        : DNS server ip
+ * @param name          : Domain name to be queryed
+ * @param ip_from_dns   : IP address from DNS server
+ * @return  -1 : failed. @ref MAX_DOMIN_NAME is too small \n
+ *           0 : failed  (Timeout or Parse error)\n
+ *           1 : success
+ * @note This funtion blocks until success or fail. max time = @ref MAX_DNS_RETRY * @ref DNS_WAIT_TIME
+ */
+int8_t DNS_run(uint8_t * dns_ip, uint8_t * name, uint8_t * ip_from_dns);
+
+/*
+ * @brief DNS 1s Tick Timer handler
+ * @note SHOULD BE register to your system 1s Tick timer handler 
+ */
+void DNS_time_handler(void);
+
+#endif	/* _DNS_H_ */
diff --git a/Src/KBus.c b/Src/KBus.c
index 3fd7f14..f41c30d 100644
--- a/Src/KBus.c
+++ b/Src/KBus.c
@@ -7,8 +7,9 @@
 #include "KBus.h"
 #include "functions.h"
 #include "string.h"
+#include "stm32f0xx.h"
 
-int bMaster=0,bSlave=0;
+unsigned char bKBusMaster=0,bKBusSlave=0,bKBusRepeater=0;;
 
 unsigned char PacketBuf1[128];
 unsigned char PacketBuf2[128];
@@ -17,22 +18,34 @@
 unsigned char BufferOut[16]={0};
 
 stChnStat ChnStats[8];
-int nAddr=0;
-int nChilds;
+unsigned char nAddr=0;
+unsigned char nChilds;
 int ChildStat[16];
-int nCurPollId=0;
-int nSeq=0;
+unsigned char nCurPollId=0;
+unsigned char nSeq=0;
 
-int MasterRecved=1;
-volatile int SlaveRecved=1;
+volatile unsigned char MasterRecved=1;
+volatile unsigned char MasterRecvOK=1;
+
+volatile unsigned char SlaveRecved=1;
 unsigned int SendTimeuS=0;
 volatile int RecvTimeuS=0;
 
 int DelayuS=0;
 int MaxDelayuS=0;
 int ThisuS;
-
 volatile unsigned int nSlaveTick=0;
+
+int Clk3=0;
+int SendTime,Latancy,LatancyClk,SendClk;	
+
+volatile int nCount2=0;
+int TimeOutCount=0;
+int LastCircleStartTime=0;
+int CircleTime=0;
+
+unsigned char Datas[128];		
+volatile int PacketLength = 0;
 
 unsigned char BCC(void * pData, int nSize)
 {
@@ -44,10 +57,11 @@
 	}
 	return k;	
 }
+
 int MakePacket(pPacket p1,unsigned char src, uchar dst, uchar nType,unsigned char nSEQ, unsigned char DataLen,void * pData )
 {
 	p1->Sign=StartSign;
-	p1->DstAddr=dst;
+	p1->DstHost=dst;
 	p1->SrcAddr=src;
 	p1->nCMD=nType;
 	p1->nSEQ=nSEQ;
@@ -150,7 +164,7 @@
 	return PacketLenth;
 }
 
-int CheckPacket(pPacket p1,int nLen1)
+int CheckPacket(int nChn, pPacket p1, int nLen1)
 {
 	if (p1->Sign != StartSign)
 	{
@@ -183,31 +197,32 @@
 	if (thisBCC != p1->data[DataLen]) 
 	{//BCC Error;
 		Uart2Stat.BCCerr++;
+		ChnStats[nCurPollId].BCCErr++;
 		return -4;
 	} 		
 	return 0;
 }
 
-int SlaveCheckPacket(pPacket p1,int nLen1)
+int SlaveCheckPacket(int nChn, pPacket p1, int nLen1)
 {
 	if (p1->Sign != StartSign)
 	{
 		Uart2Stat.NotPacketErr++;
-		ChnStats[0].NotPkgErr++;
+		ChnStats[0].ClientNotPktErr++;
 		return -1;
 	}
 	int DataLen=p1->PacketLen;
 	if (DataLen>MaxPacketLength) 
 	{
 		Uart2Stat.LengthErr++;
-		ChnStats[0].PkgLenErr++;
+		ChnStats[0].ClientPkgLenErr++;
 		return -1;
 	}
 	if (nLen1<DataLen+sizeof(stPacket)+1)
 	{
 		//len4=sprintf(str3,"%d < %d + %d \r\n",len2,DataLen,sizeof(stPacket));
 		//PutStr(str3,len4);
-		ChnStats[0].PkgLenErr++;
+		ChnStats[0].ClientPkgLenErr++;
 		Uart2Stat.LengthErr++;
 		return -3;	//not long enough					
 	}
@@ -221,13 +236,13 @@
 	if (thisBCC != p1->data[DataLen]) 
 	{//BCC Error;
 		Uart2Stat.BCCerr++;
-		ChnStats[0].BCCErr++;
+		ChnStats[0].ClientBccErr++;
 		return -4;
 	} 		
 	return 0;
 }
 
-int MasterParsePacket(pPacket p1,int Len1)
+int MasterParsePacket(int nChn, pPacket p1, int Len1)
 {
 
 		int DataLen=p1->PacketLen;
@@ -245,7 +260,7 @@
 			case cmdPing:
 				BufferIn[ChildId]=p1->data[0];
 				PacketLen=MakePacket(p2,0,nCurPollId,cmdPingReply,p1->nSEQ,DataLen,p1->data);
-				SendPacket2(p2,PacketLen);
+				SendPacket(nChn, p2, PacketLen);
 				break;
 			case cmdPingReply:
 				DelayuS=ThisuS-SendTimeuS;
@@ -259,7 +274,7 @@
 			if (DelayuS > ChnStats[nCurPollId].MaxDelay) 
 				ChnStats[nCurPollId].MaxDelay=DelayuS;
 				//PutOutput(outputvalue);
-				MasterRecved=1;
+				MasterRecvOK=1;
 				break;
 			case cmdRead:
 				break;
@@ -280,14 +295,28 @@
 				//memcpy(DispBuf,p1->data+2,8);
 				p1->data[0]=BufferOut[0];
 				PacketLen=MakePacket(p2,nAddr,0,cmdExChgDataReply,p1->nSEQ,DataLen,p1->data);
-				SendPacket2(p2,PacketLen);
+				SendPacket(nChn, p2, PacketLen);
 				break;
 			case cmdExChgDataReply:
 				DelayuS=ThisuS-SendTimeuS;
 				if (DelayuS > MaxDelayuS) MaxDelayuS = DelayuS;
-				
+
+#if (BOARD_TYPE == 14)				
 				BufferIn[ChildId]=p1->data[0];
-				
+				KMem.WXB[ChildId-1]=BufferIn[ChildId];
+				if (KMRunStat.WorkMode==0) {	
+				//	KMem.WY[0]= KMem.WX[1]+(KMem.WX[2]<<8)	;
+				//	PutOutput (KMem.WY[0]);
+				}
+#else
+				BufferIn[ChildId]=p1->data[0];
+				KMem.WX[ChildId]=BufferIn[ChildId];
+				if (KMRunStat.WorkMode==0) {	
+					KMem.WY[0]= KMem.WX[1]+(KMem.WX[2]<<8)	;
+					PutOutput (KMem.WY[0]);
+				}
+#endif
+
 				//RunStat=100;
 				ChnStats[nCurPollId].CtnLstPkts=0;
 				ChnStats[nCurPollId].Delay=DelayuS;
@@ -299,7 +328,7 @@
 				nIndex=p1->data[3];
 				ChnStats[nCurPollId].ClientDatas[nIndex]=p1->data[4]|(p1->data[5]<<8)|(p1->data[6]<<16)|(p1->data[7]<<24);
 			
-				MasterRecved=1;
+				MasterRecvOK=1;
 				
 				break;
 					
@@ -313,12 +342,13 @@
 	//	}	
 	return 0;
 }
-int SlaveParsePacket(pPacket p1,int Len1)
+unsigned char nClientDataIndex=0;
+int SlaveParsePacket(int nChn, pPacket p1, int Len1)
 {
 	Uart2Stat.OKPacket++;				
 	int DataLen=p1->PacketLen;	
 //int nSrcAddr=p1->SrcAddr;
-	int nDstAddr=p1->DstAddr;
+	int nDstHost=p1->DstHost;
 		
 //	RecvTimeuS=ThisuS;
 //	SlaveRecved=1;
@@ -326,12 +356,12 @@
 	pPacket p2=(pPacket)PacketBuf2;
 	int PacketLen=0;
 	unsigned char nIndex = p1->nSEQ & 0x07;
-	if (nDstAddr!=nAddr && nDstAddr != 0xff)
+	if (nDstHost!=nAddr && nDstHost != 0xff)
 	{
 		ChnStats[0].ClientMisIdPkts++;
 		return -1;
 	}
-	if (nDstAddr==nAddr || nDstAddr==0xff)
+	if (nDstHost==nAddr || nDstHost==0xff)
 	{
 		RecvTimeuS=ThisuS;
 		SlaveRecved=1;
@@ -347,7 +377,7 @@
 				RecvTimeuS=ThisuS;
 				PacketLen=MakePacket(p2,nAddr,0,cmdPingReply,p1->nSEQ,DataLen,p1->data);
 				ChnStats[0].ClientSendPkts++;
-				SendPacket2(p2,PacketLen);
+				SendPacket(nChn, p2, PacketLen);
 				break;
 			case cmdPingReply:
 				break;
@@ -359,7 +389,7 @@
 				//memcpy(DispBuf,p1->data,DataLen);
 				PacketLen=MakePacket(p2,1,0,cmdWriteReply,p1->nSEQ,0,0);
 				ChnStats[0].ClientSendPkts++;
-				SendPacket2(p2,PacketLen);					
+				SendPacket(nChn, p2, PacketLen);					
 				break;
 			case cmdWriteReply:
 				break;
@@ -370,19 +400,34 @@
 			case cmdExChgData:
 				BufferIn[0]=p1->data[0];
 				nSlaveTick=p1->data[4]+(p1->data[5]<<8);//+(p1->data[6]<<16)+(p1->data[7]<<24);
-				
+#if (BOARD_TYPE == 14)
+			//	PutOutput(BufferIn[0]);
 				//PutOutput(outputvalue);
 				//memcpy(DispBuf,p1->data+2,8);
+				nIndex=nClientDataIndex;
+		//		ChnStats[0].ClientDatas[7]++;
+//				BufferOut[0]=GetInput();
+		//		BufferOut[0]=GetInput();
+#else
+				PutOutput(BufferIn[0]);
+				//PutOutput(outputvalue);
+				//memcpy(DispBuf,p1->data+2,8);
+				nIndex=nClientDataIndex;
+		//		ChnStats[0].ClientDatas[7]++;
+//				BufferOut[0]=GetInput();
+				BufferOut[0]=GetInput();
+#endif
 				p1->data[0]=BufferOut[0];
 				p1->data[3]=nIndex;
 				p1->data[4]=ChnStats[0].ClientDatas[nIndex];
 				p1->data[5]=ChnStats[0].ClientDatas[nIndex]>>8;
 				p1->data[6]=ChnStats[0].ClientDatas[nIndex]>>16;
 				p1->data[7]=ChnStats[0].ClientDatas[nIndex]>>24;
-				nIndex++;
+				nClientDataIndex++;
+				if (nClientDataIndex >= 10) { nClientDataIndex=0;}
 				PacketLen=MakePacket(p2,nAddr,0,cmdExChgDataReply,p1->nSEQ,DataLen,p1->data);
 				ChnStats[0].ClientSendPkts++;
-				SendPacket2(p2,PacketLen);
+				SendPacket(nChn, p2, PacketLen);
 				break;
 			case cmdExChgDataReply:
 				break;
@@ -403,33 +448,36 @@
 	}	
 	return 0;
 }
-int ParsePacket(pPacket p1,int Len1)
+int ParsePacket(int nChn, pPacket p1, int Len1)
 {
 	ThisuS=GetuS();
 	int Result=0;
-	if (bMaster)
+	if (bKBusMaster)
 	{
-			Result=CheckPacket(p1,Len1);
+			MasterRecved=1;
+			Result=CheckPacket(nChn, p1, Len1);
 			if (Result != S_OK)
 			{
 				return Result;
 			}
-			Result=MasterParsePacket(p1,Len1);			
+			MasterRecvOK=1;
+			Result=MasterParsePacket(nChn, p1, Len1);			
 			return Result;
 	}
-	if (bSlave)
+	if (bKBusSlave)
 	{
 			ChnStats[0].ClientRecvPkts++;
-			Result=CheckPacket(p1,Len1);
+			Result=SlaveCheckPacket(nChn, p1, Len1);
 			if (Result != S_OK)
 			{
 				return Result;
 			}
-			Result=SlaveParsePacket(p1,Len1);
+			ChnStats[0].ClientTimeOutErr=KMem.RunStat;
+			Result=SlaveParsePacket(nChn, p1, Len1);
 			return Result;
 	}
 	//int len1=p1->PacketLen;
-//	if (p1->DstAddr!=255&&p1->DstAddr!=2) return -3;
+//	if (p1->DstHost!=255&&p1->DstHost!=2) return -3;
 //	pPacket p2=(pPacket)PacketBuf2;
 //			Uart2Stat.OKPacket++;
 
@@ -476,3 +524,132 @@
 	return S_OK;
 }
 
+int KBusRepeaterFunc(int nChn)
+{
+		KMem.WY[0]=KMem.WX[0];
+		if ((KMem.nRunCount &0x7f) == 88) 
+		{ 
+			nCount2++;	
+			ToggleRunLed();
+//		int len1=sprintf(str1,"%d %d Cfg %02X  Input %02X  \r\n",nCount,nCount2,EffJumperSW,MyKeyStat1);
+//		PutStr(str1,len1);
+		}				
+	return 0;
+}
+
+int KBusMasterFunc(int nChn)
+{
+	uint32_t tick1=HAL_GetTick();
+	uint32_t thisuS=GetuS();
+
+		int len1=0;
+
+		if ((MasterRecved && MasterRecvOK && thisuS-SendTimeuS>50) || thisuS-SendTimeuS>1000u)
+		{
+			if (!MasterRecvOK) 
+			{
+				TimeOutCount++;
+				Uart2Stat.TimeOutErr++; 
+				ChnStats[nCurPollId].LostPackets++;
+				ChnStats[nCurPollId].CtnLstPkts++;
+				if (!MasterRecved) {ChnStats[nCurPollId].TimeOutErr++;}
+				if (ChnStats[nCurPollId].CtnLstPkts>ChnStats[nCurPollId].MaxCtnLstPkts)
+				{ChnStats[nCurPollId].MaxCtnLstPkts=ChnStats[nCurPollId].CtnLstPkts;}
+				if (ChnStats[nCurPollId].CtnLstPkts>3)
+				{
+					ChnStats[nCurPollId].Stat=0;
+					KMem.ErrStat=200;
+					 
+					{BufferIn[nCurPollId]=0;}
+				}
+			//	LL_GPIO_SetOutputPin(GPIOA,LL_GPIO_PIN_7);
+			}else
+			{
+				ChnStats[nCurPollId].Stat=1;
+				
+				KMem.RunStat=100;
+			}
+			nCurPollId ++;
+			if (nCurPollId > nChilds)
+			{
+				CircleTime=thisuS-LastCircleStartTime;
+				LastCircleStartTime=thisuS;
+				nSeq++;
+				nCurPollId=1;
+			}
+#if (BOARD_TYPE == 14)
+			if (KMRunStat.WorkMode==0)
+			{
+			//	KMem.WX[0]= GetInput();
+			//	KMem.WY[1]=KMem.WX[0]&0xff;
+			//	KMem.WY[2]=(KMem.WX[0]>>8)&0xff;		
+			}
+		//	BufferOut[1]=KMem.WY[1];
+		//	BufferOut[2]=KMem.WY[2];		
+#else
+			if (KMRunStat.WorkMode==0)
+			{
+				KMem.WX[0]= GetInput();
+				KMem.WY[1]=KMem.WX[0]&0xff;
+				KMem.WY[2]=(KMem.WX[0]>>8)&0xff;		
+			}
+			BufferOut[1]=KMem.WY[1];
+			BufferOut[2]=KMem.WY[2];		
+#endif
+
+			Datas[0]=BufferOut[nCurPollId];
+			Datas[1]=BufferOut[nCurPollId+1];;
+			Datas[2]=ChnStats[nCurPollId].Stat;
+			Datas[3]=0;
+			Datas[4]=tick1&0xff;
+			Datas[5]=(tick1>>8)&0xff;
+			Datas[6]=(tick1>>16)&0xff;
+			Datas[7]=(tick1>>24)&0xff;
+			
+			SendTimeuS=thisuS;				
+			len1=MakePacket((pPacket)PacketBuf1,0,nCurPollId,cmdExChgData,nSeq,8,Datas);
+			SendPacket(nChn, (pPacket)PacketBuf1, len1);
+			ChnStats[nCurPollId].SendPackets++;
+			ChnStats[nCurPollId].SendTimeInterval=SendTimeuS-ChnStats[nCurPollId].LastSentTimeuS;
+			ChnStats[nCurPollId].LastSentTimeuS=SendTimeuS;
+//			PacketLength = len1;
+			SendTime=tick1;
+
+			MasterRecved=0;
+			MasterRecvOK=0;
+		//	LL_GPIO_TogglePin(GPIOA,LL_GPIO_PIN_5);		
+			//ToggleErrLed();
+//				ToggleOut8();
+
+		}
+	
+//		Clk3=SysTick->VAL;
+	//	LL_GPIO_TogglePin(GPIOA,LL_GPIO_PIN_4);
+//	HAL_Delay(1);				
+	return 0;
+}
+
+int KBusSlaveFunc(int nChn)
+{
+		int ThisuS=GetuS();
+		int thisRecvTime=RecvTimeuS;
+		if (SlaveRecved)
+		{
+			KMem.RunStat=8000;
+			SlaveRecved=0;
+		}else if ((ThisuS - thisRecvTime) >12000u)
+		{
+			KMem.ErrStat=8000;
+			KMem.SDD[17]=1;
+			KMem.SDD[18]=ThisuS;
+			KMem.SDD[19]=RecvTimeuS;
+		}else if ( ThisuS > (thisRecvTime + 12000u))
+		{
+			KMem.ErrStat=8000;
+			KMem.SDD[17]=2;
+			KMem.SDD[18]=ThisuS;
+			KMem.SDD[19]=RecvTimeuS;
+		}
+		
+	return 0;
+}
diff --git a/Src/KLink.c b/Src/KLink.c
index e5ffe4c..afdc34f 100644
--- a/Src/KLink.c
+++ b/Src/KLink.c
@@ -24,7 +24,7 @@
 int KLThisuS=0;
 int KLRecvTimeuS=0;
 
-unsigned char KLBCC(void * pData, int nSize)
+unsigned char KLBCC(void const * pData, int nSize)
 {
 	unsigned char k;
 	k=0;
@@ -34,12 +34,12 @@
 	}
 	return k;	
 }
-int KLMakeRplyPacket(void * pBuf, uchar dst, uchar Status, uchar nCmd, uchar DataLen,void * pData )
+int KLMakeRplyPacket(void * pBuf, uchar dst, uchar Status, uchar nCmd, uchar DataLen,const void * pData )
 {
 	pKLRplyPktHdr p1 = (pKLRplyPktHdr)pBuf;
 	int PacketLenth=0;
 	p1->RplyStSgn=KLSignReply;
-	p1->DstAddr=dst;
+	p1->DstHost=dst;
 	p1->nStatus=Status;
 	p1->nRplyCMD=nCmd;
 	p1->nSize1=DataLen;
@@ -76,7 +76,7 @@
 	return PacketLenth;
 }
 
-int KLCheckPacket(void * pBuf,int nLen1)
+int KLCheckPacket(int nChn, void * pBuf, int nLen1)
 {
 	pKLReqPktHdr p1 = (pKLReqPktHdr) pBuf;
 	if (p1->ReqStSgn != KLSignStart)
@@ -111,12 +111,12 @@
 
 inline void SetAddrBit(unsigned short * pW, unsigned char bitAddr)
 {
-	(*pW)|=bitMasks[bitAddr&0xf];
+	(*pW)|=1<<(bitAddr&0xf);
 }
 
 inline void ResetBit(unsigned short * pW, unsigned char bitAddr)
 {
-	(*pW)&=~bitMasks[bitAddr&0xf];
+	(*pW)&=~(1<<(bitAddr&0xf));
 }
 
 static inline void SetBitValue(unsigned short * pW, unsigned char bitAddr, unsigned char Value)
@@ -124,11 +124,12 @@
 	if (Value)	{	SetAddrBit(pW, bitAddr);}
 	else {ResetBit(pW, bitAddr);}
 }
-int KLParseReqPacket(void * pBuf,int Len1)
+
+int KLParseReqPacket(int nChn, void * pBuf, int Len1)
 {
 	pKLReqPktHdr p1 = (pKLReqPktHdr)pBuf;
 
-	int nDstAddr=p1->DstAddr;
+	int nDstHost=p1->DstHost;
 	KLRecvTimeuS=KLThisuS;
 	int nDataType=p1->nType1;
 	int nAddr=0;
@@ -143,7 +144,7 @@
 
 	int PacketLen=0;
 	KLRecvTimeuS=KLThisuS;
-	if (nDstAddr==nKLAddr || nDstAddr==0xff)
+	if (nDstHost==nKLAddr || nDstHost==0xff)
 	{
 		switch (p1->nCMD)
 		{
@@ -153,43 +154,73 @@
 				DataLen=nDataType;
 //				KLBufferIn[0]=p1->Params[0];
 //				p1->Params[0]=KLBufferOut[0];
-				PacketLen=KLMakeRplyPacket(p2,nDstAddr,nKLStatus.StatByte,KLCmdPing,DataLen,p1->Params);
-				SendPacket1(p2,PacketLen);
+				PacketLen=KLMakeRplyPacket(p2,nDstHost,nKLStatus.StatByte,KLCmdPing,DataLen,p1->Params);
+				SendPacket(nChn, p2, PacketLen);
 				break;
 //			case KLCmdPingReply:
 //				break;
 			case KLCmdInfo:
 				//if (nDataType == KLDataTypeDT)
+				DataLen= sizeof(KMInfoBlock);
+				PacketLen=KLMakeRplyPacket(p2,nDstHost,nKLStatus.StatByte,p1->nCMD,DataLen,&KMInfoBlock);
+				SendPacket(nChn, p2, PacketLen);				
+				break;
+			case KLCmdGetUid:
+				//if (nDataType == KLDataTypeDT)
+				DataLen= 12;
+				PacketLen=KLMakeRplyPacket(p2,nDstHost,nKLStatus.StatByte,p1->nCMD,DataLen,(uint32_t *)UID_BASE);
+				SendPacket(nChn, p2, PacketLen);				
+				break;
+			case KLCmdGetSN:
+				//if (nDataType == KLDataTypeDT)
 				DataLen= 4;
-				pData=&KMem.nEventCount;
-				PacketLen=KLMakeRplyPacket(p2,nDstAddr,nKLStatus.StatByte,p1->nCMD,DataLen,pData);
-				SendPacket1(p2,PacketLen);				
-				break;			
+				PacketLen=KLMakeRplyPacket(p2,nDstHost,nKLStatus.StatByte,p1->nCMD,DataLen,&((pFactoryData)FACTORY_DATA_BASE)->SN1);
+				SendPacket(nChn, p2, PacketLen);				
+				break;
+			case KLCmdGetFactoryData:
+				DataLen= sizeof(stFactoryData);
+				PacketLen=KLMakeRplyPacket(p2,nDstHost,nKLStatus.StatByte,p1->nCMD,DataLen,(pFactoryData)FACTORY_DATA_BASE);
+				SendPacket(nChn, p2, PacketLen);				
+				break;
+			case KLCmdWriteFactoryData:
+				nAddr=p1->Params[0]+ (p1->Params[1]<<8);
+				DataLen= p1->Params[2];
+				//DataLen=16;
+				for (int i=0;i<DataLen;i++)
+				{KLPacketBuf2[i]=p1->Params[4+i];}
+				WriteFactoryData(KLPacketBuf2, DataLen);
+				PacketLen=KLMakeRplyPacket(p2,nDstHost,nKLStatus.StatByte,p1->nCMD,0,0);
+				SendPacket(nChn, p2, PacketLen);
+				break;
+			
 			case KLCmdRead:
+			case KLCmdReadDataWord:
 			case KLCmdReadDataByte:				
 				nAddr=p1->Params[0]+ (p1->Params[1]<<8);
 				DataLen= p1->Params[2];
 				if (nDataType ==KLDataTypeDT)				{			pData=KMem.DT+nAddr;		}
 				else if (nDataType == KLDataTypeSDT)	{		pData=KMem.SDT+nAddr;	}
+				else if (nDataType == KLDataTypeWSR)	{		pData=KMem.WSR+nAddr;	}
 				else if (nDataType == KLDataTypeWX)		{		pData=KMem.WX+nAddr;		}
 				else if (nDataType == KLDataTypeWY)		{		pData=KMem.WY+nAddr;		}
 				else if (nDataType == KLDataTypeWR)		{		pData=KMem.WR+nAddr;		}
 				else if (nDataType == KLDataTypeWLX)		{		pData=KMem.WLX+nAddr;		}
 				else if (nDataType == KLDataTypeWLY)		{		pData=KMem.WLY+nAddr;		}
-				else if (nDataType == KLDataTypeSV)		{		pData=KMem.SDT+nAddr;	}
-				else if (nDataType == KLDataTypeEV)		{		pData=KMem.SDT+nAddr;	}
+				else if (nDataType == KLDataTypeSV)		{		pData=KMem.SV+nAddr;	}
+				else if (nDataType == KLDataTypeEV)		{		pData=KMem.EV+nAddr;	}
 				else if (nDataType == KLDataTypeTest)	{		pData=KMem.SDT+nAddr;	}
-				else if (nDataType == KLDataSysCfg) { pData = (unsigned short *)&KMSysCfg + nAddr;}
+				else if (nDataType == KLDataSysCfg) { pData = (unsigned short *)&storedKMSysCfg + nAddr;}
 				else if (nDataType == KLDataTypeFlash) { pData = (unsigned short *)FLASH_BASE + nAddr;}
 				else				{					pData=KLBufferOut+nAddr;				}
 				
-				PacketLen=KLMakeRplyPacket(p2,nDstAddr,nKLStatus.StatByte,p1->nCMD,DataLen,pData);
-				SendPacket1(p2,PacketLen);
+				PacketLen=KLMakeRplyPacket(p2,nDstHost,nKLStatus.StatByte,p1->nCMD,DataLen,pData);
+				SendPacket(nChn, p2, PacketLen);
 				
 				break;
 //			case KLCmdReadReply:
 //				break;
 			case KLCmdWrite:
+			case KLCmdWriteDataWord:
 			case KLCmdWriteDataByte:
 				
 				//memcpy(DispBuf,p1->data,DataLen);
@@ -197,21 +228,22 @@
 				DataLen= p1->Params[2];
 					if (nDataType ==KLDataTypeDT)				{		pData=KMem.DT+nAddr;		}
 				else if (nDataType == KLDataTypeSDT)	{		pData=KMem.SDT+nAddr;	}
+				else if (nDataType == KLDataTypeWSR)	{		pData=KMem.WSR+nAddr;	}
 				else if (nDataType == KLDataTypeWX)		{		pData=KMem.WX+nAddr;		}
 				else if (nDataType == KLDataTypeWY)		{		pData=KMem.WY+nAddr;		}
 				else if (nDataType == KLDataTypeWR)		{		pData=KMem.WR+nAddr;		}
 				else if (nDataType == KLDataTypeWLX)		{		pData=KMem.WLX+nAddr;		}
 				else if (nDataType == KLDataTypeWLY)		{		pData=KMem.WLY+nAddr;		}
-				else if (nDataType == KLDataTypeSV)		{		pData=KMem.SDT+nAddr;	DataLen=0;}
-				else if (nDataType == KLDataTypeEV)		{		pData=KMem.SDT+nAddr;	DataLen=0;}
+				else if (nDataType == KLDataTypeSV)		{		pData=KMem.SV+nAddr;	DataLen=0;}
+				else if (nDataType == KLDataTypeEV)		{		pData=KMem.EV+nAddr;	DataLen=0;}
 				else if (nDataType == KLDataTypeTest)	{		pData=KMem.SDT+nAddr;	DataLen=0;}
-				else if (nDataType == KLDataSysCfg) { pData = (unsigned short *)&KMSysCfg + nAddr;}
+				else if (nDataType == KLDataSysCfg)		{ pData = (unsigned short *)&storedKMSysCfg + nAddr;}
 				else if (nDataType == KLDataTypeFlash) { pData = (unsigned short *)FLASH_BASE + nAddr;}
 				else				{					pData=KLBufferOut+nAddr;	DataLen=0;			}
 						
 				memcpy(pData,p1->Params+4,DataLen);					
-				PacketLen=KLMakeRplyPacket(p2,nDstAddr,nKLStatus.StatByte,p1->nCMD,0,0);
-				SendPacket1(p2,PacketLen);					
+				PacketLen=KLMakeRplyPacket(p2,nDstHost,nKLStatus.StatByte,p1->nCMD,0,0);
+				SendPacket(nChn, p2, PacketLen);					
 				break;
 //			case KLCmdWriteReply:
 //				break;
@@ -219,17 +251,19 @@
 			case KLCmdRead1Bit:
 				nAddr=p1->Params[0]+ (p1->Params[1]<<8);
 				DataLen = 1;
-				if (nDataType == KLCoilTypeX)			 { rData[0] = ((KMem.WX[nAddr>>4]&bitMasks[nAddr&0x0f])>0);}
-				else if (nDataType == KLCoilTypeY) { rData[0] = ((KMem.WY[nAddr>>4]&bitMasks[nAddr&0x0f])>0);}
-				else if (nDataType == KLCoilTypeR) { rData[0] = ((KMem.WR[nAddr>>4]&bitMasks[nAddr&0x0f])>0);}
-				else if (nDataType == KLCoilTypeLX) { rData[0] = ((KMem.WLX[nAddr>>4]&bitMasks[nAddr&0x0f])>0);}
-				else if (nDataType == KLCoilTypeLY) { rData[0] = ((KMem.WLY[nAddr>>4]&bitMasks[nAddr&0x0f])>0);}
-				else if (nDataType == KLCoilTypeT) { rData[0] = PLCMem.Timers[nAddr].bTon;}
-				else if (nDataType == KLCoilTypeC) { rData[0] = PLCMem.Timers[nAddr].bTon;}
+				if (nDataType == KLCoilTypeX)			 { rData[0] = ((KMem.WX[nAddr>>4]&(1<<(nAddr&0x0f)))>0);}
+				else if (nDataType == KLCoilTypeY) { rData[0] = ((KMem.WY[nAddr>>4]&(1<<(nAddr&0x0f)))>0);}
+				else if (nDataType == KLCoilTypeR) { rData[0] = ((KMem.WR[nAddr>>4]&(1<<(nAddr&0x0f)))>0);}
+				else if (nDataType == KLCoilTypeLX) { rData[0] = ((KMem.WLX[nAddr>>4]&(1<<(nAddr&0x0f)))>0);}
+				else if (nDataType == KLCoilTypeLY) { rData[0] = ((KMem.WLY[nAddr>>4]&(1<<(nAddr&0x0f)))>0);}
+				else if (nDataType == KLCoilTypeT) { rData[0] = KMem.Timers[nAddr].bTon;}
+				else if (nDataType == KLCoilTypeC) { rData[0] = KMem.Timers[nAddr].bTon;}
+				else if (nDataType == KLCoilTypeSR) {rData[0] = ((KMem.WSR[nAddr>>4]&(1<<(nAddr&0x0f)))>0);}
+				
 				else if (nDataType == KLCoilTypeLR) { rData[0] = 0;}
 				else {rData[0]=0;}
-				PacketLen=KLMakeRplyPacket(p2,nDstAddr,nKLStatus.StatByte,KLCmdRead1Bit,DataLen,rData);
-				SendPacket1(p2,PacketLen);
+				PacketLen=KLMakeRplyPacket(p2,nDstHost,nKLStatus.StatByte,KLCmdRead1Bit,DataLen,rData);
+				SendPacket(nChn, p2, PacketLen);
 				break;
 			case KLCmdWrite1Bit:
 				nAddr=p1->Params[0]+ (p1->Params[1]<<8);
@@ -238,82 +272,145 @@
 				else if (nDataType == KLCoilTypeR) { SetBitValue( &KMem.WR[nAddr>>4],nAddr&0x0f,p1->Params[2]);}
 				else if (nDataType == KLCoilTypeLX) {SetBitValue( &KMem.WLX[nAddr>>4],nAddr&0x0f,p1->Params[2]);}
 				else if (nDataType == KLCoilTypeLY) {SetBitValue( &KMem.WLY[nAddr>>4],nAddr&0x0f,p1->Params[2]);}
-				else if (nDataType == KLCoilTypeT) { PLCMem.Timers[nAddr].bTon = p1->Params[2];}
-				else if (nDataType == KLCoilTypeC) { PLCMem.Timers[nAddr].bTon = p1->Params[2];}
-				else if (nDataType == KLCoilTypeLR) { ;}
+				else if (nDataType == KLCoilTypeT) { KMem.Timers[nAddr].bTon = p1->Params[2];}
+				else if (nDataType == KLCoilTypeC) { KMem.Timers[nAddr].bTon = p1->Params[2];}
+				else if (nDataType == KLCoilTypeC) { KMem.Timers[nAddr].bTon = p1->Params[2];}
+				else if (nDataType == KLCoilTypeLR) { SetBitValue( &KMem.WSR[nAddr>>4],nAddr&0x0f,p1->Params[2]);;}
 				else {rData[0]=0;}
 				DataLen=0;
-				PacketLen=KLMakeRplyPacket(p2,nDstAddr,nKLStatus.StatByte,KLCmdWrite1Bit,DataLen,rData);
-				SendPacket1(p2,PacketLen);
+				PacketLen=KLMakeRplyPacket(p2,nDstHost,nKLStatus.StatByte,KLCmdWrite1Bit,DataLen,rData);
+				SendPacket(nChn, p2, PacketLen);
 				break;
 			case KLCmdReadBits:
 				break;
 			case KLCmdWriteBits:
 				break;
+			case KLCmdChgMode:
+				
+				break;
+			case KLCmdReadProgram:
+				nAddr=p1->Params[0]+ (p1->Params[1]<<8);
+				DataLen= p1->Params[2];
+				 if (nDataType==0){
+						pData = (unsigned short *)STORE_PRG_BASE + nAddr;
+				 } else if (nDataType==1){
+						pData = (unsigned short *)ALT_PRG_BASE + nAddr;
+				 } else if (KMRunStat.nBinProgBank == 0) {
+						pData = (unsigned short *)STORE_PRG_BASE + nAddr;
+				 }else {
+						pData = (unsigned short *)ALT_PRG_BASE + nAddr;
+				 }
+				PacketLen=KLMakeRplyPacket(p2,nDstHost,nKLStatus.StatByte,p1->nCMD,DataLen,pData);
+				SendPacket(nChn, p2, PacketLen);
+				
+				break;
+			case KLCmdStartProgram:
+				DataLen=nDataType;
+//				KLBufferIn[0]=p1->Params[0];
+//				p1->Params[0]=KLBufferOut[0];
+				if (PLCMem.bPLCRunning) PLCMem.bPLCRunning=0;
+			
+				PacketLen=KLMakeRplyPacket(p2,nDstHost,nKLStatus.StatByte,KLCmdStartProgram,0,0);
+				SendPacket(nChn, p2, PacketLen);
+				
+				break;
+			case KLCmdWriteProgram:
+				if (PLCMem.bPLCRunning) PLCMem.bPLCRunning=0;
+				nAddr=p1->Params[0]+ (p1->Params[1]<<8);
+				DataLen= p1->Params[2];
+
+				//DataLen=16;
+				for (int i=0;i<DataLen;i++)
+				{KLPacketBuf2[i]=p1->Params[4+i];}
+				WriteProgram(nAddr, KLPacketBuf2, DataLen,nDataType);
+				DataLen=4;
+				*((int *)(&rData[0]))=(long)(p1->Params+4);
+				PacketLen=KLMakeRplyPacket(p2,nDstHost,nKLStatus.StatByte,KLCmdWriteProgram,0,0);
+				SendPacket(nChn, p2, PacketLen);
+				break;
+			case KLCmdFinishProgram:
+				nAddr=p1->Params[0]+ (p1->Params[1]<<8);		//Program Size;
+				DataLen=nDataType;
+				KMRunStat.nBinProgSize=nAddr;
+				if (KMRunStat.nBinProgBank ==0) {KMRunStat.nBinProgBank=1;}
+				else {KMRunStat.nBinProgBank=0;}
+				SaveRunStat(&KMRunStat);				
+				PLCMem.bPLCRunning=1;
+//				KLBufferIn[0]=p1->Params[0];
+//				p1->Params[0]=KLBufferOut[0];
+				PacketLen=KLMakeRplyPacket(p2,nDstHost,nKLStatus.StatByte,KLCmdFinishProgram,0,0);
+				SendPacket(nChn, p2, PacketLen);
+				break;
+			case KLCmdReadRunStat:
+				DataLen= sizeof(stRunStat);
+				pData=&KMRunStat;
+				PacketLen=KLMakeRplyPacket(p2,nDstHost,nKLStatus.StatByte,p1->nCMD,DataLen,pData);
+				SendPacket(nChn, p2, PacketLen);	
+				break;
 			case KLCmdSaveSysCfg:
-				WriteSysCfgToFlash(&KMSysCfg);
-				PacketLen=KLMakeRplyPacket(p2,nDstAddr,nKLStatus.StatByte,KLCmdSaveSysCfg,0,0);
-				SendPacket1(p2,PacketLen);
+				WriteSysCfgToFlash(&storedKMSysCfg);
+				PacketLen=KLMakeRplyPacket(p2,nDstHost,nKLStatus.StatByte,KLCmdSaveSysCfg,0,0);
+				SendPacket(nChn, p2, PacketLen);
 				break;
 			case 	KLCmdSaveRunStat:
 				SaveRunStat(&KMRunStat);
-				PacketLen=KLMakeRplyPacket(p2,nDstAddr,nKLStatus.StatByte,KLCmdSaveRunStat,0,0);
-				SendPacket1(p2,PacketLen);
+				PacketLen=KLMakeRplyPacket(p2,nDstHost,nKLStatus.StatByte,KLCmdSaveRunStat,0,0);
+				SendPacket(nChn, p2, PacketLen);
 				break;
 			case KLCmdGetEventLogCount:
 				DataLen= 4;
 				pData=&KMem.nEventCount;
-				PacketLen=KLMakeRplyPacket(p2,nDstAddr,nKLStatus.StatByte,p1->nCMD,DataLen,pData);
-				SendPacket1(p2,PacketLen);
+				PacketLen=KLMakeRplyPacket(p2,nDstHost,nKLStatus.StatByte,p1->nCMD,DataLen,pData);
+				SendPacket(nChn, p2, PacketLen);
 				break;
 			case KLCmdGetEventLog:
 				nAddr=p1->Params[0]+ (p1->Params[1]<<8);
 				DataLen= p1->Params[2] * sizeof(stEventLog);
 				pData=GetEventLogAddr(nAddr);
-				PacketLen=KLMakeRplyPacket(p2,nDstAddr,nKLStatus.StatByte,p1->nCMD,DataLen,pData);
-				SendPacket1(p2,PacketLen);
+				PacketLen=KLMakeRplyPacket(p2,nDstHost,nKLStatus.StatByte,p1->nCMD,DataLen,pData);
+				SendPacket(nChn, p2, PacketLen);
 				break;
 			case KLCmdClearEventLog:
 				ClearEventLog();
-				PacketLen=KLMakeRplyPacket(p2,nDstAddr,nKLStatus.StatByte,KLCmdClearEventLog,0,0);
-				SendPacket1(p2,PacketLen);
+				PacketLen=KLMakeRplyPacket(p2,nDstHost,nKLStatus.StatByte,KLCmdClearEventLog,0,0);
+				SendPacket(nChn, p2, PacketLen);
 				break;			
 			default:
 			DataLen=1;
 			rData[0]=KL_UNKNOWN;
 			PacketLen=KLMakeRplyPacket(p2,nKLAddr,nKLStatus.StatByte,KLCmdErrRply,DataLen,rData);
-			SendPacket1(p2,PacketLen);			
+			SendPacket(nChn, p2, PacketLen);			
 				break;		
 		}
 	}	
 	return 0;
 }
-int KLParsePacket(void * pBuf,int Len1)
+int KLParsePacket(int nChn, void * pBuf, int Len1)
 {
-	pKLReqPktHdr p1 = (pKLReqPktHdr)pBuf;
-	KLThisuS=GetuS();
-	pKLRplyPktHdr p2=(pKLRplyPktHdr)KLPacketBuf2;
+//	pKLReqPktHdr p1 = (pKLReqPktHdr)pBuf;
+//	KLThisuS=GetuS();
+//	pKLRplyPktHdr p2=(pKLRplyPktHdr)KLPacketBuf2;
 	int PacketLen=Len1;
-	int Result=KLCheckPacket(p1,Len1);
+	int Result=KLCheckPacket(nChn, pBuf, Len1);
 	if (Result != KL_OK)
 	{
 		int DataLen=4;
 		char rData[4];
 		rData[0]=Result;
 		
-		PacketLen=KLMakeRplyPacket(p2,nKLAddr,nKLStatus.StatByte,KLCmdErrRply,DataLen,rData);
+		PacketLen=KLMakeRplyPacket(KLPacketBuf2,nKLAddr,nKLStatus.StatByte,KLCmdErrRply,DataLen,rData);
 //		PacketLen=KLMakePacket(p2,0,nAddr,cmdKLPing,p1->nSEQ,DataLen,rData);
-		SendPacket1(p2,PacketLen);
+		SendPacket(nChn, KLPacketBuf2, PacketLen);
 		return Result;
 	}
-//	if (bMaster) Result=ParseMasterPacket(p1,Len1);
+//	if (bKBusMaster) Result=ParseMasterPacket(p1,Len1);
 //	memcpy(KLPacketBuf2,pBuf,Len1);
-//	SendPacket1(p2,PacketLen);
+//	SendPacket(nChn, KLPacketBuf2, PacketLen);
 	
-	Result=KLParseReqPacket(p1,Len1);
+	Result=KLParseReqPacket(nChn, pBuf, Len1);
 	
 	//int len1=p1->PacketLen;
-//	if (p1->DstAddr!=255&&p1->DstAddr!=2) return -3;
+//	if (p1->DstHost!=255&&p1->DstHost!=2) return -3;
 //	pPacket p2=(pPacket)PacketBuf2;
 //			Uart2Stat.OKPacket++;
 
diff --git a/Src/KMachine.c b/Src/KMachine.c
index 02aa814..cad2702 100644
--- a/Src/KMachine.c
+++ b/Src/KMachine.c
@@ -15,7 +15,7 @@
 //#define UID_BASE              ((uint32_t)0x1FFFF7ACU)       /*!< Unique device ID register base address */
 
 
-stKMSysCfg KMSysCfg ;
+stStoredKMSysCfg storedKMSysCfg ;
 stKMem KMem;
 stRunStat KMRunStat;
 
@@ -26,33 +26,55 @@
 //uint16_t FlashDatas[16];
 
 //uint32_t * pUID = (uint32_t *)(UID_BASE);
-
-const char VersionStr[] __attribute__((at(0X8001000)))
+const stKMInfoBlock KMInfoBlock =
+{
+	BOARD_TYPE,			//nDeviceType
+	0x0100,			//ProgVer
+	0x0100,			//KLinkVer
+	0x0100,			//nCapacity
+	16,					//nDInput;
+	16,					//nDOutput
+	0,					//nAInput
+	0,					//nAOutput
+	0,					//nHInput
+	0,					//nHOutput
+	0,					//nExt1;
+	0,					//nExt2;
+};
+const char VersionStr[] __attribute__((at(FLASH_BASE + 0X1000))) //__attribute__((at(0X8001000)))
 	= "3.00";
 
-const stKMSysCfg KMStoreSysCfg /*__attribute__((at(STORECFGBASE)))*/ =
+const stStoredKMSysCfg KMDefaultSysCfg /*__attribute__((at(STORECFGBASE)))*/ =
 {
-	0x55aa,
+	START_SIGN,
 	0x0000,
-	0x00000000,
+	
+	CFG_VER,
+	0x0000,
+	0x0000,
+	{0,0,0,0,0,0},
 	{
 		{
+			1,
+			0,
+			2304,						//Buadrate * 100;
 			PortType_KLink,	//PorttType
 			1,							//ByteSize
 			0,							//Parity
 			0,							//StopBits
 			0,							//EofChar
 			0,							//SofChar
-			2304,						//Buadrate * 100;
 		},
 		{
+			1,
+			0,
+			2304,						//Buadrate * 100;
 			PortType_KBus,	//PorttType
 			1,							//ByteSize
 			0,							//Parity
 			0,							//StopBits
 			0,							//EofChar
 			0,							//SofChar
-			2304,						//Buadrate * 100;
 		}
 	},
 	{{0},{0},{0},{0},{0},{0},{0},{0},{0},{0},{0},{0},{0},{0},{0},{0}},
@@ -73,23 +95,23 @@
 		0x0010,
 	{0},
 	0x0011,
-	0x5aa5,
+	END_SIGN,
 };
 
-const stKMSysCfg KMStoreSysCfg2[7] /*__attribute__((at(STORECFGBASE+sizeof(stKMSysCfg))))*/;
+const stKMSysCfg KMDefaultSysCfg2[7] /*__attribute__((at(STORECFGBASE+sizeof(stKMSysCfg))))*/;
 	
-int ReadFlashMem(void * pBuf, void * pAddrFlash, int nSize)
+int ReadFlashMem(void * pBuf, void * pAddrFlash, int nByteSize)
 {
 //	memcpy(pBuf,pAddrFlash,nSize);
-	for (int i=0;i<nSize/4;i++)
+	for (int i=0;i<nByteSize/4;i++)
 	{
 		((uint32_t *)pBuf)[i] = ((uint32_t *)pAddrFlash)[i];
 	}
-	for (int i=nSize/4*2;i<nSize/2;i++)
+	for (int i=nByteSize/4*2;i<nByteSize/2;i++)
 	{
 		((uint16_t *)pBuf)[i] = ((uint16_t *)pAddrFlash)[i];
 	}
-	return nSize;
+	return nByteSize;
 }
 int EraseFlashMem(void * pAddrFlash, unsigned int Pages)
 {
@@ -104,7 +126,7 @@
 	res = HAL_FLASH_Lock();
 	return res;
 }
-int WriteToFlashMemNoErase(void * pBuf, void * pAddrFlash, unsigned int nSize)
+int WriteToFlashMemNoErase(void * pBuf, void * pAddrFlash, unsigned int nByteSize)
 {
 		HAL_StatusTypeDef res;
 	res = HAL_FLASH_Unlock();
@@ -115,12 +137,12 @@
 	}
 */	
 ///*	
-	for (int i=0;i<nSize/4;i++)
+	for (int i=0;i<nByteSize/4;i++)
 	{
 		res = HAL_FLASH_Program(FLASH_TYPEPROGRAM_WORD, (uint32_t)pAddrFlash + i*4, ((uint32_t *)pBuf)[i]);
 	}
 	
-	for (int i = nSize/4 * 2 ; i < nSize/2 ; i++)
+	for (int i = nByteSize/4 * 2 ; i < nByteSize/2 ; i++)
 	{
 		res = HAL_FLASH_Program(FLASH_TYPEPROGRAM_HALFWORD, (uint32_t)pAddrFlash + i*2, ((uint16_t *)pBuf)[i]);
 	}
@@ -129,7 +151,7 @@
 	
 	return res;
 }
-int EraseAndWriteToFlashMem(void * pBuf, void * pAddrFlash, unsigned int nSize)
+int EraseAndWriteToFlashMem(void * pBuf, void * pAddrFlash, unsigned int nByteSize)
 {
 	
 	HAL_StatusTypeDef res;
@@ -141,7 +163,7 @@
 	erase1.TypeErase=FLASH_TYPEERASE_PAGES;
 	res = HAL_FLASHEx_Erase(&erase1,&ErrNo);
 	
-	for (int i=0;i<nSize/2;i++)
+	for (int i=0;i<nByteSize/2;i++)
 	{
 		res = HAL_FLASH_Program(FLASH_TYPEPROGRAM_HALFWORD, (uint32_t)pAddrFlash + i*2, ((uint16_t *)pBuf)[i]);
 	}
@@ -161,20 +183,66 @@
 	return res;
 }
 
-int LoadDefaultSysCfg(pKMSysCfg theKMSysCfg)
+int ReadFactoryData(void * pDatabuf, int nByteCount)
 {
-	memcpy(theKMSysCfg,&KMStoreSysCfg,sizeof(stKMSysCfg));
+	memcpy(pDatabuf,(stFactoryData *)FACTORY_DATA_BASE,nByteCount);
 	return 0;
 }
-int ReadSysCfgFromFlash(pKMSysCfg theKMSysCfg)
+int WriteFactoryData(void * pDataBuf, int nByteCount)
 {
-	pKMSysCfg pStoreKMSysCfg = (pKMSysCfg)(STORE_SYSREG_BASE);
+	EraseAndWriteToFlashMem(pDataBuf, (stFactoryData *)FACTORY_DATA_BASE,nByteCount);
+	return 0;
+}
+
+int ReadProgram(int nProgByteAddr, void *pBuf, int nByteSize, int nBank)
+{
+	if (nBank==0)	{
+		ReadFlashMem(pBuf, (void *)(STORE_PRG_BASE+nProgByteAddr), nByteSize);
+	}else if (nBank ==1) {
+		ReadFlashMem(pBuf, (void *)(ALT_PRG_BASE+nProgByteAddr), nByteSize);
+	}else if (KMRunStat.nBinProgBank==0) {
+		ReadFlashMem(pBuf, (void *)(STORE_PRG_BASE+nProgByteAddr), nByteSize);
+	} else {
+		ReadFlashMem(pBuf, (void *)(ALT_PRG_BASE+nProgByteAddr), nByteSize);
+	}		
+	return 0;
+}
+int WriteProgram(int nProgAddress, void * pBuf, int nByteSize, int nBank)
+{
+			// Program Save Address;//
+		  // Program 2 Save Address; //
+	void * progByteAddr;
+	if (nBank == 0) {
+		progByteAddr=(void *)(STORE_PRG_BASE+nProgAddress);
+	}else if (nBank==1) {
+		progByteAddr=(void *)(ALT_PRG_BASE+nProgAddress);
+	} else if (KMRunStat.nBinProgBank==0) {
+		progByteAddr=(void *)(ALT_PRG_BASE+nProgAddress);
+	}else{
+		progByteAddr=(void *)(STORE_PRG_BASE+nProgAddress);
+	}
+	if (nProgAddress ==0)	{
+		EraseAndWriteToFlashMem(pBuf, progByteAddr, nByteSize);
+	}else{
+		WriteToFlashMemNoErase(pBuf, progByteAddr, nByteSize);
+	}
+	return 0;
+}
+
+int LoadDefaultSysCfg(pStoredKMSysCfg theStoredKMSysCfg)
+{
+	memcpy(theStoredKMSysCfg,&KMDefaultSysCfg,sizeof(stKMSysCfg));
+	return 0;
+}
+int ReadSysCfgFromFlash(pStoredKMSysCfg theStoredKMSysCfg)
+{
+	pStoredKMSysCfg pStoreKMSysCfg = (pStoredKMSysCfg)(STORE_SYSREG_BASE);
 	// find latest Store Cfg
 	int nIndex=-1;
 	int nMaxSeq=-1;
 	for (int i=0;i<8;i++)
 	{
-		if (pStoreKMSysCfg->Sign1 == 0x55aa && pStoreKMSysCfg->EndSign1 == 0x5aa5)
+		if (pStoreKMSysCfg->Sign1 == START_SIGN && pStoreKMSysCfg->EndSign1 == END_SIGN)
 		{
 			if (pStoreKMSysCfg->Seq1 > nMaxSeq) 
 			{
@@ -184,18 +252,18 @@
 	}
 	if (nIndex>=0 && nIndex <8)
 	{
-			ReadFlashMem(theKMSysCfg,(void *)(pStoreKMSysCfg+nIndex),sizeof(stKMSysCfg));
+			ReadFlashMem(theStoredKMSysCfg,(void *)(&pStoreKMSysCfg[nIndex]),sizeof(stStoredKMSysCfg));
 	}else {
-		LoadDefaultSysCfg(theKMSysCfg);
+		LoadDefaultSysCfg(theStoredKMSysCfg);
 	}
 	//memcpy(theKMSysCfg,(void* )STORECFGBASE,sizeof(KMSysCfg));
 	return 0;
 }
 
-int WriteSysCfgToFlash(pKMSysCfg theKMSysCfg)
+int WriteSysCfgToFlash(pStoredKMSysCfg theStoredKMSysCfg)
 {
-	theKMSysCfg->Seq1++;
-	theKMSysCfg->cfgvar16++;
+	theStoredKMSysCfg->Seq1++;
+//	theKMSysCfg->cfgvar16++;
 	// find the next empty space to write
 	int nIndex=-1;
 	int s2=128;
@@ -212,10 +280,10 @@
 		break;
 	}
 	if (nIndex >=0 && nIndex <8)	{	
-		WriteToFlashMemNoErase(theKMSysCfg,(void *)(STORE_SYSREG_BASE + nIndex*s2),sizeof(KMSysCfg));
+		WriteToFlashMemNoErase(theStoredKMSysCfg,(void *)(STORE_SYSREG_BASE + nIndex*s2),sizeof(theStoredKMSysCfg));
 	}
 	else 	{
-		EraseAndWriteToFlashMem(theKMSysCfg,(void *)STORE_SYSREG_BASE,sizeof(KMSysCfg));
+		EraseAndWriteToFlashMem(theStoredKMSysCfg,(void *)STORE_SYSREG_BASE,sizeof(theStoredKMSysCfg));
 	}
 	return 0;
 }
@@ -412,6 +480,10 @@
 unsigned int nEventMaxSeq=0;
 int nEventNextSpace;
 int nMaxCurTime=0;
+volatile int PowerDownEvent=0;
+volatile int OldPowerDownEvent=0;
+volatile int OldPowerDownEventTime=0;
+
 int CheckEventLog()
 {
 	unsigned int nMinEventSeq=999999999;
@@ -526,3 +598,264 @@
 	
 	return 0;
 }
+
+inline void SetAddrBit(unsigned short * pW, unsigned char bitAddr)
+{
+	(*pW)|=1<<(bitAddr&0xf);
+}
+
+inline void ResetBit(unsigned short * pW, unsigned char bitAddr)
+{
+	(*pW)&=~(1<<(bitAddr&0xf));
+}
+
+static inline void SetBitValue(unsigned short * pW, unsigned char bitAddr, unsigned char Value)
+{
+	if (Value)	{	SetAddrBit(pW, bitAddr);}
+	else {ResetBit(pW, bitAddr);}
+}
+
+static inline unsigned char GetBitValue(unsigned short W, unsigned char bitAddr)
+{
+	if (W&(1<<(bitAddr&0xf))) return 1;
+	else return 0;
+}
+
+
+unsigned char GetCoilValue(unsigned char nCoilType, unsigned short nCoilAddr)
+{
+		unsigned char thisValue=0;
+		unsigned short nWordAddr=(nCoilAddr&0xff0)>>4;
+		unsigned char nBitAddr=nCoilAddr&0xf;
+		switch(nCoilType)
+		{
+		case KLCoilTypeX:
+			if (nCoilAddr >= KLCoilXCount) return 0;
+			thisValue = GetBitValue(KMem.WX[nWordAddr], nBitAddr);
+			break;
+		case KLCoilTypeY:
+			if (nCoilAddr >= KLCoilYCount) return 0;
+			thisValue = GetBitValue(KMem.WY[nWordAddr], nBitAddr);
+			break;
+		case KLCoilTypeR:
+			if (nCoilAddr >= KLCoilRCount) return 0;
+			thisValue = GetBitValue(KMem.WR[nWordAddr], nBitAddr);
+			break;
+		case KLCoilTypeLX:
+			if (nCoilAddr >= KLCoilLXCount) return 0;
+			 thisValue = GetBitValue(KMem.WLX[nWordAddr], nBitAddr);
+			break;
+		case KLCoilTypeLY:
+			if (nCoilAddr >= KLCoilLYCount) return 0;
+			thisValue = GetBitValue(KMem.WLY[nWordAddr], nBitAddr);
+			break;
+		case KLCoilTypeT:
+			if (nCoilAddr >= KLCoilTCount) return 0;
+			thisValue = GetBitValue(KMem.WT[nWordAddr], nBitAddr);
+			break;
+		case KLCoilTypeC:
+			if (nCoilAddr >= KLCoilCCount) return 0;
+			thisValue = GetBitValue(KMem.WC[nWordAddr], nBitAddr);
+			break;
+		case KLCoilTypeLR:
+			if (nCoilAddr >= KLCoilLRCount) return 0;
+			thisValue = GetBitValue(KMem.WLR[nWordAddr], nBitAddr); 
+			break;
+		case KLCoilTypeSR:
+			if (nCoilAddr >= KLCoilSRCount) return 0;
+			thisValue = GetBitValue(KMem.WSR[nWordAddr], nBitAddr);
+			break;
+			default:
+				break;
+		}	
+		return thisValue;
+}
+int SetCoilValue(unsigned char nCoilType, unsigned short nCoilAddr, unsigned char nCoilValue)
+{
+		unsigned short nWordAddr=(nCoilAddr&0xff0)>>4;
+		unsigned char nBitAddr=nCoilAddr&0xf;
+		switch(nCoilType)
+		{
+		case KLCoilTypeX:
+			if (nCoilAddr >= KLCoilXCount) return 0;
+			SetBitValue(&KMem.WX[nWordAddr], nBitAddr, nCoilValue);
+			break;
+		case KLCoilTypeY:
+			if (nCoilAddr >= KLCoilYCount) return 0;
+			SetBitValue(&KMem.WY[nWordAddr], nBitAddr, nCoilValue);
+			break;
+		case KLCoilTypeR:
+			if (nCoilAddr >= KLCoilRCount) return 0;
+			SetBitValue(&KMem.WR[nWordAddr], nBitAddr, nCoilValue);
+			break;
+		case KLCoilTypeLX:
+			if (nCoilAddr >= KLCoilLXCount) return 0;
+			SetBitValue(&KMem.WLX[nWordAddr], nBitAddr, nCoilValue);
+			break;
+		case KLCoilTypeLY:
+			if (nCoilAddr >= KLCoilLYCount) return 0;
+			SetBitValue(&KMem.WLY[nWordAddr], nBitAddr, nCoilValue);
+			break;
+		case KLCoilTypeT:
+			if (nCoilAddr >= KLCoilTCount) return 0;
+			SetBitValue(&KMem.WT[nWordAddr], nBitAddr, nCoilValue);
+			break;
+		case KLCoilTypeC:
+			if (nCoilAddr >= KLCoilCCount) return 0;
+			SetBitValue(&KMem.WC[nWordAddr], nBitAddr, nCoilValue);
+			break;
+		case KLCoilTypeLR:
+			if (nCoilAddr >= KLCoilLRCount) return 0;
+			SetBitValue(&KMem.WLR[nWordAddr], nBitAddr, nCoilValue);
+			break;
+		case KLCoilTypeSR:
+			if (nCoilAddr >= KLCoilSRCount) return 0;
+			SetBitValue(&KMem.WSR[nWordAddr], nBitAddr, nCoilValue);
+			break;
+			default:
+				break;
+		}	
+		return 0;
+}
+
+int GetVarData(int nDataType, int nDataAddr)
+{
+	// TODO: ?????????.
+	int thisValue = 0;
+	
+	switch (nDataType)
+	{
+	case KLDataTypeDEC:
+	case KLDataTypeHEX:
+		thisValue = nDataAddr;
+		break;
+	case KLDataTypeWX:
+		if (nDataAddr >= KLDataWXCount) return 0;
+		thisValue = KMem.WX[nDataAddr];
+		break;
+	case KLDataTypeWY:
+		if (nDataAddr >= KLDataWYCount) return 0;
+		thisValue = KMem.WY[nDataAddr];
+		break;
+	case KLDataTypeWR:
+		if (nDataAddr >= KLDataWRCount) return 0;
+		thisValue = KMem.WR[nDataAddr];
+		break;
+	case KLDataTypeWLX:
+		if (nDataAddr >= KLDataWLCount) return 0;
+		thisValue = KMem.WLX[nDataAddr];
+		break;
+	case KLDataTypeWLY:
+		if (nDataAddr >= KLDataWLCount) return 0;
+		thisValue = KMem.WLY[nDataAddr];
+		break;
+	case KLDataTypeDT:
+		if (nDataAddr >= KLDataDTCount) return 0;
+		thisValue = (signed short)KMem.DT[nDataAddr];
+		break;
+	case KLDataTypeSDT:
+		if (nDataAddr >= KLDataSDTCount) return 0;
+		thisValue = KMem.SDT[nDataAddr];
+		break;
+	case KLDataTypeWSR:
+		if (nDataAddr >= KLCoilLRCount) return 0;
+		thisValue = KMem.WSR[nDataAddr];
+		break;
+	case KLDataTypeSV:
+		if (nDataAddr >= KLDataSVCount) return 0;
+		thisValue = KMem.SV[nDataAddr];
+		break;
+	case KLDataTypeEV:
+		if (nDataAddr >= KLDataEVCount) return 0;
+		thisValue = KMem.EV[nDataAddr];
+		break;
+	case KLDataTypeLD:
+		if (nDataAddr >= KLDataLDCount) return 0;
+		thisValue = KMem.DT[nDataAddr];
+		break;
+	case KLDataSysCfg:
+		if (nDataAddr >= KLCoilSRCount) return 0;
+		thisValue = KMem.SDT[nDataAddr];
+		break;
+	case KLDataTypeFlash:
+		if (nDataAddr >= KLCoilSRCount) return 0;
+		thisValue = KMem.SDT[nDataAddr];
+		break;
+	case KLDataTypeTest:
+		if (nDataAddr >= KLCoilSRCount) return 0;
+		thisValue = KMem.SDT[nDataAddr];
+		break;
+	}
+	return thisValue;
+}
+
+
+int SetVarData(int nDataType, int nDataAddr, int nDataValue)
+{
+	// TODO: ?????????.
+	switch (nDataType)
+	{
+//	case KLDataTypeDEC:
+//	case KLDataTypeHEX:
+//		break;
+	case KLDataTypeWX:
+		if (nDataAddr >= KLDataWXCount) return 0;
+		KMem.WX[nDataAddr] = nDataValue;
+		break;
+	case KLDataTypeWY:
+		if (nDataAddr >= KLDataWYCount) return 0;
+		KMem.WY[nDataAddr] = nDataValue;
+		break;
+	case KLDataTypeWR:
+		if (nDataAddr >= KLDataWRCount) return 0;
+		KMem.WR[nDataAddr] = nDataValue;
+		break;
+	case KLDataTypeWLX:
+		if (nDataAddr >= KLDataWLCount) return 0;
+		KMem.WLX[nDataAddr] = nDataValue;
+		break;
+	case KLDataTypeWLY:
+		if (nDataAddr >= KLDataWLCount) return 0;
+		KMem.WLY[nDataAddr] = nDataValue;
+		break;
+	case KLDataTypeDT:
+		if (nDataAddr >= KLDataDTCount) return 0;
+		KMem.DT[nDataAddr] = nDataValue;
+		break;
+	case KLDataTypeSDT:
+		if (nDataAddr >= KLDataSDTCount) return 0;
+		KMem.SDT[nDataAddr] = nDataValue;
+		break;
+	case KLDataTypeWSR:
+		if (nDataAddr >= KLCoilLRCount) return 0;
+		KMem.WSR[nDataAddr] = nDataValue;
+		break;
+	case KLDataTypeSV:
+		if (nDataAddr >= KLDataSVCount) return 0;
+		KMem.SV[nDataAddr] = nDataValue;
+		break;
+	case KLDataTypeEV:
+		if (nDataAddr >= KLDataEVCount) return 0;
+		KMem.EV[nDataAddr] = nDataValue;
+		break;
+	case KLDataTypeLD:
+		if (nDataAddr >= KLDataLDCount) return 0;
+		KMem.DT[nDataAddr] = nDataValue;
+		break;
+	case KLDataSysCfg:
+		if (nDataAddr >= KLCoilSRCount) return 0;
+		KMem.SDT[nDataAddr] = nDataValue;
+		break;
+	case KLDataTypeFlash:
+		if (nDataAddr >= KLCoilSRCount) return 0;
+		KMem.SDT[nDataAddr] = nDataValue;
+		break;
+	case KLDataTypeTest:
+		if (nDataAddr >= KLCoilSRCount) return 0;
+		KMem.SDT[nDataAddr] = nDataValue;
+		break;
+	}
+
+	return 0;
+}
+
diff --git a/Src/ModbusRTU.c b/Src/ModbusRTU.c
new file mode 100644
index 0000000..bd939f3
--- /dev/null
+++ b/Src/ModbusRTU.c
@@ -0,0 +1,312 @@
+/**
+  ******************************************************************************
+  * @file           : ModbusRTU.c
+  * @brief          : Modbus RTU Protocol program body
+  ******************************************************************************
+	*/
+#include "ModbusRTU.h"
+#include "functions.h"
+#include "string.h"
+#include "Kmachine.h"
+
+static inline unsigned char HiByte(uint16_t in)
+{
+	return (in>>8)&0xff;
+}
+
+static inline unsigned char LoByte(uint16_t in)
+{
+	return (in&0xff);
+}
+static inline uint16_t swaphilo(uint16_t in)
+{
+	return ((in&0xff)<<8)|((in>>8)&0xff);
+}
+
+static inline uint16_t mkshort(uint8_t hi, uint8_t lo)
+{
+	return ((uint16_t)hi<<8)|lo;
+}
+
+uint8_t MyAddr = 1;
+int ModBusCRC16(void * pBuf, int len1)
+{
+	return 0;
+}
+
+//const uint16_t polynom = 0xA001;
+/* 
+uint16_t crc16bitbybit(uint8_t *ptr, uint16_t len)
+{
+	uint8_t i;
+	uint16_t crc = 0xffff;
+ 
+	if (len == 0) {
+		len = 1;
+	}
+	while (len--) {
+		crc ^= *ptr;
+		for (i = 0; i<8; i++)
+		{
+			if (crc & 1) {
+				crc >>= 1;
+				crc ^= polynom;
+			}
+			else {
+				crc >>= 1;
+			}
+		}
+		ptr++;
+	}
+	return(crc);
+}
+*/ 
+const uint16_t crctalbeabs[] = { 
+	0x0000, 0xCC01, 0xD801, 0x1400, 0xF001, 0x3C00, 0x2800, 0xE401, 
+	0xA001, 0x6C00, 0x7800, 0xB401, 0x5000, 0x9C01, 0x8801, 0x4400 
+};
+
+uint16_t crc16tablefast(const uint8_t *ptr, uint16_t len) 
+{
+	uint16_t crc = 0xffff; 
+	uint16_t i;
+	uint8_t ch;
+ 
+	for (i = 0; i < len; i++) {
+		ch = *ptr++;
+		crc = crctalbeabs[(ch ^ crc) & 15] ^ (crc >> 4);
+		crc = crctalbeabs[((ch >> 4) ^ crc) & 15] ^ (crc >> 4);
+	} 
+	
+	return crc;
+}
+
+//**********************************************************************
+//******************  Modbus slave  ************************************
+
+int ModBusSlaveCheckPkg(int nChn, void *ptr, uint16_t len1)
+{
+	if (len1 <=4) return -1;		//包长
+	pModBusRTUReqPkg pPkg = (pModBusRTUReqPkg) ptr;
+	if (pPkg->Dst >127) return -2;   //地址码
+	if ((pPkg->Cmd&0x7f) > 0x1f) return -3;  //功能码
+	uint16_t crc = crc16tablefast(ptr,len1);   //CRC 校验
+	if (crc != 0 ) return 4;		//CRC 校验错误
+	return S_OK;
+}
+
+int mkReqPkg(uint8_t *ptr, uint8_t opcode, uint8_t nsize, uint8_t *buf)
+{
+	int len1=0;
+	
+	return len1;
+	
+}
+/*
+static const unsigned short bitMasks[16]=
+{
+	0x1<<0,	0x1<<1,	0x1<<2,	0x1<<3,	0x1<<4,	0x1<<5,	0x1<<6,	0x1<<7,
+	0x1<<8,	0x1<<9,	0x1<<10,	0x1<<11,	0x1<<12,	0x1<<13,	0x1<<14,	0x1<<15,
+};
+*/
+static inline void SetAddrBit(unsigned short * pW, unsigned char bitAddr)
+{
+	(*pW)|=1<<(bitAddr&0xf);
+}
+
+static inline void ResetBit(unsigned short * pW, unsigned char bitAddr)
+{
+	(*pW)&=~(1<<(bitAddr&0xf));
+}
+
+static inline void SetBitValue(unsigned short * pW, unsigned char bitAddr, unsigned char Value)
+{
+	if (Value)	{	SetAddrBit(pW, bitAddr);}
+	else {ResetBit(pW, bitAddr);}
+}
+
+static inline unsigned char GetBitValue(unsigned short W, unsigned char bitAddr)
+{
+	if (W&(1<<(bitAddr&0xf))) return 1;
+	else return 0;
+}
+
+uint8_t Pkgbuf[128];
+
+int ModBusSlaveParsePkg(int nChn, void *ptr, uint16_t len)
+{
+	uchar * bptr = (uchar *) ptr;
+	int err=ModBusSlaveCheckPkg(nChn, ptr, len);	
+	if (err) return -1;
+	pModBusRTUReqPkg pPkg = (pModBusRTUReqPkg) ptr;
+	uint8_t DstHost=pPkg->Dst;
+	if (DstHost != MyAddr) return 0;
+	uint8_t opcode = pPkg->Cmd;
+	ushort Addr=mkshort(pPkg->AddrH,pPkg->AddrL);
+	ushort nCount=swaphilo(pPkg->nCount);
+	Pkgbuf[0]=MyAddr;
+	Pkgbuf[1]=opcode;
+	int len2=2;
+	int needcrc=1;
+	uint16_t crc;
+	int nByteCount;
+	unsigned short Addr1=(Addr&0xff0)>>4;
+	unsigned char bitAddr=Addr&0xf;
+	unsigned char thisValue;
+	unsigned char bitmask=1;
+	switch (opcode)
+	{
+		case None:		//0
+			break;
+		case ReadCoils:	//1  bits
+		//	Fetch Datas;
+			nByteCount=(nCount+7)/8;
+			Pkgbuf[2]=nByteCount;
+			for (int i=0;i<nByteCount;i++)
+			{
+				thisValue=0;
+				bitmask=1;
+				for (int j=0;j<8&&i*8+j<nCount;j++)
+				{
+					Addr1=(Addr&0xff0)>>4;
+					bitAddr=Addr&0xf;
+					if (GetBitValue( KMem.WY[Addr1],bitAddr))
+					{
+						thisValue|=bitmask;
+					}
+					bitmask<<=1;
+					Addr++;
+				}
+				Pkgbuf[3+i]=thisValue;
+			}
+			len2+=1+nByteCount;
+			break;
+		case ReadInputs:	//2 , bits
+		// Fetch Datas;
+			nByteCount=(nCount+7)/8;
+			Pkgbuf[2]=nByteCount;
+			for (int i=0;i<nByteCount;i++)
+			{
+				thisValue=0;
+				bitmask=1;
+				for (int j=0;j<8&&i*8+j<nCount;j++)
+				{
+					Addr1=(Addr&0xff0)>>4;
+					bitAddr=Addr&0xf;
+					if (GetBitValue( KMem.WX[Addr1],bitAddr))
+					{
+						thisValue|=bitmask;
+					}
+					bitmask<<=1;
+					Addr++;
+				}
+				Pkgbuf[3+i]=thisValue;
+			}
+			len2+=1+nByteCount;
+			break;
+		case ReadKeepRegs:	//3  words
+		// Fetch Datas;
+			nByteCount=nCount*2;
+			Pkgbuf[2]=nByteCount;
+			for (int i=0;i<nCount;i++)
+			{
+			Pkgbuf[3+i*2]=(KMem.DT[Addr+i]>>8)&0xff;
+			Pkgbuf[4+i*2]=(KMem.DT[Addr+i])&0xff;
+			}
+			len2+=1+nByteCount;
+			break;
+		case ReadInputRegs:	//4  words
+		// Fetch Datas;
+			nByteCount=nCount*2;
+			Pkgbuf[2]=nByteCount;
+			for (int i=0;i<nCount;i++)
+			{
+				Pkgbuf[3+i*2]=HiByte(KMem.WX[Addr+i]);
+				Pkgbuf[4+i*2]=LoByte(KMem.WX[Addr+i]);
+			}
+			len2+=1+nByteCount;
+			break;
+		case WriteCoil:	//5  bit
+		//Store Datas;
+			//SetBitValue(&KMem.WR[Addr1],bitAddr,pPkg->nCount);	
+			if (nCount == 0)		// set to 0
+			{
+				ResetBit(&KMem.WY[Addr1],bitAddr);
+			}else if (nCount == 0xFF00)	// set to 1
+			{
+				SetAddrBit(&KMem.WY[Addr1],bitAddr);
+			}else
+			{
+				//error
+			}
+			memcpy(Pkgbuf,ptr,len);
+			needcrc=0;
+			len2=len;
+			break;
+		case WriteReg:	//6 word
+		//Store Datas;
+			KMem.DT[Addr]=mkshort(bptr[4],bptr[5]);
+			memcpy(Pkgbuf,ptr,len);	
+			needcrc=0;
+			len2=len;			
+			break;
+		case WriteCoils:	//0x0f, 15  bits
+		//Store Datas;
+			nByteCount=(nCount+7)/8;
+			Pkgbuf[2]=nByteCount;
+			for (int i=0;i<nByteCount;i++)
+			{
+				thisValue=bptr[7+i];
+				bitmask=1;
+				for (int j=0;j<8&&i*8+j<nCount;j++)
+				{
+					Addr1=(Addr&0xff0)>>4;
+					bitAddr=Addr&0xf;
+					
+					SetBitValue( &KMem.WY[Addr1],bitAddr,bitmask&thisValue);
+					bitmask<<=1;
+					Addr++;
+				}
+			}
+		
+		//makeReply
+			Pkgbuf[2]=bptr[2];	//HiByte(Addr);
+			Pkgbuf[3]=bptr[3];	//LoByte(Addr);
+			Pkgbuf[4]=bptr[4];	//HiByte(nCount);
+			Pkgbuf[5]=bptr[5];	//LoByte(nCount);
+			len2+=4;
+			break;
+		case WriteRegs:	//0x10, 16  words
+		//Store Datas;
+		for (int i=0;i<nCount;i++)
+		{
+			KMem.DT[Addr+i]=mkshort(bptr[7+i*2],bptr[8+i*2]);
+		}
+		//Make Reply
+			Pkgbuf[2]=bptr[2];	//HiByte(Addr);
+			Pkgbuf[3]=bptr[3];	//LoByte(Addr);
+			Pkgbuf[4]=bptr[4];	//HiByte(nCount);
+			Pkgbuf[5]=bptr[5];	//LoByte(nCount);
+			len2+=4;
+			break;
+		
+		default:			//others
+			break;
+	}
+if (err==0)
+{
+	if (needcrc)
+	{
+			crc=crc16tablefast(Pkgbuf,len2);
+			Pkgbuf[len2]=LoByte(crc);
+		  Pkgbuf[len2+1]=HiByte(crc);
+			len2+=2;
+	}
+			//SendPkg(Pkgbuf,len2);
+			SendPacket(nChn, Pkgbuf, len2);
+}	
+	
+	return 0;
+}
+
+
diff --git a/Src/PLCfunctions.c b/Src/PLCfunctions.c
index 47bdfc8..fbee49a 100644
--- a/Src/PLCfunctions.c
+++ b/Src/PLCfunctions.c
@@ -36,23 +36,23 @@
 int InitTimer(int nIndex, int nType)
 {
 	if (nIndex >= TOTALTIMERS) return -1;
-	PLCMem.Timers[nIndex].StatByte = 0x0010 | nType;
+	KMem.Timers[nIndex].StatByte = 0x0010 | nType;
 //	Timers[nIndex].nType = 0;
-	PLCMem.Timers[nIndex].SV = 0;
-	PLCMem.Timers[nIndex].EV = 0;
-	PLCMem.Timers[nIndex].LastActTime = GetTick();
+	KMem.SV[nIndex] = 0;
+	KMem.EV[nIndex] = 0;
+	KMem.Timers[nIndex].LastActTime = GetTick();
 	return 0;
 }
 
-int StartTimer(int nIndex , int SV)
+int RunTimer(int nIndex , int SV)
 {
 	if (nIndex >= TOTALTIMERS) return -1;	
-	if (!PLCMem.Timers[nIndex].bSet)
+	if (!KMem.Timers[nIndex].bSet)
 	{
-		PLCMem.Timers[nIndex].SV = SV;
-		PLCMem.Timers[nIndex].EV = 0;
-		PLCMem.Timers[nIndex].LastActTime = GetTick();		
-		PLCMem.Timers[nIndex].bSet = 1;
+		KMem.SV[nIndex] = SV;
+		KMem.EV[nIndex]= 0;
+		KMem.Timers[nIndex].LastActTime = GetTick();		
+		KMem.Timers[nIndex].bSet = 1;
 	}
 	return 0;
 }
@@ -60,48 +60,48 @@
 int StopTimer(int nIndex)
 {
 	if (nIndex >= TOTALTIMERS) return -1;	
-	if (PLCMem.Timers[nIndex].bSet)
+	if (KMem.Timers[nIndex].bSet)
 	{
-		PLCMem.Timers[nIndex].EV = 0;
-		PLCMem.Timers[nIndex].LastActTime = GetTick();		
-		PLCMem.Timers[nIndex].bSet = 0;		
+		KMem.EV[nIndex] = 0;
+		KMem.Timers[nIndex].LastActTime = GetTick();		
+		KMem.Timers[nIndex].bSet = 0;		
 	}
 	return 0;
 }
 int ResetTimer(int nIndex)
 {
 	if (nIndex >= TOTALTIMERS) return -1;
-	PLCMem.Timers[nIndex].EV = 0;
-	PLCMem.Timers[nIndex].bTon = 0;
-	PLCMem.Timers[nIndex].LastActTime=GetTick();
+	KMem.EV[nIndex] = 0;
+	KMem.Timers[nIndex].bTon = 0;
+	KMem.Timers[nIndex].LastActTime=GetTick();
 	return 0;
 }
 
 int SetTimerValue(int nIndex, int bSet, int SV)
 {
 	if (nIndex >= TOTALTIMERS) return -1;	
-	if (bSet) {StartTimer(nIndex, SV);}
+	if (bSet) {RunTimer(nIndex, SV);}
 	else {StopTimer(nIndex);}
-	return PLCMem.Timers[nIndex].bTon;
+	return KMem.Timers[nIndex].bTon;
 }
 
 int ProcessTimer(int nIndex)
 {
 	if (nIndex >= TOTALTIMERS) return -1;
-	if (!PLCMem.Timers[nIndex].nInited) return 0;
-	if (PLCMem.Timers[nIndex].bSet)		// bSet =1;
+	if (!KMem.Timers[nIndex].nInited) return 0;
+	if (KMem.Timers[nIndex].bSet)		// bSet =1;
 	{
-		if (!PLCMem.Timers[nIndex].bTon)
+		if (!KMem.Timers[nIndex].bTon)
 		{
-			int TimeDiff = GetTick() - PLCMem.Timers[nIndex].LastActTime;
+			int TimeDiff = GetTick() - KMem.Timers[nIndex].LastActTime;
 			int nScale = TICK_OF_MS;
-			if (PLCMem.Timers[nIndex].nScale == 0)
+			if (KMem.Timers[nIndex].nScale == 0)
 			{nScale = TICK_OF_MS;
-			}else if (PLCMem.Timers[nIndex].nScale == 1)
+			}else if (KMem.Timers[nIndex].nScale == 1)
 			{nScale = TICK_OF_RS;
-			}else if (PLCMem.Timers[nIndex].nScale == 2)
+			}else if (KMem.Timers[nIndex].nScale == 2)
 			{nScale = TICK_OF_XS;
-			}else if (PLCMem.Timers[nIndex].nScale == 3)
+			}else if (KMem.Timers[nIndex].nScale == 3)
 			{nScale = TICK_OF_YS;
 			}else {}
 			
@@ -109,32 +109,33 @@
 			if (TimeDiff >= nScale)
 			{
 				int TimeDiffmS = TimeDiff / nScale;
-				unsigned short NextEV = PLCMem.Timers[nIndex].EV + TimeDiffmS;
-				PLCMem.Timers[nIndex].LastActTime += TimeDiffmS*nScale;
+				unsigned short NextEV = KMem.EV[nIndex] + TimeDiffmS;
+				KMem.Timers[nIndex].LastActTime += TimeDiffmS*nScale;
 				
-				if (NextEV >= PLCMem.Timers[nIndex].SV) 
+				if (NextEV >= KMem.SV[nIndex]) 
 				{
-					NextEV = PLCMem.Timers[nIndex].SV;
-					PLCMem.Timers[nIndex].bTon =1;
+					NextEV = KMem.SV[nIndex];
+					KMem.Timers[nIndex].bTon =1;
 				}
-				PLCMem.Timers[nIndex].EV = NextEV;
+				KMem.EV[nIndex] = NextEV;
 			}
 		}
 	}else 		//bSet=0;
 	{
-		if(PLCMem.Timers[nIndex].bTon) 
+		if(KMem.Timers[nIndex].bTon) 
 		{
-			PLCMem.Timers[nIndex].bTon =	0;
+			KMem.Timers[nIndex].bTon =	0;
 		}
 	}
-	return PLCMem.Timers[nIndex].bTon;
+	SetCoilValue(KLCoilTypeT, nIndex, KMem.Timers[nIndex].bTon);	
+	return KMem.Timers[nIndex].bTon;
 }
 
 int IsTimerOn(int nIndex)
 {
 	if (nIndex >= TOTALTIMERS) return 0;
 	ProcessTimer(nIndex);
-	return PLCMem.Timers[nIndex].bTon;
+	return KMem.Timers[nIndex].bTon;
 
 }
 
@@ -142,164 +143,185 @@
 {
 	if (nIndex >= TOTALTIMERS) return 0;
 //	ProcessTimer(nIndex);	
-	return PLCMem.Timers[nIndex].SV;
+	return KMem.SV[nIndex];
 //	return 0;	
 }
 int GetTimerEV(int nIndex)
 {
 	if (nIndex >= TOTALTIMERS) return 0;
 //	ProcessTimer(nIndex);	
-	return PLCMem.Timers[nIndex].EV;
+	return KMem.EV[nIndex];
 //	return 0;
-}
-const unsigned short bitMasks[16]=
-{
-	0x1<<0,
-	0x1<<1,
-	0x1<<2,
-	0x1<<3,
-	0x1<<4,
-	0x1<<5,
-	0x1<<6,
-	0x1<<7,
-	0x1<<8,
-	0x1<<9,
-	0x1<<10,
-	0x1<<11,
-	0x1<<12,
-	0x1<<13,
-	0x1<<14,
-	0x1<<15,
-	
-};
-
-inline void SetAddrBit(unsigned short * pW, unsigned char bitAddr)
-{
-	(*pW)|=bitMasks[bitAddr&0xf];
-}
-
-inline void ResetBit(unsigned short * pW, unsigned char bitAddr)
-{
-	(*pW)&=~bitMasks[bitAddr&0xf];
-}
-
-static inline void SetBitValue(unsigned short * pW, unsigned char bitAddr, unsigned char Value)
-{
-	if (Value)	{	SetAddrBit(pW, bitAddr);}
-	else {ResetBit(pW, bitAddr);}
-}
-
-static inline unsigned char GetBitValue(unsigned short W, unsigned char bitAddr)
-{
-	if (W&bitMasks[bitAddr&0xf]) return 1;
-	else return 0;
-}
-
-int InitAllDFs()
-{
-	for (int i=0;i<TOTAL_WDFS;i++)
-	{
-		PLCMem.WDFs[i]=0;
-	}
-	return TOTAL_WDFS;
-}
-
-int IsDF(int nIndex, int bSet)
-{
-	unsigned short addr1 = (nIndex&0xff0)>>4;
-	unsigned char bitAddr=nIndex&0xf;
-	
-	if (addr1 >= TOTAL_WDFS) return 0;
-	if (!GetBitValue( PLCMem.WDFs[addr1],bitAddr) && bSet)
-	{
-		SetBitValue(&PLCMem.WDFs[addr1],bitAddr,1);
-		return 1;
-	}else
-	{
-		SetBitValue(&PLCMem.WDFs[addr1],bitAddr,bSet);
-	}
-	return 0;
 }
 
 int PushInVal(void)
 {
-	for (int i=TOTAL_CurVAL;i>0;i--)
+	for (int i=TOTAL_CurVAL -1 ;i>0;i--)
 	{
-		PLCMem.CurVALs[i]=PLCMem.CurVALs[i-1];
+		KMem.CurVALs[i]=KMem.CurVALs[i-1];
 	}
-	PLCMem.CurVALs[0]=PLCMem.CurVAL;
-	return PLCMem.CurVAL;
+	KMem.CurVALs[0]=KMem.CurVAL;
+	return KMem.CurVAL;
 }
 
 int PopOutVal(void)
 {
-	unsigned char theVAL=PLCMem.CurVALs[0];
+	unsigned char theVAL=KMem.CurVALs[0];
 	for (int i=0;i<TOTAL_CurVAL-1;i++)
 	{
-		PLCMem.CurVALs[i]=PLCMem.CurVALs[i+1];
+		KMem.CurVALs[i]=KMem.CurVALs[i+1];
 	}
 	return theVAL;
 }
 
-int ANS(int bValue)
+stBinProg1 const  prog1[]= //__attribute__((at(0X8008000)))
 {
-	return PLCMem.CurVAL;
-}
-int ORS(int bValue)
-{
-	return PLCMem.CurVAL;
-}
-
-int ST(int nAddr)
-{
-	return 0;
-}
-
-int AN(int nAddr)
-{
-	return 0;
-}
-
-int OR(int nAddr)
-{
-	return 0;
-}
-
-int AN_(int nAddr)
-{
-	return 0;
-}
-
-int OR_(int nAddr)
-{
-	return 0;
-}
-
-stPLCPROG const  prog1[]= //__attribute__((at(0X8008000)))
-{
-	{OP_ST,Addr_X,0},
-	{OP_OR,Addr_Y,0},
-	{OP_AN_,Addr_X,1},
-	{OP_OUT,Addr_Y,0},
+	{OP_ST,KLCoilTypeSR,13},
+	{OP_MV,0,50},	{KLDataTypeDEC,KLDataTypeDT,1},
+	{OP_MV,0,20},	{KLDataTypeDEC,KLDataTypeDT,2},
+	{OP_MV,0,30},	{KLDataTypeDEC,KLDataTypeDT,3},
+	{OP_MV,0,40},	{KLDataTypeDEC,KLDataTypeDT,4},
+	{OP_SET,KLCoilTypeR,0},
+//	{OP_SET,KLCoilTypeY,0},
 	
-	{OP_ST,Addr_X,2},
-	{OP_SET,Addr_R,1},
-	{OP_ST,Addr_X,3},
-	{OP_RESET,Addr_R,1},
-	
-	{OP_ST,Addr_R,1},
-	{OP_PSHS,0,0},	
-	{OP_AN_,Addr_Y,1},	
-	{OP_TML,5,25},
-	{OP_SET,Addr_Y,1},	
-	{OP_RESET,Addr_Y,2},	
+	{OP_ST,KLCoilTypeR,0},
+		{OP_TMX,1,1},	{KLDataTypeDT,0,0},
+		{OP_DF},
+		{OP_SET,KLCoilTypeR,10},
+		
+	{OP_ST,KLCoilTypeX,0},
+	{OP_DF},
+	{OP_SET,KLCoilTypeR,10},
 
-	{OP_POPS,0,0},
-	{OP_AN,Addr_Y,1},
-	{OP_TML,6,25},
-	{OP_RESET,Addr_Y,1},
-	{OP_SET,Addr_Y,2},
+	{OP_ST,KLCoilTypeX,1},
+	{OP_DF},
+	{OP_RESET,KLCoilTypeR,10},
+/*	
+	{OP_ST,KLCoilTypeR,10},
+	{OP_AN,KLCoilTypeR,51},	
+	{OP_AN,KLCoilTypeR,52},	
+	{OP_AN,KLCoilTypeR,53},	
+	{OP_ADD3,0,21},		{KLDataTypeDT,KLDataTypeDT,31},		{0,KLDataTypeDT,32},	
+
+	{OP_ST,KLCoilTypeR,10},
+	{OP_AN,KLCoilTypeR,54},	
+	{OP_AN,KLCoilTypeR,55},	
+	{OP_AN,KLCoilTypeR,56},	
+	{OP_ADD3,0,23},		{KLDataTypeDT,KLDataTypeDT,33},		{0,KLDataTypeDT,34},	
+*/
+	{OP_ST,KLCoilTypeSR,1},
+	{OP_PSHS},	
+	{OP_AN,KLCoilTypeR,51},	
+	{OP_OUT,KLCoilTypeY,1},	
+	{OP_RDS},	
+	{OP_AN,KLCoilTypeR,52},	
+	{OP_OUT,KLCoilTypeY,2},	
+	{OP_RDS},	
+	{OP_AN,KLCoilTypeR,53},	
+	{OP_OUT,KLCoilTypeY,3},	
+	{OP_RDS},	
+	{OP_AN,KLCoilTypeR,54},	
+	{OP_OUT,KLCoilTypeY,4},	
+	{OP_RDS},	
+	{OP_AN,KLCoilTypeR,55},	
+	{OP_OUT,KLCoilTypeY,5},	
+	{OP_POPS},	
+	{OP_AN,KLCoilTypeR,56},	
+	{OP_OUT,KLCoilTypeY,6},	
+
+	{OP_ST,KLCoilTypeR,10},
+	{OP_DF},
+	{OP_PSHS},	
+	{OP_MV,0,150},	{KLDataTypeDEC,KLDataTypeDT,11},
+	{OP_MV,0,30},	{KLDataTypeDEC,KLDataTypeDT,12},
+	{OP_RDS},	
+	{OP_MV,0,150},	{KLDataTypeDEC,KLDataTypeDT,13},
+	{OP_MV,0,30},	{KLDataTypeDEC,KLDataTypeDT,14},
+	{OP_POPS},	
+	{OP_AN_,KLCoilTypeR,11},	
+	{OP_AN_,KLCoilTypeR,12},	
+	{OP_AN_,KLCoilTypeR,13},	
+	{OP_AN_,KLCoilTypeR,14},	
+	{OP_SET,KLCoilTypeR,14},
+
+	{OP_ST,KLCoilTypeR,10},
+	{OP_PSHS},	
+	{OP_AN,KLCoilTypeR,11},	
+	{OP_DF},
+	{OP_SET,KLCoilTypeR,51},
+	{OP_RESET,KLCoilTypeR,52},
+	{OP_RESET,KLCoilTypeR,53},
+	{OP_RESET,KLCoilTypeR,54},
+	{OP_RESET,KLCoilTypeR,55},
+	{OP_SET,KLCoilTypeR,56},
+
+	{OP_RDS},	
+	{OP_AN,KLCoilTypeR,11},	
+
+		{OP_PSHS},	
+		{OP_TMX,11,11},	{KLDataTypeDT,0,0},
+			{OP_RESET,KLCoilTypeR,11},
+			{OP_SET,KLCoilTypeR,12},
+		{OP_POPS},
+			{OP_SUB3,0,11},		{KLDataTypeSV,KLDataTypeEV,11},		{0,KLDataTypeDT,21},		
+			{OP_AN_LE,0,21},{KLDataTypeDT,KLDataTypeDEC,30},
+			{OP_PSHS},	
+				{OP_DIV,0,21},		{KLDataTypeDT,KLDataTypeDEC,10},		{0,KLDataTypeDT,31},		
+			{OP_RDS},	
+				{OP_AN_GE,0,32},{KLDataTypeDT,KLDataTypeDEC,5},
+				{OP_SET,KLCoilTypeR,51},
+			{OP_POPS},
+				{OP_AN_LT,0,32},{KLDataTypeDT,KLDataTypeDEC,5},
+				{OP_RESET,KLCoilTypeR,51},
+	{OP_RDS},			
+	{OP_AN,KLCoilTypeR,12},	
+	{OP_DF},
+	{OP_RESET,KLCoilTypeR,51},
+	{OP_SET,KLCoilTypeR,52},
+	{OP_RDS},			
+	{OP_AN,KLCoilTypeR,12},	
+		{OP_TMX,12,12},	{KLDataTypeDT,0,0},
+			{OP_RESET,KLCoilTypeR,12},
+			{OP_SET,KLCoilTypeR,13},
+	{OP_POPS},
+	{OP_AN,KLCoilTypeR,12},	
+	{OP_OUT,KLCoilTypeR,52},	
 	
+	{OP_ST,KLCoilTypeR,10},
+	{OP_PSHS},	
+	{OP_AN,KLCoilTypeR,13},	
+	{OP_DF},
+	{OP_RESET,KLCoilTypeR,52},
+	{OP_SET,KLCoilTypeR,53},
+	{OP_SET,KLCoilTypeR,54},
+	{OP_RESET,KLCoilTypeR,56},
+	{OP_RDS},	
+	{OP_AN,KLCoilTypeR,13},	
+		{OP_TMX,13,13},	{KLDataTypeDT,0,0},
+			{OP_RESET,KLCoilTypeR,13},
+			{OP_SET,KLCoilTypeR,14},
+	{OP_RDS},	
+	{OP_AN,KLCoilTypeR,13},	
+			{OP_SUB3,0,13},		{KLDataTypeSV,KLDataTypeEV,13},		{0,KLDataTypeDT,23},		
+			{OP_AN_LE,0,23},{KLDataTypeDT,KLDataTypeDEC,30},
+			{OP_PSHS},	
+				{OP_DIV,0,23},		{KLDataTypeDT,KLDataTypeDEC,10},		{0,KLDataTypeDT,33},		
+			{OP_RDS},	
+				{OP_AN_GE,0,34},{KLDataTypeDT,KLDataTypeDEC,5},
+				{OP_SET,KLCoilTypeR,54},
+			{OP_POPS},
+				{OP_AN_LT,0,34},{KLDataTypeDT,KLDataTypeDEC,5},
+				{OP_RESET,KLCoilTypeR,54},
+	{OP_RDS},	
+	{OP_AN,KLCoilTypeR,14},	
+	{OP_DF},
+	{OP_RESET,KLCoilTypeR,54},
+	{OP_SET,KLCoilTypeR,55},
+	{OP_POPS},
+	{OP_AN,KLCoilTypeR,14},	
+		{OP_TMX,14,14},	{KLDataTypeDT,0,0},
+			{OP_RESET,KLCoilTypeR,14},
+			{OP_SET,KLCoilTypeR,11},
 };
 
 /*
@@ -315,159 +337,417 @@
 	{OP_RESET,Addr_Y,1},
 
 */
-int nSizeProg1=sizeof(prog1)/sizeof(stPLCPROG);
+int nSizeProg1=sizeof(prog1)/sizeof(stBinProg1);
 
-char * PLCPRG=
+int InitPLC()
 {
-	"ST X0\n\
-	AN X1\n\
-	ST Y0\n\
-	AN Y1\n\
-	ORS\n\
-	AN/ X2\n\
-	AN/ X3\n\
-	OT Y0\n\
-	OT Y1\n\
-	"
-};
-
-int InitPLCPROGStat()
-{
+	PLCMem.nScanCount=0;
+	for (int i=0;i<1024;i++){PLCMem.ProgTrace[i]=0;}
+	for (int i=0;i<16;i++)	{
+		KMem.WR[i]=0;
+	}
+	for (int i=0;i<256;i++)	{
+		KMem.DT[i]=0;
+	}
 	return 0;
 }
 
-unsigned char GetAddrValue(unsigned char AddrType, unsigned short Addr)
+int StartPLC()
 {
-		unsigned char thisValue;
-		unsigned short Addr1=(Addr&0xff0)>>4;
-		unsigned char bitAddr=Addr&0xf;
-		switch(AddrType)
-		{
-			case Addr_None:
-				break;
-			case Addr_X:
-				thisValue=GetBitValue( KMem.WX[Addr1],bitAddr);
-				break;
-			case Addr_Y:
-				thisValue=GetBitValue( KMem.WY[Addr1],bitAddr);
-				break;
-			case Addr_R:
-				thisValue=GetBitValue( KMem.WR[Addr1],bitAddr);
-				break;
-			case Addr_T:
-				thisValue=PLCMem.Timers[Addr].bTon;
-				break;
-			case Addr_L:
-				break;
-			default:
-				break;
-		}	
-		return thisValue;
+	PLCMem.nScanCount = 0;
+	for (int i=0;i<1024;i++){PLCMem.ProgTrace[i]=0;}
+	for (int i=0;i<16;i++)	{
+		KMem.WR[i]=0;
+	}
+	for (int i=0;i<256;i++)	{
+		KMem.DT[i]=0;
+	}
+	PLCMem.bPLCRunning=1;
+	return 0;
 }
-int SetAddrValue(unsigned char AddrType, unsigned short Addr, unsigned char Value)
+
+int StopPLC()
 {
-		unsigned short Addr1=(Addr&0xff0)>>4;
-		unsigned char bitAddr=Addr&0xf;
-		switch(AddrType)
-		{
-			case Addr_None:
-				break;
-			case Addr_X:
-				SetBitValue(&KMem.WX[Addr1],bitAddr,Value);
-				break;
-			case Addr_Y:
-				SetBitValue(&KMem.WY[Addr1],bitAddr,Value);
-			break;
-			case Addr_R:
-				SetBitValue(&KMem.WR[Addr1],bitAddr,Value);
-			break;
-			case Addr_T:
-				PLCMem.Timers[Addr].bTon=Value;
-				break;
-			case Addr_L:
-				break;
-			default:
-				break;
-		}	
-		return Value;
+	PLCMem.bPLCRunning=0;
+	return 0;
 }
-int ProcessPLCPROG(const stPLCPROG * prog,int nSize)
+
+int ProcessPLCBinProg(const stBinProg1 * pBinprog, int nStepSize)
 {
-	for (int i=0;i<nSize;i++)
+	if (!PLCMem.bPLCRunning) return 0;
+	
+	if (PLCMem.nScanCount == 0) {
+		SetCoilValue(KLCoilTypeSR, 13, 1);
+		SetCoilValue(KLCoilTypeSR, 0, 0);
+		SetCoilValue(KLCoilTypeSR, 1, 1);
+	}
+	else
 	{
-		unsigned char thisOP=prog[i].OP;
-		unsigned char thisAddrType=prog[i].AddrType;
-		unsigned short thisAddr=prog[i].Addr;
+		SetCoilValue(KLCoilTypeSR, 13, 0);
+		SetCoilValue(KLCoilTypeSR, 0, 0);
+		SetCoilValue(KLCoilTypeSR, 1, 1);
+	}
+	for (int i = 0; i < TOTAL_CurVAL; i++) {
+		KMem.CurVALs[i] = 0;
+	}
+	int CurPos = 0;
+//	stBinProg1 * pBinProg1;
+	stBinProg15 * pBinProg15;
+	stBinProg2 * pBinProg2;
+	stBinProg3 * pBinProg3;
+
+	int lastScanInputVal = 1;//??????,????????,? ?? ???
+
+	while (CurPos < nStepSize)
+	{
+		unsigned int nNextPos = 1;
+		unsigned int thisOP = pBinprog[CurPos].nOp;
+//		unsigned int nParamCount = 0
+		unsigned char thisAddrType = pBinprog[CurPos].nParamType;
+		unsigned short thisAddr = pBinprog[CurPos].nParamAddr;
+
+
 		switch (thisOP)
 		{
-			case OP_None:
-				break;
-			case OP_ST:
-				PushInVal();
-				PLCMem.CurVAL=GetAddrValue(thisAddrType, thisAddr);
-				break;
-			case OP_ST_:
-				PushInVal();
-				PLCMem.CurVAL=!GetAddrValue(thisAddrType, thisAddr);
-				break;
-			case OP_AN:
-			  PLCMem.CurVAL = PLCMem.CurVAL&&GetAddrValue(thisAddrType, thisAddr);
-				break;
-			case OP_AN_:
-				PLCMem.CurVAL = PLCMem.CurVAL && (!GetAddrValue(thisAddrType, thisAddr));
-				break;
-			case OP_OR:
-				PLCMem.CurVAL = PLCMem.CurVAL || GetAddrValue(thisAddrType, thisAddr);
-				break;
-			case OP_OR_:
-				PLCMem.CurVAL = PLCMem.CurVAL || (!GetAddrValue(thisAddrType, thisAddr));
-				break;
+//		case OP_NONE:
+//			break;
+		case OP_NOP:
+			break;
+			//??? ??
+		case OP_NOT:
+		case OP_ANS:
+		case OP_ORS:
+		case OP_PSHS:
+		case OP_RDS:
+		case OP_POPS:
+		case OP_DF:
+		case OP_DF_:
+			switch (thisOP)
+			{
 			case OP_NOT:
-				PLCMem.CurVAL = ! PLCMem.CurVAL;
+				KMem.CurVAL = !KMem.CurVAL;
+				break;
+			case OP_ANS:
+				KMem.CurVAL = PopOutVal() && KMem.CurVAL;
+				break;
+			case OP_ORS:
+				KMem.CurVAL = PopOutVal() || KMem.CurVAL;
 				break;
 			case OP_PSHS:
 				PushInVal();
 				break;
+			case OP_RDS:
+				KMem.CurVAL = KMem.CurVALs[0] != 0;
+				break;
 			case OP_POPS:
-				PLCMem.CurVAL = PopOutVal();
+				KMem.CurVAL = PopOutVal();
 				break;
-			case OP_ANS:
-				PLCMem.CurVAL = PLCMem.CurVAL && PopOutVal();
+			case OP_DF:
+				KMem.CurVAL = KMem.CurVAL && !lastScanInputVal;
 				break;
-			case OP_ORS:
-				PLCMem.CurVAL = PLCMem.CurVAL || PopOutVal();
+			case OP_DF_:
+				KMem.CurVAL = !KMem.CurVAL && lastScanInputVal;
 				break;
 
-			case OP_OUT:
-				SetAddrValue(thisAddrType,thisAddr,PLCMem.CurVAL);
-				break;
-			case OP_SET:
-				if (PLCMem.CurVAL) SetAddrValue(thisAddrType,thisAddr,1);
-				break;
-			case OP_RESET:
-				if (PLCMem.CurVAL) SetAddrValue(thisAddrType,thisAddr,0);
-				break;
-			case OP_DF:		
-				break;
-			case OP_TML:
-				if (!PLCMem.Timers[thisAddrType].nInited) InitTimer(thisAddrType,0);
-				if (PLCMem.CurVAL) StartTimer(thisAddrType,thisAddr);
-				else StopTimer(thisAddrType);
-				PLCMem.CurVAL = ProcessTimer(thisAddrType);
-			
-				break;
-			case OP_TMR:
-				if (!PLCMem.Timers[thisAddrType].nInited) InitTimer(thisAddrType,1);
-				if (PLCMem.CurVAL) StartTimer(thisAddrType,thisAddr);
-				else StopTimer(thisAddrType);
-				PLCMem.CurVAL = ProcessTimer(thisAddrType);
-				
-				break;
-			
-			
 			default:
 				break;
+			}
+			break;
+			// 1????
+		case OP_ST:
+		case OP_ST_:
+		case OP_AN:
+		case OP_AN_:
+		case OP_OR:
+		case OP_OR_:
+			switch (thisOP)
+			{
+			case OP_ST:
+				PushInVal();
+				KMem.CurVAL = GetCoilValue(thisAddrType, thisAddr);
+				break;
+			case OP_ST_:
+				PushInVal();
+				KMem.CurVAL = !GetCoilValue(thisAddrType, thisAddr);
+				break;
+			case OP_AN:
+				KMem.CurVAL = KMem.CurVAL&&GetCoilValue(thisAddrType, thisAddr);
+				break;
+			case OP_AN_:
+				KMem.CurVAL = KMem.CurVAL && (!GetCoilValue(thisAddrType, thisAddr));
+				break;
+			case OP_OR:
+				KMem.CurVAL = KMem.CurVAL || GetCoilValue(thisAddrType, thisAddr);
+				break;
+			case OP_OR_:
+				KMem.CurVAL = KMem.CurVAL || (!GetCoilValue(thisAddrType, thisAddr));
+				break;
+			default:
+				break;
+			}
+			break;
+			// 1 ?? ??
+		case OP_OUT:
+		case OP_SET:
+		case OP_RESET:
+			switch (thisOP)
+			{
+			case OP_OUT:
+				SetCoilValue(thisAddrType, thisAddr, KMem.CurVAL);
+				break;
+			case OP_SET:
+				if (KMem.CurVAL) SetCoilValue(thisAddrType, thisAddr, 1);
+				break;
+			case OP_RESET:
+				if (KMem.CurVAL) SetCoilValue(thisAddrType, thisAddr, 0);
+				break;
+			default:
+				break;
+			}
+			break;
+			// ????
+		case OP_ST_EQ:
+		case OP_ST_NE:
+		case OP_ST_LT:
+		case OP_ST_GT:
+		case OP_ST_LE:
+		case OP_ST_GE:
+		case OP_AN_EQ:
+		case OP_AN_NE:
+		case OP_AN_LT:
+		case OP_AN_GT:
+		case OP_AN_LE:
+		case OP_AN_GE:
+		case OP_OR_EQ:
+		case OP_OR_NE:
+		case OP_OR_LT:
+		case OP_OR_GT:
+		case OP_OR_LE:
+		case OP_OR_GE:
+			pBinProg2 = (stBinProg2 *)&pBinprog[CurPos];
+			thisAddrType = pBinProg2->nParamType1;
+
+			switch (thisOP)
+			{
+			case OP_ST_EQ:
+				PushInVal();
+				KMem.CurVAL = (GetVarData(thisAddrType, thisAddr) == GetVarData(pBinProg2->nParamType2, pBinProg2->nParamAddr2));
+				break;
+			case OP_ST_NE:
+				PushInVal();
+				KMem.CurVAL = (GetVarData(thisAddrType, thisAddr) != GetVarData(pBinProg2->nParamType2, pBinProg2->nParamAddr2));
+				break;
+			case OP_ST_LT:
+				PushInVal();
+				KMem.CurVAL = (GetVarData(thisAddrType, thisAddr) < GetVarData(pBinProg2->nParamType2, pBinProg2->nParamAddr2));
+				break;
+			case OP_ST_GT:
+				PushInVal();
+				KMem.CurVAL = (GetVarData(thisAddrType, thisAddr) > GetVarData(pBinProg2->nParamType2, pBinProg2->nParamAddr2));
+				break;
+			case OP_ST_LE:
+				PushInVal();
+				KMem.CurVAL = (GetVarData(thisAddrType, thisAddr) <= GetVarData(pBinProg2->nParamType2, pBinProg2->nParamAddr2));
+				break;
+			case OP_ST_GE:
+				PushInVal();
+				KMem.CurVAL = (GetVarData(thisAddrType, thisAddr) >= GetVarData(pBinProg2->nParamType2, pBinProg2->nParamAddr2));
+				break;
+			case OP_AN_EQ:
+				KMem.CurVAL = KMem.CurVAL && (GetVarData(thisAddrType, thisAddr) == GetVarData(pBinProg2->nParamType2, pBinProg2->nParamAddr2));
+				break;
+			case OP_AN_NE:
+				KMem.CurVAL = KMem.CurVAL && (GetVarData(thisAddrType, thisAddr) != GetVarData(pBinProg2->nParamType2, pBinProg2->nParamAddr2));
+				break;
+			case OP_AN_LT:
+				KMem.CurVAL = KMem.CurVAL && (GetVarData(thisAddrType, thisAddr) < GetVarData(pBinProg2->nParamType2, pBinProg2->nParamAddr2));
+				break;
+			case OP_AN_GT:
+				KMem.CurVAL = KMem.CurVAL && (GetVarData(thisAddrType, thisAddr) > GetVarData(pBinProg2->nParamType2, pBinProg2->nParamAddr2));
+				break;
+			case OP_AN_LE:
+				KMem.CurVAL = KMem.CurVAL && (GetVarData(thisAddrType, thisAddr) <= GetVarData(pBinProg2->nParamType2, pBinProg2->nParamAddr2));
+				break;
+			case OP_AN_GE:
+				KMem.CurVAL = KMem.CurVAL && (GetVarData(thisAddrType, thisAddr) >= GetVarData(pBinProg2->nParamType2, pBinProg2->nParamAddr2));
+				break;
+
+			case OP_OR_EQ:
+				KMem.CurVAL = KMem.CurVAL || (GetVarData(thisAddrType, thisAddr) == GetVarData(pBinProg2->nParamType2, pBinProg2->nParamAddr2));
+				break;
+			case OP_OR_NE:
+				KMem.CurVAL = KMem.CurVAL || (GetVarData(thisAddrType, thisAddr) != GetVarData(pBinProg2->nParamType2, pBinProg2->nParamAddr2));
+				break;
+			case OP_OR_LT:
+				KMem.CurVAL = KMem.CurVAL || (GetVarData(thisAddrType, thisAddr) < GetVarData(pBinProg2->nParamType2, pBinProg2->nParamAddr2));
+				break;
+			case OP_OR_GT:
+				KMem.CurVAL = KMem.CurVAL || (GetVarData(thisAddrType, thisAddr) > GetVarData(pBinProg2->nParamType2, pBinProg2->nParamAddr2));
+				break;
+			case OP_OR_LE:
+				KMem.CurVAL = KMem.CurVAL || (GetVarData(thisAddrType, thisAddr) <= GetVarData(pBinProg2->nParamType2, pBinProg2->nParamAddr2));
+				break;
+			case OP_OR_GE:
+				KMem.CurVAL = KMem.CurVAL || (GetVarData(thisAddrType, thisAddr) >= GetVarData(pBinProg2->nParamType2, pBinProg2->nParamAddr2));
+				break;
+
+			default:
+				break;
+			}
+			nNextPos = 2;
+			break;
+			// ???
+		case OP_TML:
+		case OP_TMR:
+		case OP_TMX:
+		case OP_TMY:
+			pBinProg15 = (stBinProg15 *)(&pBinprog[CurPos]);
+			{
+				unsigned char thisNum= pBinProg15->nOpNum;
+				thisAddrType = pBinProg15->nParamType1;
+				thisAddr = pBinProg15->nParamAddr1;
+				switch (thisOP)
+				{
+				case OP_TML:
+					if (!KMem.Timers[thisNum].nInited) InitTimer(thisNum, 0);
+					if (KMem.CurVAL) RunTimer(thisNum, GetVarData(thisAddrType, thisAddr));
+					else StopTimer(thisNum);
+					KMem.CurVAL = ProcessTimer(thisNum);
+
+					break;
+				case OP_TMR:
+					if (!KMem.Timers[thisNum].nInited) InitTimer(thisNum, 1);
+					if (KMem.CurVAL) RunTimer(thisNum, GetVarData(thisAddrType, thisAddr));
+					else StopTimer(thisNum);
+					KMem.CurVAL = ProcessTimer(thisNum);
+					break;
+				case OP_TMX:
+					if (!KMem.Timers[thisNum].nInited) InitTimer(thisNum, 2);
+					if (KMem.CurVAL) RunTimer(thisNum, GetVarData(thisAddrType, thisAddr));
+					else StopTimer(thisNum);
+					KMem.CurVAL = ProcessTimer(thisNum);
+
+					break;
+				case OP_TMY:
+					if (!KMem.Timers[thisNum].nInited) InitTimer(thisNum, 3);
+					if (KMem.CurVAL) RunTimer(thisNum, GetVarData(thisAddrType, thisAddr));
+					else StopTimer(thisNum);
+					KMem.CurVAL = ProcessTimer(thisNum);
+					break;
+				default:
+					break;
+				}
+
+			}
+			nNextPos = 2;
+			break;
+			// 1 ??????
+		case OP_INC:
+		case OP_DEC:
+			pBinProg15 = (stBinProg15 *)(&pBinprog[CurPos]);
+			thisAddrType = pBinProg15->nParamType1;
+			thisAddr = pBinProg15->nParamAddr1;
+			nNextPos = 2;
+			switch (thisOP)
+			{
+			case OP_INC:
+				if (KMem.CurVAL) SetVarData(thisAddrType, thisAddr, GetVarData(thisAddrType, thisAddr) + 1);
+				break;
+			case OP_DEC:
+				if (KMem.CurVAL) SetVarData(thisAddrType, thisAddr, GetVarData(thisAddrType, thisAddr) - 1);
+				break;
+
+			default:
+				break;
+			}
+			break;
+			// 2??????
+		case OP_MV:
+		case OP_ADD2:
+		case OP_SUB2:
+			pBinProg2 = (stBinProg2 *)(&pBinprog[CurPos]);
+			{
+				int nParamType2, nParamAddr2;
+				thisAddrType = pBinProg2->nParamType1;
+				thisAddr = pBinProg2->nParamAddr1;
+				nParamType2 = pBinProg2->nParamType2;
+				nParamAddr2 = pBinProg2->nParamAddr2;
+
+				switch (thisOP)
+				{
+				case OP_MV:
+					if (KMem.CurVAL) SetVarData(nParamType2, nParamAddr2, GetVarData(thisAddrType, thisAddr));
+					break;
+				case OP_ADD2:
+					if (KMem.CurVAL) SetVarData(nParamType2, nParamAddr2, GetVarData(thisAddrType, thisAddr) + GetVarData(nParamType2, nParamAddr2));
+					break;
+				case OP_SUB2:
+					if (KMem.CurVAL) SetVarData(nParamType2, nParamAddr2, GetVarData(nParamType2, nParamAddr2) - GetVarData(thisAddrType, thisAddr));
+					break;
+
+				default:
+					break;
+				}
+
+			}
+			nNextPos = 2;
+			break;
+			// 3 ??????
+		case OP_ADD3:
+		case OP_SUB3:
+		case OP_MUL:
+		case OP_DIV:
+			pBinProg3 = (stBinProg3 *)(&pBinprog[CurPos]);
+			int nParamType2, nParamAddr2;
+			int nParamType3, nParamAddr3;
+			thisAddrType = pBinProg3->nParamType1;
+			thisAddr = pBinProg3->nParamAddr1;
+			nParamType2 = pBinProg3->nParamType2;
+			nParamAddr2 = pBinProg3->nParamAddr2;
+			nParamType3 = pBinProg3->nParamType3;
+			nParamAddr3 = pBinProg3->nParamAddr3;
+			switch (thisOP)
+			{
+			case OP_ADD3:
+				if (KMem.CurVAL) SetVarData(nParamType3, nParamAddr3, GetVarData(thisAddrType, thisAddr) + GetVarData(nParamType2, nParamAddr2));
+				break;
+			case OP_SUB3:
+				if (KMem.CurVAL) SetVarData(nParamType3, nParamAddr3, GetVarData(thisAddrType, thisAddr) - GetVarData(nParamType2, nParamAddr2));
+				break;
+			case OP_MUL:
+				if (KMem.CurVAL) {
+					short multiplicand = GetVarData(thisAddrType, thisAddr);
+					short multiplier = GetVarData(nParamType2, nParamAddr2);
+					int product = multiplicand * multiplier;
+					SetVarData(nParamType3, nParamAddr3, product);
+					SetVarData(nParamType3, nParamAddr3 + 1, product >> 16);
+				}
+				break;
+			case OP_DIV:
+				if (KMem.CurVAL) {
+					short dividend = GetVarData(thisAddrType, thisAddr);
+					short divisor = GetVarData(nParamType2, nParamAddr2);
+					short quotient = dividend / divisor;
+					short remainder = dividend % divisor;
+					SetVarData(nParamType3, nParamAddr3, quotient);
+					SetVarData(nParamType3, nParamAddr3 + 1, remainder);
+				}
+				break;
+
+			default:
+				break;
+			}
+			nNextPos = 3;
+			break;
+
+		default:
+			break;
 		}
+
+		lastScanInputVal = PLCMem.ProgTrace[CurPos];
+		PLCMem.ProgTrace[CurPos] = KMem.CurVAL;
+		CurPos += nNextPos;
 	}
+	PLCMem.nScanCount++;
 	return 0;
 }
diff --git a/Src/debug.c b/Src/debug.c
new file mode 100644
index 0000000..539d1ac
--- /dev/null
+++ b/Src/debug.c
@@ -0,0 +1,307 @@
+/**
+  ******************************************************************************
+  * @file           : debug.c
+  * @brief          : debug functions program body
+  ******************************************************************************
+	*/
+#include "debug.h"
+#include "globaldef.h"
+#include "functions.h"
+#include "string.h"
+#include "modbusRTU.h"
+
+#include "stm32f0xx_hal.h"
+
+#define ADCrefAddr 0x1FFFF7BA
+
+int sprintftime = 0;
+int putstrtime = 0;
+const unsigned char buf1[16]={0x11,0x22,0x33,0x44,0x55,0x66,0x77,0x88,0x99,0xaa,0xbb,0xcc,0xdd,0xee,0xff,0x00};
+char str1[256];
+int LineCount=0;
+int Uart1baudval=0;	
+int Uart2baudval=0;	
+
+__asm int add1(int a,int b)
+{
+	add r0,r1,r0
+	BLX    lr
+}
+
+void clearscreen()
+{
+	PutStr("\33[2J\33[0;0H",10);
+	return;
+}
+
+void Locate(int y,int x)
+{
+		char str[16];
+		int len;
+		len=sprintf(str," \33[%d;%dH",y,x);
+		PutStr(str,len);
+		return;
+}
+
+int FormatHex(char * buf1, unsigned char * data, int n)
+{
+	int len1=0;
+		for (int i=0;i<n;i++)
+		{len1+=sprintf(buf1+len1,"%02X ",data[i]);}
+		len1+=sprintf(buf1+len1,"\r\n");	
+	return len1;
+}
+
+int ShowInitInfo()
+{
+	int len1=0;
+	clearscreen();
+	uint32_t us1,us2,us3,us4,us5,us6;
+
+//	Locate(1,1);
+
+/*	
+	LoadFlashDatas();
+	
+	LoadAndUpdateStoreCfg();
+	
+	HAL_StatusTypeDef res;	
+	stStoreCfg * pFCfg = (stStoreCfg *) GetCurStoreCfgAddr();
+	stStoreCfg * pFCfg2 = GetNextStoreCfgAddr(pFCfg);	
+
+int t11=GetuS();
+	
+	for (int i=0;i<20;i++)
+	{
+		tims[i]=GetuS();
+	}		
+	clearscreen();
+	len1+=sprintf(str1+len1," Ver 001 \r\n");
+	len1+=sprintf(str1+len1," Uart1Baud %d Uart2Baud %d  UID  %08x %08x %08x \r\n",Uart1Baud,Uart2Baud,pUID[0],pUID[1],pUID[2]);
+	len1+=sprintf(str1+len1," Flash = %d %d %d %d  res = %d   ",FlashDatas[0],FlashDatas[1],FlashDatas[2],FlashDatas[3],res);
+	len1+=sprintf(str1+len1,"flash operation = %u %u %u\r\n",t11-t10,t10,t11);
+	PutStr(str1,len1);
+	len1=0;
+	len1+=sprintf(str1+len1,"%08X  %X %X , PowerOn %X  UpTime %X %X %X %X \r\n",
+	(uint32_t)pFCfg,pFCfg[0].Sign1,pFCfg[0].SN1,pFCfg[0].PowerCount,pFCfg[0].UpTime,pFCfg[0].UserData1,pFCfg[0].CRC1,pFCfg[0].EndSign1);
+	len1+=sprintf(str1+len1,"%08X  %X %X , PowerOn %X  UpTime %X %X %X %X \r\n",
+	(uint32_t)pFCfg2,Cfg2.Sign1,Cfg2.SN1,Cfg2.PowerCount,Cfg2.UpTime,Cfg2.UserData1,Cfg2.CRC1,Cfg2.EndSign1);
+	PutStr(str1,len1);
+*/	
+	len1=0;
+/*	
+	for (int i=0;i<8;i++)
+	{
+		len1=0;
+		len1+=sprintf(str1+len1,"%02X:",i*32);
+		for (int j=0;j<8;j++)
+		{
+				len1+=sprintf(str1+len1," %02X",pFlash1[i*32+j]);
+		}
+				len1+=sprintf(str1+len1,"  %02X",pFlash1[i*32+8]);
+		for (int j=9;j<16;j++)
+		{
+				len1+=sprintf(str1+len1," %02X",pFlash1[i*32+j]);
+		}
+				len1+=sprintf(str1+len1," | %02X",pFlash1[i*32+16]);
+		for (int j=17;j<24;j++)
+		{
+				len1+=sprintf(str1+len1," %02X",pFlash1[i*32+j]);
+		}
+				len1+=sprintf(str1+len1,"  %02X",pFlash1[i*32+24]);
+		for (int j=25;j<32;j++)
+		{
+				len1+=sprintf(str1+len1," %02X",pFlash1[i*32+j]);
+		}
+		len1+=sprintf(str1+len1,"\r\n");
+		PutStr(str1,len1);
+	}
+*/	
+	us1=GetuS();
+	int crc1 = crc_check(buf1,16);		//7us
+	us2=GetuS();
+	int crc2 = crc16bitbybit(buf1,16);	//45us
+	us3=GetuS();
+	int crc3 = crc16table(buf1, 16);		//9us
+	us4=GetuS();
+  int crc4 = crc16tablefast(buf1, 16);	//12uS
+	us5=GetuS();
+	LL_CRC_ResetCRCCalculationUnit(CRC);
+	LL_CRC_SetInitialData(CRC,0xFFFFFFFF);
+	LL_CRC_SetInitialData(CRC,0xA001);
+	for (int i=0;i<16;i++)
+	{
+		LL_CRC_FeedData8(CRC,buf1[i]);
+	}
+	int crc5 = LL_CRC_ReadData32(CRC);		//5uS
+	us6=GetuS();
+	
+		len1+=sprintf(str1+len1,"\r\nCRC  %04X  %04X  %04X  %04X  %04X\r\n",crc1,crc2,crc3,crc4,crc5);
+		len1+=sprintf(str1+len1,"time %04d  %04d  %04d  %04d  %04d\r\n",us2-us1,us3-us2,us4-us3,us5-us4,us6-us5);
+//		Uart1baudval = HAL_RCC_GetPCLK1Freq() / USART1->BRR;	
+//		len1+=sprintf(str1+len1,"PCL1 %d, BRR %d Baud %d \r\n",HAL_RCC_GetPCLK1Freq(),USART1->BRR,Uart1baudval);
+//		int periphclk = LL_RCC_GetUSARTClockFreq(LL_RCC_USART1_CLKSOURCE);
+//		len1+=sprintf(str1+len1,"periphclk %d \r\n",periphclk);
+	  LL_RCC_ClocksTypeDef RCC_Clocks;
+	
+		LL_RCC_GetSystemClocksFreq(&RCC_Clocks);
+		int pllsource = LL_RCC_PLL_GetMainSource();
+		len1+=sprintf(str1+len1,"MainSource %x %d \r\n",pllsource,pllsource);
+		
+		int sysclk = RCC_Clocks.SYSCLK_Frequency;
+		len1+=sprintf(str1+len1,"sysclk %d \r\n",sysclk);
+	
+		PutStr(str1,len1);
+
+		
+//	InitTimer(0,0);
+//	InitTimer(1,1);
+//	InitTimer(2,2);
+//	InitTimer(3,3);
+	
+//	RunTimer(0,1000);
+//	StartTimer(2,1000);
+	Locate(13,1);LineCount=3;
+	return 0;
+}
+
+int ShowRunningInfo()
+{
+			int Clk1=SysTick->VAL;			
+			if (Uart1BaudFirstGot)
+			{
+				Uart1baudval = HAL_RCC_GetPCLK1Freq() / USART1->BRR;
+				Uart1BaudFirstGot=0;
+			}
+			if (Uart2BaudFirstGot)
+			{
+				Uart2baudval = HAL_RCC_GetPCLK1Freq() / USART2->BRR;
+				Uart2BaudFirstGot=0;
+			}		
+			int Reload=SysTick->LOAD;
+
+			int Clk2=SysTick->VAL;
+			//int us2=GetuS();
+			int haltick=HAL_GetTick();
+			int len1=0;
+			uint32_t theUs = GetuS();
+			int nRunCount2=KMem.nRunCount;
+			if (!Uart1Stat.QTx.bEmpty) return 0;
+			
+			if ( (nRunCount2 & 0xff) == 0x03)
+			{
+				Locate(13,1);LineCount=3;
+			} else	if ((nRunCount2 & 0xff) == 0x0f)
+			{
+				int timeus1;
+				int timeus2;
+		
+				len1=sprintf((char *)str1," N %8d Tk %8d %9u CFG %02X R %d M %d S %d %4d IN %04X OUT %04X  \r\n",
+					KMem.nRunCount, haltick, theUs, KMem.EffJumperSW, bKBusRepeater, bKBusMaster, bKBusSlave, Clk2, KMem.WX[0],KMem.WY[0]);
+				//len1=sprintf((char *)str1,"U%02X%02XA",x2,x2);
+				// Locate(10,1);
+				timeus1=GetuS();
+				PutStr(str1,len1);
+				timeus2=GetuS();
+				sprintftime = timeus1 - theUs;
+				putstrtime = timeus2 - timeus1;
+//				if (IsTimerOn(0)) {RunTimer(1,1000);StopTimer(3);}
+//				if (IsTimerOn(1)) {RunTimer(2,100);StopTimer(0);}
+//				if (IsTimerOn(2)) {RunTimer(3,10);StopTimer(1);}
+//				if (IsTimerOn(3)) {RunTimer(0,10000);StopTimer(2);}
+		  }
+			if ((nRunCount2 & 0xff) == 0x2f && 0)
+			{
+
+		  }	
+			if ((nRunCount2 & 0xff) == 0x0af)
+			{
+				
+		  }				
+			return 0;
+}
+
+
+int ADCProcess()
+{
+	// ADC channels
+	//  0 -- 24V  --> 0
+	//  1 -- 5V   --> 2
+	//	2 -- 
+	//  3 -- 
+	//  4 -- 
+	//  5 -- 
+	//  6 -- 
+	//  7 -- 
+	//  8 -- 
+	//						 --> 5
+	// 16 -- Temp  --> 6
+	// 17 -- Vref  --> 7
+
+	uint16_t ADC_ConvertedValue=0;
+static int CurChannel=LL_ADC_CHANNEL_0;
+//static int waitcount = 0;
+	
+				if (!LL_ADC_REG_IsConversionOngoing(ADC1))
+				{
+					//waitcount++;
+					//if (waitcount<2) return 0;
+					//waitcount=0;
+					ADC_ConvertedValue = LL_ADC_REG_ReadConversionData12(ADC1);
+					
+		//			ADC_RegularChannelConfig(LL_ADC_CHANNEL_17,);
+					int channels = CurChannel ;//LL_ADC_REG_GetSequencerChannels(ADC1);
+					int nextchannel = LL_ADC_CHANNEL_0;
+					if ((channels & LL_ADC_CHANNEL_0) == LL_ADC_CHANNEL_0)
+					{
+						KMem.ADCValues[0] = ADC_ConvertedValue;
+						nextchannel = LL_ADC_CHANNEL_8;
+					}else if ((channels & LL_ADC_CHANNEL_8) == LL_ADC_CHANNEL_8)
+					{
+						KMem.ADCValues[2] = ADC_ConvertedValue;						
+						nextchannel = LL_ADC_CHANNEL_TEMPSENSOR;
+						if (KMem.ADCValues[2] < 2200) 
+						{
+							PowerDownEvent=1;
+						}else 
+						{
+							PowerDownEvent=0;
+						}
+					}else if ((channels & LL_ADC_CHANNEL_16) == LL_ADC_CHANNEL_16)
+					{
+						KMem.ADCValues[6] = ADC_ConvertedValue;		
+							nextchannel = LL_ADC_CHANNEL_VREFINT;
+					}else if ((channels & LL_ADC_CHANNEL_17) == LL_ADC_CHANNEL_17)
+					{
+						KMem.ADCValues[7] = ADC_ConvertedValue;						
+						KMem.ADCValues[5] = *((unsigned short *)ADCrefAddr);
+						
+						nextchannel = LL_ADC_CHANNEL_0;
+					}else
+					{
+						//ADCValues[0] = ADC_ConvertedValue;						
+					}
+					//nextchannel = LL_ADC_CHANNEL_VREFINT;
+					LL_ADC_REG_SetSequencerChannels(ADC1,nextchannel);					
+					LL_ADC_REG_StartConversion(ADC1);
+					CurChannel = nextchannel;
+				}	
+	return 0;
+}
+
+int PowerDownProcess(void )
+{
+	AddEventLog(KMem.CurTimeSec,EventTypePowerDown,1,12345);
+	SaveRunStat(&KMRunStat);
+	KMem.PwrFailCount++;
+	KMem.LastPwrFailTime = KMem.CurTimeSec;
+	return 0;
+}
+
+int PowerRecoverProcess(void)
+{
+	KMem.PwrFailCount++;
+	
+	return 0;
+}
+
diff --git a/Src/functions.c b/Src/functions.c
index 23159a9..cfc6d57 100644
--- a/Src/functions.c
+++ b/Src/functions.c
@@ -8,6 +8,9 @@
 #include "functions.h"
 #include "string.h"
 #include "stm32f0xx_hal.h"
+#if (BOARD_TYPE == 14)
+#include "fp0.h"
+#endif
 extern __IO uint32_t uwTick;
 //#include "Myprotocol.h"
 int TickFreq=10000;
@@ -51,6 +54,7 @@
 //	unsigned short Clk1=SysTick->VAL;
 		return nCurTick;
 }
+
 const unsigned short crc16_table[256] = {
 0x0000, 0x1189, 0x2312, 0x329b, 0x4624, 0x57ad, 0x6536, 0x74bf,
 0x8c48, 0x9dc1, 0xaf5a, 0xbed3, 0xca6c, 0xdbe5, 0xe97e, 0xf8f7,
@@ -89,11 +93,11 @@
 unsigned short crc_check(const unsigned char * data, unsigned int  length)
 {
 unsigned short crc_reg = 0xFFFF;
-while (length--)
-{
-crc_reg = (crc_reg >> 8) ^ crc16_table[(crc_reg ^ *data++) & 0xff];
-}
-return (~crc_reg) & 0xFFFF;
+	while (length--)
+	{
+	crc_reg = (crc_reg >> 8) ^ crc16_table[(crc_reg ^ *data++) & 0xff];
+	}
+	return (~crc_reg) & 0xFFFF;
 }
 
 const uint16_t polynom = 0xA001;
@@ -123,7 +127,7 @@
 	return(crc);
 }
  
-/* Table of CRC values for high杘rder byte */
+/* Table of CRC values for high-order byte */
 const uint8_t crctablehi[] = {
 	0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81,
 	0x40, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0,
@@ -144,7 +148,7 @@
 	0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81,
 	0x40
 };
-/* Table of CRC values for low杘rder byte */
+/* Table of CRC values for low-order byte */
 const uint8_t crctablelo[] = {
 	0x00, 0xC0, 0xC1, 0x01, 0xC3, 0x03, 0x02, 0xC2, 0xC6, 0x06, 0x07, 0xC7, 0x05, 0xC5, 0xC4,
 	0x04, 0xCC, 0x0C, 0x0D, 0xCD, 0x0F, 0xCF, 0xCE, 0x0E, 0x0A, 0xCA, 0xCB, 0x0B, 0xC9, 0x09,
@@ -180,26 +184,6 @@
 	return (crchi << 8 | crclo);
 }
  
-const uint16_t crctalbeabs[] = { 
-	0x0000, 0xCC01, 0xD801, 0x1400, 0xF001, 0x3C00, 0x2800, 0xE401, 
-	0xA001, 0x6C00, 0x7800, 0xB401, 0x5000, 0x9C01, 0x8801, 0x4400 
-};
- 
-uint16_t crc16tablefast(const uint8_t *ptr, uint16_t len) 
-{
-	uint16_t crc = 0xffff; 
-	uint16_t i;
-	uint8_t ch;
- 
-	for (i = 0; i < len; i++) {
-		ch = *ptr++;
-		crc = crctalbeabs[(ch ^ crc) & 15] ^ (crc >> 4);
-		crc = crctalbeabs[((ch >> 4) ^ crc) & 15] ^ (crc >> 4);
-	} 
-	
-	return crc;
-}
- 
 void modbuscrc16test()
 {
 	printf("\n");
@@ -207,7 +191,7 @@
 	printf("-----------------------------------------------------------------------\n");
 	uint8_t crc16_data[] = { 0x01, 0x04, 0x04, 0x43, 0x6b, 0x58, 0x0e };	// expected crc value 0xD825.
 	printf(" modbus crc16table test, expected value : 0xd825, calculate value : 0x%x\n", crc16table(crc16_data, sizeof(crc16_data)));
-	printf(" modbus crc16tablefast test, expected value : 0xd825, calculate value : 0x%x\n", crc16tablefast(crc16_data, sizeof(crc16_data)));
+//	printf(" modbus crc16tablefast test, expected value : 0xd825, calculate value : 0x%x\n", crc16tablefast(crc16_data, sizeof(crc16_data)));
 	printf(" modbus crc16bitbybit test, expected value : 0xd825, calculate value : 0x%x\n", crc16bitbybit(crc16_data, sizeof(crc16_data)));
 }
 
@@ -243,6 +227,19 @@
 		return 0;
 }
 
+int Uart2RecvDMA(void * pBuf, int nSize)
+{
+	LL_DMA_DisableChannel(DMA1,LL_DMA_CHANNEL_5);
+	LL_DMA_ConfigAddresses(DMA1,LL_DMA_CHANNEL_5, (uint32_t)&USART2->RDR,
+         (uint32_t)pBuf, LL_DMA_DIRECTION_PERIPH_TO_MEMORY);
+	LL_DMA_SetDataLength(DMA1,LL_DMA_CHANNEL_5,nSize);
+	LL_DMA_EnableChannel(DMA1,LL_DMA_CHANNEL_5);
+	Uart2Stat.DMARecvLen=nSize;
+	Uart2Stat.Recving=1;	
+	LL_DMA_EnableIT_TC(DMA1,LL_DMA_CHANNEL_5);
+	LL_USART_EnableDMAReq_RX(USART2);	
+	return 0;
+}
 int Uart2SendDMA(void * pData, int nSize)
 {
 	LL_DMA_DisableChannel(DMA1,LL_DMA_CHANNEL_4);
@@ -265,6 +262,90 @@
 		}
 		return 0;
 }
+
+void TriggerPendSV()
+{
+	  SCB->ICSR=SCB_ICSR_PENDSVSET_Msk; //1<<SCB_ICSR_PENDSVSET_Pos;
+}
+
+void PendSvCallBack()
+{
+#if (BOARD_TYPE == 14)
+///*	
+		if (bSPI1RecvDone)
+		{
+			bSPI1RecvDone=0;
+			ParseFP0Pkg(SPI1RecvBuf,nSPI1RecvLenInBuf);
+		}
+//*/	
+#endif		
+	if (Uart2Stat.bPacketRecved)
+	{
+		ParsePacket(2, (pPacket)Uart2RecvBuf1, Uart2RecvBuf1DataLen);		
+		Uart2RecvBuf1DataLen=0;
+		Uart2Stat.bPacketRecved=0;
+		Uart2RecvDMA(Uart2RecvBuf1,sizeof(Uart2RecvBuf1));		
+	}
+}
+
+void SPI1_IRQ_CallBack()
+{
+		uint8_t value;
+//	LL_GPIO_TogglePin(GPIOB,LL_GPIO_PIN_7);
+	 if (LL_SPI_IsActiveFlag_RXNE(SPI1))
+	 {
+		 	value = LL_SPI_ReceiveData8( SPI1);
+#if (BOARD_TYPE == 14)
+			KMem.SDD[62]++;
+			KMem.SDT[122]++;
+		 if (!bSPI1Sending)
+		 {
+		 	 KMem.SDB[128+KMem.SDT[123]] = value;
+			 KMem.SDT[123]++; 	 if (KMem.SDT[123]>=100) {KMem.SDT[123]=81;}
+		 }
+		 if (!bSPI1Sending && (1 || bSPI1Recving))
+		 {
+			 SPI1RecvBuf[nSPI1RecvPos]=value;
+			 nSPI1RecvPos++;
+			 
+			 if (value==0x0d)
+			 {
+		 	 KMem.SDB[128+KMem.SDT[123]] = nSPI1RecvPos;
+			 KMem.SDT[123]++; 	 if (KMem.SDT[123]>=100) {KMem.SDT[123]=81;}
+
+				 nSPI1RecvLenInBuf=nSPI1RecvPos;
+				 bSPI1RecvDone=1;
+				 nSPI1RecvPos=0;
+				 bSPI1Recving=0;
+				 
+			 
+				 TriggerPendSV();
+			 }
+		 }
+		 if (bSPI1Sending)
+		 {
+				 nSPI1SentLen++;
+				 KMem.SDD[63]++;
+			 
+			 if (nSPI1SentLen >= nSPI1ToSendLen) {
+				 SetACKPin_1();
+				 bSPI1Sending=0;
+				 bSPI1SendDone=1;
+				 bSPI1Recving=1;
+				 nSPI1RecvPos=0;
+				 SetFP0DEPin_0();
+			 }
+			 else {
+				 value = SPI1SendBuf[nSPI1SentLen];
+				 LL_SPI_TransmitData8(SPI1,value);
+				 KMem.SDB[128+KMem.SDT[123]] = value;
+				 KMem.SDT[123]++; 	 if (KMem.SDT[123]>=100) {KMem.SDT[123]=81;}			 
+			 }
+		 }
+#endif		 
+	 }	 
+}
+
 void Uart1SendDone()
 {
 	Uart1Stat.TcCount++;
@@ -275,9 +356,12 @@
 {
 		Uart1Stat.IdelCount++;
 //		NVIC_SetPendingIRQ(PendSV_IRQn);
+//	  SCB->ICSR=SCB_ICSR_PENDSVSET_Msk; //1<<SCB_ICSR_PENDSVSET_Pos;
+	
 	if (Uart1RecvBuf1DataLen >0)
 	{
 		Uart1Stat.bPacketRecved=1;
+//	  SCB->ICSR=SCB_ICSR_PENDSVSET_Msk; //1<<SCB_ICSR_PENDSVSET_Pos;
 //		KLParsePacket(Uart1RecvBuf1,Uart1RecvBuf1DataLen);
 //		Uart1RecvBuf1DataLen=0;
 	}
@@ -289,19 +373,21 @@
 }
 void Uart2RecvDone()
 {
+	Uart2RecvBuf1DataLen=sizeof(Uart2RecvBuf1) - LL_DMA_GetDataLength(DMA1,LL_DMA_CHANNEL_5);
 	Uart2Stat.bPacketRecved=1;
 	Uart2Stat.IdelCount++;
-	ParsePacket((pPacket)Uart2RecvBuf1,Uart2RecvBuf1DataLen);
-	Uart2RecvBuf1DataLen=0;
+	if (Uart2RecvBuf1DataLen>0)
+		TriggerPendSV();
+	//	ParsePacket((pPacket)Uart2RecvBuf1,Uart2RecvBuf1DataLen);
 }
 
 int PutStr(char * str1, int len1)
 {
 //	Uart1SendDMA(str1,len1);
-	//PushIn(&Uart1Stat.QTx,str1,len1);
+	PushIn(&Uart1Stat.QTx,str1,len1);
 //	LL_USART_EnableIT_TXE(USART1);   
 //	LL_USART_EnableIT_TC(USART1); 	
-	//Uart1TriggerSendDMA();
+	Uart1TriggerSendDMA();
 	return len1;
 }
 int PutStr1(char * str1, int len1)
@@ -315,29 +401,30 @@
 }
 int PutStr2(char * str1, int len1)
 {
-//	Uart1SendDMA(str1,len1);
-	PushIn(&Uart2Stat.QTx,str1,len1);
+	Uart2SendDMA(str1,len1);
+//	PushIn(&Uart2Stat.QTx,str1,len1);
 //	LL_USART_EnableIT_TXE(USART1);   
 //	LL_USART_EnableIT_TC(USART1); 	
-	Uart2TriggerSendDMA();
+//	Uart2TriggerSendDMA();
 	return len1;
 }
 
-void clearscreen()
+int SendPacket(int nChn, void * pBuf,int len1)
 {
-	PutStr("\33[2J\33[0;0H",10);
-	return;
+	if (nChn==1) 	{
+		PutStr1((char *)pBuf,len1);
+//	PushIn(&Uart1Stat.QTx,p1,len1);
+//	Uart1TriggerSendDMA();
+		Uart1Stat.SentPacket++;		
+	}else if (nChn==2){
+		PutStr2((char *)pBuf,len1);	
+//	PushIn(&Uart2Stat.QTx,p1,len1);
+//	Uart2TriggerSendDMA();	
+		Uart2Stat.SentPacket++;		
+	}
+		return len1;
 }
-
-void Locate(int y,int x)
-{
-		char str[16];
-		int len;
-		len=sprintf(str," \33[%d;%dH",y,x);
-		PutStr(str,len);
-		return;
-}
-
+/*
 int SendPacket1(void * pBuf,int len1)
 {
 		PutStr1((char *)pBuf,len1);
@@ -354,9 +441,18 @@
 		Uart2Stat.SentPacket++;
 	return len1;
 }
-
+*/
 void ToggleRunLed() {	LL_GPIO_TogglePin(GPIOC,LL_GPIO_PIN_13);}
 void ToggleErrLed() {	LL_GPIO_TogglePin(GPIOC,LL_GPIO_PIN_14);}
+#if (BOARD_TYPE == 14)
+void ToggleOutStat() {	LL_GPIO_TogglePin(GPIOC,LL_GPIO_PIN_15);}
+
+void SetOutStat(uchar bOn)
+{
+	if (bOn) {LL_GPIO_SetOutputPin(GPIOC,LL_GPIO_PIN_15);}
+	else {LL_GPIO_ResetOutputPin(GPIOC,LL_GPIO_PIN_15);}	
+}
+#else
 void ToggleOutStat() {	LL_GPIO_TogglePin(GPIOA,LL_GPIO_PIN_11);}
 
 void SetOutStat(uchar bOn)
@@ -364,6 +460,7 @@
 	if (bOn) {LL_GPIO_SetOutputPin(GPIOA,LL_GPIO_PIN_11);}
 	else {LL_GPIO_ResetOutputPin(GPIOA,LL_GPIO_PIN_11);}	
 }
+#endif
 
 void SetRunLed(uchar bOn)
 {
@@ -390,6 +487,7 @@
 unsigned int Input165_8()
 {
 	int x1=0;
+	__disable_irq();
 	set165SL_0();	set165SL_1();
 	unsigned int mask1=0x0080;
 	volatile uint32_t * p1=&GPIOA->IDR;
@@ -405,12 +503,14 @@
 		mask1>>=1;
 		set165CLK_1();
 	}
+	__enable_irq();
 	return x1;
 }
 
 unsigned int Input165(int nBit)
 {
 	int x1=0;
+	__disable_irq();
 	set165SL_0();	set165SL_1();
 	unsigned int mask1=1<<(nBit-1);
 	volatile uint32_t * p1=&GPIOA->IDR;
@@ -426,11 +526,12 @@
 		mask1>>=1;
 		set165CLK_1();
 	}
+	__enable_irq();
 	return x1;
 }
 unsigned int Input165_R(int nBit)
 {
-	
+	__disable_irq();
 	set165SL_0();	set165SL_1();
 	int nBytes = nBit /8;
 	volatile uint32_t * p1=&GPIOA->IDR;
@@ -458,13 +559,14 @@
 		}
 		rdata.Bytes[i]=x1;
 	}
-	
+	__enable_irq();
 	return rdata.intvalue;
 }
 
 unsigned int Input165Cfg(int nBit)
 {
 	int x1=0;
+	__disable_irq();
 	set165SL_0();	set165SL_1();
 	unsigned int mask1=1<<(nBit-1);
 	volatile uint32_t * p1=&GPIOA->IDR;
@@ -480,6 +582,7 @@
 		mask1>>=1;
 		set165CLK_1();
 	}
+	__enable_irq();
 	return x1;
 }
 
@@ -509,6 +612,12 @@
 						return Input165_R(8);
 		case 11:
 						return Input165_R(8);
+		case 13:
+						return Input165_R(16);
+		case 14:
+					 return 0;	//FP0
+		case 15:
+						return Input165_R(16);
 		default:
 			break;
 	}
@@ -592,21 +701,27 @@
 					 return ReadConfig_5();	//New Slave 8 in 8 o
 		case 9:
 		case 10:
-					 return ReadConfig_5();	//New Slave 8 in 8 o
+					 return ReadConfig_5();	//New Master Slave 8 in 8 o
 		case 11:
 					 return ReadConfig_11(); //Mini Board
+		case 13:
+					 return ReadConfig_5();
+		case 14:
+					 return (~(LL_GPIO_ReadInputPort(GPIOA)>>4))&0x0f;	//FP0
+		case 15:
+					 return ReadConfig_5();	//Wireless Master Slave 8 in 8 o
 		default:
 			
 					 return 0;
 	}
 }
 
-#define SRCLK_0() //LL_GPIO_ResetOutputPin(GPIOB,LL_GPIO_PIN_13)
-#define SRCLK_1() //LL_GPIO_SetOutputPin(GPIOB,LL_GPIO_PIN_13)
-#define STRCLK_0() LL_GPIO_ResetOutputPin(GPIOB,LL_GPIO_PIN_12)
-#define STRCLK_1() LL_GPIO_SetOutputPin(GPIOB,LL_GPIO_PIN_12)
-#define SER_0() //LL_GPIO_ResetOutputPin(GPIOB,LL_GPIO_PIN_15)
-#define SER_1() //LL_GPIO_SetOutputPin(GPIOB,LL_GPIO_PIN_15)
+#define SRCLK2_0() LL_GPIO_ResetOutputPin(GPIOB,LL_GPIO_PIN_13)
+#define SRCLK2_1() LL_GPIO_SetOutputPin(GPIOB,LL_GPIO_PIN_13)
+#define STRCLK2_0() LL_GPIO_ResetOutputPin(GPIOB,LL_GPIO_PIN_12)
+#define STRCLK2_1() LL_GPIO_SetOutputPin(GPIOB,LL_GPIO_PIN_12)
+#define SER2_0() LL_GPIO_ResetOutputPin(GPIOB,LL_GPIO_PIN_15)
+#define SER2_1() LL_GPIO_SetOutputPin(GPIOB,LL_GPIO_PIN_15)
 
 void Enable595(uchar bEnable)
 {
@@ -619,52 +734,95 @@
 //unsigned char i;
 ;//		74HC595输出程序，输出8位
 //	cc=~0x3f;
-	STRCLK_1();
+	__disable_irq();
+	STRCLK2_1();
 	unsigned int mask1=0x0080;
 	//volatile uint32_t * p1 = &GPIOB->BRR;
 	//volatile uint32_t * p2 = &GPIOB->BSRR;
 	for (;mask1;)
 	{
-		SRCLK_0();
+		SRCLK2_0();
 		//*p1=LL_GPIO_PIN_13;
-		if (cc&mask1) {SER_1();}
-		else {SER_0();}
+		if (cc&mask1) {SER2_1();}
+		else {SER2_0();}
 		mask1>>=1;
-		SRCLK_1();
+		SRCLK2_1();
 //		__nop();
 		//*p2=LL_GPIO_PIN_13;
 	}
-	STRCLK_0();
-	STRCLK_1();		
+	STRCLK2_0();
+	STRCLK2_1();	
+	__enable_irq();
 }
+
 void Output595_16(unsigned int cc)
 {
 //unsigned char i;
 ;//		74HC595输出程序，输出8位
 //	cc=~0x3f;
-	STRCLK_1();
+	__disable_irq();
+	STRCLK2_1();
 	unsigned int mask1=0x8000;
 	//volatile uint32_t * p1 = &GPIOB->BRR;
 	//volatile uint32_t * p2 = &GPIOB->BSRR;
 	for (;mask1;)
 	{
-		SRCLK_0();
+		SRCLK2_0();
 		//*p1=LL_GPIO_PIN_13;
-		if (cc&mask1) {SER_1();}
-		else {SER_0();}
+		if (cc&mask1) {SER2_1();}
+		else {SER2_0();}
 		mask1>>=1;
-		SRCLK_1();
+		SRCLK2_1();
 //		__nop();
 		//*p2=LL_GPIO_PIN_13;
 	}
-	STRCLK_0();
-	STRCLK_1();		
+	STRCLK2_0();
+	STRCLK2_1();
+	__enable_irq();
 }
-void PutOutput(unsigned int Y)		
-{	
-//	Output595_16(Y);
-	STRCLK_1();	
-	LL_SPI_TransmitData8(SPI2,Y);
+
+/*
+#define STRCLK12_0() LL_GPIO_ResetOutputPin(GPIOB,LL_GPIO_PIN_7)
+#define STRCLK12_1() LL_GPIO_SetOutputPin(GPIOB,LL_GPIO_PIN_7)
+
+void PutOutputSPI1(unsigned int Y)
+{
+	__disable_irq();
+	STRCLK12_1();	
+	LL_SPI_TransmitData8(SPI1,Y>>8);
+	int i=0;
+	while (LL_SPI_IsActiveFlag_TXE(SPI1) == RESET)
+	{
+	}
+	KMem.SDD[28]=i;
+	i=0;
+	while (LL_SPI_IsActiveFlag_BSY(SPI1) == SET)
+	{
+		i++;
+	}	
+	LL_SPI_TransmitData8(SPI1,Y);
+	while (LL_SPI_IsActiveFlag_TXE(SPI1) == RESET)
+	{
+	}
+	KMem.SDD[28]=i;
+	i=0;
+	while (LL_SPI_IsActiveFlag_BSY(SPI1) == SET)
+	{
+		i++;
+	}		
+	KMem.SDD[30]=i;
+		STRCLK12_0();
+		__nop();
+		STRCLK12_1();
+		__enable_irq();
+}
+*/
+
+void PutOutputSPI2(unsigned int Y)
+{
+	__disable_irq();
+	STRCLK2_1();	
+	LL_SPI_TransmitData8(SPI2,Y>>8);
 	int i=0;
 	while (LL_SPI_IsActiveFlag_TXE(SPI2) == RESET)
 	{
@@ -675,14 +833,34 @@
 	{
 		i++;
 	}	
+	LL_SPI_TransmitData8(SPI2,Y);
+	while (LL_SPI_IsActiveFlag_TXE(SPI2) == RESET)
+	{
+	}
+	KMem.SDD[28]=i;
+	i=0;
+	while (LL_SPI_IsActiveFlag_BSY(SPI2) == SET)
+	{
+		i++;
+	}		
 	KMem.SDD[30]=i;
-		STRCLK_0();
-		STRCLK_1();			
-	
+		STRCLK2_0();
+		STRCLK2_1();
+	__enable_irq();
 }
 
-#if (BOARD_TYPE == 9 || BOARD_TYPE == 10 )
+void PutOutput(unsigned int Y)		
+{	
+#if (BOARD_TYPE == 14)
+	return ;
+#endif
+	PutOutputSPI2(Y);
+	//Output595_16(Y);
+}
+
+#if (BOARD_TYPE == 9 || BOARD_TYPE == 10 || BOARD_TYPE == 15 )
 //#pragma message("9,10")
+	// V4.2 管脚排列向右移动了一位。
 #define SRCLK1_0() LL_GPIO_ResetOutputPin(GPIOB,LL_GPIO_PIN_1)
 #define SRCLK1_1() LL_GPIO_SetOutputPin(GPIOB,LL_GPIO_PIN_1)
 #define STRCLK1_0() LL_GPIO_ResetOutputPin(GPIOB,LL_GPIO_PIN_2)
@@ -691,7 +869,7 @@
 #define OE1_1() LL_GPIO_SetOutputPin(GPIOB,LL_GPIO_PIN_10)
 #define SER1_0() LL_GPIO_ResetOutputPin(GPIOB,LL_GPIO_PIN_11)
 #define SER1_1() LL_GPIO_SetOutputPin(GPIOB,LL_GPIO_PIN_11)
-#else
+#else		//按照原来的管脚排列
 #define SRCLK1_0() LL_GPIO_ResetOutputPin(GPIOB,LL_GPIO_PIN_0)
 #define SRCLK1_1() LL_GPIO_SetOutputPin(GPIOB,LL_GPIO_PIN_0)
 #define STRCLK1_0() LL_GPIO_ResetOutputPin(GPIOB,LL_GPIO_PIN_1)
@@ -708,11 +886,13 @@
 			if (bEnable) {OE1_0();}
 			else {OE1_1();}	
 }
+
 void displayInput(unsigned int cc)
 {
 //unsigned char i;
 ;//		74HC595输出程序，输出8位
 //	cc=~0x3f;
+	__disable_irq();
 	STRCLK1_1();
 	unsigned int mask1=0x8000;
 	//volatile uint32_t * p1 = &GPIOB->BRR;
@@ -729,5 +909,6 @@
 		//*p2=LL_GPIO_PIN_13;
 	}
 	STRCLK1_0();
-	STRCLK1_1();			
+	STRCLK1_1();
+	__enable_irq();	
 }
diff --git a/Src/main.c b/Src/main.c
index 90bd4e5..b6da46e 100644
--- a/Src/main.c
+++ b/Src/main.c
@@ -42,6 +42,7 @@
 
 /* USER CODE BEGIN Includes */
 #include "Globaldef.h"
+#include "debug.h"
 #include "Functions.h"
 #include "KMachine.h"
 #include "PLCfunctions.h"
@@ -49,6 +50,18 @@
 #include "KLink.h"
 #include "string.h"
 #include "BSP.h"
+#include "ModbusRTU.h"
+#if (BOARD_TYPE == 13)
+#include "w5500_port.h"
+#include "../src/Ethernet/socket.h"
+#include "../src/Ethernet/loopback.h"
+#elif (BOARD_TYPE == 14)
+#include "FP0.h"
+#elif (BOARD_TYPE == 15)
+#include "KWireless.h"
+//#include "user.h"
+//#include "../src/radio/inc/sx126x-board.h"
+#endif
 
 /* USER CODE END Includes */
 
@@ -57,50 +70,21 @@
 /* USER CODE BEGIN PV */
 /* Private variables ---------------------------------------------------------*/
 
-#define RXBUFSIZE 128
-#define TXBUFSIZE 128
+#define RX2BUFSIZE 128
+#define TX2BUFSIZE 128
 
 unsigned char Uart1RxBuf[256];
-unsigned char Uart1TxBuf[512];
+unsigned char Uart1TxBuf[280];
 
-unsigned char Uart2RxBuf[RXBUFSIZE];
-unsigned char Uart2TxBuf[TXBUFSIZE];
+unsigned char Uart2RxBuf[RX2BUFSIZE];
+unsigned char Uart2TxBuf[TX2BUFSIZE];
 
-//unsigned char buf1[128];	
+unsigned char SlowFlicker=0;
+unsigned char FastFlicker=0;
 
-unsigned char Datas[128];		
-
-unsigned int SlowFlicker=0;
-unsigned int FastFlicker=0;
-
-volatile int PacketLength = 0;
-
-char str1[256];
-
-int TimeOutCount=0;
-int Clk3=0;
-int ContinueSend=0;
-int Uart1baudval=0;	
-int Uart2baudval=0;	
-
-int repeater=0;
-
-int SendTime,Latancy,LatancyClk,SendClk;	
-
-int LineCount=0;
-
-int LastCircleStartTime=0;
-int CircleTime=0;
-
-//volatile unsigned int nRunCount=0;
-volatile int nCount2=0;
+stBinProg1 * pProgs = (stBinProg1 *)STORE_PRG_BASE;
 
 uint32_t us1,us2,us3,us4,us5,us6;
-const unsigned char buf1[16]={0x11,0x22,0x33,0x44,0x55,0x66,0x77,0x88,0x99,0xaa,0xbb,0xcc,0xdd,0xee,0xff,0x00};
-
-volatile int PowerDownEvent=0;
-volatile int OldPowerDownEvent=0;
-volatile int OldPowerDownEventTime=0;
 
 /* USER CODE END PV */
 
@@ -110,14 +94,15 @@
 /* USER CODE BEGIN PFP */
 /* Private function prototypes -----------------------------------------------*/
 
+const unsigned char LEDSEGTAB[]={
+0x3f,0x06,0x5b,0x4f,0x66,0x6d,0x7d,0x07,0x7f,0x6f,0x77,0x7c,0x39,0x5e,0x79,0x71,	//0-F
+0xbf,0x86,0xdb,0xcf,0xe6,0xed,0xfd,0x87,0xff,0xef,0xf7,0xfc,0xb9,0xde,0xf9,0xf1,  //0.-F.
+0x00,0x40,			//  ,-,_,~,o,n,N,<,>,J,r,
+};
+
 /* USER CODE END PFP */
 
 /* USER CODE BEGIN 0 */
-__asm int add1(int a,int b)
-{
-	add r0,r1,r0
-	BLX    lr
-}
 
 int HexToInt(char ch)
 {
@@ -144,345 +129,6 @@
 	return;
 }
 
-int FormatHex(char * buf1,uchar * data,int n)
-{
-	int len1=0;
-		for (int i=0;i<n;i++)
-		{len1+=sprintf(buf1+len1,"%02X ",data[i]);}
-		len1+=sprintf(buf1+len1,"\r\n");	
-	return len1;
-}
-
-int RepeaterFunc()
-{
-		KMem.WY[0]=KMem.WX[0];
-		if ((KMem.nRunCount &0x7f) == 88) 
-		{ 
-			nCount2++;	
-			ToggleRunLed();
-//		int len1=sprintf(str1,"%d %d Cfg %02X  Input %02X  \r\n",nCount,nCount2,EffJumperSW,MyKeyStat1);
-//		PutStr(str1,len1);
-		}				
-	return 0;
-}
-
-
-int ShowInitInfo()
-{
-	int len1=0;
-	clearscreen();
-//	Locate(1,1);
-
-/*	
-	LoadFlashDatas();
-	
-	LoadAndUpdateStoreCfg();
-	
-	HAL_StatusTypeDef res;	
-	stStoreCfg * pFCfg = (stStoreCfg *) GetCurStoreCfgAddr();
-	stStoreCfg * pFCfg2 = GetNextStoreCfgAddr(pFCfg);	
-
-int t11=GetuS();
-	
-	for (int i=0;i<20;i++)
-	{
-		tims[i]=GetuS();
-	}		
-	clearscreen();
-	len1+=sprintf(str1+len1," Ver 001 \r\n");
-	len1+=sprintf(str1+len1," Uart1Baud %d Uart2Baud %d  UID  %08x %08x %08x \r\n",Uart1Baud,Uart2Baud,pUID[0],pUID[1],pUID[2]);
-	len1+=sprintf(str1+len1," Flash = %d %d %d %d  res = %d   ",FlashDatas[0],FlashDatas[1],FlashDatas[2],FlashDatas[3],res);
-	len1+=sprintf(str1+len1,"flash operation = %u %u %u\r\n",t11-t10,t10,t11);
-	PutStr(str1,len1);
-	len1=0;
-	len1+=sprintf(str1+len1,"%08X  %X %X , PowerOn %X  UpTime %X %X %X %X \r\n",
-	(uint32_t)pFCfg,pFCfg[0].Sign1,pFCfg[0].SN1,pFCfg[0].PowerCount,pFCfg[0].UpTime,pFCfg[0].UserData1,pFCfg[0].CRC1,pFCfg[0].EndSign1);
-	len1+=sprintf(str1+len1,"%08X  %X %X , PowerOn %X  UpTime %X %X %X %X \r\n",
-	(uint32_t)pFCfg2,Cfg2.Sign1,Cfg2.SN1,Cfg2.PowerCount,Cfg2.UpTime,Cfg2.UserData1,Cfg2.CRC1,Cfg2.EndSign1);
-	PutStr(str1,len1);
-*/	
-	len1=0;
-/*	
-	for (int i=0;i<8;i++)
-	{
-		len1=0;
-		len1+=sprintf(str1+len1,"%02X:",i*32);
-		for (int j=0;j<8;j++)
-		{
-				len1+=sprintf(str1+len1," %02X",pFlash1[i*32+j]);
-		}
-				len1+=sprintf(str1+len1,"  %02X",pFlash1[i*32+8]);
-		for (int j=9;j<16;j++)
-		{
-				len1+=sprintf(str1+len1," %02X",pFlash1[i*32+j]);
-		}
-				len1+=sprintf(str1+len1," | %02X",pFlash1[i*32+16]);
-		for (int j=17;j<24;j++)
-		{
-				len1+=sprintf(str1+len1," %02X",pFlash1[i*32+j]);
-		}
-				len1+=sprintf(str1+len1,"  %02X",pFlash1[i*32+24]);
-		for (int j=25;j<32;j++)
-		{
-				len1+=sprintf(str1+len1," %02X",pFlash1[i*32+j]);
-		}
-		len1+=sprintf(str1+len1,"\r\n");
-		PutStr(str1,len1);
-	}
-*/	
-	us1=GetuS();
-	int crc1 = crc_check(buf1,16);
-	us2=GetuS();
-	int crc2 = crc16bitbybit(buf1,16);
-	us3=GetuS();
-	int crc3 = crc16table(buf1, 16);
-	us4=GetuS();
-  int crc4 = crc16tablefast(buf1, 16);
-	us5=GetuS();
-	LL_CRC_ResetCRCCalculationUnit(CRC);
-	LL_CRC_SetInitialData(CRC,0xFFFFFFFF);
-	LL_CRC_SetInitialData(CRC,0xA001);
-	for (int i=0;i<16;i++)
-	{
-		LL_CRC_FeedData8(CRC,buf1[i]);
-	}
-	int crc5 = LL_CRC_ReadData32(CRC);
-	us6=GetuS();
-	
-		len1+=sprintf(str1+len1,"CRC  %04X  %04X  %04X  %04X  %04X\r\n",crc1,crc2,crc3,crc4,crc5);
-		len1+=sprintf(str1+len1,"time %04d  %04d  %04d  %04d  %04d\r\n",us2-us1,us3-us2,us4-us3,us5-us4,us6-us5);
-		
-		PutStr(str1,len1);
-
-	InitTimer(0,0);
-	InitTimer(1,1);
-	InitTimer(2,2);
-	InitTimer(3,3);
-	
-	StartTimer(0,1000);
-//	StartTimer(2,1000);
-	Locate(13,1);LineCount=3;
-	return 0;
-}
-int sprintftime = 0;
-int putstrtime = 0;
-
-int ADCProcess()
-{
-					uint16_t ADC_ConvertedValue=0;
-static int CurChannel=LL_ADC_CHANNEL_0;
-//static int waitcount = 0;
-				if (!LL_ADC_REG_IsConversionOngoing(ADC1))
-				{
-					//waitcount++;
-					//if (waitcount<2) return 0;
-					//waitcount=0;
-					ADC_ConvertedValue = LL_ADC_REG_ReadConversionData12(ADC1);
-					
-		//			ADC_RegularChannelConfig(LL_ADC_CHANNEL_17,);
-					int channels = CurChannel ;//LL_ADC_REG_GetSequencerChannels(ADC1);
-					int nextchannel = LL_ADC_CHANNEL_0;
-					if ((channels & LL_ADC_CHANNEL_0) == LL_ADC_CHANNEL_0)
-					{
-						KMem.ADCValues[0] = ADC_ConvertedValue;
-						nextchannel = LL_ADC_CHANNEL_7;
-					}else if ((channels & LL_ADC_CHANNEL_7) == LL_ADC_CHANNEL_7)
-					{
-						KMem.ADCValues[2] = ADC_ConvertedValue;						
-						nextchannel = LL_ADC_CHANNEL_TEMPSENSOR;
-						if (KMem.ADCValues[2] < 2200) 
-						{
-							PowerDownEvent=1;
-						}else 
-						{
-							PowerDownEvent=0;
-						}
-					}else if ((channels & LL_ADC_CHANNEL_16) == LL_ADC_CHANNEL_16)
-					{
-						KMem.ADCValues[6] = ADC_ConvertedValue;		
-							nextchannel = LL_ADC_CHANNEL_VREFINT;
-					}else if ((channels & LL_ADC_CHANNEL_17) == LL_ADC_CHANNEL_17)
-					{
-						KMem.ADCValues[7] = ADC_ConvertedValue;						
-						nextchannel = LL_ADC_CHANNEL_0;
-					}else
-					{
-						//ADCValues[0] = ADC_ConvertedValue;						
-					}
-					//nextchannel = LL_ADC_CHANNEL_VREFINT;
-					LL_ADC_REG_SetSequencerChannels(ADC1,nextchannel);					
-					LL_ADC_REG_StartConversion(ADC1);
-					CurChannel = nextchannel;
-				}	
-	return 0;
-}
-
-int PowerDownProcess(void )
-{
-	AddEventLog(KMem.CurTimeSec,EventTypePowerDown,1,12345);
-	SaveRunStat(&KMRunStat);
-	KMem.PwrFailCount++;
-	KMem.LastPwrFailTime = KMem.CurTimeSec;
-	return 0;
-}
-
-int PowerRecoverProcess(void)
-{
-	KMem.PwrFailCount++;
-	
-	return 0;
-}
-int ShowRunningInfo()
-{
-			int Clk1=SysTick->VAL;			
-			if (Uart1BaudFirstGot)
-			{
-				Uart1baudval = HAL_RCC_GetPCLK1Freq() / USART1->BRR;
-				Uart1BaudFirstGot=0;
-			}
-			if (Uart2BaudFirstGot)
-			{
-				Uart2baudval = HAL_RCC_GetPCLK1Freq() / USART2->BRR;
-				Uart2BaudFirstGot=0;
-			}		
-			int Reload=SysTick->LOAD;
-
-			int Clk2=SysTick->VAL;
-			//int us2=GetuS();
-			int haltick=HAL_GetTick();
-			int len1=0;
-			uint32_t theUs = GetuS();
-			int nRunCount2=KMem.nRunCount;
-			if (!Uart1Stat.QTx.bEmpty) return 0;
-			
-			if ( (nRunCount2 & 0xff) == 0x03)
-			{
-				Locate(13,1);LineCount=3;
-			} else	if ((nRunCount2 & 0xff) == 0x0f)
-			{
-				int timeus1;
-				int timeus2;
-		
-				len1=sprintf((char *)str1," N %8d Tk %8d %9u CFG %02X R %d M %d S %d %4d IN %04X OUT %04X  \r\n",
-					KMem.nRunCount, haltick, theUs, KMem.EffJumperSW, repeater, bMaster, bSlave, Clk2, KMem.WX[0],KMem.WY[0]);
-				//len1=sprintf((char *)str1,"U%02X%02XA",x2,x2);
-				// Locate(10,1);
-				timeus1=GetuS();
-				PutStr(str1,len1);
-				timeus2=GetuS();
-				sprintftime = timeus1 - theUs;
-				putstrtime = timeus2 - timeus1;
-				if (IsTimerOn(0)) {StartTimer(1,1000);StopTimer(3);}
-				if (IsTimerOn(1)) {StartTimer(2,100);StopTimer(0);}
-				if (IsTimerOn(2)) {StartTimer(3,10);StopTimer(1);}
-				if (IsTimerOn(3)) {StartTimer(0,10000);StopTimer(2);}
-		  }
-			if ((nRunCount2 & 0xff) == 0x2f && 0)
-			{
-
-		  }	
-			if ((nRunCount2 & 0xff) == 0x0af)
-			{
-				
-		  }				
-			return 0;
-}
-
-int MasterFunc()
-{
-		uint32_t tick1=HAL_GetTick();
-		uint32_t thisuS=GetuS();
-	
-			int len1=0;
-
-			if ((MasterRecved && thisuS-SendTimeuS>50) || thisuS-SendTimeuS>1500u)
-			{
-				if (!MasterRecved) 
-				{
-					TimeOutCount++;
-					Uart2Stat.TimeOutErr++; 
-					ChnStats[nCurPollId].LostPackets++;
-					ChnStats[nCurPollId].CtnLstPkts++;
-					if (ChnStats[nCurPollId].CtnLstPkts>ChnStats[nCurPollId].MaxCtnLstPkts)
-					{ChnStats[nCurPollId].MaxCtnLstPkts=ChnStats[nCurPollId].CtnLstPkts;}
-					if (ChnStats[nCurPollId].CtnLstPkts>3)
-					{
-						ChnStats[nCurPollId].Stat=0;
-						KMem.ErrStat=200;
-						
-						{BufferIn[nCurPollId]=0;}
-					}
-				//	LL_GPIO_SetOutputPin(GPIOA,LL_GPIO_PIN_7);
-				}else
-				{
-					ChnStats[nCurPollId].Stat=1;
-					
-					KMem.RunStat=100;
-				}
-				nCurPollId ++;
-				if (nCurPollId > nChilds)
-				{
-					CircleTime=thisuS-LastCircleStartTime;
-					LastCircleStartTime=thisuS;
-					nSeq++;
-					nCurPollId=1;
-				}				
-				Datas[0]=BufferOut[nCurPollId];
-				Datas[1]=BufferOut[nCurPollId+1];;
-				Datas[2]=ChnStats[nCurPollId].Stat;
-				Datas[3]=0;
-				Datas[4]=tick1&0xff;
-				Datas[5]=(tick1>>8)&0xff;
-				Datas[6]=(tick1>>16)&0xff;
-				Datas[7]=(tick1>>24)&0xff;
-				
-				SendTimeuS=thisuS;				
-				len1=MakePacket((pPacket)PacketBuf1,0,nCurPollId,cmdExChgData,nSeq,8,Datas);
-				SendPacket2((pPacket)PacketBuf1,len1);
-				ChnStats[nCurPollId].SendPackets++;
-				ChnStats[nCurPollId].SendTimeInterval=SendTimeuS-ChnStats[nCurPollId].LastSentTimeuS;
-				ChnStats[nCurPollId].LastSentTimeuS=SendTimeuS;
-				PacketLength = len1;
-				SendTime=tick1;
-
-				MasterRecved=0;
-			//	LL_GPIO_TogglePin(GPIOA,LL_GPIO_PIN_5);		
-				//ToggleErrLed();
-//				ToggleOut8();
-
-			}
-		
-			Clk3=SysTick->VAL;
-		//	LL_GPIO_TogglePin(GPIOA,LL_GPIO_PIN_4);
-	//	HAL_Delay(1);				
-	return 0;
-}
-
-int SlaveFunc()
-{
-		int ThisuS=GetuS();
-		int thisRecvTime=RecvTimeuS;
-		if (SlaveRecved)
-		{
-			KMem.RunStat=100;
-			SlaveRecved=0;
-		}else if ((ThisuS - thisRecvTime) >12000u)
-		{
-			KMem.ErrStat=200;
-			KMem.SDD[17]=1;
-			KMem.SDD[18]=ThisuS;
-			KMem.SDD[19]=RecvTimeuS;
-		}else if ( ThisuS > (thisRecvTime + 12000u))
-		{
-			KMem.ErrStat=200;
-			KMem.SDD[17]=2;
-			KMem.SDD[18]=ThisuS;
-			KMem.SDD[19]=RecvTimeuS;
-		}
-		
-	return 0;
-}
-
 /* USER CODE END 0 */
 
 /**
@@ -505,7 +151,7 @@
 
   /* USER CODE BEGIN Init */
 
-	for (int i=0;i<16;i++)
+	for (int i=0;i<9;i++)
 	{
 //		memset(ChnStats[i],0,0);		
 		ChnStats[i].SendPackets=0;
@@ -544,7 +190,7 @@
   /* USER CODE BEGIN SysInit */
 	TickFreq=10000;		//Tick频率
 	InituS(TickFreq);	
-  HAL_SYSTICK_Config(HAL_RCC_GetHCLKFreq()/TickFreq);	//重新定义SysTick的频率�
+ // HAL_SYSTICK_Config(HAL_RCC_GetHCLKFreq()/TickFreq);	//重新定义SysTick的频率�
 
   /* USER CODE END SysInit */
 
@@ -553,33 +199,70 @@
   MX_DMA_Init();
 	
 	KMachineInit();
-	ReadSysCfgFromFlash(&KMSysCfg);
+	ReadSysCfgFromFlash(&storedKMSysCfg);
 	
 	KMem.EffJumperSW=ReadJumperSW();
+#if (BOARD_TYPE == 14)
+	KMem.EffJumperSW|=0x10;
+	nAddr=KMem.EffJumperSW&0x0f;
+  if ((KMem.EffJumperSW&0x10)!=0) {bKBusMaster=1;bKBusSlave=0;}
+	else{bKBusMaster=0;bKBusSlave=1;}
+	nChilds=nAddr;
+	FP0_Init();
+#elif (BOARD_TYPE == 15)
+	nAddr=KMem.EffJumperSW&0x0f;
+	if (KMem.EffJumperSW == 0x1f) {bKBusRepeater=1;bKBusMaster=1;bKBusSlave=0;}
+  else if ((KMem.EffJumperSW&0x10)!=0) {bKBusMaster=1;bKBusSlave=0;}
+	else{bKBusMaster=0;bKBusSlave=1;}	
+#else
 	nAddr=KMem.EffJumperSW&0x7;
-	if (KMem.EffJumperSW == 0x0f) {repeater=1;bMaster=1;bSlave=0;}
-  else if ((KMem.EffJumperSW&0x08)!=0) {bMaster=1;bSlave=0;}
-	else{bMaster=0;bSlave=1;}	
+	if (KMem.EffJumperSW == 0x0f) {bKBusRepeater=1;bKBusMaster=1;bKBusSlave=0;}
+  else if ((KMem.EffJumperSW&0x08)!=0) {bKBusMaster=1;bKBusSlave=0;}
+	else{bKBusMaster=0;bKBusSlave=1;}
+#endif
 	nChilds=nAddr;
 	nCurPollId=1;
-	if (KMem.EffJumperSW == 0x00) Uart1Baud = DefaultUart1Baud;
+	//if (KMem.EffJumperSW == 0x00)
+		Uart1Baud = DefaultUart1Baud;
   MX_USART1_UART_Init();
   MX_USART2_UART_Init();
-//	MX_SPI1_Init();
+
+	MX_SPI1_Init();
+	LL_SPI_EnableIT_RXNE(SPI1);
+
+#if (BOARD_TYPE == 14)
+//	MX_SPI2_Init();
+//  MX_ADC_Init();
+#else
 	MX_SPI2_Init();
   MX_ADC_Init();
+#endif
+
 	MX_IWDG_Init();
+
+	MX_TIM6_Init();
+	LL_TIM_EnableCounter(TIM6);
 	
   /* USER CODE BEGIN 2 */
 	LL_USART_EnableIT_RXNE(USART1);
 	LL_USART_EnableIT_IDLE(USART1);
 	LL_USART_EnableIT_TC(USART1);
 
-	LL_USART_EnableIT_RXNE(USART2);
+//	LL_USART_EnableIT_RXNE(USART2);
+	Uart2RecvDMA(Uart2RecvBuf1,sizeof(Uart2RecvBuf1));	
 	LL_USART_EnableIT_IDLE(USART2);
 	LL_USART_EnableIT_TC(USART2);
+#if (BOARD_TYPE == 13)
+	int res;
+	res = w5500_init();
+	KMem.SDD[28]=res;
 	
-//	if (bSlave)
+//	res=socket(0,Sn_MR_TCP,5000,0);
+	KMem.SDD[29]=res;	
+	
+//	res = listen(0);
+#endif	
+//	if (bKBusSlave)
 	{
 	//	LL_USART_EnableAutoBaudRate(USART1);
 	//	LL_USART_SetAutoBaudRateMode(USART1, LL_USART_AUTOBAUD_DETECT_ON_FALLINGEDGE);		
@@ -596,22 +279,40 @@
 	HAL_Delay(10);				
 	SetRunLed(1);				//Turn On Run Led
 	SetErrLed(0);				//Turn Off Err Led
+
+#if (BOARD_TYPE == 14)
+//	PutOutput (0);					//Clear all Output
+//	Enable595(1);						//Enable 595 Output 
+#else
 	PutOutput (0);					//Clear all Output
 	Enable595(1);						//Enable 595 Output 
+#endif
+
 		if (GetBoardType() == 7 || GetBoardType() ==8 
-			|| GetBoardType() == 9 || GetBoardType() ==10 ) 
+			|| GetBoardType() == 9 || GetBoardType() ==10 ||GetBoardType() ==13 ||GetBoardType() ==15 ) 
 		{
 			displayInput(0xffff);		//
 			EnableDisIn(1);				//Input Diaplay Enable 595 
 		}
 	SetOutStat(0);			//OK Good, signal
-//	ShowInitInfo();
+	ShowInitInfo();
 	KMem.LastScanTime = GetuS();
+
+	KMRunStat.WorkMode=0;
+	if (KMRunStat.WorkMode == 1){
+		InitPLC();
+		StartPLC();
+	}
+	KMem.WX[7]=0x5a;
+#if (BOARD_TYPE == 15)
+	KWireLessInit(KMem.EffJumperSW&0x20);
+	KWireLessStart();
+#endif
+
   while (1)
   {
 		//int MyKeyStat1,MyKeyStat2;
 		//MyKeyStat1=GetInput();
-
 
 		//*((unsigned int *)&(PLCMem.SDT[10]))=nRunCount;
 	//	KMem.nRunCount=nRunCount;
@@ -620,30 +321,30 @@
 		us1=GetuS();
 		int haltick=HAL_GetTick();
 		
-		int CurJumperSW=ReadJumperSW();		
-		KMem.CurJumperSW=CurJumperSW;
+//		int CurJumperSW=ReadJumperSW();		
+//		KMem.CurJumperSW=CurJumperSW;
 		KMem.haltick=haltick;
 //		KMem.TotalRunTime=TotalRunTime;
 //		KMem.ThisRunTime=ThisRunTime;		
 		
 //		*((unsigned int *)&(PLCMem.SDT[2]))=nChilds;
-		
-		KMem.WX[0]= GetInput();
+//		KMem.SDD[13]=PendSvCount;
+//		KMem.SDD[14]=RCC->CSR;		
+
+#if (BOARD_TYPE == 14)
+//		KMem.WX[0]= GetInput();		
+		FP0_Proc();
+#else
+		KMem.WX[0]= GetInput();		
+#endif
 		
 		if (GetBoardType() == 7 || GetBoardType() ==8 
-			|| GetBoardType() == 9 || GetBoardType() ==10 ) 
+			|| GetBoardType() == 9 || GetBoardType() ==10 || GetBoardType() ==15) 
 		{
 			displayInput(KMem.WX[0]);
 		}
 		us2=GetuS();
-
-//		ProcessPLCPROG(prog1, nSizeProg1);
-//		ScanTimeuS=us2-LastScanTime;
-//		LastScanTime = us2;
-		if (KMem.ScanTimeuS < KMem.MinScanTimeuS) {KMem.MinScanTimeuS = KMem.ScanTimeuS;}
-		if (KMem.ScanTimeuS > KMem.MaxScanTimeuS) {KMem.MaxScanTimeuS = KMem.ScanTimeuS;}
-		if (repeater)		{	RepeaterFunc();	}
-		us3=GetuS();
+///*
 		if ((KMem.nRunCount &0x1f) == 0x02)
 		{
 			ADCProcess();
@@ -665,37 +366,81 @@
 				}
 			}
 		}
-		if (bMaster)		
-		{
-			BufferOut[1]=KMem.WX[0]&0xff;
-			BufferOut[2]=(KMem.WX[0]>>8)&0xff;
-			MasterFunc();
-			
-			KMem.WY[0]=BufferIn[1]+(BufferIn[2]<<8);
+//*/
 
+#if (BOARD_TYPE == 15)
+		Radio.IrqProcess( ); // Process Radio IRQ
+#endif
+
+//		pProgs = (stBinProg1 *) STORE_PRG_BASE;
+
+		if (	KMRunStat.WorkMode==1 && bKBusMaster)
+		{
+			if (KMRunStat.nBinProgBank == 0){
+				pProgs=(stBinProg1 *)STORE_PRG_BASE;
+			}else {
+				pProgs=(stBinProg1 *)ALT_PRG_BASE;
+			}
+			nSizeProg1=KMRunStat.nBinProgSize;
+			
+			ProcessPLCBinProg(pProgs, nSizeProg1);
+		}
+
+		KMem.ScanTimeuS=us2-KMem.LastScanTime;
+		KMem.LastScanTime = us2;
+		if (KMem.ScanTimeuS < KMem.MinScanTimeuS) {KMem.MinScanTimeuS = KMem.ScanTimeuS;}
+		if (KMem.ScanTimeuS > KMem.MaxScanTimeuS) {KMem.MaxScanTimeuS = KMem.ScanTimeuS;}
+
+		//		if (bKBusRepeater)		{	KBusRepeaterFunc();	}
+
+		us3=GetuS();
+
+		if (bKBusMaster)		
+		{
+#if (BOARD_TYPE == 14)
+			for (int i=0;i<nOutputBytes;i++)
+			{BufferOut[i+1]=KMem.WYB[i];}
+#else
+//			BufferOut[1]=KMem.WX[0]&0xff;
+//			BufferOut[2]=(KMem.WX[0]>>8)&0xff;
+#endif
+			if (nChilds>0) {		KBusMasterFunc(2); }
+
+#if (BOARD_TYPE == 14)			
+//			KMem.WX[0]=BufferIn[1]+(BufferIn[2]<<8);
+#else
+//			KMem.WY[0]=BufferIn[1]+(BufferIn[2]<<8);
+#endif
+
+		}
 			if (haltick&0x00002000) SlowFlicker=1;
 			else SlowFlicker=0;
 			if (haltick&0x00000800) FastFlicker=1;
 			else FastFlicker=0;	
-			
-		}
-		if (bSlave)		
+
+		if (bKBusSlave)		
 		{
-			BufferOut[0]=KMem.WX[0];
-			SlaveFunc();	
+//			BufferOut[0]=KMem.WX[0];
+#if (BOARD_TYPE == 15)
+//			KBusSlaveFunc(2);	
+		//	if (! KMem.RunStat) {BufferIn[0]=0;}
+		//	KMem.WY[0]=BufferIn[0];
+#else
+			KBusSlaveFunc(2);	
 			if (! KMem.RunStat) {BufferIn[0]=0;}
 			KMem.WY[0]=BufferIn[0];
-			
+#endif
 			if (nSlaveTick&0x00002000) SlowFlicker=1;
 			else SlowFlicker=0;
 			if (nSlaveTick&0x00000800) FastFlicker=1;
 			else FastFlicker=0;			
 
 		}
+
 //		KMem.WY[0]=nCount2>>5;
 		if (KMem.RunStat) {KMem.RunStat--;}
 		if (KMem.ErrStat) {KMem.ErrStat--;}
-		
+
 		if (!KMem.RunStat) SetRunLed(SlowFlicker);
 		else SetRunLed(FastFlicker);
 		
@@ -717,13 +462,21 @@
 		us4=GetuS();
 //		EffJumperSW = GetInput(20)&0xff;
 
+#if (BOARD_TYPE == 14)
+//		PutOutput (KMem.WY[0]);
+#else
 		PutOutput (KMem.WY[0]);
+#endif
 		//PutOutput (KMem.nRunCount>>8);
 		//PutOutput(0x0f70);
-		
+#if (BOARD_TYPE == 15)		
+	//	KMem.WY[1]=KMem.nRunCount>>6;
+		KMem.WY[1]=KMem.WX[0];
+		KMem.WY[0]=KMem.WX[1];
+#endif
 		us5=GetuS();
-//		if (bMaster) ShowInfo();
-//		if (bSlave) ShowInfo();
+//		if (bKBusMaster) ShowInfo();
+//		if (bKBusSlave) ShowInfo();
 		us6=GetuS();
 		add1(10,10);
 		for (int i=0;i<64;i++)
@@ -731,18 +484,23 @@
 //			ProcessTimer(i);
 		}
 		KMem.nRunCount++;
-		int nSize=sizeof(stChnStat);
-		memcpy(&KMem.SDT[64],&ChnStats[1],nSize);
-		memcpy(&KMem.SDT[64+nSize/2],&ChnStats[2],nSize);
+//		int nSize=sizeof(stChnStat);
+//		memcpy(&KMem.SDT[64],&ChnStats[1],nSize);
+//		memcpy(&KMem.SDT[64+nSize/2],&ChnStats[2],nSize);
 //		for (int i=0;i<128;i++)	{		SDT[i]=i;	}
 //		SDT[48]=55;
 		if (Uart1RecvBuf1DataLen >0 && Uart1Stat.bPacketRecved)
 		{
-			KLParsePacket(Uart1RecvBuf1,Uart1RecvBuf1DataLen);
+			int res1 = -1;
+			res1 = ModBusSlaveParsePkg(1, Uart1RecvBuf1, Uart1RecvBuf1DataLen);
+			if (res1 !=0)
+			{
+				KLParsePacket(1, Uart1RecvBuf1, Uart1RecvBuf1DataLen);
+			}
 			Uart1RecvBuf1DataLen=0;
 			Uart1Stat.bPacketRecved=0;
 		}
- if (bSlave)	HAL_Delay(0);
+ if (bKBusSlave)	HAL_Delay(0);
 /*
 		if (!IsEmpty(&Uart1Stat.QRx))
 		{
@@ -752,7 +510,55 @@
 				clearscreen();
 			}
 		}
-*/		
+*/
+
+#if (BOARD_TYPE == 14)
+		//process 6 output
+		{
+				// mapping bits.
+			if (KMem.WXB[0]&0x1){ LL_GPIO_SetOutputPin(GPIOB,LL_GPIO_PIN_12);}
+			else {LL_GPIO_ResetOutputPin(GPIOB,LL_GPIO_PIN_12);}
+			if (KMem.WXB[1]&0x1){ LL_GPIO_SetOutputPin(GPIOB,LL_GPIO_PIN_13);}
+			else {LL_GPIO_ResetOutputPin(GPIOB,LL_GPIO_PIN_13);}
+			if (KMem.WXB[2]&0x1){ LL_GPIO_SetOutputPin(GPIOB,LL_GPIO_PIN_14);}
+			else {LL_GPIO_ResetOutputPin(GPIOB,LL_GPIO_PIN_14);}
+			if (KMem.WXB[3]&0x1){ LL_GPIO_SetOutputPin(GPIOB,LL_GPIO_PIN_15);}
+			else {LL_GPIO_ResetOutputPin(GPIOB,LL_GPIO_PIN_15);}
+			if (KMem.WXB[4]&0x1){ LL_GPIO_SetOutputPin(GPIOB,LL_GPIO_PIN_0);}
+			else {LL_GPIO_ResetOutputPin(GPIOB,LL_GPIO_PIN_0);}
+			if (KMem.WXB[5]&0x1){ LL_GPIO_SetOutputPin(GPIOB,LL_GPIO_PIN_1);}
+			else {LL_GPIO_ResetOutputPin(GPIOB,LL_GPIO_PIN_1);}			
+			if (KMem.WXB[5]&0x1){ LL_GPIO_SetOutputPin(GPIOB,LL_GPIO_PIN_2);}
+			else {LL_GPIO_ResetOutputPin(GPIOB,LL_GPIO_PIN_2);}			
+		}
+#endif
+
+/*		
+		{
+		unsigned char pos,seg;
+		unsigned short val;
+		pos=((KMem.nRunCount)&0x3);
+		//val=(KMem.nRunCount)&0xfff;
+		val=KMem.ErrStat;
+		char buf5[20];
+		sprintf(buf5,"%4d",val);
+		val=buf5[3-pos];
+		if (val <'0' || val >'9') {seg=0;}
+		else {seg=LEDSEGTAB[val-'0'];}
+		
+		pos=1<<pos;
+		//pos=1;
+		//seg=2;
+		seg=~seg;
+		//	PutOutputSPI1(pos|(seg<<8));
+	}
+*/
+
+#if (BOARD_TYPE == 13)	
+	 w5500_network_info_show();
+//	 loopback_tcps(0,str1,5000);
+#endif
+
 	 LL_IWDG_ReloadCounter(IWDG);
 		
   }	//while (1) ;
diff --git a/Src/stm32f0xx_it.c b/Src/stm32f0xx_it.c
index 5fc6b89..ae44ae7 100644
--- a/Src/stm32f0xx_it.c
+++ b/Src/stm32f0xx_it.c
@@ -95,9 +95,11 @@
 void PendSV_Handler(void)
 {
   /* USER CODE BEGIN PendSV_IRQn 0 */
-	NVIC_ClearPendingIRQ(PendSV_IRQn);	
+  SCB->ICSR=SCB_ICSR_PENDSVCLR_Msk; //1<<SCB_ICSR_PENDSVCLR_Pos;
+//	NVIC_ClearPendingIRQ(PendSV_IRQn);	
 	PendSvCount++;
-	NVIC_DisableIRQ(PendSV_IRQn);
+//	NVIC_DisableIRQ(PendSV_IRQn);
+	PendSvCallBack();
   /* USER CODE END PendSV_IRQn 0 */
   /* USER CODE BEGIN PendSV_IRQn 1 */
 
@@ -125,6 +127,21 @@
 /* For the available peripheral interrupt handler names,                      */
 /* please refer to the startup file (startup_stm32f0xx.s).                    */
 /******************************************************************************/
+/**
+  * @brief This function handles TIM6 global interrupt.
+  */
+void TIM6_IRQHandler(void)
+{
+  /* USER CODE BEGIN TIM6_IRQn 0 */
+	if (LL_TIM_IsActiveFlag_UPDATE(TIM6)) {	LL_TIM_ClearFlag_UPDATE(TIM6);}
+	
+//		KMem.SDD[46]+=1000;
+//	  KMem.SDT[93] = LL_TIM_GetCounter(TIM6);
+  /* USER CODE END TIM6_IRQn 0 */
+  /* USER CODE BEGIN TIM6_IRQn 1 */
+
+  /* USER CODE END TIM6_IRQn 1 */
+}
 
 /**
 * @brief This function handles DMA1 channel 2 and 3 interrupts.
@@ -174,10 +191,11 @@
 	Uart2DmaInts++;
 	if (LL_DMA_IsActiveFlag_TC4(DMA1))
 	{
-
+		LL_DMA_ClearFlag_TC4(DMA1);
+/*		
 		Uart2Stat.SendBytes+=Uart2Stat.DMASendLen;
 		DelData(&Uart2Stat.QTx,Uart2Stat.DMASendLen);
-		LL_DMA_ClearFlag_TC4(DMA1);
+
 		
 		if (!IsEmpty(&Uart2Stat.QTx))
 		{
@@ -191,6 +209,7 @@
 			LL_USART_EnableDMAReq_TX(USART2);
 		}
 		else
+*/		
 		{
 			Uart2Stat.DMASendLen=0;
 			Uart2Stat.Sending=0;
@@ -202,10 +221,22 @@
 	if (LL_DMA_IsActiveFlag_TC5(DMA1))
 	{
 		LL_DMA_ClearFlag_TC5(DMA1);
+		
 
 	}
   /* USER CODE END DMA1_Channel4_5_IRQn 1 */
 }
+
+void SPI1_IRQHandler(void)
+{
+  /* USER CODE BEGIN SPI1_IRQn 0 */
+	SPI1_IRQ_CallBack();
+  /* USER CODE END SPI1_IRQn 0 */
+  /* USER CODE BEGIN SPI1_IRQn 1 */
+
+  /* USER CODE END SPI1_IRQn 1 */
+}
+
 /**
 * @brief This function handles USART1 global interrupt.
 */
@@ -220,7 +251,7 @@
 		Uart1BaudFirstGot=1;
 		Uart1Stat.RXNECount++;
 		unsigned char ch=LL_USART_ReceiveData8(USART1);
-		PushOne(&Uart1Stat.QRx,ch);
+		// PushOne(&Uart1Stat.QRx,ch);
 		Uart1Stat.RecvBytes++;
 		Uart1RecvBuf1[Uart1RecvBuf1DataLen++]=ch;
 		//LL_USART_TransmitData8(USART1,ch);
@@ -252,13 +283,11 @@
 
 	if (LL_USART_IsActiveFlag_RXNE(USART2))
 	{
-		Uart2BaudGot=1;
-		Uart2BaudFirstGot=1;
-		Uart2Stat.RXNECount++;
-		unsigned char ch=LL_USART_ReceiveData8(USART2);
-		PushOne(&Uart2Stat.QRx,ch);
-		Uart2Stat.RecvBytes++;
-		Uart2RecvBuf1[Uart2RecvBuf1DataLen++]=ch;
+	//	unsigned char ch=LL_USART_ReceiveData8(USART2);
+	//	Uart2Stat.RXNECount++;
+		// PushOne(&Uart2Stat.QRx,ch);
+	//	Uart2Stat.RecvBytes++;
+	//	Uart2RecvBuf1[Uart2RecvBuf1DataLen++]=ch;
 
 		//LL_USART_TransmitData8(USART2,ch);
 	}
diff --git a/Src/system_stm32f0xx.c b/Src/system_stm32f0xx.c
index 36b4652..d49af9f 100644
--- a/Src/system_stm32f0xx.c
+++ b/Src/system_stm32f0xx.c
@@ -97,7 +97,7 @@
   * @{
   */
 #if !defined  (HSE_VALUE) 
-  #define HSE_VALUE    ((uint32_t)8000000) /*!< Default value of the External oscillator in Hz.
+  #define HSE_VALUE    ((uint32_t)12000000) /*!< Default value of the External oscillator in Hz.
                                                 This value can be provided and adapted by the user application. */
 #endif /* HSE_VALUE */
 
@@ -133,7 +133,7 @@
                call the 2 first functions listed above, since SystemCoreClock variable is 
                updated automatically.
   */
-uint32_t SystemCoreClock = 8000000;
+uint32_t SystemCoreClock = 12000000;
 
 const uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
 const uint8_t APBPrescTable[8]  = {0, 0, 0, 0, 1, 2, 3, 4};
diff --git a/Src/w5500_port.c b/Src/w5500_port.c
new file mode 100644
index 0000000..d99eec4
--- /dev/null
+++ b/Src/w5500_port.c
@@ -0,0 +1,348 @@
+
+#include "stm32f0xx_hal.h"
+#include "w5500_port.h"
+#include "Globaldef.h"
+#include "KMachine.h"
+/**
+ * @brief   enter critical section
+ * @param   none
+ * @return  none
+ */
+static void w5500_cris_enter(void)
+{
+		__disable_irq();
+}
+
+/**
+ * @brief   exit critical section
+ * @param   none
+ * @return  none
+ */
+static void w5500_cris_exit(void)
+{
+	 __enable_irq();
+}
+
+
+
+#define setW5500CLK_0() LL_GPIO_ResetOutputPin(GPIOB,LL_GPIO_PIN_3)
+#define setW5500CLK_1() LL_GPIO_SetOutputPin(GPIOB,LL_GPIO_PIN_3)
+#define SetW5500SER_0() LL_GPIO_ResetOutputPin(GPIOB,LL_GPIO_PIN_5)
+#define SetW5500SER_1() LL_GPIO_SetOutputPin(GPIOB,LL_GPIO_PIN_5)
+#define GetW5500SER() LL_GPIO_IsInputPinSet(GPIOB,LL_GPIO_PIN_4)
+
+/**
+ * @brief   select chip
+ * @param   none
+ * @return  none
+ */
+int nIndexCount=0;
+static void w5500_cs_select(void)
+{
+		//	setW5500CLK_1();
+    	LL_GPIO_ResetOutputPin(GPIOA,LL_GPIO_PIN_15);
+	nIndexCount=0;
+}
+
+/**
+ * @brief   deselect chip
+ * @param   none
+ * @return  none
+ */
+static void w5500_cs_deselect(void)
+{
+    LL_GPIO_SetOutputPin(GPIOA,LL_GPIO_PIN_15);
+}
+
+
+#ifdef SOFT_SPI
+
+static uint8_t w5500_spi_readbyte_sw(void)
+{
+    uint8_t value=0;
+	unsigned int mask1=0x0080;
+//	volatile uint32_t * p1=&GPIOA->IDR;
+    SetW5500SER_1();
+	for (;mask1;)
+	{
+		setW5500CLK_0();
+		//*p1=LL_GPIO_PIN_13;
+		
+		setW5500CLK_1();
+		if (GetW5500SER()) 	value |= mask1;
+		mask1>>=1;	
+//		__nop();
+		//*p2=LL_GPIO_PIN_13;
+	}
+		KMem.SDB[128+nIndexCount] = value;
+	nIndexCount++; 
+	if (nIndexCount>40) {nIndexCount=0;}
+    return value;
+}
+
+static void w5500_spi_writebyte_sw(uint8_t wb)
+{
+	unsigned int mask1=0x0080;
+	//volatile uint32_t * p1 = &GPIOB->BRR;
+	//volatile uint32_t * p2 = &GPIOB->BSRR;
+	KMem.SDB[128+nIndexCount] = wb;
+	nIndexCount++; 
+	if (nIndexCount>40) {nIndexCount=0;}
+	
+	for (;mask1;)
+	{
+		setW5500CLK_0();
+		//*p1=LL_GPIO_PIN_13;
+		if (wb&mask1) {SetW5500SER_1();}
+		else {SetW5500SER_0();}
+		mask1>>=1;
+		setW5500CLK_1();
+//		__nop();
+		//*p2=LL_GPIO_PIN_13;
+	}
+	
+}
+#else
+/**
+ * @brief   read byte in SPI interface
+ * @param   none
+ * @return  the value of the byte read
+ */
+#define TIMEOUT 50
+static uint8_t w5500_spi_readbyte(void)
+{
+    uint8_t value;
+	int timeout_cnt= 0;
+	
+  while (LL_SPI_IsActiveFlag_TXE(SPI1) == RESET)	{	timeout_cnt++; if (timeout_cnt>TIMEOUT) break;}  
+	KMem.SDT[88]=timeout_cnt;
+	value = LL_SPI_ReceiveData8( SPI1);
+	LL_SPI_TransmitData8(SPI1,0x5a);
+	timeout_cnt= 0; while (LL_SPI_IsActiveFlag_BSY(SPI1) == SET)	{timeout_cnt++; if (timeout_cnt>TIMEOUT) break;	}		
+	KMem.SDT[89]=timeout_cnt;
+	timeout_cnt= 0; while (LL_SPI_IsActiveFlag_RXNE(SPI1) == RESET)	{	timeout_cnt++; if (timeout_cnt>TIMEOUT) break;}
+	KMem.SDT[89]+=timeout_cnt;
+	value = LL_SPI_ReceiveData8( SPI1);
+	KMem.SDB[128+nIndexCount] = value;
+
+	nIndexCount++; 
+	if (nIndexCount>40) {nIndexCount=0;}
+  return value;
+}
+
+/**
+ * @brief   write byte in SPI interface
+ * @param   wb  the value to write
+ * @return  none
+ */
+static void w5500_spi_writebyte(uint8_t wb)
+{
+		int timeout_cnt= 0;
+	uint8_t value;
+	while (LL_SPI_IsActiveFlag_TXE(SPI1) == RESET)	{timeout_cnt++; if (timeout_cnt>TIMEOUT) break;	}
+		KMem.SDT[90]=timeout_cnt;
+    	LL_SPI_TransmitData8(SPI1,wb);
+	timeout_cnt= 0; while (LL_SPI_IsActiveFlag_BSY(SPI1) == SET)	{timeout_cnt++; if (timeout_cnt>TIMEOUT) break;	}
+		KMem.SDT[91]=timeout_cnt;
+	timeout_cnt= 0; while (LL_SPI_IsActiveFlag_RXNE(SPI1) == RESET)	{	timeout_cnt++; if (timeout_cnt>TIMEOUT) break;}
+		KMem.SDT[91]+=timeout_cnt;
+		value = LL_SPI_ReceiveData8( SPI1);	
+	
+}
+#endif
+
+/**
+ * @brief   burst read byte in SPI interface
+ * @param   pBuf    pointer of data buf
+ * @param   len     number of bytes to read
+ * @return  none
+ */
+static void w5500_spi_readburst(uint8_t* pBuf, uint16_t len)
+{
+    if (!pBuf) {
+        return;
+    }
+    uint8_t value;
+		for (int i=0;i<len;i++){
+			LL_SPI_TransmitData8(SPI1,0xFF);
+			while (LL_SPI_IsActiveFlag_TXE(SPI1) == RESET)	{	}
+			while (LL_SPI_IsActiveFlag_BSY(SPI1) == SET)	{	}		
+			value = LL_SPI_ReceiveData8( SPI1);
+			pBuf[i]=value;
+		}
+}
+
+/**
+ * @brief   burst write byte in SPI interface
+ * @param   pBuf    pointer of data buf
+ * @param   len     number of bytes to write
+ * @return  none
+ */
+static void w5500_spi_writeburst(uint8_t* pBuf, uint16_t len)
+{
+    if (!pBuf) {
+        return;
+    }
+    for (int i=0;i<len;i++)
+		{
+			
+    	LL_SPI_TransmitData8(SPI1,pBuf[i]);
+			while (LL_SPI_IsActiveFlag_TXE(SPI1) == RESET)	{	}
+		}
+			while (LL_SPI_IsActiveFlag_BSY(SPI1) == SET)		{		}			
+}
+
+/**
+ * @brief   hard reset
+ * @param   none
+ * @return  none
+ */
+static void w5500_hard_reset(void)
+{
+    HAL_GPIO_WritePin(W5500_RST_PORT, W5500_RST_PIN, GPIO_PIN_RESET);
+    HAL_Delay(50);
+    HAL_GPIO_WritePin(W5500_RST_PORT, W5500_RST_PIN, GPIO_PIN_SET);
+    HAL_Delay(10);
+}
+
+/**
+ * @brief   Initializes WIZCHIP with socket buffer size
+ * @param   none
+ * @return  errcode
+ * @retval  0   success
+ * @retval  -1  fail
+ */
+static int w5500_chip_init(void)
+{
+    /* default size is 2KB */
+    
+    return wizchip_init(NULL, NULL);
+}
+
+/**
+ * @brief   set phy config if autonego is disable
+ * @param   none
+ * @return  none
+ */
+static void w5500_phy_init(void)
+{
+#ifdef USE_AUTONEGO
+    // no thing to do
+#else
+    wiz_PhyConf conf;
+    
+    conf.by = PHY_CONFBY_SW;
+    conf.mode = PHY_MODE_MANUAL;
+    conf.speed = PHY_SPEED_100;
+    conf.duplex = PHY_DUPLEX_FULL;
+    
+    wizphy_setphyconf(&conf);
+#endif
+}
+
+/**
+ * @brief   initializes the network infomation
+ * @param   none
+ * @return  none
+ */
+static void w5500_network_info_init(void)
+{
+    wiz_NetInfo info;
+    
+    uint8_t mac[6] = DEFAULT_MAC_ADDR;
+    uint8_t ip[4] = DEFAULT_IP_ADDR;
+    uint8_t sn[4] = DEFAULT_SUB_MASK;
+    uint8_t gw[4] = DEFAULT_GW_ADDR;
+    uint8_t dns[4] = DEFAULT_DNS_ADDR;
+    
+    memcpy(info.mac, mac, 6);
+    memcpy(info.ip, ip, 4);
+    memcpy(info.sn, sn, 4);
+    memcpy(info.gw, gw, 4);
+    memcpy(info.dns, dns, 4);
+    
+#ifdef USE_DHCP
+    info.dhcp = NETINFO_DHCP;
+#else
+    info.dhcp = NETINFO_STATIC;
+#endif
+    
+    wizchip_setnetinfo(&info);
+}
+
+/**
+ * @brief   read and show the network infomation
+ * @param   none
+ * @return  none
+ */
+void w5500_network_info_show(void)
+{
+    wiz_NetInfo info;
+    
+    wizchip_getnetinfo(&info);
+    
+//    printf("w5500 network infomation:\r\n");
+//    printf("  -mac:%d:%d:%d:%d:%d:%d\r\n", info.mac[0], info.mac[1], info.mac[2], 
+//            info.mac[3], info.mac[4], info.mac[5]);
+//    printf("  -ip:%d.%d.%d.%d\r\n", info.ip[0], info.ip[1], info.ip[2], info.ip[3]);
+//    printf("  -sn:%d.%d.%d.%d\r\n", info.sn[0], info.sn[1], info.sn[2], info.sn[3]);
+//    printf("  -gw:%d.%d.%d.%d\r\n", info.gw[0], info.gw[1], info.gw[2], info.gw[3]);
+//    printf("  -dns:%d.%d.%d.%d\r\n", info.dns[0], info.dns[1], info.dns[2], info.dns[3]);
+    
+    if (info.dhcp == NETINFO_DHCP) {
+//        printf("  -dhcp_mode: dhcp\r\n");
+    } else {
+//        printf("  -dhcp_mode: static\r\n");
+    }
+		
+		KMem.SDB[192]=info.mac[0];KMem.SDB[193]=info.mac[1];KMem.SDB[194]=info.mac[2];
+		KMem.SDB[195]=info.mac[3];KMem.SDB[196]=info.mac[4];KMem.SDB[197]=info.mac[5];
+		
+		KMem.SDB[200]=info.ip[0];KMem.SDB[201]=info.ip[1];KMem.SDB[202]=info.ip[2];	KMem.SDB[203]=info.ip[3];
+		KMem.SDB[204]=info.sn[0];KMem.SDB[205]=info.sn[1];KMem.SDB[206]=info.sn[2];	KMem.SDB[207]=info.sn[3];
+
+		KMem.SDB[208]=info.gw[0];KMem.SDB[209]=info.gw[1];KMem.SDB[210]=info.gw[2];	KMem.SDB[211]=info.gw[3];
+		KMem.SDB[212]=info.dns[0];KMem.SDB[213]=info.dns[1];KMem.SDB[214]=info.dns[2];	KMem.SDB[215]=info.dns[3];
+		
+}
+
+/**
+ * @brief   w5500 init
+ * @param   none
+ * @return  errcode
+ * @retval  0   success
+ * @retval  -1  chip init fail
+ */
+int w5500_init(void)
+{
+    /* W5500 hard reset */
+    w5500_hard_reset();
+    
+    /* Register spi driver function */
+    reg_wizchip_cris_cbfunc(w5500_cris_enter, w5500_cris_exit);
+    reg_wizchip_cs_cbfunc(w5500_cs_select, w5500_cs_deselect);
+#ifdef SOFT_SPI
+    reg_wizchip_spi_cbfunc(w5500_spi_readbyte_sw, w5500_spi_writebyte_sw);
+
+#else	
+    reg_wizchip_spi_cbfunc(w5500_spi_readbyte, w5500_spi_writebyte);
+#endif
+	
+ //   reg_wizchip_spiburst_cbfunc(w5500_spi_readburst, w5500_spi_writeburst);
+
+    /* socket buffer size init */
+    if (w5500_chip_init() != 0) {
+        return -1;
+   }
+    
+    /* phy init */
+    w5500_phy_init();
+    
+    /* network infomation init */
+    w5500_network_info_init();
+    
+    /* show network infomation */
+    w5500_network_info_show();
+    
+    return 0;
+}
diff --git a/iolibrary_bsd_ethernet_v103.zip b/iolibrary_bsd_ethernet_v103.zip
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diff --git a/iolibrary_bsd_internet_v111.zip b/iolibrary_bsd_internet_v111.zip
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diff --git a/w5500_socket_apis_v103.zip b/w5500_socket_apis_v103.zip
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index 0000000..f344eee
--- /dev/null
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