| | |
| | | unsigned char Uart2RxBuf[RX2BUFSIZE]; |
| | | unsigned char Uart2TxBuf[TX2BUFSIZE]; |
| | | |
| | | unsigned char Uart1RxBuf1[Uart1RxBufSize]; |
| | | unsigned char Uart1TxBuf1[260]; |
| | | |
| | | unsigned char Uart2RxBuf1[RX2BUFSIZE]; |
| | | unsigned char Uart2TxBuf1[TX2BUFSIZE]; |
| | | |
| | | unsigned short Uart1RxBuf1DataLen = 0; |
| | | unsigned short Uart2RxBuf1DataLen = 0; |
| | | |
| | | unsigned char Uart1Mode = 1; //Uart1工作模式, 0 : 普通, 1 : 透传模式 |
| | | |
| | | unsigned int Uart1Baud = DefaultUart1Baud; |
| | | unsigned int Uart2Baud = DefaultUart2Baud; |
| | | |
| | | //unsigned char Uart1RecvBuf1[Uart1RecvBufSize]; |
| | | //unsigned short Uart1RecvBuf1DataLen=0; |
| | | |
| | | //unsigned char Uart2RecvBuf1[128]; |
| | | //unsigned short Uart2RecvBuf1DataLen=0; |
| | | |
| | | volatile char Uart1BaudGot=0; |
| | | volatile char Uart1BaudFirstGot=0; |
| | | volatile char Uart1DmaInts=0; |
| | | |
| | | |
| | | unsigned char SlowFlicker=0; |
| | | unsigned char FastFlicker=0; |
| | | |
| | |
| | | /* USER CODE END PFP */ |
| | | |
| | | /* USER CODE BEGIN 0 */ |
| | | #define SET_SCL LL_GPIO_SetOutputPin(GPIOB,LL_GPIO_PIN_6) |
| | | #define CLR_SCL LL_GPIO_ResetOutputPin(GPIOB,LL_GPIO_PIN_6) |
| | | #define GET_SCL LL_GPIO_IsInputPinSet(GPIOB,LL_GPIO_PIN_6) |
| | | #define SET_SDA LL_GPIO_SetOutputPin(GPIOB,LL_GPIO_PIN_7) |
| | | #define CLR_SDA LL_GPIO_ResetOutputPin(GPIOB,LL_GPIO_PIN_7) |
| | | #define GET_SDA LL_GPIO_IsInputPinSet(GPIOB,LL_GPIO_PIN_7) |
| | | |
| | | |
| | | void soft_i2c_start() |
| | | { |
| | | SET_SDA; |
| | | SET_SCL; |
| | | Delay100nS(1); |
| | | CLR_SDA; |
| | | Delay100nS(1); |
| | | CLR_SCL; |
| | | Delay100nS(1); |
| | | } |
| | | void soft_i2c_stop() |
| | | { |
| | | CLR_SDA; |
| | | Delay100nS(1); |
| | | SET_SCL; |
| | | Delay100nS(1); |
| | | SET_SDA; |
| | | Delay100nS(1); |
| | | } |
| | | void soft_i2c_send8(int nData) |
| | | { |
| | | int mask; |
| | | mask = 0x80; |
| | | for (int j=0;j<8;j++) |
| | | { |
| | | if (nData & mask) {SET_SDA;} |
| | | else {CLR_SDA;} |
| | | Delay100nS(1); |
| | | SET_SCL; |
| | | mask>>=1; |
| | | Delay100nS(1); |
| | | CLR_SCL; |
| | | } |
| | | return; |
| | | } |
| | | |
| | | uint8_t soft_i2c_recv8() |
| | | { |
| | | unsigned char nData=0; |
| | | for (int j=0;j<8;j++) |
| | | { |
| | | nData <<=1; |
| | | Delay100nS(1); |
| | | SET_SCL; |
| | | nData |= GET_SDA; |
| | | Delay100nS(1); |
| | | CLR_SCL; |
| | | } |
| | | return nData; |
| | | } |
| | | |
| | | void soft_i2c_send_ack() |
| | | { |
| | | CLR_SDA; |
| | | Delay100nS(2); |
| | | SET_SCL; |
| | | Delay100nS(2); |
| | | CLR_SCL; |
| | | SET_SDA; |
| | | Delay100nS(2); |
| | | |
| | | } |
| | | |
| | | void soft_i2c_send_nack() |
| | | { |
| | | SET_SDA; |
| | | Delay100nS(1); |
| | | SET_SCL; |
| | | Delay100nS(1); |
| | | CLR_SCL; |
| | | Delay100nS(1); |
| | | SET_SDA; |
| | | } |
| | | uint8_t soft_i2c_wait_ack(int nTime) |
| | | { |
| | | SET_SDA; // Open Drain; |
| | | Delay100nS(1); |
| | | SET_SCL; |
| | | for (int j=0;j<nTime;j++){ |
| | | Delay100nS(1); |
| | | if (GET_SDA == 0) break; |
| | | if (j==nTime-1) return 0; |
| | | } |
| | | CLR_SCL; |
| | | return 1; |
| | | } |
| | | uint8_t soft_i2c_check_addr(uint8_t Addr) |
| | | { |
| | | uint8_t res=0; |
| | | soft_i2c_start(); |
| | | // Send Device Addr 7bit; |
| | | soft_i2c_send8(Addr); |
| | | if (soft_i2c_wait_ack(10)) {res=1;} |
| | | //Stop |
| | | soft_i2c_stop(); |
| | | // */ |
| | | return res; |
| | | |
| | | } |
| | | uint8_t soft_i2c_read_len( uint8_t Addr , uint8_t Reg, uint8_t len,uint8_t *buf) |
| | | { |
| | | int res=0; |
| | | //Start |
| | | soft_i2c_start(); |
| | | // Send Device Addr 7bit; |
| | | soft_i2c_send8(Addr &0xfe); |
| | | // wait Ack; |
| | | if (!soft_i2c_wait_ack(1000)) {soft_i2c_stop();return 1;} |
| | | CLR_SCL; |
| | | // Send Reg Addr 8bit; |
| | | soft_i2c_send8(Reg); |
| | | if (!soft_i2c_wait_ack(1000)) {soft_i2c_stop();return 2;} |
| | | //Start |
| | | soft_i2c_start(); |
| | | // Send Device Addr 7bit; |
| | | soft_i2c_send8(Addr | 1); |
| | | if (!soft_i2c_wait_ack(1000)) {soft_i2c_stop();return 3;} |
| | | |
| | | // /* |
| | | // Recv Data(s) n * 8bit; |
| | | SET_SDA; // Open Drain; |
| | | for (int i=0;i<len;i++) |
| | | { |
| | | // recv 1 data 8bit; |
| | | unsigned char nData = 0; |
| | | nData = soft_i2c_recv8(); |
| | | buf[i]=nData; |
| | | // Send ACK / NACK; |
| | | if (i != len -1) { //ACK |
| | | soft_i2c_send_ack(); |
| | | } else { // NACK |
| | | soft_i2c_send_nack(); |
| | | } |
| | | } |
| | | |
| | | //Stop |
| | | soft_i2c_stop(); |
| | | // */ |
| | | return res; |
| | | } |
| | | |
| | | uint8_t soft_i2c_write_len(uint8_t Addr , uint8_t Reg, uint8_t len, uint8_t *buf) |
| | | { |
| | | int res=0; |
| | | //Start |
| | | soft_i2c_start(); |
| | | // Send Device Addr 7bit; |
| | | soft_i2c_send8(Addr &0xfe); |
| | | // wait Ack; |
| | | if (!soft_i2c_wait_ack(1000)) return 1; |
| | | CLR_SCL; |
| | | // Send Reg Addr 8bit; |
| | | soft_i2c_send8(Reg); |
| | | if (!soft_i2c_wait_ack(1000)) return 2; |
| | | for (int i=0;i<len;i++) |
| | | { |
| | | // send 1 data 8bit; |
| | | unsigned char nData = buf[i]; |
| | | soft_i2c_send8(nData); |
| | | // wait Ack; |
| | | if (!soft_i2c_wait_ack(1000)) {res = 5; break;} |
| | | } |
| | | //Stop |
| | | soft_i2c_stop(); |
| | | return res; |
| | | |
| | | } |
| | | |
| | | |
| | | |
| | | int HexToInt(char ch) |
| | | { |
| | |
| | | #endif |
| | | if (Uart2Stat.bPacketRecved) |
| | | { |
| | | KBusParsePacket(&KBus1, (pKBPacket)Uart2RecvBuf1, Uart2RecvBuf1DataLen); |
| | | Uart2RecvBuf1DataLen=0; |
| | | KBusParsePacket(&KBus1, (pKBPacket)Uart2RxBuf1, Uart2RxBuf1DataLen); |
| | | Uart2RxBuf1DataLen=0; |
| | | Uart2Stat.bPacketRecved=0; |
| | | Uart2RecvDMA(Uart2RecvBuf1,sizeof(Uart2RecvBuf1)); |
| | | Uart2RecvDMA(Uart2RxBuf1,sizeof(Uart2RxBuf1)); |
| | | KMem.WDT[2]++; |
| | | } |
| | | } |
| | |
| | | break; |
| | | case KBusEvDataUpdate: |
| | | if (KBus1.bMaster) { |
| | | KMem.WLX[0]=KBusMem.WLX[0]; //KPLC with KBus Master |
| | | KBusMem.WLY[0]=KMem.WLY[0]; |
| | | for (int i=0;i<16;i++) |
| | | { |
| | | KMem.WLX[i]=KBusMem.WLX[i]; //KPLC with KBus Master |
| | | KBusMem.WLY[i]=KMem.WLY[i]; |
| | | } |
| | | } else if (KBus1.bSlave) { |
| | | KMem.WLX[0]=KBusMem.WLY[0]; //KPLC with KBus Slave |
| | | KBusMem.WLX[0]=KMem.WLY[0]; |
| | | KMem.WLX[1]=KBusMem.WLY[1]; //KPLC with KBus Slave |
| | | KBusMem.WLX[1]=KMem.WLY[1]; |
| | | KMem.WLX[2]=KBusMem.WLY[2]; //KPLC with KBus Slave |
| | | KBusMem.WLX[2]=KMem.WLY[2]; |
| | | KMem.WLX[3]=KBusMem.WLY[3]; //KPLC with KBus Slave |
| | | KBusMem.WLX[3]=KMem.WLY[3]; |
| | | } |
| | | |
| | | break; |
| | | case KBusEvCmdResponse: |
| | | break; |
| | |
| | | Uart1Baud = DefaultUart1Baud; |
| | | MX_USART1_UART_Init(); |
| | | MX_USART2_UART_Init(); |
| | | |
| | | MX_SPI1_Init(); |
| | | LL_SPI_EnableIT_RXNE(SPI1); |
| | | /* |
| | | // MX_I2C1_Init(); |
| | | Soft_I2C1_Init(); |
| | | |
| | | unsigned char buf1[10] = {0x11,0x22,0x33,0x44,0x55,0x66,0x77,0x88,0x99,0xaa}; |
| | | unsigned char buf2[10]; |
| | | // KMem.WDB[80] = soft_i2c_read_len(0xa0,0x00,8,buf2); |
| | | // for (int i=0;i<8;i++){ |
| | | // buf2[i]+=1; |
| | | // } |
| | | // soft_i2c_write_len (0xa0,0x00,8,buf2); |
| | | // DelayUs(500); |
| | | // KMem.WDB[80] = soft_i2c_read_len(0xa0,0x00,8,&KMem.WDB[81]); |
| | | // DelayUs(500); |
| | | // KMem.WDB[90] = soft_i2c_read_len(0xa0,0x00,8,&KMem.WDB[91]); |
| | | |
| | | int nPos = 80; |
| | | int nCount =0; |
| | | for (int i=0;i<256;i++) |
| | | { |
| | | if (soft_i2c_check_addr(i)){ |
| | | KMem.WDB[nPos + 1 + nCount ] = i; |
| | | nCount+=1; |
| | | } |
| | | DelayUs(10); |
| | | } |
| | | KMem.WDB[nPos] = nCount; |
| | | */ |
| | | #if (BOARD_TYPE == 14) |
| | | // MX_SPI2_Init(); |
| | | // MX_ADC_Init(); |
| | |
| | | LL_USART_EnableIT_TC(USART1); |
| | | |
| | | // LL_USART_EnableIT_RXNE(USART2); |
| | | Uart2RecvDMA(Uart2RecvBuf1,sizeof(Uart2RecvBuf1)); |
| | | Uart2RecvDMA(Uart2RxBuf1,sizeof(Uart2RxBuf1)); |
| | | LL_USART_EnableIT_IDLE(USART2); |
| | | LL_USART_EnableIT_TC(USART2); |
| | | #if (BOARD_TYPE == 13) |
| | |
| | | // LL_USART_SetAutoBaudRateMode(USART2, LL_USART_AUTOBAUD_DETECT_ON_FALLINGEDGE); |
| | | } |
| | | //LL_USART_EnableIT_TXE(USART1); |
| | | |
| | | // KMem.WDT[50] = SPI_Flash_ReadID(); |
| | | |
| | | /* USER CODE END 2 */ |
| | | |
| | | |
| | |
| | | KWireLessInit(KMem.EffJumperSW&0x20,KMem.EffJumperSW&0x0f); |
| | | KWireLessStart(); |
| | | #endif |
| | | |
| | | |
| | | while (1) |
| | | { |
| | |
| | | // memcpy(&KMem.SDT[64+nSize/2],&KBusChnStats[2],nSize); |
| | | // for (int i=0;i<128;i++) { SDT[i]=i; } |
| | | // SDT[48]=55; |
| | | if (Uart1RecvBuf1DataLen >0 && Uart1Stat.bPacketRecved) |
| | | if (Uart1RxBuf1DataLen >0 && Uart1Stat.bPacketRecved) |
| | | { |
| | | int res1 = -1; |
| | | res1 = ModBusSlaveParsePkg(1, Uart1RecvBuf1, Uart1RecvBuf1DataLen); |
| | | res1 = ModBusSlaveParsePkg(1, Uart1RxBuf1, Uart1RxBuf1DataLen); |
| | | if (res1 !=0) |
| | | { |
| | | KLParsePacket(1, Uart1RecvBuf1, Uart1RecvBuf1DataLen); |
| | | KLParsePacket(1, Uart1RxBuf1, Uart1RxBuf1DataLen); |
| | | } |
| | | Uart1RecvBuf1DataLen=0; |
| | | Uart1RxBuf1DataLen=0; |
| | | Uart1Stat.bPacketRecved=0; |
| | | Uart1IdelTimer = 0; |
| | | }else { |