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#include "stm32f0xx_hal.h"
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#include "w5500_port.h"
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#include "Globaldef.h"
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#include "KMachine.h"
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/**
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* @brief enter critical section
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* @param none
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* @return none
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*/
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static void w5500_cris_enter(void)
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{
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__disable_irq();
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}
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/**
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* @brief exit critical section
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* @param none
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* @return none
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*/
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static void w5500_cris_exit(void)
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{
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__enable_irq();
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}
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#define setW5500CLK_0() LL_GPIO_ResetOutputPin(GPIOB,LL_GPIO_PIN_3)
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#define setW5500CLK_1() LL_GPIO_SetOutputPin(GPIOB,LL_GPIO_PIN_3)
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#define SetW5500SER_0() LL_GPIO_ResetOutputPin(GPIOB,LL_GPIO_PIN_5)
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#define SetW5500SER_1() LL_GPIO_SetOutputPin(GPIOB,LL_GPIO_PIN_5)
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#define GetW5500SER() LL_GPIO_IsInputPinSet(GPIOB,LL_GPIO_PIN_4)
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/**
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* @brief select chip
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* @param none
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* @return none
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*/
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int nIndexCount=0;
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static void w5500_cs_select(void)
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{
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// setW5500CLK_1();
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LL_GPIO_ResetOutputPin(GPIOA,LL_GPIO_PIN_15);
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nIndexCount=0;
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}
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/**
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* @brief deselect chip
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* @param none
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* @return none
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*/
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static void w5500_cs_deselect(void)
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{
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LL_GPIO_SetOutputPin(GPIOA,LL_GPIO_PIN_15);
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}
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#ifdef SOFT_SPI
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static uint8_t w5500_spi_readbyte_sw(void)
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{
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uint8_t value=0;
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unsigned int mask1=0x0080;
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// volatile uint32_t * p1=&GPIOA->IDR;
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SetW5500SER_1();
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for (;mask1;)
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{
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setW5500CLK_0();
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//*p1=LL_GPIO_PIN_13;
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setW5500CLK_1();
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if (GetW5500SER()) value |= mask1;
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mask1>>=1;
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// __nop();
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//*p2=LL_GPIO_PIN_13;
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}
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KMem.SDB[128+nIndexCount] = value;
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nIndexCount++;
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if (nIndexCount>40) {nIndexCount=0;}
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return value;
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}
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static void w5500_spi_writebyte_sw(uint8_t wb)
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{
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unsigned int mask1=0x0080;
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//volatile uint32_t * p1 = &GPIOB->BRR;
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//volatile uint32_t * p2 = &GPIOB->BSRR;
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KMem.SDB[128+nIndexCount] = wb;
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nIndexCount++;
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if (nIndexCount>40) {nIndexCount=0;}
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for (;mask1;)
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{
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setW5500CLK_0();
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//*p1=LL_GPIO_PIN_13;
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if (wb&mask1) {SetW5500SER_1();}
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else {SetW5500SER_0();}
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mask1>>=1;
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setW5500CLK_1();
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// __nop();
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//*p2=LL_GPIO_PIN_13;
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}
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}
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#else
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/**
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* @brief read byte in SPI interface
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* @param none
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* @return the value of the byte read
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*/
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#define TIMEOUT 50
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static uint8_t w5500_spi_readbyte(void)
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{
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uint8_t value;
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int timeout_cnt= 0;
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while (LL_SPI_IsActiveFlag_TXE(SPI1) == RESET) { timeout_cnt++; if (timeout_cnt>TIMEOUT) break;}
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KMem.SDT[88]=timeout_cnt;
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value = LL_SPI_ReceiveData8( SPI1);
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LL_SPI_TransmitData8(SPI1,0x5a);
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timeout_cnt= 0; while (LL_SPI_IsActiveFlag_BSY(SPI1) == SET) {timeout_cnt++; if (timeout_cnt>TIMEOUT) break; }
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KMem.SDT[89]=timeout_cnt;
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timeout_cnt= 0; while (LL_SPI_IsActiveFlag_RXNE(SPI1) == RESET) { timeout_cnt++; if (timeout_cnt>TIMEOUT) break;}
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KMem.SDT[89]+=timeout_cnt;
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value = LL_SPI_ReceiveData8( SPI1);
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KMem.SDB[128+nIndexCount] = value;
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nIndexCount++;
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if (nIndexCount>40) {nIndexCount=0;}
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return value;
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}
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/**
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* @brief write byte in SPI interface
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* @param wb the value to write
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* @return none
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*/
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static void w5500_spi_writebyte(uint8_t wb)
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{
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int timeout_cnt= 0;
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uint8_t value;
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while (LL_SPI_IsActiveFlag_TXE(SPI1) == RESET) {timeout_cnt++; if (timeout_cnt>TIMEOUT) break; }
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KMem.SDT[90]=timeout_cnt;
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LL_SPI_TransmitData8(SPI1,wb);
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timeout_cnt= 0; while (LL_SPI_IsActiveFlag_BSY(SPI1) == SET) {timeout_cnt++; if (timeout_cnt>TIMEOUT) break; }
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KMem.SDT[91]=timeout_cnt;
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timeout_cnt= 0; while (LL_SPI_IsActiveFlag_RXNE(SPI1) == RESET) { timeout_cnt++; if (timeout_cnt>TIMEOUT) break;}
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KMem.SDT[91]+=timeout_cnt;
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value = LL_SPI_ReceiveData8( SPI1);
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}
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#endif
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/**
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* @brief burst read byte in SPI interface
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* @param pBuf pointer of data buf
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* @param len number of bytes to read
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* @return none
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*/
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static void w5500_spi_readburst(uint8_t* pBuf, uint16_t len)
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{
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if (!pBuf) {
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return;
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}
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uint8_t value;
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for (int i=0;i<len;i++){
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LL_SPI_TransmitData8(SPI1,0xFF);
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while (LL_SPI_IsActiveFlag_TXE(SPI1) == RESET) { }
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while (LL_SPI_IsActiveFlag_BSY(SPI1) == SET) { }
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value = LL_SPI_ReceiveData8( SPI1);
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pBuf[i]=value;
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}
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}
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/**
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* @brief burst write byte in SPI interface
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* @param pBuf pointer of data buf
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* @param len number of bytes to write
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* @return none
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*/
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static void w5500_spi_writeburst(uint8_t* pBuf, uint16_t len)
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{
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if (!pBuf) {
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return;
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}
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for (int i=0;i<len;i++)
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{
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LL_SPI_TransmitData8(SPI1,pBuf[i]);
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while (LL_SPI_IsActiveFlag_TXE(SPI1) == RESET) { }
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}
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while (LL_SPI_IsActiveFlag_BSY(SPI1) == SET) { }
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}
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/**
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* @brief hard reset
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* @param none
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* @return none
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*/
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static void w5500_hard_reset(void)
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{
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HAL_GPIO_WritePin(W5500_RST_PORT, W5500_RST_PIN, GPIO_PIN_RESET);
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HAL_Delay(50);
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HAL_GPIO_WritePin(W5500_RST_PORT, W5500_RST_PIN, GPIO_PIN_SET);
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HAL_Delay(10);
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}
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/**
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* @brief Initializes WIZCHIP with socket buffer size
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* @param none
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* @return errcode
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* @retval 0 success
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* @retval -1 fail
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*/
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static int w5500_chip_init(void)
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{
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/* default size is 2KB */
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return wizchip_init(NULL, NULL);
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}
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/**
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* @brief set phy config if autonego is disable
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* @param none
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* @return none
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*/
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static void w5500_phy_init(void)
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{
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#ifdef USE_AUTONEGO
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// no thing to do
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#else
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wiz_PhyConf conf;
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conf.by = PHY_CONFBY_SW;
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conf.mode = PHY_MODE_MANUAL;
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conf.speed = PHY_SPEED_100;
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conf.duplex = PHY_DUPLEX_FULL;
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wizphy_setphyconf(&conf);
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#endif
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}
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/**
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* @brief initializes the network infomation
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* @param none
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* @return none
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*/
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static void w5500_network_info_init(void)
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{
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wiz_NetInfo info;
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uint8_t mac[6] = DEFAULT_MAC_ADDR;
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uint8_t ip[4] = DEFAULT_IP_ADDR;
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uint8_t sn[4] = DEFAULT_SUB_MASK;
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uint8_t gw[4] = DEFAULT_GW_ADDR;
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uint8_t dns[4] = DEFAULT_DNS_ADDR;
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memcpy(info.mac, mac, 6);
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memcpy(info.ip, ip, 4);
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memcpy(info.sn, sn, 4);
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memcpy(info.gw, gw, 4);
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memcpy(info.dns, dns, 4);
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#ifdef USE_DHCP
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info.dhcp = NETINFO_DHCP;
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#else
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info.dhcp = NETINFO_STATIC;
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#endif
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wizchip_setnetinfo(&info);
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}
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/**
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* @brief read and show the network infomation
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* @param none
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* @return none
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*/
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void w5500_network_info_show(void)
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{
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wiz_NetInfo info;
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wizchip_getnetinfo(&info);
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// printf("w5500 network infomation:\r\n");
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// printf(" -mac:%d:%d:%d:%d:%d:%d\r\n", info.mac[0], info.mac[1], info.mac[2],
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// info.mac[3], info.mac[4], info.mac[5]);
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// printf(" -ip:%d.%d.%d.%d\r\n", info.ip[0], info.ip[1], info.ip[2], info.ip[3]);
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// printf(" -sn:%d.%d.%d.%d\r\n", info.sn[0], info.sn[1], info.sn[2], info.sn[3]);
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// printf(" -gw:%d.%d.%d.%d\r\n", info.gw[0], info.gw[1], info.gw[2], info.gw[3]);
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// printf(" -dns:%d.%d.%d.%d\r\n", info.dns[0], info.dns[1], info.dns[2], info.dns[3]);
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if (info.dhcp == NETINFO_DHCP) {
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// printf(" -dhcp_mode: dhcp\r\n");
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} else {
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// printf(" -dhcp_mode: static\r\n");
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}
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KMem.SDB[192]=info.mac[0];KMem.SDB[193]=info.mac[1];KMem.SDB[194]=info.mac[2];
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KMem.SDB[195]=info.mac[3];KMem.SDB[196]=info.mac[4];KMem.SDB[197]=info.mac[5];
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KMem.SDB[200]=info.ip[0];KMem.SDB[201]=info.ip[1];KMem.SDB[202]=info.ip[2]; KMem.SDB[203]=info.ip[3];
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KMem.SDB[204]=info.sn[0];KMem.SDB[205]=info.sn[1];KMem.SDB[206]=info.sn[2]; KMem.SDB[207]=info.sn[3];
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KMem.SDB[208]=info.gw[0];KMem.SDB[209]=info.gw[1];KMem.SDB[210]=info.gw[2]; KMem.SDB[211]=info.gw[3];
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KMem.SDB[212]=info.dns[0];KMem.SDB[213]=info.dns[1];KMem.SDB[214]=info.dns[2]; KMem.SDB[215]=info.dns[3];
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}
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/**
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* @brief w5500 init
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* @param none
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* @return errcode
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* @retval 0 success
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* @retval -1 chip init fail
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*/
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int w5500_init(void)
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{
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/* W5500 hard reset */
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w5500_hard_reset();
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/* Register spi driver function */
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reg_wizchip_cris_cbfunc(w5500_cris_enter, w5500_cris_exit);
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reg_wizchip_cs_cbfunc(w5500_cs_select, w5500_cs_deselect);
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#ifdef SOFT_SPI
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reg_wizchip_spi_cbfunc(w5500_spi_readbyte_sw, w5500_spi_writebyte_sw);
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#else
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reg_wizchip_spi_cbfunc(w5500_spi_readbyte, w5500_spi_writebyte);
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#endif
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// reg_wizchip_spiburst_cbfunc(w5500_spi_readburst, w5500_spi_writeburst);
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/* socket buffer size init */
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if (w5500_chip_init() != 0) {
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return -1;
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}
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/* phy init */
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w5500_phy_init();
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/* network infomation init */
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w5500_network_info_init();
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/* show network infomation */
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w5500_network_info_show();
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return 0;
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}
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