提交 | 用户 | age
|
bfc108
|
1 |
/**
|
Q |
2 |
******************************************************************************
|
|
3 |
* @file stm32f0xx_hal_cortex.c
|
|
4 |
* @author MCD Application Team
|
|
5 |
* @brief CORTEX HAL module driver.
|
|
6 |
* This file provides firmware functions to manage the following
|
|
7 |
* functionalities of the CORTEX:
|
|
8 |
* + Initialization and de-initialization functions
|
|
9 |
* + Peripheral Control functions
|
|
10 |
*
|
|
11 |
* @verbatim
|
|
12 |
==============================================================================
|
|
13 |
##### How to use this driver #####
|
|
14 |
==============================================================================
|
|
15 |
|
|
16 |
[..]
|
|
17 |
*** How to configure Interrupts using CORTEX HAL driver ***
|
|
18 |
===========================================================
|
|
19 |
[..]
|
|
20 |
This section provides functions allowing to configure the NVIC interrupts (IRQ).
|
|
21 |
The Cortex-M0 exceptions are managed by CMSIS functions.
|
|
22 |
(#) Enable and Configure the priority of the selected IRQ Channels.
|
|
23 |
The priority can be 0..3.
|
|
24 |
|
|
25 |
-@- Lower priority values gives higher priority.
|
|
26 |
-@- Priority Order:
|
|
27 |
(#@) Lowest priority.
|
|
28 |
(#@) Lowest hardware priority (IRQn position).
|
|
29 |
|
|
30 |
(#) Configure the priority of the selected IRQ Channels using HAL_NVIC_SetPriority()
|
|
31 |
|
|
32 |
(#) Enable the selected IRQ Channels using HAL_NVIC_EnableIRQ()
|
|
33 |
|
|
34 |
-@- Negative value of IRQn_Type are not allowed.
|
|
35 |
|
|
36 |
|
|
37 |
[..]
|
|
38 |
*** How to configure Systick using CORTEX HAL driver ***
|
|
39 |
========================================================
|
|
40 |
[..]
|
|
41 |
Setup SysTick Timer for time base.
|
|
42 |
|
|
43 |
(+) The HAL_SYSTICK_Config()function calls the SysTick_Config() function which
|
|
44 |
is a CMSIS function that:
|
|
45 |
(++) Configures the SysTick Reload register with value passed as function parameter.
|
|
46 |
(++) Configures the SysTick IRQ priority to the lowest value (0x03).
|
|
47 |
(++) Resets the SysTick Counter register.
|
|
48 |
(++) Configures the SysTick Counter clock source to be Core Clock Source (HCLK).
|
|
49 |
(++) Enables the SysTick Interrupt.
|
|
50 |
(++) Starts the SysTick Counter.
|
|
51 |
|
|
52 |
(+) You can change the SysTick Clock source to be HCLK_Div8 by calling the macro
|
|
53 |
HAL_SYSTICK_CLKSourceConfig(SYSTICK_CLKSOURCE_HCLK_DIV8) just after the
|
|
54 |
HAL_SYSTICK_Config() function call. The HAL_SYSTICK_CLKSourceConfig() macro is defined
|
|
55 |
inside the stm32f0xx_hal_cortex.h file.
|
|
56 |
|
|
57 |
(+) You can change the SysTick IRQ priority by calling the
|
|
58 |
HAL_NVIC_SetPriority(SysTick_IRQn,...) function just after the HAL_SYSTICK_Config() function
|
|
59 |
call. The HAL_NVIC_SetPriority() call the NVIC_SetPriority() function which is a CMSIS function.
|
|
60 |
|
|
61 |
(+) To adjust the SysTick time base, use the following formula:
|
|
62 |
|
|
63 |
Reload Value = SysTick Counter Clock (Hz) x Desired Time base (s)
|
|
64 |
(++) Reload Value is the parameter to be passed for HAL_SYSTICK_Config() function
|
|
65 |
(++) Reload Value should not exceed 0xFFFFFF
|
|
66 |
|
|
67 |
@endverbatim
|
|
68 |
******************************************************************************
|
|
69 |
* @attention
|
|
70 |
*
|
|
71 |
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
|
|
72 |
*
|
|
73 |
* Redistribution and use in source and binary forms, with or without modification,
|
|
74 |
* are permitted provided that the following conditions are met:
|
|
75 |
* 1. Redistributions of source code must retain the above copyright notice,
|
|
76 |
* this list of conditions and the following disclaimer.
|
|
77 |
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
|
78 |
* this list of conditions and the following disclaimer in the documentation
|
|
79 |
* and/or other materials provided with the distribution.
|
|
80 |
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
|
81 |
* may be used to endorse or promote products derived from this software
|
|
82 |
* without specific prior written permission.
|
|
83 |
*
|
|
84 |
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
|
85 |
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
|
86 |
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
|
87 |
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
|
88 |
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
|
89 |
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
|
90 |
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
|
91 |
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
|
92 |
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
|
93 |
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
|
94 |
*
|
|
95 |
******************************************************************************
|
|
96 |
*/
|
|
97 |
|
|
98 |
/* Includes ------------------------------------------------------------------*/
|
|
99 |
#include "stm32f0xx_hal.h"
|
|
100 |
|
|
101 |
/** @addtogroup STM32F0xx_HAL_Driver
|
|
102 |
* @{
|
|
103 |
*/
|
|
104 |
|
|
105 |
/** @defgroup CORTEX CORTEX
|
|
106 |
* @brief CORTEX CORTEX HAL module driver
|
|
107 |
* @{
|
|
108 |
*/
|
|
109 |
|
|
110 |
#ifdef HAL_CORTEX_MODULE_ENABLED
|
|
111 |
|
|
112 |
/* Private typedef -----------------------------------------------------------*/
|
|
113 |
/* Private define ------------------------------------------------------------*/
|
|
114 |
/* Private macro -------------------------------------------------------------*/
|
|
115 |
/* Private variables ---------------------------------------------------------*/
|
|
116 |
/* Private function prototypes -----------------------------------------------*/
|
|
117 |
/* Exported functions ---------------------------------------------------------*/
|
|
118 |
|
|
119 |
/** @defgroup CORTEX_Exported_Functions CORTEX Exported Functions
|
|
120 |
* @{
|
|
121 |
*/
|
|
122 |
|
|
123 |
|
|
124 |
/** @defgroup CORTEX_Exported_Functions_Group1 Initialization and de-initialization functions
|
|
125 |
* @brief Initialization and Configuration functions
|
|
126 |
*
|
|
127 |
@verbatim
|
|
128 |
==============================================================================
|
|
129 |
##### Initialization and de-initialization functions #####
|
|
130 |
==============================================================================
|
|
131 |
[..]
|
|
132 |
This section provides the CORTEX HAL driver functions allowing to configure Interrupts
|
|
133 |
Systick functionalities
|
|
134 |
|
|
135 |
@endverbatim
|
|
136 |
* @{
|
|
137 |
*/
|
|
138 |
|
|
139 |
/**
|
|
140 |
* @brief Sets the priority of an interrupt.
|
|
141 |
* @param IRQn External interrupt number .
|
|
142 |
* This parameter can be an enumerator of IRQn_Type enumeration
|
|
143 |
* (For the complete STM32 Devices IRQ Channels list, please refer to stm32f0xx.h file)
|
|
144 |
* @param PreemptPriority The preemption priority for the IRQn channel.
|
|
145 |
* This parameter can be a value between 0 and 3.
|
|
146 |
* A lower priority value indicates a higher priority
|
|
147 |
* @param SubPriority the subpriority level for the IRQ channel.
|
|
148 |
* with stm32f0xx devices, this parameter is a dummy value and it is ignored, because
|
|
149 |
* no subpriority supported in Cortex M0 based products.
|
|
150 |
* @retval None
|
|
151 |
*/
|
|
152 |
void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority)
|
|
153 |
{
|
|
154 |
/* Check the parameters */
|
|
155 |
assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority));
|
|
156 |
NVIC_SetPriority(IRQn,PreemptPriority);
|
|
157 |
}
|
|
158 |
|
|
159 |
/**
|
|
160 |
* @brief Enables a device specific interrupt in the NVIC interrupt controller.
|
|
161 |
* @note To configure interrupts priority correctly, the NVIC_PriorityGroupConfig()
|
|
162 |
* function should be called before.
|
|
163 |
* @param IRQn External interrupt number.
|
|
164 |
* This parameter can be an enumerator of IRQn_Type enumeration
|
|
165 |
* (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f0xxxx.h))
|
|
166 |
* @retval None
|
|
167 |
*/
|
|
168 |
void HAL_NVIC_EnableIRQ(IRQn_Type IRQn)
|
|
169 |
{
|
|
170 |
/* Check the parameters */
|
|
171 |
assert_param(IS_NVIC_DEVICE_IRQ(IRQn));
|
|
172 |
|
|
173 |
/* Enable interrupt */
|
|
174 |
NVIC_EnableIRQ(IRQn);
|
|
175 |
}
|
|
176 |
|
|
177 |
/**
|
|
178 |
* @brief Disables a device specific interrupt in the NVIC interrupt controller.
|
|
179 |
* @param IRQn External interrupt number.
|
|
180 |
* This parameter can be an enumerator of IRQn_Type enumeration
|
|
181 |
* (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f0xxxx.h))
|
|
182 |
* @retval None
|
|
183 |
*/
|
|
184 |
void HAL_NVIC_DisableIRQ(IRQn_Type IRQn)
|
|
185 |
{
|
|
186 |
/* Check the parameters */
|
|
187 |
assert_param(IS_NVIC_DEVICE_IRQ(IRQn));
|
|
188 |
|
|
189 |
/* Disable interrupt */
|
|
190 |
NVIC_DisableIRQ(IRQn);
|
|
191 |
}
|
|
192 |
|
|
193 |
/**
|
|
194 |
* @brief Initiates a system reset request to reset the MCU.
|
|
195 |
* @retval None
|
|
196 |
*/
|
|
197 |
void HAL_NVIC_SystemReset(void)
|
|
198 |
{
|
|
199 |
/* System Reset */
|
|
200 |
NVIC_SystemReset();
|
|
201 |
}
|
|
202 |
|
|
203 |
/**
|
|
204 |
* @brief Initializes the System Timer and its interrupt, and starts the System Tick Timer.
|
|
205 |
* Counter is in free running mode to generate periodic interrupts.
|
|
206 |
* @param TicksNumb Specifies the ticks Number of ticks between two interrupts.
|
|
207 |
* @retval status: - 0 Function succeeded.
|
|
208 |
* - 1 Function failed.
|
|
209 |
*/
|
|
210 |
uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb)
|
|
211 |
{
|
|
212 |
return SysTick_Config(TicksNumb);
|
|
213 |
}
|
|
214 |
/**
|
|
215 |
* @}
|
|
216 |
*/
|
|
217 |
|
|
218 |
/** @defgroup CORTEX_Exported_Functions_Group2 Peripheral Control functions
|
|
219 |
* @brief Cortex control functions
|
|
220 |
*
|
|
221 |
@verbatim
|
|
222 |
==============================================================================
|
|
223 |
##### Peripheral Control functions #####
|
|
224 |
==============================================================================
|
|
225 |
[..]
|
|
226 |
This subsection provides a set of functions allowing to control the CORTEX
|
|
227 |
(NVIC, SYSTICK) functionalities.
|
|
228 |
|
|
229 |
|
|
230 |
@endverbatim
|
|
231 |
* @{
|
|
232 |
*/
|
|
233 |
|
|
234 |
|
|
235 |
/**
|
|
236 |
* @brief Gets the priority of an interrupt.
|
|
237 |
* @param IRQn External interrupt number.
|
|
238 |
* This parameter can be an enumerator of IRQn_Type enumeration
|
|
239 |
* (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f0xxxx.h))
|
|
240 |
* @retval None
|
|
241 |
*/
|
|
242 |
uint32_t HAL_NVIC_GetPriority(IRQn_Type IRQn)
|
|
243 |
{
|
|
244 |
/* Get priority for Cortex-M system or device specific interrupts */
|
|
245 |
return NVIC_GetPriority(IRQn);
|
|
246 |
}
|
|
247 |
|
|
248 |
/**
|
|
249 |
* @brief Sets Pending bit of an external interrupt.
|
|
250 |
* @param IRQn External interrupt number
|
|
251 |
* This parameter can be an enumerator of IRQn_Type enumeration
|
|
252 |
* (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f0xxxx.h))
|
|
253 |
* @retval None
|
|
254 |
*/
|
|
255 |
void HAL_NVIC_SetPendingIRQ(IRQn_Type IRQn)
|
|
256 |
{
|
|
257 |
/* Check the parameters */
|
|
258 |
assert_param(IS_NVIC_DEVICE_IRQ(IRQn));
|
|
259 |
|
|
260 |
/* Set interrupt pending */
|
|
261 |
NVIC_SetPendingIRQ(IRQn);
|
|
262 |
}
|
|
263 |
|
|
264 |
/**
|
|
265 |
* @brief Gets Pending Interrupt (reads the pending register in the NVIC
|
|
266 |
* and returns the pending bit for the specified interrupt).
|
|
267 |
* @param IRQn External interrupt number.
|
|
268 |
* This parameter can be an enumerator of IRQn_Type enumeration
|
|
269 |
* (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f0xxxx.h))
|
|
270 |
* @retval status: - 0 Interrupt status is not pending.
|
|
271 |
* - 1 Interrupt status is pending.
|
|
272 |
*/
|
|
273 |
uint32_t HAL_NVIC_GetPendingIRQ(IRQn_Type IRQn)
|
|
274 |
{
|
|
275 |
/* Check the parameters */
|
|
276 |
assert_param(IS_NVIC_DEVICE_IRQ(IRQn));
|
|
277 |
|
|
278 |
/* Return 1 if pending else 0 */
|
|
279 |
return NVIC_GetPendingIRQ(IRQn);
|
|
280 |
}
|
|
281 |
|
|
282 |
/**
|
|
283 |
* @brief Clears the pending bit of an external interrupt.
|
|
284 |
* @param IRQn External interrupt number.
|
|
285 |
* This parameter can be an enumerator of IRQn_Type enumeration
|
|
286 |
* (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f0xxxx.h))
|
|
287 |
* @retval None
|
|
288 |
*/
|
|
289 |
void HAL_NVIC_ClearPendingIRQ(IRQn_Type IRQn)
|
|
290 |
{
|
|
291 |
/* Check the parameters */
|
|
292 |
assert_param(IS_NVIC_DEVICE_IRQ(IRQn));
|
|
293 |
|
|
294 |
/* Clear pending interrupt */
|
|
295 |
NVIC_ClearPendingIRQ(IRQn);
|
|
296 |
}
|
|
297 |
|
|
298 |
/**
|
|
299 |
* @brief Configures the SysTick clock source.
|
|
300 |
* @param CLKSource specifies the SysTick clock source.
|
|
301 |
* This parameter can be one of the following values:
|
|
302 |
* @arg SYSTICK_CLKSOURCE_HCLK_DIV8: AHB clock divided by 8 selected as SysTick clock source.
|
|
303 |
* @arg SYSTICK_CLKSOURCE_HCLK: AHB clock selected as SysTick clock source.
|
|
304 |
* @retval None
|
|
305 |
*/
|
|
306 |
void HAL_SYSTICK_CLKSourceConfig(uint32_t CLKSource)
|
|
307 |
{
|
|
308 |
/* Check the parameters */
|
|
309 |
assert_param(IS_SYSTICK_CLK_SOURCE(CLKSource));
|
|
310 |
if (CLKSource == SYSTICK_CLKSOURCE_HCLK)
|
|
311 |
{
|
|
312 |
SysTick->CTRL |= SYSTICK_CLKSOURCE_HCLK;
|
|
313 |
}
|
|
314 |
else
|
|
315 |
{
|
|
316 |
SysTick->CTRL &= ~SYSTICK_CLKSOURCE_HCLK;
|
|
317 |
}
|
|
318 |
}
|
|
319 |
|
|
320 |
/**
|
|
321 |
* @brief This function handles SYSTICK interrupt request.
|
|
322 |
* @retval None
|
|
323 |
*/
|
|
324 |
void HAL_SYSTICK_IRQHandler(void)
|
|
325 |
{
|
|
326 |
HAL_SYSTICK_Callback();
|
|
327 |
}
|
|
328 |
|
|
329 |
/**
|
|
330 |
* @brief SYSTICK callback.
|
|
331 |
* @retval None
|
|
332 |
*/
|
|
333 |
__weak void HAL_SYSTICK_Callback(void)
|
|
334 |
{
|
|
335 |
/* NOTE : This function Should not be modified, when the callback is needed,
|
|
336 |
the HAL_SYSTICK_Callback could be implemented in the user file
|
|
337 |
*/
|
|
338 |
}
|
|
339 |
|
|
340 |
/**
|
|
341 |
* @}
|
|
342 |
*/
|
|
343 |
|
|
344 |
/**
|
|
345 |
* @}
|
|
346 |
*/
|
|
347 |
|
|
348 |
#endif /* HAL_CORTEX_MODULE_ENABLED */
|
|
349 |
/**
|
|
350 |
* @}
|
|
351 |
*/
|
|
352 |
|
|
353 |
/**
|
|
354 |
* @}
|
|
355 |
*/
|
|
356 |
|
|
357 |
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|