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QuakeGod

2022-10-17 d69aae90ede578aaebc355dafd3496993ccea126

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bfc108	1	/**
Q	2	******************************************************************************
	3	* @file : functions.c
	4	* @brief : funcstions program body
	5	******************************************************************************
	6	*/
	7	//#include "globaldef.h"
	8	#include "functions.h"
	9	#include "string.h"
	10	#include "stm32f0xx_hal.h"
d69aae	11	#if (BOARD_TYPE == 12)
Q	12	#include "fp0.h"
	13	#endif
bfc108	14	extern __IO uint32_t uwTick;
Q	15	//#include "Myprotocol.h"
	16	int TickFreq=10000;
	17	int CoreClkMHz; //=SystemCoreClock/1000000;
	18	int TickPriodClk; //=SystemCoreClock/TickFreq;
	19	unsigned int TickPrioduS; //
	20	volatile unsigned int nCurTick=0;
	21	volatile unsigned int CurTickuS=0;
	22	//volatile unsigned int ThisRunTime=0; //开机时间
	23	//volatile unsigned int TotalRunTime=0; //总开机时间
	24	//volatile unsigned int PwrCount=0; //开机次数
	25	unsigned short ClkuS; //每个Clk的nS数，
	26
	27	int InituS(int TickFreq1)
	28	{
	29	TickPrioduS=1000000/TickFreq1; //每个SysTick的微秒数
	30	CoreClkMHz=HAL_RCC_GetHCLKFreq()/1000000; //=SystemCoreClock/1000000;每uS的时钟数
	31	TickPriodClk=SystemCoreClock/TickFreq1; //每个SysTick的时钟数
	32	ClkuS=(1000000LL*65536)/SystemCoreClock;
	33	CurTickuS=TickPrioduS+100u;
	34	return 0;
	35	}
	36
	37	inline unsigned int GetuS(void)
	38	{
	39	// unsigned short Clk1=SysTick->VAL;
	40
	41	int CurTickuS1=CurTickuS;
	42	int Val1=SysTick->VAL;
	43	if (CurTickuS1 != CurTickuS )
	44	{
	45	CurTickuS1=CurTickuS;
	46	Val1=SysTick->VAL;
	47	}
	48	uint32_t us1=CurTickuS1-(((Val1)*1365)>>16);
	49	return us1;
	50	}
	51
	52	inline unsigned int GetTick(void)
	53	{
	54	// unsigned short Clk1=SysTick->VAL;
	55	return nCurTick;
	56	}
	57	const unsigned short crc16_table[256] = {
	58	0x0000, 0x1189, 0x2312, 0x329b, 0x4624, 0x57ad, 0x6536, 0x74bf,
	59	0x8c48, 0x9dc1, 0xaf5a, 0xbed3, 0xca6c, 0xdbe5, 0xe97e, 0xf8f7,
	60	0x1081, 0x0108, 0x3393, 0x221a, 0x56a5, 0x472c, 0x75b7, 0x643e,
	61	0x9cc9, 0x8d40, 0xbfdb, 0xae52, 0xdaed, 0xcb64, 0xf9ff, 0xe876,
	62	0x2102, 0x308b, 0x0210, 0x1399, 0x6726, 0x76af, 0x4434, 0x55bd,
	63	0xad4a, 0xbcc3, 0x8e58, 0x9fd1, 0xeb6e, 0xfae7, 0xc87c, 0xd9f5,
	64	0x3183, 0x200a, 0x1291, 0x0318, 0x77a7, 0x662e, 0x54b5, 0x453c,
	65	0xbdcb, 0xac42, 0x9ed9, 0x8f50, 0xfbef, 0xea66, 0xd8fd, 0xc974,
	66	0x4204, 0x538d, 0x6116, 0x709f, 0x0420, 0x15a9, 0x2732, 0x36bb,
	67	0xce4c, 0xdfc5, 0xed5e, 0xfcd7, 0x8868, 0x99e1, 0xab7a, 0xbaf3,
	68	0x5285, 0x430c, 0x7197, 0x601e, 0x14a1, 0x0528, 0x37b3, 0x263a,
	69	0xdecd, 0xcf44, 0xfddf, 0xec56, 0x98e9, 0x8960, 0xbbfb, 0xaa72,
	70	0x6306, 0x728f, 0x4014, 0x519d, 0x2522, 0x34ab, 0x0630, 0x17b9,
	71	0xef4e, 0xfec7, 0xcc5c, 0xddd5, 0xa96a, 0xb8e3, 0x8a78, 0x9bf1,
	72	0x7387, 0x620e, 0x5095, 0x411c, 0x35a3, 0x242a, 0x16b1, 0x0738,
	73	0xffcf, 0xee46, 0xdcdd, 0xcd54, 0xb9eb, 0xa862, 0x9af9, 0x8b70,
	74	0x8408, 0x9581, 0xa71a, 0xb693, 0xc22c, 0xd3a5, 0xe13e, 0xf0b7,
	75	0x0840, 0x19c9, 0x2b52, 0x3adb, 0x4e64, 0x5fed, 0x6d76, 0x7cff,
	76	0x9489, 0x8500, 0xb79b, 0xa612, 0xd2ad, 0xc324, 0xf1bf, 0xe036,
	77	0x18c1, 0x0948, 0x3bd3, 0x2a5a, 0x5ee5, 0x4f6c, 0x7df7, 0x6c7e,
	78	0xa50a, 0xb483, 0x8618, 0x9791, 0xe32e, 0xf2a7, 0xc03c, 0xd1b5,
	79	0x2942, 0x38cb, 0x0a50, 0x1bd9, 0x6f66, 0x7eef, 0x4c74, 0x5dfd,
	80	0xb58b, 0xa402, 0x9699, 0x8710, 0xf3af, 0xe226, 0xd0bd, 0xc134,
	81	0x39c3, 0x284a, 0x1ad1, 0x0b58, 0x7fe7, 0x6e6e, 0x5cf5, 0x4d7c,
	82	0xc60c, 0xd785, 0xe51e, 0xf497, 0x8028, 0x91a1, 0xa33a, 0xb2b3,
	83	0x4a44, 0x5bcd, 0x6956, 0x78df, 0x0c60, 0x1de9, 0x2f72, 0x3efb,
	84	0xd68d, 0xc704, 0xf59f, 0xe416, 0x90a9, 0x8120, 0xb3bb, 0xa232,
	85	0x5ac5, 0x4b4c, 0x79d7, 0x685e, 0x1ce1, 0x0d68, 0x3ff3, 0x2e7a,
	86	0xe70e, 0xf687, 0xc41c, 0xd595, 0xa12a, 0xb0a3, 0x8238, 0x93b1,
	87	0x6b46, 0x7acf, 0x4854, 0x59dd, 0x2d62, 0x3ceb, 0x0e70, 0x1ff9,
	88	0xf78f, 0xe606, 0xd49d, 0xc514, 0xb1ab, 0xa022, 0x92b9, 0x8330,
	89	0x7bc7, 0x6a4e, 0x58d5, 0x495c, 0x3de3, 0x2c6a, 0x1ef1, 0x0f78
	90	};
	91
	92	unsigned short crc_check(const unsigned char * data, unsigned int length)
	93	{
	94	unsigned short crc_reg = 0xFFFF;
d69aae	95	while (length--)
Q	96	{
	97	crc_reg = (crc_reg >> 8) ^ crc16_table[(crc_reg ^ *data++) & 0xff];
	98	}
bfc108	99	return (~crc_reg) & 0xFFFF;
Q	100	}
	101
	102	const uint16_t polynom = 0xA001;
	103
	104	unsigned short crc16bitbybit(const unsigned char *ptr, unsigned int len)
	105	{
	106	uint8_t i;
	107	uint16_t crc = 0xffff;
	108
	109	if (len == 0) {
	110	len = 1;
	111	}
	112	while (len--) {
	113	crc ^= *ptr;
	114	for (i = 0; i<8; i++)
	115	{
	116	if (crc & 1) {
	117	crc >>= 1;
	118	crc ^= polynom;
	119	}
	120	else {
	121	crc >>= 1;
	122	}
	123	}
	124	ptr++;
	125	}
	126	return(crc);
	127	}
	128
e1f350	129	/* Table of CRC values for high-order byte */
bfc108	130	const uint8_t crctablehi[] = {
Q	131	0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81,
	132	0x40, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0,
	133	0x80, 0x41, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40, 0x00, 0xC1, 0x81, 0x40, 0x01,
	134	0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41,
	135	0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40, 0x00, 0xC1, 0x81,
	136	0x40, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0,
	137	0x80, 0x41, 0x00, 0xC1, 0x81, 0x40, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01,
	138	0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40,
	139	0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81,
	140	0x40, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0,
	141	0x80, 0x41, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40, 0x00, 0xC1, 0x81, 0x40, 0x01,
	142	0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41,
	143	0x00, 0xC1, 0x81, 0x40, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81,
	144	0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0,
	145	0x80, 0x41, 0x00, 0xC1, 0x81, 0x40, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01,
	146	0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41,
	147	0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81,
	148	0x40
	149	};
e1f350	150	/* Table of CRC values for low-order byte */
bfc108	151	const uint8_t crctablelo[] = {
Q	152	0x00, 0xC0, 0xC1, 0x01, 0xC3, 0x03, 0x02, 0xC2, 0xC6, 0x06, 0x07, 0xC7, 0x05, 0xC5, 0xC4,
	153	0x04, 0xCC, 0x0C, 0x0D, 0xCD, 0x0F, 0xCF, 0xCE, 0x0E, 0x0A, 0xCA, 0xCB, 0x0B, 0xC9, 0x09,
	154	0x08, 0xC8, 0xD8, 0x18, 0x19, 0xD9, 0x1B, 0xDB, 0xDA, 0x1A, 0x1E, 0xDE, 0xDF, 0x1F, 0xDD,
	155	0x1D, 0x1C, 0xDC, 0x14, 0xD4, 0xD5, 0x15, 0xD7, 0x17, 0x16, 0xD6, 0xD2, 0x12, 0x13, 0xD3,
	156	0x11, 0xD1, 0xD0, 0x10, 0xF0, 0x30, 0x31, 0xF1, 0x33, 0xF3, 0xF2, 0x32, 0x36, 0xF6, 0xF7,
	157	0x37, 0xF5, 0x35, 0x34, 0xF4, 0x3C, 0xFC, 0xFD, 0x3D, 0xFF, 0x3F, 0x3E, 0xFE, 0xFA, 0x3A,
	158	0x3B, 0xFB, 0x39, 0xF9, 0xF8, 0x38, 0x28, 0xE8, 0xE9, 0x29, 0xEB, 0x2B, 0x2A, 0xEA, 0xEE,
	159	0x2E, 0x2F, 0xEF, 0x2D, 0xED, 0xEC, 0x2C, 0xE4, 0x24, 0x25, 0xE5, 0x27, 0xE7, 0xE6, 0x26,
	160	0x22, 0xE2, 0xE3, 0x23, 0xE1, 0x21, 0x20, 0xE0, 0xA0, 0x60, 0x61, 0xA1, 0x63, 0xA3, 0xA2,
	161	0x62, 0x66, 0xA6, 0xA7, 0x67, 0xA5, 0x65, 0x64, 0xA4, 0x6C, 0xAC, 0xAD, 0x6D, 0xAF, 0x6F,
	162	0x6E, 0xAE, 0xAA, 0x6A, 0x6B, 0xAB, 0x69, 0xA9, 0xA8, 0x68, 0x78, 0xB8, 0xB9, 0x79, 0xBB,
	163	0x7B, 0x7A, 0xBA, 0xBE, 0x7E, 0x7F, 0xBF, 0x7D, 0xBD, 0xBC, 0x7C, 0xB4, 0x74, 0x75, 0xB5,
	164	0x77, 0xB7, 0xB6, 0x76, 0x72, 0xB2, 0xB3, 0x73, 0xB1, 0x71, 0x70, 0xB0, 0x50, 0x90, 0x91,
	165	0x51, 0x93, 0x53, 0x52, 0x92, 0x96, 0x56, 0x57, 0x97, 0x55, 0x95, 0x94, 0x54, 0x9C, 0x5C,
	166	0x5D, 0x9D, 0x5F, 0x9F, 0x9E, 0x5E, 0x5A, 0x9A, 0x9B, 0x5B, 0x99, 0x59, 0x58, 0x98, 0x88,
	167	0x48, 0x49, 0x89, 0x4B, 0x8B, 0x8A, 0x4A, 0x4E, 0x8E, 0x8F, 0x4F, 0x8D, 0x4D, 0x4C, 0x8C,
	168	0x44, 0x84, 0x85, 0x45, 0x87, 0x47, 0x46, 0x86, 0x82, 0x42, 0x43, 0x83, 0x41, 0x81, 0x80,
	169	0x40
	170	};
	171
	172	uint16_t crc16table(const uint8_t *ptr, uint16_t len)
	173	{
	174	uint8_t crchi = 0xff;
	175	uint8_t crclo = 0xff;
	176	uint16_t index;
	177	while (len--)
	178	{
	179	index = crclo ^ *ptr++;
	180	crclo = crchi ^ crctablehi[index];
	181	crchi = crctablelo[index];
	182	}
	183	return (crchi << 8 \| crclo);
	184	}
	185
	186	void modbuscrc16test()
	187	{
	188	printf("\n");
	189	printf(" Modbus CRC16 tester\n");
	190	printf("-----------------------------------------------------------------------\n");
	191	uint8_t crc16_data[] = { 0x01, 0x04, 0x04, 0x43, 0x6b, 0x58, 0x0e }; // expected crc value 0xD825.
	192	printf(" modbus crc16table test, expected value : 0xd825, calculate value : 0x%x\n", crc16table(crc16_data, sizeof(crc16_data)));
e1f350	193	// printf(" modbus crc16tablefast test, expected value : 0xd825, calculate value : 0x%x\n", crc16tablefast(crc16_data, sizeof(crc16_data)));
bfc108	194	printf(" modbus crc16bitbybit test, expected value : 0xd825, calculate value : 0x%x\n", crc16bitbybit(crc16_data, sizeof(crc16_data)));
Q	195	}
	196
	197	int InitUartstat(stUartStat * pUartstat,void * pBufRx, int nSizeRx, void * pBufTx, int nSizeTx)
	198	{
	199	memset(pUartstat,sizeof(stUartStat),0);
	200	initQueue(&pUartstat->QRx,pBufRx,nSizeRx);
	201	initQueue(&pUartstat->QTx,pBufTx,nSizeTx);
	202	return 0;
	203	}
	204
	205	int Uart1SendDMA(void * pData, int nSize)
	206	{
	207	LL_DMA_DisableChannel(DMA1,LL_DMA_CHANNEL_2);
	208	LL_DMA_ConfigAddresses(DMA1,LL_DMA_CHANNEL_2, (uint32_t)pData,
	209	(uint32_t)&USART1->TDR, LL_DMA_DIRECTION_MEMORY_TO_PERIPH);
	210	LL_DMA_SetDataLength(DMA1,LL_DMA_CHANNEL_2,nSize);
	211	LL_DMA_EnableChannel(DMA1,LL_DMA_CHANNEL_2);
	212	Uart1Stat.DMASendLen=nSize;
	213	Uart1Stat.Sending=1;
	214	LL_DMA_EnableIT_TC(DMA1,LL_DMA_CHANNEL_2);
	215	LL_USART_EnableDMAReq_TX(USART1);
	216	return nSize;
	217	}
	218
	219	int Uart1TriggerSendDMA()
	220	{
	221	if (!Uart1Stat.Sending&&!IsEmpty(&Uart1Stat.QTx))
	222	{
	223	int len1=GetContinueData(&Uart1Stat.QTx);
	224	Uart1SendDMA(GetReadBuffer(&Uart1Stat.QTx),len1);
	225	}
	226	return 0;
	227	}
	228
e1f350	229	int Uart2RecvDMA(void * pBuf, int nSize)
Q	230	{
	231	LL_DMA_DisableChannel(DMA1,LL_DMA_CHANNEL_5);
	232	LL_DMA_ConfigAddresses(DMA1,LL_DMA_CHANNEL_5, (uint32_t)&USART2->RDR,
	233	(uint32_t)pBuf, LL_DMA_DIRECTION_PERIPH_TO_MEMORY);
	234	LL_DMA_SetDataLength(DMA1,LL_DMA_CHANNEL_5,nSize);
	235	LL_DMA_EnableChannel(DMA1,LL_DMA_CHANNEL_5);
	236	Uart2Stat.DMARecvLen=nSize;
	237	Uart2Stat.Recving=1;
	238	LL_DMA_EnableIT_TC(DMA1,LL_DMA_CHANNEL_5);
	239	LL_USART_EnableDMAReq_RX(USART2);
	240	return 0;
	241	}
bfc108	242	int Uart2SendDMA(void * pData, int nSize)
Q	243	{
	244	LL_DMA_DisableChannel(DMA1,LL_DMA_CHANNEL_4);
	245	LL_DMA_ConfigAddresses(DMA1,LL_DMA_CHANNEL_4, (uint32_t)pData,
	246	(uint32_t)&USART2->TDR, LL_DMA_DIRECTION_MEMORY_TO_PERIPH);
	247	LL_DMA_SetDataLength(DMA1,LL_DMA_CHANNEL_4,nSize);
	248	LL_DMA_EnableChannel(DMA1,LL_DMA_CHANNEL_4);
	249	Uart2Stat.DMASendLen=nSize;
	250	Uart2Stat.Sending=1;
	251	LL_DMA_EnableIT_TC(DMA1,LL_DMA_CHANNEL_4);
	252	LL_USART_EnableDMAReq_TX(USART2);
	253	return nSize;
	254	}
	255	int Uart2TriggerSendDMA()
	256	{
	257	if (!Uart2Stat.Sending&&!IsEmpty(&Uart2Stat.QTx))
	258	{
	259	int len1=GetContinueData(&Uart2Stat.QTx);
	260	Uart2SendDMA(GetReadBuffer(&Uart2Stat.QTx),len1);
	261	}
	262	return 0;
	263	}
e1f350	264
Q	265	void TriggerPendSV()
	266	{
	267	SCB->ICSR=SCB_ICSR_PENDSVSET_Msk; //1<<SCB_ICSR_PENDSVSET_Pos;
	268	}
	269
	270	void PendSvCallBack()
	271	{
d69aae	272	#if (BOARD_TYPE == 12)
Q	273	///*
	274	if (bSPI1RecvDone)
	275	{
	276	bSPI1RecvDone=0;
	277	ParseFP0Pkg(SPI1RecvBuf,nSPI1RecvLenInBuf);
	278	}
	279	//*/
	280	#endif
e1f350	281	if (Uart2Stat.bPacketRecved)
Q	282	{
d69aae	283	ParsePacket(2, (pPacket)Uart2RecvBuf1, Uart2RecvBuf1DataLen);
e1f350	284	Uart2RecvBuf1DataLen=0;
Q	285	Uart2Stat.bPacketRecved=0;
	286	Uart2RecvDMA(Uart2RecvBuf1,sizeof(Uart2RecvBuf1));
	287	}
	288	}
d69aae	289
Q	290	void SPI1_IRQ_CallBack()
	291	{
	292	uint8_t value;
	293	// LL_GPIO_TogglePin(GPIOB,LL_GPIO_PIN_7);
	294	if (LL_SPI_IsActiveFlag_RXNE(SPI1))
	295	{
	296	value = LL_SPI_ReceiveData8( SPI1);
	297	#if (BOARD_TYPE == 12)
	298	KMem.SDD[62]++;
	299	KMem.SDT[122]++;
	300	if (!bSPI1Sending)
	301	{
	302	KMem.SDB[128+KMem.SDT[123]] = value;
	303	KMem.SDT[123]++; if (KMem.SDT[123]>=100) {KMem.SDT[123]=81;}
	304	}
	305	if (!bSPI1Sending && (1 \|\| bSPI1Recving))
	306	{
	307	SPI1RecvBuf[nSPI1RecvPos]=value;
	308	nSPI1RecvPos++;
	309
	310	if (value==0x0d)
	311	{
	312	KMem.SDB[128+KMem.SDT[123]] = nSPI1RecvPos;
	313	KMem.SDT[123]++; if (KMem.SDT[123]>=100) {KMem.SDT[123]=81;}
	314
	315	nSPI1RecvLenInBuf=nSPI1RecvPos;
	316	bSPI1RecvDone=1;
	317	nSPI1RecvPos=0;
	318	bSPI1Recving=0;
	319
	320
	321	TriggerPendSV();
	322	}
	323	}
	324	if (bSPI1Sending)
	325	{
	326	nSPI1SentLen++;
	327	KMem.SDD[63]++;
	328
	329	if (nSPI1SentLen >= nSPI1ToSendLen) {
	330	SetACKPin_1();
	331	bSPI1Sending=0;
	332	bSPI1SendDone=1;
	333	bSPI1Recving=1;
	334	nSPI1RecvPos=0;
	335	SetFP0DEPin_0();
	336	}
	337	else {
	338	value = SPI1SendBuf[nSPI1SentLen];
	339	LL_SPI_TransmitData8(SPI1,value);
	340	KMem.SDB[128+KMem.SDT[123]] = value;
	341	KMem.SDT[123]++; if (KMem.SDT[123]>=100) {KMem.SDT[123]=81;}
	342	}
	343	}
	344	#endif
	345	}
	346	}
	347
bfc108	348	void Uart1SendDone()
Q	349	{
	350	Uart1Stat.TcCount++;
	351	return;
	352	}
	353
	354	void Uart1RecvDone()
	355	{
	356	Uart1Stat.IdelCount++;
	357	// NVIC_SetPendingIRQ(PendSV_IRQn);
e1f350	358	// SCB->ICSR=SCB_ICSR_PENDSVSET_Msk; //1<<SCB_ICSR_PENDSVSET_Pos;
Q	359
bfc108	360	if (Uart1RecvBuf1DataLen >0)
Q	361	{
	362	Uart1Stat.bPacketRecved=1;
e1f350	363	// SCB->ICSR=SCB_ICSR_PENDSVSET_Msk; //1<<SCB_ICSR_PENDSVSET_Pos;
bfc108	364	// KLParsePacket(Uart1RecvBuf1,Uart1RecvBuf1DataLen);
Q	365	// Uart1RecvBuf1DataLen=0;
	366	}
	367	}
	368
	369	void Uart2SendDone()
	370	{
	371	Uart2Stat.TcCount++;
	372	}
	373	void Uart2RecvDone()
	374	{
e1f350	375	Uart2RecvBuf1DataLen=sizeof(Uart2RecvBuf1) - LL_DMA_GetDataLength(DMA1,LL_DMA_CHANNEL_5);
bfc108	376	Uart2Stat.bPacketRecved=1;
Q	377	Uart2Stat.IdelCount++;
e1f350	378	if (Uart2RecvBuf1DataLen>0)
Q	379	TriggerPendSV();
	380	// ParsePacket((pPacket)Uart2RecvBuf1,Uart2RecvBuf1DataLen);
bfc108	381	}
Q	382
	383	int PutStr(char * str1, int len1)
	384	{
	385	// Uart1SendDMA(str1,len1);
d69aae	386	PushIn(&Uart1Stat.QTx,str1,len1);
bfc108	387	// LL_USART_EnableIT_TXE(USART1);
Q	388	// LL_USART_EnableIT_TC(USART1);
d69aae	389	Uart1TriggerSendDMA();
bfc108	390	return len1;
Q	391	}
	392	int PutStr1(char * str1, int len1)
	393	{
	394	// Uart1SendDMA(str1,len1);
	395	PushIn(&Uart1Stat.QTx,str1,len1);
	396	// LL_USART_EnableIT_TXE(USART1);
	397	// LL_USART_EnableIT_TC(USART1);
	398	Uart1TriggerSendDMA();
	399	return len1;
	400	}
	401	int PutStr2(char * str1, int len1)
	402	{
e1f350	403	Uart2SendDMA(str1,len1);
Q	404	// PushIn(&Uart2Stat.QTx,str1,len1);
bfc108	405	// LL_USART_EnableIT_TXE(USART1);
Q	406	// LL_USART_EnableIT_TC(USART1);
e1f350	407	// Uart2TriggerSendDMA();
bfc108	408	return len1;
Q	409	}
	410
d69aae	411	int SendPacket(int nChn, void * pBuf,int len1)
bfc108	412	{
d69aae	413	if (nChn==1) {
Q	414	PutStr1((char *)pBuf,len1);
	415	// PushIn(&Uart1Stat.QTx,p1,len1);
	416	// Uart1TriggerSendDMA();
	417	Uart1Stat.SentPacket++;
	418	}else if (nChn==2){
	419	PutStr2((char *)pBuf,len1);
	420	// PushIn(&Uart2Stat.QTx,p1,len1);
	421	// Uart2TriggerSendDMA();
	422	Uart2Stat.SentPacket++;
	423	}
	424	return len1;
bfc108	425	}
d69aae	426	/*
bfc108	427	int SendPacket1(void * pBuf,int len1)
Q	428	{
	429	PutStr1((char *)pBuf,len1);
	430	// PushIn(&Uart1Stat.QTx,p1,len1);
	431	// Uart1TriggerSendDMA();
	432	Uart1Stat.SentPacket++;
	433	return len1;
	434	}
	435	int SendPacket2(pPacket p1,int len1)
	436	{
	437	PutStr2((char *)p1,len1);
	438	// PushIn(&Uart2Stat.QTx,p1,len1);
	439	// Uart2TriggerSendDMA();
	440	Uart2Stat.SentPacket++;
	441	return len1;
	442	}
d69aae	443	*/
bfc108	444	void ToggleRunLed() { LL_GPIO_TogglePin(GPIOC,LL_GPIO_PIN_13);}
Q	445	void ToggleErrLed() { LL_GPIO_TogglePin(GPIOC,LL_GPIO_PIN_14);}
d69aae	446	#if (BOARD_TYPE == 12)
Q	447	void ToggleOutStat() { LL_GPIO_TogglePin(GPIOC,LL_GPIO_PIN_15);}
	448
	449	void SetOutStat(uchar bOn)
	450	{
	451	if (bOn) {LL_GPIO_SetOutputPin(GPIOC,LL_GPIO_PIN_15);}
	452	else {LL_GPIO_ResetOutputPin(GPIOC,LL_GPIO_PIN_15);}
	453	}
	454	#else
bfc108	455	void ToggleOutStat() { LL_GPIO_TogglePin(GPIOA,LL_GPIO_PIN_11);}
Q	456
	457	void SetOutStat(uchar bOn)
	458	{
	459	if (bOn) {LL_GPIO_SetOutputPin(GPIOA,LL_GPIO_PIN_11);}
	460	else {LL_GPIO_ResetOutputPin(GPIOA,LL_GPIO_PIN_11);}
	461	}
d69aae	462	#endif
bfc108	463
Q	464	void SetRunLed(uchar bOn)
	465	{
	466	if (bOn) {LL_GPIO_ResetOutputPin(GPIOC,LL_GPIO_PIN_13);}
	467	else {LL_GPIO_SetOutputPin(GPIOC,LL_GPIO_PIN_13);}
	468	}
	469	void SetErrLed(uchar bOn)
	470	{
	471	if (bOn) {LL_GPIO_ResetOutputPin(GPIOC,LL_GPIO_PIN_14);}
	472	else {LL_GPIO_SetOutputPin(GPIOC,LL_GPIO_PIN_14);}
	473	}
	474	void SetLeds(uchar bRun, uchar bErr)
	475	{
	476	SetRunLed(bRun); SetErrLed (bErr);
	477	}
	478
	479	#define set165SL_0() LL_GPIO_ResetOutputPin(GPIOA,LL_GPIO_PIN_4)
	480	#define set165SL_1() LL_GPIO_SetOutputPin(GPIOA,LL_GPIO_PIN_4)
	481	#define set165CLK_0() LL_GPIO_ResetOutputPin(GPIOA,LL_GPIO_PIN_5)
	482	#define set165CLK_1() LL_GPIO_SetOutputPin(GPIOA,LL_GPIO_PIN_5)
	483	#define Get165SER() LL_GPIO_IsInputPinSet(GPIOA,LL_GPIO_PIN_6)
	484	#define GetCfg165SER() LL_GPIO_IsInputPinSet(GPIOA,LL_GPIO_PIN_7)
	485
	486	unsigned int Input165_8()
	487	{
	488	int x1=0;
e1f350	489	__disable_irq();
bfc108	490	set165SL_0(); set165SL_1();
Q	491	unsigned int mask1=0x0080;
	492	volatile uint32_t * p1=&GPIOA->IDR;
	493	for (uint32_t i=8;i;i--)
	494	{
	495	//if (Get165SER()) {}
	496	//else x1\|=mask1;
	497	if (*p1&LL_GPIO_PIN_6) {}
	498	else x1\|=mask1;
	499	//x1<<=1;
	500	//x1\|=!Get165SER();
	501	set165CLK_0();
	502	mask1>>=1;
	503	set165CLK_1();
	504	}
e1f350	505	__enable_irq();
bfc108	506	return x1;
Q	507	}
	508
	509	unsigned int Input165(int nBit)
	510	{
	511	int x1=0;
e1f350	512	__disable_irq();
bfc108	513	set165SL_0(); set165SL_1();
Q	514	unsigned int mask1=1<<(nBit-1);
	515	volatile uint32_t * p1=&GPIOA->IDR;
	516	for (uint32_t i=nBit;i;i--)
	517	{
	518	//if (Get165SER()) {}
	519	//else x1\|=mask1;
	520	if (*p1&LL_GPIO_PIN_6) {}
	521	else x1\|=mask1;
	522	//x1<<=1;
	523	//x1\|=!Get165SER();
	524	set165CLK_0();
	525	mask1>>=1;
	526	set165CLK_1();
	527	}
e1f350	528	__enable_irq();
bfc108	529	return x1;
Q	530	}
	531	unsigned int Input165_R(int nBit)
	532	{
e1f350	533	__disable_irq();
bfc108	534	set165SL_0(); set165SL_1();
Q	535	int nBytes = nBit /8;
	536	volatile uint32_t * p1=&GPIOA->IDR;
	537	union stdata
	538	{
	539	int intvalue;
	540	unsigned char Bytes[4];
	541	}rdata;
	542	rdata.intvalue=0;
	543	for (int i=0;i<nBytes;i++)
	544	{
	545	int x1=0;
	546	unsigned int mask1=1<<(7);
	547	for (uint32_t i=8;i;i--)
	548	{
	549	//if (Get165SER()) {}
	550	//else x1\|=mask1;
	551	if (*p1&LL_GPIO_PIN_6) {}
	552	else x1\|=mask1;
	553	//x1<<=1;
	554	//x1\|=!Get165SER();
	555	set165CLK_0();
	556	mask1>>=1;
	557	set165CLK_1();
	558	}
	559	rdata.Bytes[i]=x1;
	560	}
e1f350	561	__enable_irq();
bfc108	562	return rdata.intvalue;
Q	563	}
	564
	565	unsigned int Input165Cfg(int nBit)
	566	{
	567	int x1=0;
e1f350	568	__disable_irq();
bfc108	569	set165SL_0(); set165SL_1();
Q	570	unsigned int mask1=1<<(nBit-1);
	571	volatile uint32_t * p1=&GPIOA->IDR;
	572	for (uint32_t i=nBit;i;i--)
	573	{
	574	//if (Get165SER()) {}
	575	//else x1\|=mask1;
	576	if (*p1&LL_GPIO_PIN_7) {}
	577	else x1\|=mask1;
	578	//x1<<=1;
	579	//x1\|=!Get165SER();
	580	set165CLK_0();
	581	mask1>>=1;
	582	set165CLK_1();
	583	}
e1f350	584	__enable_irq();
bfc108	585	return x1;
Q	586	}
	587
	588	unsigned int GetInput()
	589	{
	590	int BoradType=GetBoardType();
	591	switch (BoradType)
	592	{
	593
	594	case 1:
	595	return Input165(8);
	596	case 2:
	597	return Input165(8);
	598	case 3:
	599	return Input165(16);
	600	case 4:
	601	return Input165(8);
	602	case 5:
	603	case 7:
	604	return Input165(16);
	605	case 6:
	606	case 8:
	607	return Input165(8);
	608	case 9:
	609	return Input165_R(16);
	610	case 10:
	611	return Input165_R(8);
0aeaad	612	case 11:
Q	613	return Input165_R(8);
d69aae	614	case 12:
Q	615	return 0; //FP0
bfc108	616	default:
Q	617	break;
	618	}
	619	return 0;
	620
	621	}
	622	int ReadConfig_0()
	623	{
	624	return 0;
	625	}
	626
	627	int ReadConfig_1()
	628	{
	629	// uchar x = LL_GPIO_ReadInputPort(GPIOB);
	630	// uchar x1 = LL_GPIO_IsInputPinSet(GPIOB,LL_GPIO_PIN_10);
	631	// uchar x2=(x&0x7) \| (x1 << 3 ) ;
	632	uchar x2=0;
	633	x2=(GPIOB->IDR&0x7) \| ((GPIOB->IDR &0x400)>>7);
	634	x2= (~x2)&0xf;
	635	return x2;
	636	}
	637
	638	int ReadConfig_2()
	639	{
	640	uchar x2=0;
	641	x2=(GPIOB->IDR&0x7) \| ((GPIOB->IDR &0x400)>>7);
	642	x2= (~x2)&0xf;
	643	return x2;
	644	}
	645
	646	int ReadConfig_3()
	647	{
	648	uchar x2=0;
	649	x2 = Input165(24)&0xff;
	650	return x2;
	651
	652	}
	653	int ReadConfig_4()
	654	{
	655
	656	uchar x2=0;
	657	x2 = Input165(16)&0xff;
	658	return x2;
	659	}
	660
	661	int ReadConfig_5()
	662	{
	663	uchar x2=0;
	664	x2 = Input165Cfg(8)&0xff;
	665	return x2;
	666	}
	667
0aeaad	668	int ReadConfig_11()
Q	669	{
	670	uchar x2=0;
	671	x2=((GPIOB->IDR&0x2)<<2);
	672	x2= ((~x2)&0x8)\|1;
	673	return x2;
	674	}
	675
bfc108	676	int ReadJumperSW()
Q	677	{
	678	int BoradType=GetBoardType();
	679	switch (BoradType)
	680	{
	681	case 0:
	682	return ReadConfig_0();
	683	case 1:
	684	return ReadConfig_1(); //old board 4 in 4 o
	685	case 2:
	686	return ReadConfig_2(); //old board 8 in 8 o
	687	case 3:
	688	return ReadConfig_3(); //Master 16 in16 o
	689	case 4:
	690	return ReadConfig_4(); //Slave 8 in 8 o
	691	case 5:
	692	case 7:
	693	return ReadConfig_5(); // New Master 16 in16 o
	694	case 6:
	695	case 8:
	696	return ReadConfig_5(); //New Slave 8 in 8 o
	697	case 9:
	698	case 10:
	699	return ReadConfig_5(); //New Slave 8 in 8 o
0aeaad	700	case 11:
Q	701	return ReadConfig_11(); //Mini Board
d69aae	702	case 12:
Q	703	return (~(LL_GPIO_ReadInputPort(GPIOA)>>4))&0x0f; //FP0
	704	case 13:
	705	return ReadConfig_5();
bfc108	706	default:
Q	707
	708	return 0;
	709	}
	710	}
	711
e1f350	712	#define SRCLK2_0() LL_GPIO_ResetOutputPin(GPIOB,LL_GPIO_PIN_13)
Q	713	#define SRCLK2_1() LL_GPIO_SetOutputPin(GPIOB,LL_GPIO_PIN_13)
	714	#define STRCLK2_0() LL_GPIO_ResetOutputPin(GPIOB,LL_GPIO_PIN_12)
	715	#define STRCLK2_1() LL_GPIO_SetOutputPin(GPIOB,LL_GPIO_PIN_12)
	716	#define SER2_0() LL_GPIO_ResetOutputPin(GPIOB,LL_GPIO_PIN_15)
	717	#define SER2_1() LL_GPIO_SetOutputPin(GPIOB,LL_GPIO_PIN_15)
bfc108	718
Q	719	void Enable595(uchar bEnable)
	720	{
	721	if (bEnable) {LL_GPIO_ResetOutputPin(GPIOA,LL_GPIO_PIN_8);}
	722	else {LL_GPIO_SetOutputPin(GPIOA,LL_GPIO_PIN_8);}
	723	}
	724
	725	void Output595_8(unsigned int cc)
	726	{
	727	//unsigned char i;
	728	;// 74HC595输出程序，输出8位
	729	// cc=~0x3f;
e1f350	730	__disable_irq();
Q	731	STRCLK2_1();
bfc108	732	unsigned int mask1=0x0080;
Q	733	//volatile uint32_t * p1 = &GPIOB->BRR;
	734	//volatile uint32_t * p2 = &GPIOB->BSRR;
	735	for (;mask1;)
	736	{
e1f350	737	SRCLK2_0();
bfc108	738	//*p1=LL_GPIO_PIN_13;
e1f350	739	if (cc&mask1) {SER2_1();}
Q	740	else {SER2_0();}
bfc108	741	mask1>>=1;
e1f350	742	SRCLK2_1();
bfc108	743	// __nop();
Q	744	//*p2=LL_GPIO_PIN_13;
	745	}
e1f350	746	STRCLK2_0();
Q	747	STRCLK2_1();
	748	__enable_irq();
bfc108	749	}
Q	750	void Output595_16(unsigned int cc)
	751	{
	752	//unsigned char i;
	753	;// 74HC595输出程序，输出8位
	754	// cc=~0x3f;
e1f350	755	__disable_irq();
Q	756	STRCLK2_1();
bfc108	757	unsigned int mask1=0x8000;
Q	758	//volatile uint32_t * p1 = &GPIOB->BRR;
	759	//volatile uint32_t * p2 = &GPIOB->BSRR;
	760	for (;mask1;)
	761	{
e1f350	762	SRCLK2_0();
bfc108	763	//*p1=LL_GPIO_PIN_13;
e1f350	764	if (cc&mask1) {SER2_1();}
Q	765	else {SER2_0();}
bfc108	766	mask1>>=1;
e1f350	767	SRCLK2_1();
bfc108	768	// __nop();
Q	769	//*p2=LL_GPIO_PIN_13;
	770	}
e1f350	771	STRCLK2_0();
Q	772	STRCLK2_1();
	773	__enable_irq();
bfc108	774	}
e1f350	775
d69aae	776	/*
e1f350	777	#define STRCLK12_0() LL_GPIO_ResetOutputPin(GPIOB,LL_GPIO_PIN_7)
Q	778	#define STRCLK12_1() LL_GPIO_SetOutputPin(GPIOB,LL_GPIO_PIN_7)
	779
	780	void PutOutputSPI1(unsigned int Y)
	781	{
	782	__disable_irq();
	783	STRCLK12_1();
	784	LL_SPI_TransmitData8(SPI1,Y>>8);
	785	int i=0;
	786	while (LL_SPI_IsActiveFlag_TXE(SPI1) == RESET)
	787	{
	788	}
	789	KMem.SDD[28]=i;
	790	i=0;
	791	while (LL_SPI_IsActiveFlag_BSY(SPI1) == SET)
	792	{
	793	i++;
	794	}
	795	LL_SPI_TransmitData8(SPI1,Y);
	796	while (LL_SPI_IsActiveFlag_TXE(SPI1) == RESET)
	797	{
	798	}
	799	KMem.SDD[28]=i;
	800	i=0;
	801	while (LL_SPI_IsActiveFlag_BSY(SPI1) == SET)
	802	{
	803	i++;
	804	}
	805	KMem.SDD[30]=i;
	806	STRCLK12_0();
d69aae	807	__nop();
Q	808	STRCLK12_1();
	809	__enable_irq();
e1f350	810	}
d69aae	811	*/
e1f350	812
Q	813	void PutOutputSPI2(unsigned int Y)
	814	{
	815	__disable_irq();
	816	STRCLK2_1();
	817	LL_SPI_TransmitData8(SPI2,Y>>8);
0aeaad	818	int i=0;
Q	819	while (LL_SPI_IsActiveFlag_TXE(SPI2) == RESET)
	820	{
	821	}
	822	KMem.SDD[28]=i;
	823	i=0;
	824	while (LL_SPI_IsActiveFlag_BSY(SPI2) == SET)
	825	{
	826	i++;
	827	}
e1f350	828	LL_SPI_TransmitData8(SPI2,Y);
Q	829	while (LL_SPI_IsActiveFlag_TXE(SPI2) == RESET)
	830	{
	831	}
	832	KMem.SDD[28]=i;
	833	i=0;
	834	while (LL_SPI_IsActiveFlag_BSY(SPI2) == SET)
	835	{
	836	i++;
	837	}
0aeaad	838	KMem.SDD[30]=i;
e1f350	839	STRCLK2_0();
d69aae	840	STRCLK2_1();
e1f350	841	__enable_irq();
Q	842	}
	843
	844	void PutOutput(unsigned int Y)
	845	{
d69aae	846	#if (BOARD_TYPE==12)
Q	847	return ;
	848	#endif
e1f350	849	PutOutputSPI2(Y);
Q	850	//Output595_16(Y);
0aeaad	851	}
bfc108	852
Q	853	#if (BOARD_TYPE == 9 \|\| BOARD_TYPE == 10 )
	854	//#pragma message("9,10")
e1f350	855	// V4.2 管脚排列向右移动了一位。
bfc108	856	#define SRCLK1_0() LL_GPIO_ResetOutputPin(GPIOB,LL_GPIO_PIN_1)
Q	857	#define SRCLK1_1() LL_GPIO_SetOutputPin(GPIOB,LL_GPIO_PIN_1)
	858	#define STRCLK1_0() LL_GPIO_ResetOutputPin(GPIOB,LL_GPIO_PIN_2)
	859	#define STRCLK1_1() LL_GPIO_SetOutputPin(GPIOB,LL_GPIO_PIN_2)
	860	#define OE1_0() LL_GPIO_ResetOutputPin(GPIOB,LL_GPIO_PIN_10)
	861	#define OE1_1() LL_GPIO_SetOutputPin(GPIOB,LL_GPIO_PIN_10)
	862	#define SER1_0() LL_GPIO_ResetOutputPin(GPIOB,LL_GPIO_PIN_11)
	863	#define SER1_1() LL_GPIO_SetOutputPin(GPIOB,LL_GPIO_PIN_11)
e1f350	864	#else //按照原来的管脚排列
bfc108	865	#define SRCLK1_0() LL_GPIO_ResetOutputPin(GPIOB,LL_GPIO_PIN_0)
Q	866	#define SRCLK1_1() LL_GPIO_SetOutputPin(GPIOB,LL_GPIO_PIN_0)
	867	#define STRCLK1_0() LL_GPIO_ResetOutputPin(GPIOB,LL_GPIO_PIN_1)
	868	#define STRCLK1_1() LL_GPIO_SetOutputPin(GPIOB,LL_GPIO_PIN_1)
	869	#define OE1_0() LL_GPIO_ResetOutputPin(GPIOB,LL_GPIO_PIN_2)
	870	#define OE1_1() LL_GPIO_SetOutputPin(GPIOB,LL_GPIO_PIN_2)
	871	#define SER1_0() LL_GPIO_ResetOutputPin(GPIOB,LL_GPIO_PIN_10)
	872	#define SER1_1() LL_GPIO_SetOutputPin(GPIOB,LL_GPIO_PIN_10)
	873	#endif
	874
	875
	876	void EnableDisIn(uchar bEnable)
	877	{
	878	if (bEnable) {OE1_0();}
	879	else {OE1_1();}
	880	}
	881	void displayInput(unsigned int cc)
	882	{
	883	//unsigned char i;
	884	;// 74HC595输出程序，输出8位
	885	// cc=~0x3f;
e1f350	886	__disable_irq();
bfc108	887	STRCLK1_1();
Q	888	unsigned int mask1=0x8000;
	889	//volatile uint32_t * p1 = &GPIOB->BRR;
	890	//volatile uint32_t * p2 = &GPIOB->BSRR;`````
	891	for (;mask1;)
	892	{
	893	SRCLK1_0();
	894	//*p1=LL_GPIO_PIN_13;
	895	if (cc&mask1) {SER1_1();}
	896	else {SER1_0();}
	897	mask1>>=1;
	898	SRCLK1_1();
	899	// __nop();
	900	//*p2=LL_GPIO_PIN_13;
	901	}
	902	STRCLK1_0();
e1f350	903	STRCLK1_1();
Q	904	__enable_irq();
bfc108	905	}