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2022-10-17 65b5428a731a94493c33dbc4bebfe63c5e0c5b13

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bfc108	1	/**
Q	2	******************************************************************************
	3	* @file stm32f0xx_hal_pcd.h
	4	* @author MCD Application Team
	5	* @brief Header file of PCD HAL module.
	6	******************************************************************************
	7	* @attention
	8	*
	9	* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
	10	*
	11	* Redistribution and use in source and binary forms, with or without modification,
	12	* are permitted provided that the following conditions are met:
	13	* 1. Redistributions of source code must retain the above copyright notice,
	14	* this list of conditions and the following disclaimer.
	15	* 2. Redistributions in binary form must reproduce the above copyright notice,
	16	* this list of conditions and the following disclaimer in the documentation
	17	* and/or other materials provided with the distribution.
	18	* 3. Neither the name of STMicroelectronics nor the names of its contributors
	19	* may be used to endorse or promote products derived from this software
	20	* without specific prior written permission.
	21	*
	22	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
	23	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
	24	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
	25	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
	26	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
	27	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
	28	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
	29	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
	30	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
	31	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
	32	*
	33	******************************************************************************
	34	*/
	35
	36	/* Define to prevent recursive inclusion -------------------------------------*/
	37	#ifndef __STM32F0xx_HAL_PCD_H
	38	#define __STM32F0xx_HAL_PCD_H
	39
	40	#ifdef __cplusplus
	41	extern "C" {
	42	#endif
	43
	44	#if defined(STM32F042x6) \|\| defined(STM32F048xx) \|\| defined(STM32F072xB) \|\| defined(STM32F078xx) \|\| defined(STM32F070xB)\|\| defined(STM32F070x6)
	45
	46	/* Includes ------------------------------------------------------------------*/
	47	#include "stm32f0xx_hal_def.h"
	48
	49	/** @addtogroup STM32F0xx_HAL_Driver
	50	* @{
	51	*/
	52
	53	/** @addtogroup PCD
	54	* @{
	55	*/
	56
	57	/* Exported types ------------------------------------------------------------*/
	58	/** @defgroup PCD_Exported_Types PCD Exported Types
	59	* @{
	60	*/
	61
	62	/**
	63	* @brief PCD State structure definition
	64	*/
	65	typedef enum
	66	{
	67	HAL_PCD_STATE_RESET = 0x00U,
	68	HAL_PCD_STATE_READY = 0x01U,
	69	HAL_PCD_STATE_ERROR = 0x02U,
	70	HAL_PCD_STATE_BUSY = 0x03U,
	71	HAL_PCD_STATE_TIMEOUT = 0x04U
	72	} PCD_StateTypeDef;
	73
	74	/**
	75	* @brief PCD double buffered endpoint direction
	76	*/
	77	typedef enum
	78	{
	79	PCD_EP_DBUF_OUT,
	80	PCD_EP_DBUF_IN,
	81	PCD_EP_DBUF_ERR,
	82	}PCD_EP_DBUF_DIR;
	83
	84	/**
	85	* @brief PCD endpoint buffer number
	86	*/
	87	typedef enum
	88	{
	89	PCD_EP_NOBUF,
	90	PCD_EP_BUF0,
	91	PCD_EP_BUF1
	92	}PCD_EP_BUF_NUM;
	93
	94	/**
	95	* @brief PCD Initialization Structure definition
	96	*/
	97	typedef struct
	98	{
	99	uint32_t dev_endpoints; /*!< Device Endpoints number.
	100	This parameter depends on the used USB core.
	101	This parameter must be a number between Min_Data = 1 and Max_Data = 15 */
	102
	103	uint32_t speed; /*!< USB Core speed.
	104	This parameter can be any value of @ref PCD_Core_Speed */
	105
	106	uint32_t ep0_mps; /*!< Set the Endpoint 0 Max Packet size.
	107	This parameter can be any value of @ref PCD_EP0_MPS */
	108
	109	uint32_t phy_itface; /*!< Select the used PHY interface.
	110	This parameter can be any value of @ref PCD_Core_PHY */
	111
	112	uint32_t Sof_enable; /*!< Enable or disable the output of the SOF signal.
	113	This parameter can be set to ENABLE or DISABLE */
	114
	115	uint32_t low_power_enable; /*!< Enable or disable Low Power mode
	116	This parameter can be set to ENABLE or DISABLE */
	117
	118	uint32_t lpm_enable; /*!< Enable or disable the Link Power Management .
	119	This parameter can be set to ENABLE or DISABLE */
	120
	121	uint32_t battery_charging_enable; /*!< Enable or disable Battery charging.
	122	This parameter can be set to ENABLE or DISABLE */
	123
	124	}PCD_InitTypeDef;
	125
	126	typedef struct
	127	{
	128	uint8_t num; /*!< Endpoint number
	129	This parameter must be a number between Min_Data = 1 and Max_Data = 15 */
	130
	131	uint8_t is_in; /*!< Endpoint direction
	132	This parameter must be a number between Min_Data = 0 and Max_Data = 1 */
	133
	134	uint8_t is_stall; /*!< Endpoint stall condition
	135	This parameter must be a number between Min_Data = 0 and Max_Data = 1 */
	136
	137	uint8_t type; /*!< Endpoint type
	138	This parameter can be any value of @ref PCD_EP_Type */
	139
	140	uint16_t pmaadress; /*!< PMA Address
	141	This parameter can be any value between Min_addr = 0 and Max_addr = 1K */
	142
	143	uint16_t pmaaddr0; /*!< PMA Address0
	144	This parameter can be any value between Min_addr = 0 and Max_addr = 1K */
	145
	146	uint16_t pmaaddr1; /*!< PMA Address1
	147	This parameter can be any value between Min_addr = 0 and Max_addr = 1K */
	148
	149	uint8_t doublebuffer; /*!< Double buffer enable
	150	This parameter can be 0 or 1 */
	151
	152	uint32_t maxpacket; /*!< Endpoint Max packet size
	153	This parameter must be a number between Min_Data = 0 and Max_Data = 64KB */
	154
	155	uint8_t xfer_buff; /!< Pointer to transfer buffer */
	156
	157	uint32_t xfer_len; /!< Current transfer length /
	158
	159	uint32_t xfer_count; /!< Partial transfer length in case of multi packet transfer /
	160
	161	}PCD_EPTypeDef;
	162
	163	typedef USB_TypeDef PCD_TypeDef;
	164
	165	/**
	166	* @brief PCD Handle Structure definition
	167	*/
	168	typedef struct
	169	{
	170	PCD_TypeDef Instance; /!< Register base address */
	171	PCD_InitTypeDef Init; /!< PCD required parameters /
	172	__IO uint8_t USB_Address; /!< USB Address /
	173	PCD_EPTypeDef IN_ep[8]; /!< IN endpoint parameters /
	174	PCD_EPTypeDef OUT_ep[8]; /!< OUT endpoint parameters /
	175	HAL_LockTypeDef Lock; /!< PCD peripheral status /
	176	__IO PCD_StateTypeDef State; /!< PCD communication state /
	177	uint32_t Setup[12]; /!< Setup packet buffer /
	178	void pData; /!< Pointer to upper stack Handler */
	179
	180	} PCD_HandleTypeDef;
	181
	182	/**
	183	* @}
	184	*/
	185
	186	/* Include PCD HAL Extension module */
	187	#include "stm32f0xx_hal_pcd_ex.h"
	188
	189	/* Exported constants --------------------------------------------------------*/
	190	/** @defgroup PCD_Exported_Constants PCD Exported Constants
	191	* @{
	192	*/
	193
	194	/** @defgroup PCD_Core_Speed PCD Core Speed
	195	* @{
	196	*/
	197	#define PCD_SPEED_HIGH 0 /* Not Supported */
	198	#define PCD_SPEED_FULL 2
	199	/**
	200	* @}
	201	*/
	202
	203	/** @defgroup PCD_Core_PHY PCD Core PHY
	204	* @{
	205	*/
	206	#define PCD_PHY_EMBEDDED 2
	207	/**
	208	* @}
	209	*/
	210	/**
	211	* @}
	212	*/
	213
	214	/* Exported macros -----------------------------------------------------------*/
	215	/** @defgroup PCD_Exported_Macros PCD Exported Macros
	216	* @brief macros to handle interrupts and specific clock configurations
	217	* @{
	218	*/
	219	#define __HAL_PCD_GET_FLAG(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->ISTR) & (__INTERRUPT__)) == (__INTERRUPT__))
	220	#define __HAL_PCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->ISTR) &= (uint16_t)(~(__INTERRUPT__))))
	221
	222	#define __HAL_USB_WAKEUP_EXTI_ENABLE_IT() EXTI->IMR \|= USB_WAKEUP_EXTI_LINE
	223	#define __HAL_USB_WAKEUP_EXTI_DISABLE_IT() EXTI->IMR &= ~(USB_WAKEUP_EXTI_LINE)
	224	#define __HAL_USB_EXTI_GENERATE_SWIT(__EXTILINE__) (EXTI->SWIER \|= (__EXTILINE__))
	225
	226	/**
	227	* @}
	228	*/
	229
	230	/* Exported functions --------------------------------------------------------*/
	231	/** @addtogroup PCD_Exported_Functions PCD Exported Functions
	232	* @{
	233	*/
	234
	235	/* Initialization/de-initialization functions ********************************/
	236	/** @addtogroup PCD_Exported_Functions_Group1 Initialization and de-initialization functions
	237	* @{
	238	*/
	239	HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd);
	240	HAL_StatusTypeDef HAL_PCD_DeInit (PCD_HandleTypeDef *hpcd);
	241	void HAL_PCD_MspInit(PCD_HandleTypeDef *hpcd);
	242	void HAL_PCD_MspDeInit(PCD_HandleTypeDef *hpcd);
	243	/**
	244	* @}
	245	*/
	246
	247	/* I/O operation functions ***************************************************/
	248	/* Non-Blocking mode: Interrupt */
	249	/** @addtogroup PCD_Exported_Functions_Group2 IO operation functions
	250	* @{
	251	*/
	252	HAL_StatusTypeDef HAL_PCD_Start(PCD_HandleTypeDef *hpcd);
	253	HAL_StatusTypeDef HAL_PCD_Stop(PCD_HandleTypeDef *hpcd);
	254	void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd);
	255
	256	void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
	257	void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
	258	void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd);
	259	void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd);
	260	void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd);
	261	void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd);
	262	void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd);
	263	void HAL_PCD_ISOOUTIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
	264	void HAL_PCD_ISOINIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
	265	void HAL_PCD_ConnectCallback(PCD_HandleTypeDef *hpcd);
	266	void HAL_PCD_DisconnectCallback(PCD_HandleTypeDef *hpcd);
	267	/**
	268	* @}
	269	*/
	270
	271	/* Peripheral Control functions **********************************************/
	272	/** @addtogroup PCD_Exported_Functions_Group3 Peripheral Control functions
	273	* @{
	274	*/
	275	HAL_StatusTypeDef HAL_PCD_DevConnect(PCD_HandleTypeDef *hpcd);
	276	HAL_StatusTypeDef HAL_PCD_DevDisconnect(PCD_HandleTypeDef *hpcd);
	277	HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address);
	278	HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint16_t ep_mps, uint8_t ep_type);
	279	HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
	280	HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef hpcd, uint8_t ep_addr, uint8_t pBuf, uint32_t len);
	281	HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef hpcd, uint8_t ep_addr, uint8_t pBuf, uint32_t len);
	282	uint16_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
	283	HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
	284	HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
	285	HAL_StatusTypeDef HAL_PCD_EP_Flush(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
	286	HAL_StatusTypeDef HAL_PCD_ActivateRemoteWakeup(PCD_HandleTypeDef *hpcd);
	287	HAL_StatusTypeDef HAL_PCD_DeActivateRemoteWakeup(PCD_HandleTypeDef *hpcd);
	288	/**
	289	* @}
	290	*/
	291
	292	/* Peripheral State functions ************************************************/
	293	/** @addtogroup PCD_Exported_Functions_Group4 Peripheral State functions
	294	* @{
	295	*/
	296	PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd);
	297	/**
	298	* @}
	299	*/
	300
	301	/**
	302	* @}
	303	*/
	304
	305	/* Private constants ---------------------------------------------------------*/
	306	/** @defgroup PCD_Private_Constants PCD Private Constants
	307	* @{
	308	*/
	309	/** @defgroup USB_EXTI_Line_Interrupt USB EXTI line interrupt
	310	* @{
	311	*/
	312	#define USB_WAKEUP_EXTI_LINE ((uint32_t)EXTI_IMR_MR18) /!< External interrupt line 18 Connected to the USB FS EXTI Line /
	313	/**
	314	* @}
	315	*/
	316
	317	/** @defgroup PCD_EP0_MPS PCD EP0 MPS
	318	* @{
	319	*/
	320	#define DEP0CTL_MPS_64 0
	321	#define DEP0CTL_MPS_32 1
	322	#define DEP0CTL_MPS_16 2
	323	#define DEP0CTL_MPS_8 3
	324
	325	#define PCD_EP0MPS_64 DEP0CTL_MPS_64
	326	#define PCD_EP0MPS_32 DEP0CTL_MPS_32
	327	#define PCD_EP0MPS_16 DEP0CTL_MPS_16
	328	#define PCD_EP0MPS_08 DEP0CTL_MPS_8
	329	/**
	330	* @}
	331	*/
	332
	333	/** @defgroup PCD_EP_Type PCD EP Type
	334	* @{
	335	*/
	336	#define PCD_EP_TYPE_CTRL 0
	337	#define PCD_EP_TYPE_ISOC 1
	338	#define PCD_EP_TYPE_BULK 2
	339	#define PCD_EP_TYPE_INTR 3
	340	/**
	341	* @}
	342	*/
	343
	344	/** @defgroup PCD_ENDP PCD ENDP
	345	* @{
	346	*/
	347	#define PCD_ENDP0 ((uint8_t)0U)
	348	#define PCD_ENDP1 ((uint8_t)1U)
	349	#define PCD_ENDP2 ((uint8_t)2U)
	350	#define PCD_ENDP3 ((uint8_t)3U)
	351	#define PCD_ENDP4 ((uint8_t)4U)
	352	#define PCD_ENDP5 ((uint8_t)5U)
	353	#define PCD_ENDP6 ((uint8_t)6U)
	354	#define PCD_ENDP7 ((uint8_t)7U)
	355	/**
	356	* @}
	357	*/
	358
	359	/** @defgroup PCD_ENDP_Kind PCD Endpoint Kind
	360	* @{
	361	*/
	362	#define PCD_SNG_BUF 0
	363	#define PCD_DBL_BUF 1
	364	/**
	365	* @}
	366	*/
	367
	368	/**
	369	* @}
	370	*/
	371
	372	/* Private macros ------------------------------------------------------------*/
	373	/** @addtogroup PCD_Private_Macros PCD Private Macros
	374	* @{
	375	*/
	376
	377	/* SetENDPOINT */
	378	#define PCD_SET_ENDPOINT(USBx, bEpNum,wRegValue) (((uint16_t )(((uint32_t)(&(USBx)->EP0R + (bEpNum) * 2U))))= (uint16_t)(wRegValue))
	379
	380	/* GetENDPOINT */
	381	#define PCD_GET_ENDPOINT(USBx, bEpNum) (((uint16_t )(((uint32_t)(&(USBx)->EP0R + (bEpNum) * 2U)))))
	382
	383
	384
	385	/**
	386	* @brief sets the type in the endpoint register(bits EP_TYPE[1:0])
	387	* @param USBx USB peripheral instance register address.
	388	* @param bEpNum Endpoint Number.
	389	* @param wType Endpoint Type.
	390	* @retval None
	391	*/
	392	#define PCD_SET_EPTYPE(USBx, bEpNum,wType) (PCD_SET_ENDPOINT((USBx), (bEpNum),\
	393	((((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & ((uint32_t)(USB_EP_T_MASK))) \| ((uint32_t)(wType)) )))
	394
	395	/**
	396	* @brief gets the type in the endpoint register(bits EP_TYPE[1:0])
	397	* @param USBx USB peripheral instance register address.
	398	* @param bEpNum Endpoint Number.
	399	* @retval Endpoint Type
	400	*/
	401	#define PCD_GET_EPTYPE(USBx, bEpNum) (((uint16_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & USB_EP_T_FIELD)
	402
	403
	404	/**
	405	* @brief free buffer used from the application realizing it to the line
	406	toggles bit SW_BUF in the double buffered endpoint register
	407	* @param USBx USB peripheral instance register address.
	408	* @param bEpNum Endpoint Number.
	409	* @param bDir Direction
	410	* @retval None
	411	*/
	412	#define PCD_FreeUserBuffer(USBx, bEpNum, bDir)\
	413	{\
	414	if ((bDir) == PCD_EP_DBUF_OUT)\
	415	{ /* OUT double buffered endpoint */\
	416	PCD_TX_DTOG((USBx), (bEpNum));\
	417	}\
	418	else if ((bDir) == PCD_EP_DBUF_IN)\
	419	{ /* IN double buffered endpoint */\
	420	PCD_RX_DTOG((USBx), (bEpNum));\
	421	}\
	422	}
	423
	424	/**
	425	* @brief gets direction of the double buffered endpoint
	426	* @param USBx USB peripheral instance register address.
	427	* @param bEpNum Endpoint Number.
	428	* @retval EP_DBUF_OUT, EP_DBUF_IN,
	429	* EP_DBUF_ERR if the endpoint counter not yet programmed.
	430	*/
	431	#define PCD_GET_DB_DIR(USBx, bEpNum)\
	432	{\
	433	if ((uint16_t)(*PCD_EP_RX_CNT((USBx), (bEpNum)) & 0xFC00U) != 0U)\
	434	return(PCD_EP_DBUF_OUT);\
	435	else if (((uint16_t)(*PCD_EP_TX_CNT((USBx), (bEpNum))) & 0x03FFU) != 0U)\
	436	return(PCD_EP_DBUF_IN);\
	437	else\
	438	return(PCD_EP_DBUF_ERR);\
	439	}
	440
	441	/**
	442	* @brief sets the status for tx transfer (bits STAT_TX[1:0]).
	443	* @param USBx USB peripheral instance register address.
	444	* @param bEpNum Endpoint Number.
	445	* @param wState new state
	446	* @retval None
	447	*/
	448	#define PCD_SET_EP_TX_STATUS(USBx, bEpNum, wState) { register uint16_t _wRegVal;\
	449	\
	450	_wRegVal = (uint32_t) (((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & USB_EPTX_DTOGMASK);\
	451	/* toggle first bit ? */ \
	452	if((USB_EPTX_DTOG1 & (wState))!= 0U)\
	453	{ \
	454	_wRegVal ^=(uint16_t) USB_EPTX_DTOG1; \
	455	} \
	456	/* toggle second bit ? */ \
	457	if((USB_EPTX_DTOG2 & ((uint32_t)(wState)))!= 0U) \
	458	{ \
	459	_wRegVal ^=(uint16_t) USB_EPTX_DTOG2; \
	460	} \
	461	PCD_SET_ENDPOINT((USBx), (bEpNum), (((uint32_t)(_wRegVal)) \| USB_EP_CTR_RX\|USB_EP_CTR_TX));\
	462	} /* PCD_SET_EP_TX_STATUS */
	463
	464	/**
	465	* @brief sets the status for rx transfer (bits STAT_TX[1:0])
	466	* @param USBx USB peripheral instance register address.
	467	* @param bEpNum Endpoint Number.
	468	* @param wState new state
	469	* @retval None
	470	*/
	471	#define PCD_SET_EP_RX_STATUS(USBx, bEpNum,wState) {\
	472	register uint16_t _wRegVal; \
	473	\
	474	_wRegVal = (uint32_t) (((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & USB_EPRX_DTOGMASK);\
	475	/* toggle first bit ? */ \
	476	if((USB_EPRX_DTOG1 & (wState))!= 0U) \
	477	{ \
	478	_wRegVal ^= (uint16_t) USB_EPRX_DTOG1; \
	479	} \
	480	/* toggle second bit ? */ \
	481	if((USB_EPRX_DTOG2 & ((uint32_t)(wState)))!= 0U) \
	482	{ \
	483	_wRegVal ^= (uint16_t) USB_EPRX_DTOG2; \
	484	} \
	485	PCD_SET_ENDPOINT((USBx), (bEpNum), (((uint32_t)(_wRegVal)) \| USB_EP_CTR_RX\|USB_EP_CTR_TX)); \
	486	} /* PCD_SET_EP_RX_STATUS */
	487
	488	/**
	489	* @brief sets the status for rx & tx (bits STAT_TX[1:0] & STAT_RX[1:0])
	490	* @param USBx USB peripheral instance register address.
	491	* @param bEpNum Endpoint Number.
	492	* @param wStaterx new state.
	493	* @param wStatetx new state.
	494	* @retval None
	495	*/
	496	#define PCD_SET_EP_TXRX_STATUS(USBx,bEpNum,wStaterx,wStatetx) {\
	497	register uint32_t _wRegVal; \
	498	\
	499	_wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (USB_EPRX_DTOGMASK \|USB_EPTX_STAT) ;\
	500	/* toggle first bit ? */ \
	501	if((USB_EPRX_DTOG1 & ((wStaterx)))!= 0U) \
	502	{ \
	503	_wRegVal ^= USB_EPRX_DTOG1; \
	504	} \
	505	/* toggle second bit ? */ \
	506	if((USB_EPRX_DTOG2 & (wStaterx))!= 0U) \
	507	{ \
	508	_wRegVal ^= USB_EPRX_DTOG2; \
	509	} \
	510	/* toggle first bit ? */ \
	511	if((USB_EPTX_DTOG1 & (wStatetx))!= 0U) \
	512	{ \
	513	_wRegVal ^= USB_EPTX_DTOG1; \
	514	} \
	515	/* toggle second bit ? */ \
	516	if((USB_EPTX_DTOG2 & (wStatetx))!= 0U) \
	517	{ \
	518	_wRegVal ^= USB_EPTX_DTOG2; \
	519	} \
	520	PCD_SET_ENDPOINT((USBx), (bEpNum), _wRegVal \| USB_EP_CTR_RX\|USB_EP_CTR_TX); \
	521	} /* PCD_SET_EP_TXRX_STATUS */
	522
	523	/**
	524	* @brief gets the status for tx/rx transfer (bits STAT_TX[1:0]
	525	* /STAT_RX[1:0])
	526	* @param USBx USB peripheral instance register address.
	527	* @param bEpNum Endpoint Number.
	528	* @retval status
	529	*/
	530	#define PCD_GET_EP_TX_STATUS(USBx, bEpNum) (((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & USB_EPTX_STAT)
	531	#define PCD_GET_EP_RX_STATUS(USBx, bEpNum) (((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & USB_EPRX_STAT)
	532
	533	/**
	534	* @brief sets directly the VALID tx/rx-status into the endpoint register
	535	* @param USBx USB peripheral instance register address.
	536	* @param bEpNum Endpoint Number.
	537	* @retval None
	538	*/
	539	#define PCD_SET_EP_TX_VALID(USBx, bEpNum) (PCD_SET_EP_TX_STATUS((USBx), (bEpNum), USB_EP_TX_VALID))
	540	#define PCD_SET_EP_RX_VALID(USBx, bEpNum) (PCD_SET_EP_RX_STATUS((USBx), (bEpNum), USB_EP_RX_VALID))
	541
	542	/**
	543	* @brief checks stall condition in an endpoint.
	544	* @param USBx USB peripheral instance register address.
	545	* @param bEpNum Endpoint Number.
	546	* @retval TRUE = endpoint in stall condition.
	547	*/
	548	#define PCD_GET_EP_TX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_TX_STATUS((USBx), (bEpNum)) \
	549	== USB_EP_TX_STALL)
	550	#define PCD_GET_EP_RX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_RX_STATUS((USBx), (bEpNum)) \
	551	== USB_EP_RX_STALL)
	552
	553	/**
	554	* @brief set & clear EP_KIND bit.
	555	* @param USBx USB peripheral instance register address.
	556	* @param bEpNum Endpoint Number.
	557	* @retval None
	558	*/
	559	#define PCD_SET_EP_KIND(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum), \
	560	(USB_EP_CTR_RX\|USB_EP_CTR_TX\|((((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) \| USB_EP_KIND) & USB_EPREG_MASK))))
	561	#define PCD_CLEAR_EP_KIND(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum), \
	562	(USB_EP_CTR_RX\|USB_EP_CTR_TX\|((((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & USB_EPKIND_MASK))))
	563
	564	/**
	565	* @brief Sets/clears directly STATUS_OUT bit in the endpoint register.
	566	* @param USBx USB peripheral instance register address.
	567	* @param bEpNum Endpoint Number.
	568	* @retval None
	569	*/
	570	#define PCD_SET_OUT_STATUS(USBx, bEpNum) PCD_SET_EP_KIND((USBx), (bEpNum))
	571	#define PCD_CLEAR_OUT_STATUS(USBx, bEpNum) PCD_CLEAR_EP_KIND((USBx), (bEpNum))
	572
	573	/**
	574	* @brief Sets/clears directly EP_KIND bit in the endpoint register.
	575	* @param USBx USB peripheral instance register address.
	576	* @param bEpNum Endpoint Number.
	577	* @retval None
	578	*/
	579	#define PCD_SET_EP_DBUF(USBx, bEpNum) PCD_SET_EP_KIND((USBx), (bEpNum))
	580	#define PCD_CLEAR_EP_DBUF(USBx, bEpNum) PCD_CLEAR_EP_KIND((USBx), (bEpNum))
	581
	582	/**
	583	* @brief Clears bit CTR_RX / CTR_TX in the endpoint register.
	584	* @param USBx USB peripheral instance register address.
	585	* @param bEpNum Endpoint Number.
	586	* @retval None
	587	*/
	588	#define PCD_CLEAR_RX_EP_CTR(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum),\
	589	PCD_GET_ENDPOINT((USBx), (bEpNum)) & 0x7FFFU & USB_EPREG_MASK))
	590	#define PCD_CLEAR_TX_EP_CTR(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum),\
	591	PCD_GET_ENDPOINT((USBx), (bEpNum)) & 0xFF7FU & USB_EPREG_MASK))
	592
	593	/**
	594	* @brief Toggles DTOG_RX / DTOG_TX bit in the endpoint register.
	595	* @param USBx USB peripheral instance register address.
	596	* @param bEpNum Endpoint Number.
	597	* @retval None
	598	*/
	599	#define PCD_RX_DTOG(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum), \
	600	USB_EP_CTR_RX\|USB_EP_CTR_TX\|USB_EP_DTOG_RX \| (((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & USB_EPREG_MASK)))
	601	#define PCD_TX_DTOG(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum), \
	602	USB_EP_CTR_RX\|USB_EP_CTR_TX\|USB_EP_DTOG_TX \| (((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & USB_EPREG_MASK)))
	603
	604	/**
	605	* @brief Clears DTOG_RX / DTOG_TX bit in the endpoint register.
	606	* @param USBx USB peripheral instance register address.
	607	* @param bEpNum Endpoint Number.
	608	* @retval None
	609	*/
	610	#define PCD_CLEAR_RX_DTOG(USBx, bEpNum) if((((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & USB_EP_DTOG_RX) != 0)\
	611	{ \
	612	PCD_RX_DTOG((USBx),(bEpNum));\
	613	}
	614	#define PCD_CLEAR_TX_DTOG(USBx, bEpNum) if((((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & USB_EP_DTOG_TX) != 0)\
	615	{\
	616	PCD_TX_DTOG((USBx),(bEpNum));\
	617	}
	618
	619	/**
	620	* @brief Sets address in an endpoint register.
	621	* @param USBx USB peripheral instance register address.
	622	* @param bEpNum Endpoint Number.
	623	* @param bAddr Address.
	624	* @retval None
	625	*/
	626	#define PCD_SET_EP_ADDRESS(USBx, bEpNum,bAddr) PCD_SET_ENDPOINT((USBx), (bEpNum),\
	627	USB_EP_CTR_RX\|USB_EP_CTR_TX\|(((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & USB_EPREG_MASK) \| (bAddr))
	628
	629	/**
	630	* @brief Gets address in an endpoint register.
	631	* @param USBx USB peripheral instance register address.
	632	* @param bEpNum Endpoint Number.
	633	* @retval None
	634	*/
	635	#define PCD_GET_EP_ADDRESS(USBx, bEpNum) ((uint8_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPADDR_FIELD))
	636
	637	#define PCD_EP_TX_ADDRESS(USBx, bEpNum) ((uint16_t )((uint32_t)((((USBx)->BTABLE+(bEpNum)8)+ ((uint32_t)(USBx) + 0x400U)))))
	638	#define PCD_EP_TX_CNT(USBx, bEpNum) ((uint16_t )((uint32_t)((((USBx)->BTABLE+(bEpNum)8+2)+ ((uint32_t)(USBx) + 0x400U)))))
	639	#define PCD_EP_RX_ADDRESS(USBx, bEpNum) ((uint16_t )((uint32_t)((((USBx)->BTABLE+(bEpNum)8+4)+ ((uint32_t)(USBx) + 0x400U)))))
	640
	641	#define PCD_EP_RX_CNT(USBx, bEpNum) ((uint16_t )((uint32_t)((((USBx)->BTABLE+(bEpNum)8+6)+ ((uint32_t)(USBx) + 0x400U)))))
	642
	643	/**
	644	* @brief sets address of the tx/rx buffer.
	645	* @param USBx USB peripheral instance register address.
	646	* @param bEpNum Endpoint Number.
	647	* @param wAddr address to be set (must be word aligned).
	648	* @retval None
	649	*/
	650	#define PCD_SET_EP_TX_ADDRESS(USBx, bEpNum,wAddr) (*PCD_EP_TX_ADDRESS((USBx), (bEpNum)) = (((wAddr) >> 1U) << 1U))
	651	#define PCD_SET_EP_RX_ADDRESS(USBx, bEpNum,wAddr) (*PCD_EP_RX_ADDRESS((USBx), (bEpNum)) = (((wAddr) >> 1U) << 1U))
	652
	653	/**
	654	* @brief Gets address of the tx/rx buffer.
	655	* @param USBx USB peripheral instance register address.
	656	* @param bEpNum Endpoint Number.
	657	* @retval address of the buffer.
	658	*/
	659	#define PCD_GET_EP_TX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_TX_ADDRESS((USBx), (bEpNum)))
	660	#define PCD_GET_EP_RX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_RX_ADDRESS((USBx), (bEpNum)))
	661
	662	/**
	663	* @brief Sets counter of rx buffer with no. of blocks.
	664	* @param dwReg Register
	665	* @param wCount Counter.
	666	* @param wNBlocks no. of Blocks.
	667	* @retval None
	668	*/
	669	#define PCD_CALC_BLK32(dwReg,wCount,wNBlocks) {\
	670	(wNBlocks) = (wCount) >> 5U;\
	671	if(((wCount) & 0x1fU) == 0U)\
	672	{ \
	673	(wNBlocks)--;\
	674	} \
	675	*pdwReg = (uint16_t)((uint16_t)((wNBlocks) << 10U) \| (uint16_t)0x8000U); \
	676	}/* PCD_CALC_BLK32 */
	677
	678
	679	#define PCD_CALC_BLK2(dwReg,wCount,wNBlocks) {\
	680	(wNBlocks) = (wCount) >> 1U;\
	681	if(((wCount) & 0x1U) != 0U)\
	682	{ \
	683	(wNBlocks)++;\
	684	} \
	685	*pdwReg = (uint16_t)((wNBlocks) << 10U);\
	686	}/* PCD_CALC_BLK2 */
	687
	688
	689	#define PCD_SET_EP_CNT_RX_REG(dwReg,wCount) {\
	690	uint16_t wNBlocks;\
	691	if((wCount) > 62U) \
	692	{ \
	693	PCD_CALC_BLK32((dwReg),(wCount),wNBlocks) \
	694	} \
	695	else \
	696	{ \
	697	PCD_CALC_BLK2((dwReg),(wCount),wNBlocks) \
	698	} \
	699	}/* PCD_SET_EP_CNT_RX_REG */
	700
	701
	702	#define PCD_SET_EP_RX_DBUF0_CNT(USBx, bEpNum,wCount) {\
	703	uint16_t *pdwReg = PCD_EP_TX_CNT((USBx), (bEpNum)); \
	704	PCD_SET_EP_CNT_RX_REG(pdwReg, (wCount))\
	705	}
	706
	707	/**
	708	* @brief sets counter for the tx/rx buffer.
	709	* @param USBx USB peripheral instance register address.
	710	* @param bEpNum Endpoint Number.
	711	* @param wCount Counter value.
	712	* @retval None
	713	*/
	714	#define PCD_SET_EP_TX_CNT(USBx, bEpNum,wCount) (*PCD_EP_TX_CNT((USBx), (bEpNum)) = (wCount))
	715	#define PCD_SET_EP_RX_CNT(USBx, bEpNum,wCount) {\
	716	uint16_t *pdwReg =PCD_EP_RX_CNT((USBx),(bEpNum)); \
	717	PCD_SET_EP_CNT_RX_REG((pdwReg), (wCount))\
	718	}
	719
	720	/**
	721	* @brief gets counter of the tx buffer.
	722	* @param USBx USB peripheral instance register address.
	723	* @param bEpNum Endpoint Number.
	724	* @retval Counter value
	725	*/
	726	#define PCD_GET_EP_TX_CNT(USBx, bEpNum)((uint16_t)(*PCD_EP_TX_CNT((USBx), (bEpNum))) & 0x3ffU)
	727	#define PCD_GET_EP_RX_CNT(USBx, bEpNum)((uint16_t)(*PCD_EP_RX_CNT((USBx), (bEpNum))) & 0x3ffU)
	728
	729	/**
	730	* @brief Sets buffer 0/1 address in a double buffer endpoint.
	731	* @param USBx USB peripheral instance register address.
	732	* @param bEpNum Endpoint Number.
	733	* @param wBuf0Addr buffer 0 address.
	734	* @retval Counter value
	735	*/
	736	#define PCD_SET_EP_DBUF0_ADDR(USBx, bEpNum,wBuf0Addr) (PCD_SET_EP_TX_ADDRESS((USBx), (bEpNum), (wBuf0Addr)))
	737	#define PCD_SET_EP_DBUF1_ADDR(USBx, bEpNum,wBuf1Addr) (PCD_SET_EP_RX_ADDRESS((USBx), (bEpNum), (wBuf1Addr)))
	738
	739	/**
	740	* @brief Sets addresses in a double buffer endpoint.
	741	* @param USBx USB peripheral instance register address.
	742	* @param bEpNum Endpoint Number.
	743	* @param wBuf0Addr buffer 0 address.
	744	* @param wBuf1Addr buffer 1 address.
	745	* @retval None
	746	*/
	747	#define PCD_SET_EP_DBUF_ADDR(USBx, bEpNum,wBuf0Addr,wBuf1Addr) { \
	748	PCD_SET_EP_DBUF0_ADDR((USBx), (bEpNum), (wBuf0Addr));\
	749	PCD_SET_EP_DBUF1_ADDR((USBx), (bEpNum), (wBuf1Addr));\
	750	} /* PCD_SET_EP_DBUF_ADDR */
	751
	752	/**
	753	* @brief Gets buffer 0/1 address of a double buffer endpoint.
	754	* @param USBx USB peripheral instance register address.
	755	* @param bEpNum Endpoint Number.
	756	* @retval None
	757	*/
	758	#define PCD_GET_EP_DBUF0_ADDR(USBx, bEpNum) (PCD_GET_EP_TX_ADDRESS((USBx), (bEpNum)))
	759	#define PCD_GET_EP_DBUF1_ADDR(USBx, bEpNum) (PCD_GET_EP_RX_ADDRESS((USBx), (bEpNum)))
	760
	761	/**
	762	* @brief Gets buffer 0/1 address of a double buffer endpoint.
	763	* @param USBx USB peripheral instance register address.
	764	* @param bEpNum Endpoint Number.
	765	* @param bDir endpoint dir EP_DBUF_OUT = OUT
	766	* EP_DBUF_IN = IN
	767	* @param wCount Counter value
	768	* @retval None
	769	*/
	770	#define PCD_SET_EP_DBUF0_CNT(USBx, bEpNum, bDir, wCount) { \
	771	if((bDir) == PCD_EP_DBUF_OUT)\
	772	/* OUT endpoint */ \
	773	{PCD_SET_EP_RX_DBUF0_CNT((USBx), (bEpNum),(wCount))} \
	774	else if((bDir) == PCD_EP_DBUF_IN)\
	775	{ \
	776	*PCD_EP_TX_CNT((USBx), (bEpNum)) = (uint32_t)(wCount); \
	777	} \
	778	} /* SetEPDblBuf0Count*/
	779
	780	#define PCD_SET_EP_DBUF1_CNT(USBx, bEpNum, bDir, wCount) { \
	781	if((bDir) == PCD_EP_DBUF_OUT)\
	782	{/* OUT endpoint */ \
	783	PCD_SET_EP_RX_CNT((USBx), (bEpNum),(wCount)) \
	784	} \
	785	else if((bDir) == PCD_EP_DBUF_IN)\
	786	{/* IN endpoint */ \
	787	*PCD_EP_RX_CNT((USBx), (bEpNum)) = (uint32_t)(wCount); \
	788	} \
	789	} /* SetEPDblBuf1Count */
	790
	791	#define PCD_SET_EP_DBUF_CNT(USBx, bEpNum, bDir, wCount) {\
	792	PCD_SET_EP_DBUF0_CNT((USBx), (bEpNum), (bDir), (wCount)) \
	793	PCD_SET_EP_DBUF1_CNT((USBx), (bEpNum), (bDir), (wCount)) \
	794	} /* PCD_SET_EP_DBUF_CNT */
	795
	796	/**
	797	* @brief Gets buffer 0/1 rx/tx counter for double buffering.
	798	* @param USBx USB peripheral instance register address.
	799	* @param bEpNum Endpoint Number.
	800	* @retval None
	801	*/
	802	#define PCD_GET_EP_DBUF0_CNT(USBx, bEpNum) (PCD_GET_EP_TX_CNT((USBx), (bEpNum)))
	803	#define PCD_GET_EP_DBUF1_CNT(USBx, bEpNum) (PCD_GET_EP_RX_CNT((USBx), (bEpNum)))
	804
	805	/** @defgroup PCD_Instance_definition PCD Instance definition
	806	* @{
	807	*/
	808	#define IS_PCD_ALL_INSTANCE IS_USB_ALL_INSTANCE
	809	/**
	810	* @}
	811	*/
	812
	813	/**
	814	* @}
	815	*/
	816
	817	/**
	818	* @}
	819	*/
	820
	821	/**
	822	* @}
	823	*/
	824
	825	#endif /* STM32F042x6 \|\| STM32F072xB \|\| STM32F078xx \|\| STM32F070xB \|\| STM32F070x6 */
	826
	827	#ifdef __cplusplus
	828	}
	829	#endif
	830
	831
	832	#endif /* __STM32F0xx_HAL_PCD_H */
	833
	834	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/
	835