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2022-10-17 65b5428a731a94493c33dbc4bebfe63c5e0c5b13

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bfc108	1	/**
Q	2	******************************************************************************
	3	* @file stm32f0xx_hal_i2s.h
	4	* @author MCD Application Team
	5	* @brief Header file of I2S HAL module.
	6	******************************************************************************
	7	* @attention
	8	*
	9	* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
	10	*
	11	* Redistribution and use in source and binary forms, with or without modification,
	12	* are permitted provided that the following conditions are met:
	13	* 1. Redistributions of source code must retain the above copyright notice,
	14	* this list of conditions and the following disclaimer.
	15	* 2. Redistributions in binary form must reproduce the above copyright notice,
	16	* this list of conditions and the following disclaimer in the documentation
	17	* and/or other materials provided with the distribution.
	18	* 3. Neither the name of STMicroelectronics nor the names of its contributors
	19	* may be used to endorse or promote products derived from this software
	20	* without specific prior written permission.
	21	*
	22	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
	23	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
	24	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
	25	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
	26	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
	27	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
	28	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
	29	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
	30	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
	31	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
	32	*
	33	******************************************************************************
	34	*/
	35
	36	/* Define to prevent recursive inclusion -------------------------------------*/
	37	#ifndef __STM32F0xx_HAL_I2S_H
	38	#define __STM32F0xx_HAL_I2S_H
	39
	40	#ifdef __cplusplus
	41	extern "C" {
	42	#endif
	43
	44	#if defined(STM32F031x6) \|\| defined(STM32F038xx) \|\| \
	45	defined(STM32F051x8) \|\| defined(STM32F058xx) \|\| \
	46	defined(STM32F071xB) \|\| defined(STM32F072xB) \|\| defined(STM32F078xx) \|\| \
	47	defined(STM32F042x6) \|\| defined(STM32F048xx) \|\| \
	48	defined(STM32F091xC) \|\| defined(STM32F098xx)
	49
	50	/* Includes ------------------------------------------------------------------*/
	51	#include "stm32f0xx_hal_def.h"
	52
	53	/** @addtogroup STM32F0xx_HAL_Driver
	54	* @{
	55	*/
	56
	57	/** @addtogroup I2S
	58	* @{
	59	*/
	60
	61	/* Exported types ------------------------------------------------------------*/
	62	/** @defgroup I2S_Exported_Types I2S Exported Types
	63	* @{
	64	*/
	65
	66	/**
	67	* @brief I2S Init structure definition
	68	*/
	69	typedef struct
	70	{
	71	uint32_t Mode; /*!< Specifies the I2S operating mode.
	72	This parameter can be a value of @ref I2S_Mode */
	73
	74	uint32_t Standard; /*!< Specifies the standard used for the I2S communication.
	75	This parameter can be a value of @ref I2S_Standard */
	76
	77	uint32_t DataFormat; /*!< Specifies the data format for the I2S communication.
	78	This parameter can be a value of @ref I2S_Data_Format */
	79
	80	uint32_t MCLKOutput; /*!< Specifies whether the I2S MCLK output is enabled or not.
	81	This parameter can be a value of @ref I2S_MCLK_Output */
	82
	83	uint32_t AudioFreq; /*!< Specifies the frequency selected for the I2S communication.
	84	This parameter can be a value of @ref I2S_Audio_Frequency */
	85
	86	uint32_t CPOL; /*!< Specifies the idle state of the I2S clock.
	87	This parameter can be a value of @ref I2S_Clock_Polarity */
	88	}I2S_InitTypeDef;
	89
	90	/**
	91	* @brief HAL State structures definition
	92	*/
	93	typedef enum
	94	{
	95	HAL_I2S_STATE_RESET = 0x00U, /!< I2S not yet initialized or disabled /
	96	HAL_I2S_STATE_READY = 0x01U, /!< I2S initialized and ready for use /
	97	HAL_I2S_STATE_BUSY = 0x02U, /!< I2S internal process is ongoing /
	98	HAL_I2S_STATE_BUSY_TX = 0x03U, /!< Data Transmission process is ongoing /
	99	HAL_I2S_STATE_BUSY_RX = 0x04U, /!< Data Reception process is ongoing /
	100	HAL_I2S_STATE_PAUSE = 0x06U, /!< I2S pause state: used in case of DMA /
	101	HAL_I2S_STATE_ERROR = 0x07U /!< I2S error state /
	102	}HAL_I2S_StateTypeDef;
	103
	104	/**
	105	* @brief I2S handle Structure definition
	106	*/
	107	typedef struct
	108	{
	109	SPI_TypeDef Instance; /!< I2S registers base address */
	110
	111	I2S_InitTypeDef Init; /!< I2S communication parameters /
	112
	113	uint16_t pTxBuffPtr; /!< Pointer to I2S Tx transfer buffer */
	114
	115	__IO uint16_t TxXferSize; /!< I2S Tx transfer size /
	116
	117	__IO uint16_t TxXferCount; /!< I2S Tx transfer Counter /
	118
	119	uint16_t pRxBuffPtr; /!< Pointer to I2S Rx transfer buffer */
	120
	121	__IO uint16_t RxXferSize; /!< I2S Rx transfer size /
	122
	123	__IO uint16_t RxXferCount; /*!< I2S Rx transfer counter
	124	(This field is initialized at the
	125	same value as transfer size at the
	126	beginning of the transfer and
	127	decremented when a sample is received.
	128	NbSamplesReceived = RxBufferSize-RxBufferCount) */
	129
	130	DMA_HandleTypeDef hdmatx; /!< I2S Tx DMA handle parameters */
	131
	132	DMA_HandleTypeDef hdmarx; /!< I2S Rx DMA handle parameters */
	133
	134	__IO HAL_LockTypeDef Lock; /!< I2S locking object /
	135
	136	__IO HAL_I2S_StateTypeDef State; /!< I2S communication state /
	137
	138	__IO uint32_t ErrorCode; /*!< I2S Error code
	139	This parameter can be a value of @ref I2S_Error */
	140
	141	}I2S_HandleTypeDef;
	142	/**
	143	* @}
	144	*/
	145
	146	/* Exported constants --------------------------------------------------------*/
	147	/** @defgroup I2S_Exported_Constants I2S Exported Constants
	148	* @{
	149	*/
	150	/** @defgroup I2S_Error I2S Error
	151	* @{
	152	*/
	153	#define HAL_I2S_ERROR_NONE (0x00000000U) /!< No error /
	154	#define HAL_I2S_ERROR_TIMEOUT (0x00000001U) /!< Timeout error /
	155	#define HAL_I2S_ERROR_OVR (0x00000002U) /!< OVR error /
	156	#define HAL_I2S_ERROR_UDR (0x00000004U) /!< UDR error /
	157	#define HAL_I2S_ERROR_DMA (0x00000008U) /!< DMA transfer error /
	158	#define HAL_I2S_ERROR_UNKNOW (0x00000010U) /!< Unknow Error error /
	159	/**
	160	* @}
	161	*/
	162
	163	/** @defgroup I2S_Mode I2S Mode
	164	* @{
	165	*/
	166	#define I2S_MODE_SLAVE_TX (0x00000000U)
	167	#define I2S_MODE_SLAVE_RX (0x00000100U)
	168	#define I2S_MODE_MASTER_TX (0x00000200U)
	169	#define I2S_MODE_MASTER_RX (0x00000300U)
	170
	171	#define IS_I2S_MODE(MODE) (((MODE) == I2S_MODE_SLAVE_TX) \|\| \
	172	((MODE) == I2S_MODE_SLAVE_RX) \|\| \
	173	((MODE) == I2S_MODE_MASTER_TX)\|\| \
	174	((MODE) == I2S_MODE_MASTER_RX))
	175	/**
	176	* @}
	177	*/
	178
	179	/** @defgroup I2S_Standard I2S Standard
	180	* @{
	181	*/
	182	#define I2S_STANDARD_PHILIPS (0x00000000U)
	183	#define I2S_STANDARD_MSB (0x00000010U)
	184	#define I2S_STANDARD_LSB (0x00000020U)
	185	#define I2S_STANDARD_PCM_SHORT (0x00000030U)
	186	#define I2S_STANDARD_PCM_LONG (0x000000B0U)
	187
	188	#define IS_I2S_STANDARD(STANDARD) (((STANDARD) == I2S_STANDARD_PHILIPS) \|\| \
	189	((STANDARD) == I2S_STANDARD_MSB) \|\| \
	190	((STANDARD) == I2S_STANDARD_LSB) \|\| \
	191	((STANDARD) == I2S_STANDARD_PCM_SHORT) \|\| \
	192	((STANDARD) == I2S_STANDARD_PCM_LONG))
	193	/**
	194	* @}
	195	*/
	196
	197	/** @defgroup I2S_Data_Format I2S Data Format
	198	* @{
	199	*/
	200	#define I2S_DATAFORMAT_16B (0x00000000U)
	201	#define I2S_DATAFORMAT_16B_EXTENDED (0x00000001U)
	202	#define I2S_DATAFORMAT_24B (0x00000003U)
	203	#define I2S_DATAFORMAT_32B (0x00000005U)
	204
	205	#define IS_I2S_DATA_FORMAT(FORMAT) (((FORMAT) == I2S_DATAFORMAT_16B) \|\| \
	206	((FORMAT) == I2S_DATAFORMAT_16B_EXTENDED) \|\| \
	207	((FORMAT) == I2S_DATAFORMAT_24B) \|\| \
	208	((FORMAT) == I2S_DATAFORMAT_32B))
	209	/**
	210	* @}
	211	*/
	212
	213	/** @defgroup I2S_MCLK_Output I2S MCLK Output
	214	* @{
	215	*/
	216	#define I2S_MCLKOUTPUT_ENABLE ((uint32_t)SPI_I2SPR_MCKOE)
	217	#define I2S_MCLKOUTPUT_DISABLE (0x00000000U)
	218
	219	#define IS_I2S_MCLK_OUTPUT(OUTPUT) (((OUTPUT) == I2S_MCLKOUTPUT_ENABLE) \|\| \
	220	((OUTPUT) == I2S_MCLKOUTPUT_DISABLE))
	221	/**
	222	* @}
	223	*/
	224
	225	/** @defgroup I2S_Audio_Frequency I2S Audio Frequency
	226	* @{
	227	*/
	228	#define I2S_AUDIOFREQ_192K (192000U)
	229	#define I2S_AUDIOFREQ_96K (96000U)
	230	#define I2S_AUDIOFREQ_48K (48000U)
	231	#define I2S_AUDIOFREQ_44K (44100U)
	232	#define I2S_AUDIOFREQ_32K (32000U)
	233	#define I2S_AUDIOFREQ_22K (22050U)
	234	#define I2S_AUDIOFREQ_16K (16000U)
	235	#define I2S_AUDIOFREQ_11K (11025U)
	236	#define I2S_AUDIOFREQ_8K (8000U)
	237	#define I2S_AUDIOFREQ_DEFAULT (2U)
	238
	239	#define IS_I2S_AUDIO_FREQ(FREQ) ((((FREQ) >= I2S_AUDIOFREQ_8K) && \
	240	((FREQ) <= I2S_AUDIOFREQ_192K)) \|\| \
	241	((FREQ) == I2S_AUDIOFREQ_DEFAULT))
	242	/**
	243	* @}
	244	*/
	245
	246	/** @defgroup I2S_Clock_Polarity I2S Clock Polarity
	247	* @{
	248	*/
	249	#define I2S_CPOL_LOW (0x00000000U)
	250	#define I2S_CPOL_HIGH ((uint32_t)SPI_I2SCFGR_CKPOL)
	251
	252	#define IS_I2S_CPOL(CPOL) (((CPOL) == I2S_CPOL_LOW) \|\| \
	253	((CPOL) == I2S_CPOL_HIGH))
	254	/**
	255	* @}
	256	*/
	257
	258	/** @defgroup I2S_Interrupt_configuration_definition I2S Interrupt configuration definition
	259	* @{
	260	*/
	261	#define I2S_IT_TXE SPI_CR2_TXEIE
	262	#define I2S_IT_RXNE SPI_CR2_RXNEIE
	263	#define I2S_IT_ERR SPI_CR2_ERRIE
	264	/**
	265	* @}
	266	*/
	267
	268	/** @defgroup I2S_Flag_definition I2S Flag definition
	269	* @{
	270	*/
	271	#define I2S_FLAG_TXE SPI_SR_TXE
	272	#define I2S_FLAG_RXNE SPI_SR_RXNE
	273
	274	#define I2S_FLAG_UDR SPI_SR_UDR
	275	#define I2S_FLAG_OVR SPI_SR_OVR
	276	#define I2S_FLAG_FRE SPI_SR_FRE
	277
	278	#define I2S_FLAG_CHSIDE SPI_SR_CHSIDE
	279	#define I2S_FLAG_BSY SPI_SR_BSY
	280	/**
	281	* @}
	282	*/
	283
	284	/**
	285	* @}
	286	*/
	287
	288	/* Exported macros -----------------------------------------------------------*/
	289	/** @defgroup I2S_Exported_macros I2S Exported Macros
	290	* @{
	291	*/
	292
	293	/** @brief Reset I2S handle state
	294	* @param __HANDLE__ I2S handle.
	295	* @retval None
	296	*/
	297	#define __HAL_I2S_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_I2S_STATE_RESET)
	298
	299	/** @brief Enable or disable the specified SPI peripheral (in I2S mode).
	300	* @param __HANDLE__ specifies the I2S Handle.
	301	* @retval None
	302	*/
	303	#define __HAL_I2S_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->I2SCFGR \|= SPI_I2SCFGR_I2SE)
	304	#define __HAL_I2S_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->I2SCFGR &= (uint16_t)(~SPI_I2SCFGR_I2SE))
	305
	306	/** @brief Enable or disable the specified I2S interrupts.
	307	* @param __HANDLE__ specifies the I2S Handle.
	308	* @param __INTERRUPT__ specifies the interrupt source to enable or disable.
	309	* This parameter can be one of the following values:
	310	* @arg I2S_IT_TXE: Tx buffer empty interrupt enable
	311	* @arg I2S_IT_RXNE: RX buffer not empty interrupt enable
	312	* @arg I2S_IT_ERR: Error interrupt enable
	313	* @retval None
	314	*/
	315	#define __HAL_I2S_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR2 \|= (__INTERRUPT__))
	316	#define __HAL_I2S_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR2 &= (uint16_t)(~(__INTERRUPT__)))
	317
	318	/** @brief Checks if the specified I2S interrupt source is enabled or disabled.
	319	* @param __HANDLE__ specifies the I2S Handle.
	320	* This parameter can be I2S where x: 1, 2, or 3 to select the I2S peripheral.
	321	* @param __INTERRUPT__ specifies the I2S interrupt source to check.
	322	* This parameter can be one of the following values:
	323	* @arg I2S_IT_TXE: Tx buffer empty interrupt enable
	324	* @arg I2S_IT_RXNE: RX buffer not empty interrupt enable
	325	* @arg I2S_IT_ERR: Error interrupt enable
	326	* @retval The new state of __IT__ (TRUE or FALSE).
	327	*/
	328	#define __HAL_I2S_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR2 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
	329
	330	/** @brief Checks whether the specified I2S flag is set or not.
	331	* @param __HANDLE__ specifies the I2S Handle.
	332	* @param __FLAG__ specifies the flag to check.
	333	* This parameter can be one of the following values:
	334	* @arg I2S_FLAG_RXNE: Receive buffer not empty flag
	335	* @arg I2S_FLAG_TXE: Transmit buffer empty flag
	336	* @arg I2S_FLAG_UDR: Underrun flag
	337	* @arg I2S_FLAG_OVR: Overrun flag
	338	* @arg I2S_FLAG_FRE: Frame error flag
	339	* @arg I2S_FLAG_CHSIDE: Channel Side flag
	340	* @arg I2S_FLAG_BSY: Busy flag
	341	* @retval The new state of __FLAG__ (TRUE or FALSE).
	342	*/
	343	#define __HAL_I2S_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__))
	344
	345	/** @brief Clears the I2S OVR pending flag.
	346	* @param __HANDLE__ specifies the I2S Handle.
	347	* @retval None
	348	*/
	349	#define __HAL_I2S_CLEAR_OVRFLAG(__HANDLE__) do{ \
	350	__IO uint32_t tmpreg; \
	351	tmpreg = (__HANDLE__)->Instance->DR; \
	352	tmpreg = (__HANDLE__)->Instance->SR; \
	353	UNUSED(tmpreg); \
	354	}while(0)
	355	/** @brief Clears the I2S UDR pending flag.
	356	* @param __HANDLE__ specifies the I2S Handle.
	357	* @retval None
	358	*/
	359	#define __HAL_I2S_CLEAR_UDRFLAG(__HANDLE__) do{\
	360	__IO uint32_t tmpreg;\
	361	tmpreg = ((__HANDLE__)->Instance->SR);\
	362	UNUSED(tmpreg); \
	363	}while(0)
	364	/**
	365	* @}
	366	*/
	367
	368	/* Exported functions --------------------------------------------------------*/
	369	/** @addtogroup I2S_Exported_Functions
	370	* @{
	371	*/
	372
	373	/** @addtogroup I2S_Exported_Functions_Group1
	374	* @{
	375	*/
	376	/* Initialization/de-initialization functions **********************************/
	377	HAL_StatusTypeDef HAL_I2S_Init(I2S_HandleTypeDef *hi2s);
	378	HAL_StatusTypeDef HAL_I2S_DeInit (I2S_HandleTypeDef *hi2s);
	379	void HAL_I2S_MspInit(I2S_HandleTypeDef *hi2s);
	380	void HAL_I2S_MspDeInit(I2S_HandleTypeDef *hi2s);
	381	/**
	382	* @}
	383	*/
	384
	385	/** @addtogroup I2S_Exported_Functions_Group2
	386	* @{
	387	*/
	388	/* I/O operation functions ***************************************************/
	389	/* Blocking mode: Polling */
	390	HAL_StatusTypeDef HAL_I2S_Transmit(I2S_HandleTypeDef hi2s, uint16_t pData, uint16_t Size, uint32_t Timeout);
	391	HAL_StatusTypeDef HAL_I2S_Receive(I2S_HandleTypeDef hi2s, uint16_t pData, uint16_t Size, uint32_t Timeout);
	392
	393	/* Non-Blocking mode: Interrupt */
	394	HAL_StatusTypeDef HAL_I2S_Transmit_IT(I2S_HandleTypeDef hi2s, uint16_t pData, uint16_t Size);
	395	HAL_StatusTypeDef HAL_I2S_Receive_IT(I2S_HandleTypeDef hi2s, uint16_t pData, uint16_t Size);
	396	void HAL_I2S_IRQHandler(I2S_HandleTypeDef *hi2s);
	397
	398	/* Non-Blocking mode: DMA */
	399	HAL_StatusTypeDef HAL_I2S_Transmit_DMA(I2S_HandleTypeDef hi2s, uint16_t pData, uint16_t Size);
	400	HAL_StatusTypeDef HAL_I2S_Receive_DMA(I2S_HandleTypeDef hi2s, uint16_t pData, uint16_t Size);
	401
	402	HAL_StatusTypeDef HAL_I2S_DMAPause(I2S_HandleTypeDef *hi2s);
	403	HAL_StatusTypeDef HAL_I2S_DMAResume(I2S_HandleTypeDef *hi2s);
	404	HAL_StatusTypeDef HAL_I2S_DMAStop(I2S_HandleTypeDef *hi2s);
	405
	406	/* Callbacks used in non blocking modes (Interrupt and DMA) *******************/
	407	void HAL_I2S_TxHalfCpltCallback(I2S_HandleTypeDef *hi2s);
	408	void HAL_I2S_TxCpltCallback(I2S_HandleTypeDef *hi2s);
	409	void HAL_I2S_RxHalfCpltCallback(I2S_HandleTypeDef *hi2s);
	410	void HAL_I2S_RxCpltCallback(I2S_HandleTypeDef *hi2s);
	411	void HAL_I2S_ErrorCallback(I2S_HandleTypeDef *hi2s);
	412	/**
	413	* @}
	414	*/
	415
	416	/** @addtogroup I2S_Exported_Functions_Group3
	417	* @{
	418	*/
	419	/* Peripheral Control and State functions ************************************/
	420	HAL_I2S_StateTypeDef HAL_I2S_GetState(I2S_HandleTypeDef *hi2s);
	421	uint32_t HAL_I2S_GetError(I2S_HandleTypeDef *hi2s);
	422	/**
	423	* @}
	424	*/
	425
	426	/**
	427	* @}
	428	*/
	429
	430
	431	/**
	432	* @}
	433	*/
	434
	435	/**
	436	* @}
	437	*/
	438	#endif /* defined(STM32F031x6) \|\| defined(STM32F038xx) \|\| */
	439	/* defined(STM32F051x8) \|\| defined(STM32F058xx) \|\| */
	440	/* defined(STM32F071xB) \|\| defined(STM32F072xB) \|\| defined(STM32F078xx) \|\|*/
	441	/* defined(STM32F042x6) \|\| defined(STM32F048xx) \|\| */
	442	/* defined(STM32F091xC) \|\| defined(STM32F098xx) */
	443
	444	#ifdef __cplusplus
	445	}
	446	#endif
	447
	448
	449	#endif /* __STM32F0xx_HAL_I2S_H */
	450
	451	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/