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2022-10-17 65b5428a731a94493c33dbc4bebfe63c5e0c5b13

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bfc108	1	/**
Q	2	******************************************************************************
	3	* @file stm32f0xx_hal_can.h
	4	* @author MCD Application Team
	5	* @brief Header file of CAN HAL module.
	6	******************************************************************************
	7	* @attention
	8	*
	9	* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
	10	*
	11	* Redistribution and use in source and binary forms, with or without modification,
	12	* are permitted provided that the following conditions are met:
	13	* 1. Redistributions of source code must retain the above copyright notice,
	14	* this list of conditions and the following disclaimer.
	15	* 2. Redistributions in binary form must reproduce the above copyright notice,
	16	* this list of conditions and the following disclaimer in the documentation
	17	* and/or other materials provided with the distribution.
	18	* 3. Neither the name of STMicroelectronics nor the names of its contributors
	19	* may be used to endorse or promote products derived from this software
	20	* without specific prior written permission.
	21	*
	22	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
	23	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
	24	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
	25	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
	26	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
	27	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
	28	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
	29	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
	30	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
	31	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
	32	*
	33	******************************************************************************
	34	*/
	35
	36	/* Define to prevent recursive inclusion -------------------------------------*/
	37	#ifndef __STM32F0xx_HAL_CAN_H
	38	#define __STM32F0xx_HAL_CAN_H
	39
	40	#ifdef __cplusplus
	41	extern "C" {
	42	#endif
	43
	44	#if defined(STM32F072xB) \|\| defined(STM32F042x6) \|\| defined(STM32F048xx) \|\| defined(STM32F078xx) \|\| defined(STM32F091xC) \|\| defined(STM32F098xx)
	45
	46	/* Includes ------------------------------------------------------------------*/
	47	#include "stm32f0xx_hal_def.h"
	48
	49	/** @addtogroup STM32F0xx_HAL_Driver
	50	* @{
	51	*/
	52
	53	/** @addtogroup CAN
	54	* @{
	55	*/
	56
	57	/* Exported types ------------------------------------------------------------*/
	58	/** @defgroup CAN_Exported_Types CAN Exported Types
	59	* @{
	60	*/
	61	/**
	62	* @brief HAL State structures definition
	63	*/
	64	typedef enum
	65	{
	66	HAL_CAN_STATE_RESET = 0x00U, /!< CAN not yet initialized or disabled /
	67	HAL_CAN_STATE_READY = 0x01U, /!< CAN initialized and ready for use /
	68	HAL_CAN_STATE_BUSY = 0x02U, /!< CAN process is ongoing /
	69	HAL_CAN_STATE_BUSY_TX = 0x12U, /!< CAN process is ongoing /
	70	HAL_CAN_STATE_BUSY_RX0 = 0x22U, /!< CAN process is ongoing /
	71	HAL_CAN_STATE_BUSY_RX1 = 0x32U, /!< CAN process is ongoing /
	72	HAL_CAN_STATE_BUSY_TX_RX0 = 0x42U, /!< CAN process is ongoing /
	73	HAL_CAN_STATE_BUSY_TX_RX1 = 0x52U, /!< CAN process is ongoing /
	74	HAL_CAN_STATE_BUSY_RX0_RX1 = 0x62U, /!< CAN process is ongoing /
	75	HAL_CAN_STATE_BUSY_TX_RX0_RX1 = 0x72U, /!< CAN process is ongoing /
	76	HAL_CAN_STATE_TIMEOUT = 0x03U, /!< CAN in Timeout state /
	77	HAL_CAN_STATE_ERROR = 0x04U /!< CAN error state /
	78
	79	}HAL_CAN_StateTypeDef;
	80
	81	/**
	82	* @brief CAN init structure definition
	83	*/
	84	typedef struct
	85	{
	86	uint32_t Prescaler; /*!< Specifies the length of a time quantum.
	87	This parameter must be a number between Min_Data = 1 and Max_Data = 1024. */
	88
	89	uint32_t Mode; /*!< Specifies the CAN operating mode.
	90	This parameter can be a value of @ref CAN_operating_mode */
	91
	92	uint32_t SJW; /*!< Specifies the maximum number of time quanta
	93	the CAN hardware is allowed to lengthen or
	94	shorten a bit to perform resynchronization.
	95	This parameter can be a value of @ref CAN_synchronisation_jump_width */
	96
	97	uint32_t BS1; /*!< Specifies the number of time quanta in Bit Segment 1.
	98	This parameter can be a value of @ref CAN_time_quantum_in_bit_segment_1 */
	99
	100	uint32_t BS2; /*!< Specifies the number of time quanta in Bit Segment 2.
	101	This parameter can be a value of @ref CAN_time_quantum_in_bit_segment_2 */
	102
	103	uint32_t TTCM; /*!< Enable or disable the time triggered communication mode.
	104	This parameter can be set to ENABLE or DISABLE. */
	105
	106	uint32_t ABOM; /*!< Enable or disable the automatic bus-off management.
	107	This parameter can be set to ENABLE or DISABLE. */
	108
	109	uint32_t AWUM; /*!< Enable or disable the automatic wake-up mode.
	110	This parameter can be set to ENABLE or DISABLE. */
	111
	112	uint32_t NART; /*!< Enable or disable the non-automatic retransmission mode.
	113	This parameter can be set to ENABLE or DISABLE. */
	114
	115	uint32_t RFLM; /*!< Enable or disable the Receive FIFO Locked mode.
	116	This parameter can be set to ENABLE or DISABLE. */
	117
	118	uint32_t TXFP; /*!< Enable or disable the transmit FIFO priority.
	119	This parameter can be set to ENABLE or DISABLE. */
	120	}CAN_InitTypeDef;
	121
	122	/**
	123	* @brief CAN filter configuration structure definition
	124	*/
	125	typedef struct
	126	{
	127	uint32_t FilterIdHigh; /*!< Specifies the filter identification number (MSBs for a 32-bit
	128	configuration, first one for a 16-bit configuration).
	129	This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF. */
	130
	131	uint32_t FilterIdLow; /*!< Specifies the filter identification number (LSBs for a 32-bit
	132	configuration, second one for a 16-bit configuration).
	133	This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF. */
	134
	135	uint32_t FilterMaskIdHigh; /*!< Specifies the filter mask number or identification number,
	136	according to the mode (MSBs for a 32-bit configuration,
	137	first one for a 16-bit configuration).
	138	This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF. */
	139
	140	uint32_t FilterMaskIdLow; /*!< Specifies the filter mask number or identification number,
	141	according to the mode (LSBs for a 32-bit configuration,
	142	second one for a 16-bit configuration).
	143	This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF. */
	144
	145	uint32_t FilterFIFOAssignment; /*!< Specifies the FIFO (0 or 1U) which will be assigned to the filter.
	146	This parameter can be a value of @ref CAN_filter_FIFO */
	147
	148	uint32_t FilterNumber; /*!< Specifies the filter which will be initialized.
	149	This parameter must be a number between Min_Data = 0 and Max_Data = 27. */
	150
	151	uint32_t FilterMode; /*!< Specifies the filter mode to be initialized.
	152	This parameter can be a value of @ref CAN_filter_mode */
	153
	154	uint32_t FilterScale; /*!< Specifies the filter scale.
	155	This parameter can be a value of @ref CAN_filter_scale */
	156
	157	uint32_t FilterActivation; /*!< Enable or disable the filter.
	158	This parameter can be set to ENABLE or DISABLE. */
	159
	160	uint32_t BankNumber; /*!< Select the start slave bank filter
	161	This parameter must be a number between Min_Data = 0 and Max_Data = 28. */
	162
	163	}CAN_FilterConfTypeDef;
	164
	165	/**
	166	* @brief CAN Tx message structure definition
	167	*/
	168	typedef struct
	169	{
	170	uint32_t StdId; /*!< Specifies the standard identifier.
	171	This parameter must be a number between Min_Data = 0 and Max_Data = 0x7FF. */
	172
	173	uint32_t ExtId; /*!< Specifies the extended identifier.
	174	This parameter must be a number between Min_Data = 0 and Max_Data = 0x1FFFFFFF. */
	175
	176	uint32_t IDE; /*!< Specifies the type of identifier for the message that will be transmitted.
	177	This parameter can be a value of @ref CAN_identifier_type */
	178
	179	uint32_t RTR; /*!< Specifies the type of frame for the message that will be transmitted.
	180	This parameter can be a value of @ref CAN_remote_transmission_request */
	181
	182	uint32_t DLC; /*!< Specifies the length of the frame that will be transmitted.
	183	This parameter must be a number between Min_Data = 0 and Max_Data = 8. */
	184
	185	uint8_t Data[8]; /*!< Contains the data to be transmitted.
	186	This parameter must be a number between Min_Data = 0 and Max_Data = 0xFF. */
	187
	188	}CanTxMsgTypeDef;
	189
	190	/**
	191	* @brief CAN Rx message structure definition
	192	*/
	193	typedef struct
	194	{
	195	uint32_t StdId; /*!< Specifies the standard identifier.
	196	This parameter must be a number between Min_Data = 0 and Max_Data = 0x7FF. */
	197
	198	uint32_t ExtId; /*!< Specifies the extended identifier.
	199	This parameter must be a number between Min_Data = 0 and Max_Data = 0x1FFFFFFF. */
	200
	201	uint32_t IDE; /*!< Specifies the type of identifier for the message that will be received.
	202	This parameter can be a value of @ref CAN_identifier_type */
	203
	204	uint32_t RTR; /*!< Specifies the type of frame for the received message.
	205	This parameter can be a value of @ref CAN_remote_transmission_request */
	206
	207	uint32_t DLC; /*!< Specifies the length of the frame that will be received.
	208	This parameter must be a number between Min_Data = 0 and Max_Data = 8. */
	209
	210	uint8_t Data[8]; /*!< Contains the data to be received.
	211	This parameter must be a number between Min_Data = 0 and Max_Data = 0xFF. */
	212
	213	uint32_t FMI; /*!< Specifies the index of the filter the message stored in the mailbox passes through.
	214	This parameter must be a number between Min_Data = 0 and Max_Data = 0xFF. */
	215
	216	uint32_t FIFONumber; /*!< Specifies the receive FIFO number.
	217	This parameter can be CAN_FIFO0 or CAN_FIFO1 */
	218
	219	}CanRxMsgTypeDef;
	220
	221	/**
	222	* @brief CAN handle Structure definition
	223	*/
	224	typedef struct
	225	{
	226	CAN_TypeDef Instance; /!< Register base address */
	227
	228	CAN_InitTypeDef Init; /!< CAN required parameters /
	229
	230	CanTxMsgTypeDef* pTxMsg; /!< Pointer to transmit structure /
	231
	232	CanRxMsgTypeDef* pRxMsg; /!< Pointer to reception structure for RX FIFO0 msg /
	233
	234	CanRxMsgTypeDef* pRx1Msg; /!< Pointer to reception structure for RX FIFO1 msg /
	235
	236	HAL_LockTypeDef Lock; /!< CAN locking object /
	237
	238	__IO HAL_CAN_StateTypeDef State; /!< CAN communication state /
	239
	240	__IO uint32_t ErrorCode; /*!< CAN Error code
	241	This parameter can be a value of @ref CAN_Error_Code */
	242
	243	}CAN_HandleTypeDef;
	244	/**
	245	* @}
	246	*/
	247
	248	/* Exported constants --------------------------------------------------------*/
	249
	250	/** @defgroup CAN_Exported_Constants CAN Exported Constants
	251	* @{
	252	*/
	253
	254	/** @defgroup CAN_Error_Code CAN Error Code
	255	* @{
	256	*/
	257	#define HAL_CAN_ERROR_NONE (0x00000000U) /!< No error /
	258	#define HAL_CAN_ERROR_EWG (0x00000001U) /!< EWG error /
	259	#define HAL_CAN_ERROR_EPV (0x00000002U) /!< EPV error /
	260	#define HAL_CAN_ERROR_BOF (0x00000004U) /!< BOF error /
	261	#define HAL_CAN_ERROR_STF (0x00000008U) /!< Stuff error /
	262	#define HAL_CAN_ERROR_FOR (0x00000010U) /!< Form error /
	263	#define HAL_CAN_ERROR_ACK (0x00000020U) /!< Acknowledgment error /
	264	#define HAL_CAN_ERROR_BR (0x00000040U) /!< Bit recessive /
	265	#define HAL_CAN_ERROR_BD (0x00000080U) /!< LEC dominant /
	266	#define HAL_CAN_ERROR_CRC (0x00000100U) /!< LEC transfer error /
	267	#define HAL_CAN_ERROR_FOV0 (0x00000200U) /!< FIFO0 overrun error /
	268	#define HAL_CAN_ERROR_FOV1 (0x00000400U) /!< FIFO1 overrun error /
	269	#define HAL_CAN_ERROR_TXFAIL (0x00000800U) /!< Transmit failure /
	270	/**
	271	* @}
	272	*/
	273
	274	/** @defgroup CAN_InitStatus CAN InitStatus
	275	* @{
	276	*/
	277	#define CAN_INITSTATUS_FAILED (0x00000000U) /!< CAN initialization failed /
	278	#define CAN_INITSTATUS_SUCCESS (0x00000001U) /!< CAN initialization OK /
	279	/**
	280	* @}
	281	*/
	282
	283	/** @defgroup CAN_operating_mode CAN Operating Mode
	284	* @{
	285	*/
	286	#define CAN_MODE_NORMAL (0x00000000U) /!< Normal mode /
	287	#define CAN_MODE_LOOPBACK ((uint32_t)CAN_BTR_LBKM) /!< Loopback mode /
	288	#define CAN_MODE_SILENT ((uint32_t)CAN_BTR_SILM) /!< Silent mode /
	289	#define CAN_MODE_SILENT_LOOPBACK ((uint32_t)(CAN_BTR_LBKM \| CAN_BTR_SILM)) /!< Loopback combined with silent mode /
	290	/**
	291	* @}
	292	*/
	293
	294
	295	/** @defgroup CAN_synchronisation_jump_width CAN Synchronization Jump Width
	296	* @{
	297	*/
	298	#define CAN_SJW_1TQ (0x00000000U) /!< 1 time quantum /
	299	#define CAN_SJW_2TQ ((uint32_t)CAN_BTR_SJW_0) /!< 2 time quantum /
	300	#define CAN_SJW_3TQ ((uint32_t)CAN_BTR_SJW_1) /!< 3 time quantum /
	301	#define CAN_SJW_4TQ ((uint32_t)CAN_BTR_SJW) /!< 4 time quantum /
	302	/**
	303	* @}
	304	*/
	305
	306	/** @defgroup CAN_time_quantum_in_bit_segment_1 CAN Time Quantum in Bit Segment 1
	307	* @{
	308	*/
	309	#define CAN_BS1_1TQ (0x00000000U) /!< 1 time quantum /
	310	#define CAN_BS1_2TQ ((uint32_t)CAN_BTR_TS1_0) /!< 2 time quantum /
	311	#define CAN_BS1_3TQ ((uint32_t)CAN_BTR_TS1_1) /!< 3 time quantum /
	312	#define CAN_BS1_4TQ ((uint32_t)(CAN_BTR_TS1_1 \| CAN_BTR_TS1_0)) /!< 4 time quantum /
	313	#define CAN_BS1_5TQ ((uint32_t)CAN_BTR_TS1_2) /!< 5 time quantum /
	314	#define CAN_BS1_6TQ ((uint32_t)(CAN_BTR_TS1_2 \| CAN_BTR_TS1_0)) /!< 6 time quantum /
	315	#define CAN_BS1_7TQ ((uint32_t)(CAN_BTR_TS1_2 \| CAN_BTR_TS1_1)) /!< 7 time quantum /
	316	#define CAN_BS1_8TQ ((uint32_t)(CAN_BTR_TS1_2 \| CAN_BTR_TS1_1 \| CAN_BTR_TS1_0)) /!< 8 time quantum /
	317	#define CAN_BS1_9TQ ((uint32_t)CAN_BTR_TS1_3) /!< 9 time quantum /
	318	#define CAN_BS1_10TQ ((uint32_t)(CAN_BTR_TS1_3 \| CAN_BTR_TS1_0)) /!< 10 time quantum /
	319	#define CAN_BS1_11TQ ((uint32_t)(CAN_BTR_TS1_3 \| CAN_BTR_TS1_1)) /!< 11 time quantum /
	320	#define CAN_BS1_12TQ ((uint32_t)(CAN_BTR_TS1_3 \| CAN_BTR_TS1_1 \| CAN_BTR_TS1_0)) /!< 12 time quantum /
	321	#define CAN_BS1_13TQ ((uint32_t)(CAN_BTR_TS1_3 \| CAN_BTR_TS1_2)) /!< 13 time quantum /
	322	#define CAN_BS1_14TQ ((uint32_t)(CAN_BTR_TS1_3 \| CAN_BTR_TS1_2 \| CAN_BTR_TS1_0)) /!< 14 time quantum /
	323	#define CAN_BS1_15TQ ((uint32_t)(CAN_BTR_TS1_3 \| CAN_BTR_TS1_2 \| CAN_BTR_TS1_1)) /!< 15 time quantum /
	324	#define CAN_BS1_16TQ ((uint32_t)CAN_BTR_TS1) /!< 16 time quantum /
	325	/**
	326	* @}
	327	*/
	328
	329	/** @defgroup CAN_time_quantum_in_bit_segment_2 CAN Time Quantum in Bit Segment 2
	330	* @{
	331	*/
	332	#define CAN_BS2_1TQ (0x00000000U) /!< 1 time quantum /
	333	#define CAN_BS2_2TQ ((uint32_t)CAN_BTR_TS2_0) /!< 2 time quantum /
	334	#define CAN_BS2_3TQ ((uint32_t)CAN_BTR_TS2_1) /!< 3 time quantum /
	335	#define CAN_BS2_4TQ ((uint32_t)(CAN_BTR_TS2_1 \| CAN_BTR_TS2_0)) /!< 4 time quantum /
	336	#define CAN_BS2_5TQ ((uint32_t)CAN_BTR_TS2_2) /!< 5 time quantum /
	337	#define CAN_BS2_6TQ ((uint32_t)(CAN_BTR_TS2_2 \| CAN_BTR_TS2_0)) /!< 6 time quantum /
	338	#define CAN_BS2_7TQ ((uint32_t)(CAN_BTR_TS2_2 \| CAN_BTR_TS2_1)) /!< 7 time quantum /
	339	#define CAN_BS2_8TQ ((uint32_t)CAN_BTR_TS2) /!< 8 time quantum /
	340	/**
	341	* @}
	342	*/
	343
	344	/** @defgroup CAN_filter_mode CAN Filter Mode
	345	* @{
	346	*/
	347	#define CAN_FILTERMODE_IDMASK ((uint8_t)0x00U) /!< Identifier mask mode /
	348	#define CAN_FILTERMODE_IDLIST ((uint8_t)0x01U) /!< Identifier list mode /
	349	/**
	350	* @}
	351	*/
	352
	353	/** @defgroup CAN_filter_scale CAN Filter Scale
	354	* @{
	355	*/
	356	#define CAN_FILTERSCALE_16BIT ((uint8_t)0x00U) /!< Two 16-bit filters /
	357	#define CAN_FILTERSCALE_32BIT ((uint8_t)0x01U) /!< One 32-bit filter /
	358	/**
	359	* @}
	360	*/
	361
	362	/** @defgroup CAN_filter_FIFO CAN Filter FIFO
	363	* @{
	364	*/
	365	#define CAN_FILTER_FIFO0 ((uint8_t)0x00U) /!< Filter FIFO 0 assignment for filter x /
	366	#define CAN_FILTER_FIFO1 ((uint8_t)0x01U) /!< Filter FIFO 1 assignment for filter x /
	367	/**
	368	* @}
	369	*/
	370
	371	/** @defgroup CAN_identifier_type CAN Identifier Type
	372	* @{
	373	*/
	374	#define CAN_ID_STD (0x00000000U) /!< Standard Id /
	375	#define CAN_ID_EXT (0x00000004U) /!< Extended Id /
	376	/**
	377	* @}
	378	*/
	379
	380	/** @defgroup CAN_remote_transmission_request CAN Remote Transmission Request
	381	* @{
	382	*/
	383	#define CAN_RTR_DATA (0x00000000U) /!< Data frame /
	384	#define CAN_RTR_REMOTE (0x00000002U) /!< Remote frame /
	385	/**
	386	* @}
	387	*/
	388
	389	/** @defgroup CAN_receive_FIFO_number_constants CAN Receive FIFO Number
	390	* @{
	391	*/
	392	#define CAN_FIFO0 ((uint8_t)0x00U) /!< CAN FIFO 0 used to receive /
	393	#define CAN_FIFO1 ((uint8_t)0x01U) /!< CAN FIFO 1 used to receive /
	394	/**
	395	* @}
	396	*/
	397
	398	/** @defgroup CAN_flags CAN Flags
	399	* @{
	400	*/
	401	/* If the flag is 0x3XXXXXXX, it means that it can be used with CAN_GetFlagStatus()
	402	and CAN_ClearFlag() functions. */
	403	/* If the flag is 0x1XXXXXXX, it means that it can only be used with
	404	CAN_GetFlagStatus() function. */
	405
	406	/* Transmit Flags */
	407	#define CAN_FLAG_RQCP0 (0x00000500U) /!< Request MailBox0 flag /
	408	#define CAN_FLAG_RQCP1 (0x00000508U) /!< Request MailBox1 flag /
	409	#define CAN_FLAG_RQCP2 (0x00000510U) /!< Request MailBox2 flag /
	410	#define CAN_FLAG_TXOK0 (0x00000501U) /!< Transmission OK MailBox0 flag /
	411	#define CAN_FLAG_TXOK1 (0x00000509U) /!< Transmission OK MailBox1 flag /
	412	#define CAN_FLAG_TXOK2 (0x00000511U) /!< Transmission OK MailBox2 flag /
	413	#define CAN_FLAG_TME0 (0x0000051AU) /!< Transmit mailbox 0 empty flag /
	414	#define CAN_FLAG_TME1 (0x0000051BU) /!< Transmit mailbox 0 empty flag /
	415	#define CAN_FLAG_TME2 (0x0000051CU) /!< Transmit mailbox 0 empty flag /
	416
	417	/* Receive Flags */
	418	#define CAN_FLAG_FF0 (0x00000203U) /!< FIFO 0 Full flag /
	419	#define CAN_FLAG_FOV0 (0x00000204U) /!< FIFO 0 Overrun flag /
	420
	421	#define CAN_FLAG_FF1 (0x00000403U) /!< FIFO 1 Full flag /
	422	#define CAN_FLAG_FOV1 (0x00000404U) /!< FIFO 1 Overrun flag /
	423
	424	/* Operating Mode Flags */
	425	#define CAN_FLAG_INAK (0x00000100U) /!< Initialization acknowledge flag /
	426	#define CAN_FLAG_SLAK (0x00000101U) /!< Sleep acknowledge flag /
	427	#define CAN_FLAG_ERRI (0x00000102U) /!< Error flag /
	428	#define CAN_FLAG_WKU (0x00000103U) /!< Wake up flag /
	429	#define CAN_FLAG_SLAKI (0x00000104U) /!< Sleep acknowledge flag /
	430	/* @note When SLAK interrupt is disabled (SLKIE=0U), no polling on SLAKI is possible.
	431	In this case the SLAK bit can be polled.*/
	432
	433	/* Error Flags */
	434	#define CAN_FLAG_EWG (0x00000300U) /!< Error warning flag /
	435	#define CAN_FLAG_EPV (0x00000301U) /!< Error passive flag /
	436	#define CAN_FLAG_BOF (0x00000302U) /!< Bus-Off flag /
	437
	438	/**
	439	* @}
	440	*/
	441
	442
	443	/** @defgroup CAN_interrupts CAN Interrupts
	444	* @{
	445	*/
	446	#define CAN_IT_TME ((uint32_t)CAN_IER_TMEIE) /!< Transmit mailbox empty interrupt /
	447
	448	/* Receive Interrupts */
	449	#define CAN_IT_FMP0 ((uint32_t)CAN_IER_FMPIE0) /!< FIFO 0 message pending interrupt /
	450	#define CAN_IT_FF0 ((uint32_t)CAN_IER_FFIE0) /!< FIFO 0 full interrupt /
	451	#define CAN_IT_FOV0 ((uint32_t)CAN_IER_FOVIE0) /!< FIFO 0 overrun interrupt /
	452	#define CAN_IT_FMP1 ((uint32_t)CAN_IER_FMPIE1) /!< FIFO 1 message pending interrupt /
	453	#define CAN_IT_FF1 ((uint32_t)CAN_IER_FFIE1) /!< FIFO 1 full interrupt /
	454	#define CAN_IT_FOV1 ((uint32_t)CAN_IER_FOVIE1) /!< FIFO 1 overrun interrupt /
	455
	456	/* Operating Mode Interrupts */
	457	#define CAN_IT_WKU ((uint32_t)CAN_IER_WKUIE) /!< Wake-up interrupt /
	458	#define CAN_IT_SLK ((uint32_t)CAN_IER_SLKIE) /!< Sleep acknowledge interrupt /
	459
	460	/* Error Interrupts */
	461	#define CAN_IT_EWG ((uint32_t)CAN_IER_EWGIE) /!< Error warning interrupt /
	462	#define CAN_IT_EPV ((uint32_t)CAN_IER_EPVIE) /!< Error passive interrupt /
	463	#define CAN_IT_BOF ((uint32_t)CAN_IER_BOFIE) /!< Bus-off interrupt /
	464	#define CAN_IT_LEC ((uint32_t)CAN_IER_LECIE) /!< Last error code interrupt /
	465	#define CAN_IT_ERR ((uint32_t)CAN_IER_ERRIE) /!< Error Interrupt /
	466
	467	/**
	468	* @}
	469	*/
	470
	471	/** @defgroup CAN_Mailboxes CAN Mailboxes
	472	* @{
	473	*/
	474	/* Mailboxes definition */
	475	#define CAN_TXMAILBOX_0 ((uint8_t)0x00U)
	476	#define CAN_TXMAILBOX_1 ((uint8_t)0x01U)
	477	#define CAN_TXMAILBOX_2 ((uint8_t)0x02U)
	478	/**
	479	* @}
	480	*/
	481
	482	/**
	483	* @}
	484	*/
	485
	486	/* Exported macros -----------------------------------------------------------*/
	487	/** @defgroup CAN_Exported_Macros CAN Exported Macros
	488	* @{
	489	*/
	490
	491	/** @brief Reset CAN handle state
	492	* @param __HANDLE__ CAN handle.
	493	* @retval None
	494	*/
	495	#define __HAL_CAN_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_CAN_STATE_RESET)
	496
	497	/**
	498	* @brief Enable the specified CAN interrupts.
	499	* @param __HANDLE__ CAN handle.
	500	* @param __INTERRUPT__ CAN Interrupt
	501	* @retval None
	502	*/
	503	#define __HAL_CAN_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->IER) \|= (__INTERRUPT__))
	504
	505	/**
	506	* @brief Disable the specified CAN interrupts.
	507	* @param __HANDLE__ CAN handle.
	508	* @param __INTERRUPT__ CAN Interrupt
	509	* @retval None
	510	*/
	511	#define __HAL_CAN_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->IER) &= ~(__INTERRUPT__))
	512
	513	/**
	514	* @brief Return the number of pending received messages.
	515	* @param __HANDLE__ CAN handle.
	516	* @param __FIFONUMBER__ Receive FIFO number, CAN_FIFO0 or CAN_FIFO1.
	517	* @retval The number of pending message.
	518	*/
	519	#define __HAL_CAN_MSG_PENDING(__HANDLE__, __FIFONUMBER__) (((__FIFONUMBER__) == CAN_FIFO0)? \
	520	((uint8_t)((__HANDLE__)->Instance->RF0R&0x03U)) : ((uint8_t)((__HANDLE__)->Instance->RF1R&0x03U)))
	521
	522	/** @brief Check whether the specified CAN flag is set or not.
	523	* @param __HANDLE__ specifies the CAN Handle.
	524	* @param __FLAG__ specifies the flag to check.
	525	* This parameter can be one of the following values:
	526	* @arg CAN_TSR_RQCP0: Request MailBox0 Flag
	527	* @arg CAN_TSR_RQCP1: Request MailBox1 Flag
	528	* @arg CAN_TSR_RQCP2: Request MailBox2 Flag
	529	* @arg CAN_FLAG_TXOK0: Transmission OK MailBox0 Flag
	530	* @arg CAN_FLAG_TXOK1: Transmission OK MailBox1 Flag
	531	* @arg CAN_FLAG_TXOK2: Transmission OK MailBox2 Flag
	532	* @arg CAN_FLAG_TME0: Transmit mailbox 0 empty Flag
	533	* @arg CAN_FLAG_TME1: Transmit mailbox 1 empty Flag
	534	* @arg CAN_FLAG_TME2: Transmit mailbox 2 empty Flag
	535	* @arg CAN_FLAG_FMP0: FIFO 0 Message Pending Flag
	536	* @arg CAN_FLAG_FF0: FIFO 0 Full Flag
	537	* @arg CAN_FLAG_FOV0: FIFO 0 Overrun Flag
	538	* @arg CAN_FLAG_FMP1: FIFO 1 Message Pending Flag
	539	* @arg CAN_FLAG_FF1: FIFO 1 Full Flag
	540	* @arg CAN_FLAG_FOV1: FIFO 1 Overrun Flag
	541	* @arg CAN_FLAG_WKU: Wake up Flag
	542	* @arg CAN_FLAG_SLAK: Sleep acknowledge Flag
	543	* @arg CAN_FLAG_SLAKI: Sleep acknowledge Flag
	544	* @arg CAN_FLAG_EWG: Error Warning Flag
	545	* @arg CAN_FLAG_EPV: Error Passive Flag
	546	* @arg CAN_FLAG_BOF: Bus-Off Flag
	547	* @retval The new state of __FLAG__ (TRUE or FALSE).
	548	*/
	549	#define __HAL_CAN_GET_FLAG(__HANDLE__, __FLAG__) \
	550	((((__FLAG__) >> 8U) == 5U)? ((((__HANDLE__)->Instance->TSR) & (1U << ((__FLAG__) & CAN_FLAG_MASK))) == (1U << ((__FLAG__) & CAN_FLAG_MASK))): \
	551	(((__FLAG__) >> 8U) == 2U)? ((((__HANDLE__)->Instance->RF0R) & (1U << ((__FLAG__) & CAN_FLAG_MASK))) == (1U << ((__FLAG__) & CAN_FLAG_MASK))): \
	552	(((__FLAG__) >> 8U) == 4U)? ((((__HANDLE__)->Instance->RF1R) & (1U << ((__FLAG__) & CAN_FLAG_MASK))) == (1U << ((__FLAG__) & CAN_FLAG_MASK))): \
	553	(((__FLAG__) >> 8U) == 1U)? ((((__HANDLE__)->Instance->MSR) & (1U << ((__FLAG__) & CAN_FLAG_MASK))) == (1U << ((__FLAG__) & CAN_FLAG_MASK))): \
	554	((((__HANDLE__)->Instance->ESR) & (1U << ((__FLAG__) & CAN_FLAG_MASK))) == (1U << ((__FLAG__) & CAN_FLAG_MASK))))
	555
	556	/** @brief Clear the specified CAN pending flag.
	557	* @param __HANDLE__ specifies the CAN Handle.
	558	* @param __FLAG__ specifies the flag to check.
	559	* This parameter can be one of the following values:
	560	* @arg CAN_TSR_RQCP0: Request MailBox0 Flag
	561	* @arg CAN_TSR_RQCP1: Request MailBox1 Flag
	562	* @arg CAN_TSR_RQCP2: Request MailBox2 Flag
	563	* @arg CAN_FLAG_TXOK0: Transmission OK MailBox0 Flag
	564	* @arg CAN_FLAG_TXOK1: Transmission OK MailBox1 Flag
	565	* @arg CAN_FLAG_TXOK2: Transmission OK MailBox2 Flag
	566	* @arg CAN_FLAG_TME0: Transmit mailbox 0 empty Flag
	567	* @arg CAN_FLAG_TME1: Transmit mailbox 1 empty Flag
	568	* @arg CAN_FLAG_TME2: Transmit mailbox 2 empty Flag
	569	* @arg CAN_FLAG_FMP0: FIFO 0 Message Pending Flag
	570	* @arg CAN_FLAG_FF0: FIFO 0 Full Flag
	571	* @arg CAN_FLAG_FOV0: FIFO 0 Overrun Flag
	572	* @arg CAN_FLAG_FMP1: FIFO 1 Message Pending Flag
	573	* @arg CAN_FLAG_FF1: FIFO 1 Full Flag
	574	* @arg CAN_FLAG_FOV1: FIFO 1 Overrun Flag
	575	* @arg CAN_FLAG_WKU: Wake up Flag
	576	* @arg CAN_FLAG_SLAKI: Sleep acknowledge Flag
	577	* @arg CAN_FLAG_EWG: Error Warning Flag
	578	* @arg CAN_FLAG_EPV: Error Passive Flag
	579	* @arg CAN_FLAG_BOF: Bus-Off Flag
	580	* @retval The new state of __FLAG__ (TRUE or FALSE).
	581	*/
	582	#define __HAL_CAN_CLEAR_FLAG(__HANDLE__, __FLAG__) \
	583	((((__FLAG__) >> 8U) == 5U)? (((__HANDLE__)->Instance->TSR) = (1U << ((__FLAG__) & CAN_FLAG_MASK))): \
	584	(((__FLAG__) >> 8U) == 2U)? (((__HANDLE__)->Instance->RF0R) = (1U << ((__FLAG__) & CAN_FLAG_MASK))): \
	585	(((__FLAG__) >> 8U) == 4U)? (((__HANDLE__)->Instance->RF1R) = (1U << ((__FLAG__) & CAN_FLAG_MASK))): \
	586	(((__FLAG__) >> 8U) == 1U)? (((__HANDLE__)->Instance->MSR) = (1U << ((__FLAG__) & CAN_FLAG_MASK))): 0U)
	587
	588
	589	/** @brief Check if the specified CAN interrupt source is enabled or disabled.
	590	* @param __HANDLE__ specifies the CAN Handle.
	591	* @param __INTERRUPT__ specifies the CAN interrupt source to check.
	592	* This parameter can be one of the following values:
	593	* @arg CAN_IT_TME: Transmit mailbox empty interrupt enable
	594	* @arg CAN_IT_FMP0: FIFO0 message pending interrupt enablev
	595	* @arg CAN_IT_FMP1: FIFO1 message pending interrupt enable
	596	* @retval The new state of __IT__ (TRUE or FALSE).
	597	*/
	598	#define __HAL_CAN_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->IER & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
	599
	600	/**
	601	* @brief Check the transmission status of a CAN Frame.
	602	* @param __HANDLE__ CAN handle.
	603	* @param __TRANSMITMAILBOX__ the number of the mailbox that is used for transmission.
	604	* @retval The new status of transmission (TRUE or FALSE).
	605	*/
	606	#define __HAL_CAN_TRANSMIT_STATUS(__HANDLE__, __TRANSMITMAILBOX__)\
	607	(((__TRANSMITMAILBOX__) == CAN_TXMAILBOX_0)? ((((__HANDLE__)->Instance->TSR) & (CAN_TSR_RQCP0 \| CAN_TSR_TME0)) == (CAN_TSR_RQCP0 \| CAN_TSR_TME0)) :\
	608	((__TRANSMITMAILBOX__) == CAN_TXMAILBOX_1)? ((((__HANDLE__)->Instance->TSR) & (CAN_TSR_RQCP1 \| CAN_TSR_TME1)) == (CAN_TSR_RQCP1 \| CAN_TSR_TME1)) :\
	609	((((__HANDLE__)->Instance->TSR) & (CAN_TSR_RQCP2 \| CAN_TSR_TME2)) == (CAN_TSR_RQCP2 \| CAN_TSR_TME2)))
	610
	611	/**
	612	* @brief Release the specified receive FIFO.
	613	* @param __HANDLE__ CAN handle.
	614	* @param __FIFONUMBER__ Receive FIFO number, CAN_FIFO0 or CAN_FIFO1.
	615	* @retval None
	616	*/
	617	#define __HAL_CAN_FIFO_RELEASE(__HANDLE__, __FIFONUMBER__) (((__FIFONUMBER__) == CAN_FIFO0)? \
	618	((__HANDLE__)->Instance->RF0R \|= CAN_RF0R_RFOM0) : ((__HANDLE__)->Instance->RF1R \|= CAN_RF1R_RFOM1))
	619
	620	/**
	621	* @brief Cancel a transmit request.
	622	* @param __HANDLE__ specifies the CAN Handle.
	623	* @param __TRANSMITMAILBOX__ the number of the mailbox that is used for transmission.
	624	* @retval None
	625	*/
	626	#define __HAL_CAN_CANCEL_TRANSMIT(__HANDLE__, __TRANSMITMAILBOX__)\
	627	(((__TRANSMITMAILBOX__) == CAN_TXMAILBOX_0)? ((__HANDLE__)->Instance->TSR \|= CAN_TSR_ABRQ0) :\
	628	((__TRANSMITMAILBOX__) == CAN_TXMAILBOX_1)? ((__HANDLE__)->Instance->TSR \|= CAN_TSR_ABRQ1) :\
	629	((__HANDLE__)->Instance->TSR \|= CAN_TSR_ABRQ2))
	630
	631	/**
	632	* @brief Enable or disables the DBG Freeze for CAN.
	633	* @param __HANDLE__ specifies the CAN Handle.
	634	* @param __NEWSTATE__ new state of the CAN peripheral.
	635	* This parameter can be: ENABLE (CAN reception/transmission is frozen
	636	* during debug. Reception FIFOs can still be accessed/controlled normally)
	637	* or DISABLE (CAN is working during debug).
	638	* @retval None
	639	*/
	640	#define __HAL_CAN_DBG_FREEZE(__HANDLE__, __NEWSTATE__) (((__NEWSTATE__) == ENABLE)? \
	641	((__HANDLE__)->Instance->MCR \|= CAN_MCR_DBF) : ((__HANDLE__)->Instance->MCR &= ~CAN_MCR_DBF))
	642
	643	/**
	644	* @}
	645	*/
	646
	647	/* Exported functions --------------------------------------------------------*/
	648	/** @addtogroup CAN_Exported_Functions CAN Exported Functions
	649	* @{
	650	*/
	651
	652	/** @addtogroup CAN_Exported_Functions_Group1 Initialization and de-initialization functions
	653	* @brief Initialization and Configuration functions
	654	* @{
	655	*/
	656
	657	/* Initialization and de-initialization functions *****************************/
	658	HAL_StatusTypeDef HAL_CAN_Init(CAN_HandleTypeDef* hcan);
	659	HAL_StatusTypeDef HAL_CAN_ConfigFilter(CAN_HandleTypeDef* hcan, CAN_FilterConfTypeDef* sFilterConfig);
	660	HAL_StatusTypeDef HAL_CAN_DeInit(CAN_HandleTypeDef* hcan);
	661	void HAL_CAN_MspInit(CAN_HandleTypeDef* hcan);
	662	void HAL_CAN_MspDeInit(CAN_HandleTypeDef* hcan);
	663	/**
	664	* @}
	665	*/
	666
	667	/** @addtogroup CAN_Exported_Functions_Group2 Input and Output operation functions
	668	* @brief I/O operation functions
	669	* @{
	670	*/
	671	/* IO operation functions *****************************************************/
	672	HAL_StatusTypeDef HAL_CAN_Transmit(CAN_HandleTypeDef *hcan, uint32_t Timeout);
	673	HAL_StatusTypeDef HAL_CAN_Transmit_IT(CAN_HandleTypeDef *hcan);
	674	HAL_StatusTypeDef HAL_CAN_Receive(CAN_HandleTypeDef *hcan, uint8_t FIFONumber, uint32_t Timeout);
	675	HAL_StatusTypeDef HAL_CAN_Receive_IT(CAN_HandleTypeDef *hcan, uint8_t FIFONumber);
	676	HAL_StatusTypeDef HAL_CAN_Sleep(CAN_HandleTypeDef *hcan);
	677	HAL_StatusTypeDef HAL_CAN_WakeUp(CAN_HandleTypeDef *hcan);
	678	void HAL_CAN_IRQHandler(CAN_HandleTypeDef* hcan);
	679	void HAL_CAN_TxCpltCallback(CAN_HandleTypeDef* hcan);
	680	void HAL_CAN_RxCpltCallback(CAN_HandleTypeDef* hcan);
	681	void HAL_CAN_ErrorCallback(CAN_HandleTypeDef *hcan);
	682	/**
	683	* @}
	684	*/
	685
	686	/** @addtogroup CAN_Exported_Functions_Group3 Peripheral State and Error functions
	687	* @brief CAN Peripheral State functions
	688	* @{
	689	*/
	690	/* Peripheral State and Error functions ***************************************/
	691	uint32_t HAL_CAN_GetError(CAN_HandleTypeDef *hcan);
	692	HAL_CAN_StateTypeDef HAL_CAN_GetState(CAN_HandleTypeDef* hcan);
	693	/**
	694	* @}
	695	*/
	696
	697	/**
	698	* @}
	699	*/
	700
	701	/* Private types -------------------------------------------------------------*/
	702	/** @defgroup CAN_Private_Types CAN Private Types
	703	* @{
	704	*/
	705
	706	/**
	707	* @}
	708	*/
	709
	710	/* Private variables ---------------------------------------------------------*/
	711	/** @defgroup CAN_Private_Variables CAN Private Variables
	712	* @{
	713	*/
	714
	715	/**
	716	* @}
	717	*/
	718
	719	/* Private constants ---------------------------------------------------------*/
	720	/** @defgroup CAN_Private_Constants CAN Private Constants
	721	* @{
	722	*/
	723	#define CAN_TXSTATUS_NOMAILBOX ((uint8_t)0x04U) /!< CAN cell did not provide CAN_TxStatus_NoMailBox /
	724	#define CAN_FLAG_MASK (0x000000FFU)
	725	/**
	726	* @}
	727	*/
	728
	729	/* Private Macros -----------------------------------------------------------*/
	730	/** @defgroup CAN_Private_Macros CAN Private Macros
	731	* @{
	732	*/
	733
	734	#define IS_CAN_MODE(MODE) (((MODE) == CAN_MODE_NORMAL) \|\| \
	735	((MODE) == CAN_MODE_LOOPBACK)\|\| \
	736	((MODE) == CAN_MODE_SILENT) \|\| \
	737	((MODE) == CAN_MODE_SILENT_LOOPBACK))
	738
	739	#define IS_CAN_SJW(SJW) (((SJW) == CAN_SJW_1TQ) \|\| ((SJW) == CAN_SJW_2TQ)\|\| \
	740	((SJW) == CAN_SJW_3TQ) \|\| ((SJW) == CAN_SJW_4TQ))
	741
	742	#define IS_CAN_BS1(BS1) ((BS1) <= CAN_BS1_16TQ)
	743
	744	#define IS_CAN_BS2(BS2) ((BS2) <= CAN_BS2_8TQ)
	745
	746	#define IS_CAN_PRESCALER(PRESCALER) (((PRESCALER) >= 1U) && ((PRESCALER) <= 1024U))
	747
	748	#define IS_CAN_FILTER_NUMBER(NUMBER) ((NUMBER) <= 27U)
	749
	750	#define IS_CAN_FILTER_MODE(MODE) (((MODE) == CAN_FILTERMODE_IDMASK) \|\| \
	751	((MODE) == CAN_FILTERMODE_IDLIST))
	752
	753	#define IS_CAN_FILTER_SCALE(SCALE) (((SCALE) == CAN_FILTERSCALE_16BIT) \|\| \
	754	((SCALE) == CAN_FILTERSCALE_32BIT))
	755
	756	#define IS_CAN_FILTER_FIFO(FIFO) (((FIFO) == CAN_FILTER_FIFO0) \|\| \
	757	((FIFO) == CAN_FILTER_FIFO1))
	758
	759	#define IS_CAN_BANKNUMBER(BANKNUMBER) ((BANKNUMBER) <= 28U)
	760
	761	#define IS_CAN_TRANSMITMAILBOX(TRANSMITMAILBOX) ((TRANSMITMAILBOX) <= ((uint8_t)0x02U))
	762	#define IS_CAN_STDID(STDID) ((STDID) <= (0x7FFU))
	763	#define IS_CAN_EXTID(EXTID) ((EXTID) <= (0x1FFFFFFFU))
	764	#define IS_CAN_DLC(DLC) ((DLC) <= ((uint8_t)0x08U))
	765
	766	#define IS_CAN_IDTYPE(IDTYPE) (((IDTYPE) == CAN_ID_STD) \|\| \
	767	((IDTYPE) == CAN_ID_EXT))
	768
	769	#define IS_CAN_RTR(RTR) (((RTR) == CAN_RTR_DATA) \|\| ((RTR) == CAN_RTR_REMOTE))
	770
	771	#define IS_CAN_FIFO(FIFO) (((FIFO) == CAN_FIFO0) \|\| ((FIFO) == CAN_FIFO1))
	772
	773	#define IS_CAN_IT(IT) (((IT) == CAN_IT_TME) \|\| ((IT) == CAN_IT_FMP0) \|\|\
	774	((IT) == CAN_IT_FF0) \|\| ((IT) == CAN_IT_FOV0) \|\|\
	775	((IT) == CAN_IT_FMP1) \|\| ((IT) == CAN_IT_FF1) \|\|\
	776	((IT) == CAN_IT_FOV1) \|\| ((IT) == CAN_IT_EWG) \|\|\
	777	((IT) == CAN_IT_EPV) \|\| ((IT) == CAN_IT_BOF) \|\|\
	778	((IT) == CAN_IT_LEC) \|\| ((IT) == CAN_IT_ERR) \|\|\
	779	((IT) == CAN_IT_WKU) \|\| ((IT) == CAN_IT_SLK))
	780
	781	#define IS_CAN_CLEAR_IT(IT) (((IT) == CAN_IT_TME) \|\| ((IT) == CAN_IT_FF0) \|\|\
	782	((IT) == CAN_IT_FOV0)\|\| ((IT) == CAN_IT_FF1) \|\|\
	783	((IT) == CAN_IT_FOV1)\|\| ((IT) == CAN_IT_EWG) \|\|\
	784	((IT) == CAN_IT_EPV) \|\| ((IT) == CAN_IT_BOF) \|\|\
	785	((IT) == CAN_IT_LEC) \|\| ((IT) == CAN_IT_ERR) \|\|\
	786	((IT) == CAN_IT_WKU) \|\| ((IT) == CAN_IT_SLK))
	787
	788	/**
	789	* @}
	790	*/
	791	/* End of private macros -----------------------------------------------------*/
	792
	793	/**
	794	* @}
	795	*/
	796
	797	/**
	798	* @}
	799	*/
	800
	801	#endif /* STM32F072xB \|\| STM32F042x6 \|\| STM32F048xx \|\| STM32F078xx \|\| STM32F091xC \|\| STM32F098xx */
	802
	803	#ifdef __cplusplus
	804	}
	805	#endif
	806
	807	#endif /* __STM32F0xx_HAL_CAN_H */
	808
	809
	810	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/