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2022-10-17 0e8df0081780fdf9da6b63a352b641b0bcb1e165

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85d591	1	//****************************************************************************/
Q	2	//!
	3	//! \file wizchip_conf.c
	4	//! \brief WIZCHIP Config Header File.
	5	//! \version 1.0.1
	6	//! \date 2013/10/21
	7	//! \par Revision history
	8	//! <2014/05/01> V1.0.1 Refer to M20140501
	9	//! 1. Explicit type casting in wizchip_bus_readbyte() & wizchip_bus_writebyte()
	10	// Issued by Mathias ClauBen.
	11	//! uint32_t type converts into ptrdiff_t first. And then recoverting it into uint8_t*
	12	//! For remove the warning when pointer type size is not 32bit.
	13	//! If ptrdiff_t doesn't support in your complier, You should must replace ptrdiff_t into your suitable pointer type.
	14	//! <2013/10/21> 1st Release
	15	//! \author MidnightCow
	16	//! \copyright
	17	//!
	18	//! Copyright (c) 2013, WIZnet Co., LTD.
	19	//! All rights reserved.
	20	//!
	21	//! Redistribution and use in source and binary forms, with or without
	22	//! modification, are permitted provided that the following conditions
	23	//! are met:
	24	//!
	25	//! * Redistributions of source code must retain the above copyright
	26	//! notice, this list of conditions and the following disclaimer.
	27	//! * Redistributions in binary form must reproduce the above copyright
	28	//! notice, this list of conditions and the following disclaimer in the
	29	//! documentation and/or other materials provided with the distribution.
	30	//! * Neither the name of the <ORGANIZATION> nor the names of its
	31	//! contributors may be used to endorse or promote products derived
	32	//! from this software without specific prior written permission.
	33	//!
	34	//! THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
	35	//! AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
	36	//! IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
	37	//! ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
	38	//! LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
	39	//! CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
	40	//! SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
	41	//! INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
	42	//! CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
	43	//! ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
	44	//! THE POSSIBILITY OF SUCH DAMAGE.
	45	//
	46	//*****************************************************************************/
	47	//A20140501 : for use the type - ptrdiff_t
	48	#include <stddef.h>
	49	//
	50
	51	#include "wizchip_conf.h"
	52	/**
	53	* @brief Default function to enable interrupt.
	54	* @note This function help not to access wrong address. If you do not describe this function or register any functions,
	55	* null function is called.
	56	*/
	57	void wizchip_cris_enter(void) {};
	58	/**
	59	* @brief Default function to disable interrupt.
	60	* @note This function help not to access wrong address. If you do not describe this function or register any functions,
	61	* null function is called.
	62	*/
	63	void wizchip_cris_exit(void) {};
	64	/**
	65	* @brief Default function to select chip.
	66	* @note This function help not to access wrong address. If you do not describe this function or register any functions,
	67	* null function is called.
	68	*/
	69	void wizchip_cs_select(void) {};
	70	/**
	71	* @brief Default function to deselect chip.
	72	* @note This function help not to access wrong address. If you do not describe this function or register any functions,
	73	* null function is called.
	74	*/
	75	void wizchip_cs_deselect(void) {};
	76	/**
	77	* @brief Default function to read in direct or indirect interface.
	78	* @note This function help not to access wrong address. If you do not describe this function or register any functions,
	79	* null function is called.
	80	*/
	81	//M20140501 : Explict pointer type casting
	82	//uint8_t wizchip_bus_readbyte(uint32_t AddrSel) { return * ((volatile uint8_t *) AddrSel); };
	83	uint8_t wizchip_bus_readbyte(uint32_t AddrSel) { return * ((volatile uint8_t *)((ptrdiff_t) AddrSel)); };
	84	/**
	85	* @brief Default function to write in direct or indirect interface.
	86	* @note This function help not to access wrong address. If you do not describe this function or register any functions,
	87	* null function is called.
	88	*/
	89
	90	//M20140501 : Explict pointer type casting
	91	//void wizchip_bus_writebyte(uint32_t AddrSel, uint8_t wb) { ((volatile uint8_t) AddrSel) = wb; };
	92	void wizchip_bus_writebyte(uint32_t AddrSel, uint8_t wb) { ((volatile uint8_t)((ptrdiff_t)AddrSel)) = wb; };
	93
	94	/**
	95	* @brief Default function to read in SPI interface.
	96	* @note This function help not to access wrong address. If you do not describe this function or register any functions,
	97	* null function is called.
	98	*/
	99	uint8_t wizchip_spi_readbyte(void) {return 0;};
	100	/**
	101	* @brief Default function to write in SPI interface.
	102	* @note This function help not to access wrong address. If you do not describe this function or register any functions,
	103	* null function is called.
	104	*/
	105	void wizchip_spi_writebyte(uint8_t wb) {};
	106
	107	/**
	108	* @\ref _WIZCHIP instance
	109	*/
	110	_WIZCHIP WIZCHIP =
	111	{
	112	.id = _WIZCHIP_ID_,
	113	.if_mode = _WIZCHIP_IO_MODE_,
	114	.CRIS._enter = wizchip_cris_enter,
	115	.CRIS._exit = wizchip_cris_exit,
	116	.CS._select = wizchip_cs_select,
	117	.CS._deselect = wizchip_cs_deselect,
	118	.IF.BUS._read_byte = wizchip_bus_readbyte,
	119	.IF.BUS._write_byte = wizchip_bus_writebyte
	120	// .IF.SPI._read_byte = wizchip_spi_readbyte,
	121	// .IF.SPI._write_byte = wizchip_spi_writebyte
	122	};
	123
	124	static uint8_t _DNS_[4]; // DNS server ip address
	125	static dhcp_mode _DHCP_; // DHCP mode
	126
	127	void reg_wizchip_cris_cbfunc(void(cris_en)(void), void(cris_ex)(void))
	128	{
	129	if(!cris_en \|\| !cris_ex)
	130	{
	131	WIZCHIP.CRIS._enter = wizchip_cris_enter;
	132	WIZCHIP.CRIS._exit = wizchip_cris_exit;
	133	}
	134	else
	135	{
	136	WIZCHIP.CRIS._enter = cris_en;
	137	WIZCHIP.CRIS._exit = cris_ex;
	138	}
	139	}
	140
	141	void reg_wizchip_cs_cbfunc(void(cs_sel)(void), void(cs_desel)(void))
	142	{
	143	if(!cs_sel \|\| !cs_desel)
	144	{
	145	WIZCHIP.CS._select = wizchip_cs_select;
	146	WIZCHIP.CS._deselect = wizchip_cs_deselect;
	147	}
	148	else
	149	{
	150	WIZCHIP.CS._select = cs_sel;
	151	WIZCHIP.CS._deselect = cs_desel;
	152	}
	153	}
	154
	155	void reg_wizchip_bus_cbfunc(uint8_t(bus_rb)(uint32_t addr), void (bus_wb)(uint32_t addr, uint8_t wb))
	156	{
	157	while(!(WIZCHIP.if_mode & _WIZCHIP_IO_MODE_BUS_));
	158
	159	if(!bus_rb \|\| !bus_wb)
	160	{
	161	WIZCHIP.IF.BUS._read_byte = wizchip_bus_readbyte;
	162	WIZCHIP.IF.BUS._write_byte = wizchip_bus_writebyte;
	163	}
	164	else
	165	{
	166	WIZCHIP.IF.BUS._read_byte = bus_rb;
	167	WIZCHIP.IF.BUS._write_byte = bus_wb;
	168	}
	169	}
	170
	171	void reg_wizchip_spi_cbfunc(uint8_t (spi_rb)(void), void (spi_wb)(uint8_t wb))
	172	{
	173	while(!(WIZCHIP.if_mode & _WIZCHIP_IO_MODE_SPI_));
	174
	175	if(!spi_rb \|\| !spi_wb)
	176	{
	177	WIZCHIP.IF.SPI._read_byte = wizchip_spi_readbyte;
	178	WIZCHIP.IF.SPI._write_byte = wizchip_spi_writebyte;
	179	}
	180	else
	181	{
	182	WIZCHIP.IF.SPI._read_byte = spi_rb;
	183	WIZCHIP.IF.SPI._write_byte = spi_wb;
	184	}
	185	}
	186
	187	int8_t ctlwizchip(ctlwizchip_type cwtype, void* arg)
	188	{
	189	uint8_t tmp = 0;
	190	uint8_t* ptmp[2] = {0,0};
	191	switch(cwtype)
	192	{
	193	case CW_RESET_WIZCHIP:
	194	wizchip_sw_reset();
	195	break;
	196	case CW_INIT_WIZCHIP:
	197	if(arg != 0)
	198	{
	199	ptmp[0] = (uint8_t*)arg;
	200	ptmp[1] = ptmp[0] + _WIZCHIP_SOCK_NUM_;
	201	}
	202	return wizchip_init(ptmp[0], ptmp[1]);
	203	case CW_CLR_INTERRUPT:
	204	wizchip_clrinterrupt(((intr_kind)arg));
	205	break;
	206	case CW_GET_INTERRUPT:
	207	((intr_kind)arg) = wizchip_getinterrupt();
	208	break;
	209	case CW_SET_INTRMASK:
	210	wizchip_setinterruptmask(((intr_kind)arg));
	211	break;
	212	case CW_GET_INTRMASK:
	213	((intr_kind)arg) = wizchip_getinterruptmask();
	214	break;
	215	#if _WIZCHIP_ > 5100
	216	case CW_SET_INTRTIME:
	217	setINTLEVEL((uint16_t)arg);
	218	break;
	219	case CW_GET_INTRTIME:
	220	(uint16_t)arg = getINTLEVEL();
	221	break;
	222	#endif
	223	case CW_GET_ID:
	224	((uint8_t*)arg)[0] = WIZCHIP.id[0];
	225	((uint8_t*)arg)[1] = WIZCHIP.id[1];
	226	((uint8_t*)arg)[2] = WIZCHIP.id[2];
	227	((uint8_t*)arg)[3] = WIZCHIP.id[3];
	228	((uint8_t*)arg)[4] = WIZCHIP.id[4];
	229	((uint8_t*)arg)[5] = 0;
	230	break;
	231	#if _WIZCHIP_ == 5500
	232	case CW_RESET_PHY:
	233	wizphy_reset();
	234	break;
	235	case CW_SET_PHYCONF:
	236	wizphy_setphyconf((wiz_PhyConf*)arg);
	237	break;
	238	case CW_GET_PHYCONF:
	239	wizphy_getphyconf((wiz_PhyConf*)arg);
	240	break;
	241	case CW_GET_PHYSTATUS:
	242	break;
	243	case CW_SET_PHYPOWMODE:
	244	return wizphy_setphypmode((uint8_t)arg);
	245	#endif
	246	case CW_GET_PHYPOWMODE:
	247	tmp = wizphy_getphypmode();
	248	if((int8_t)tmp == -1) return -1;
	249	(uint8_t)arg = tmp;
	250	break;
	251	case CW_GET_PHYLINK:
	252	tmp = wizphy_getphylink();
	253	if((int8_t)tmp == -1) return -1;
	254	(uint8_t)arg = tmp;
	255	break;
	256	default:
	257	return -1;
	258	}
	259	return 0;
	260	}
	261
	262
	263	int8_t ctlnetwork(ctlnetwork_type cntype, void* arg)
	264	{
	265
	266	switch(cntype)
	267	{
	268	case CN_SET_NETINFO:
	269	wizchip_setnetinfo((wiz_NetInfo*)arg);
	270	break;
	271	case CN_GET_NETINFO:
	272	wizchip_getnetinfo((wiz_NetInfo*)arg);
	273	break;
	274	case CN_SET_NETMODE:
	275	return wizchip_setnetmode((netmode_type)arg);
	276	case CN_GET_NETMODE:
	277	(netmode_type)arg = wizchip_getnetmode();
	278	break;
	279	case CN_SET_TIMEOUT:
	280	wizchip_settimeout((wiz_NetTimeout*)arg);
	281	break;
	282	case CN_GET_TIMEOUT:
	283	wizchip_gettimeout((wiz_NetTimeout*)arg);
	284	break;
	285	default:
	286	return -1;
	287	}
	288	return 0;
	289	}
	290
	291	void wizchip_sw_reset(void)
	292	{
	293	uint8_t gw[4], sn[4], sip[4];
	294	uint8_t mac[6];
	295	getSHAR(mac);
	296	getGAR(gw); getSUBR(sn); getSIPR(sip);
	297	setMR(MR_RST);
	298	getMR(); // for delay
	299	setSHAR(mac);
	300	setGAR(gw);
	301	setSUBR(sn);
	302	setSIPR(sip);
	303	}
	304
	305	int8_t wizchip_init(uint8_t* txsize, uint8_t* rxsize)
	306	{
	307	int8_t i;
	308	int8_t tmp = 0;
	309	wizchip_sw_reset();
	310	if(txsize)
	311	{
	312	tmp = 0;
	313	for(i = 0 ; i < _WIZCHIP_SOCK_NUM_; i++)
	314	tmp += txsize[i];
	315	if(tmp > 16) return -1;
	316	for(i = 0 ; i < _WIZCHIP_SOCK_NUM_; i++)
	317	setSn_TXBUF_SIZE(i, txsize[i]);
	318	}
	319	if(rxsize)
	320	{
	321	tmp = 0;
	322	for(i = 0 ; i < _WIZCHIP_SOCK_NUM_; i++)
	323	tmp += rxsize[i];
	324	if(tmp > 16) return -1;
	325	for(i = 0 ; i < _WIZCHIP_SOCK_NUM_; i++)
	326	setSn_RXBUF_SIZE(i, rxsize[i]);
	327	}
	328	return 0;
	329	}
	330
	331	void wizchip_clrinterrupt(intr_kind intr)
	332	{
	333	uint8_t ir = (uint8_t)intr;
	334	uint8_t sir = (uint8_t)((uint16_t)intr >> 8);
	335	#if _WIZCHIP_ < 5500
	336	ir \|= (1<<4); // IK_WOL
	337	#endif
	338	#if _WIZCHIP_ == 5200
	339	ir \|= (1 << 6);
	340	#endif
	341
	342	#if _WIZCHIP_ < 5200
	343	sir &= 0x0F;
	344	#endif
	345
	346	#if _WIZCHIP_ == 5100
	347	ir \|= sir;
	348	setIR(ir);
	349	#else
	350	setIR(ir);
	351	setSIR(sir);
	352	#endif
	353	}
	354
	355	intr_kind wizchip_getinterrupt(void)
	356	{
	357	uint8_t ir = 0;
	358	uint8_t sir = 0;
	359	uint16_t ret = 0;
	360	#if _WIZCHIP_ == 5100
	361	ir = getIR();
	362	sir = ir 0x0F;
	363	#else
	364	ir = getIR();
	365	sir = getSIR();
	366	#endif
	367
	368	#if _WIZCHIP_ < 5500
	369	ir &= ~(1<<4); // IK_WOL
	370	#endif
	371	#if _WIZCHIP_ == 5200
	372	ir &= ~(1 << 6);
	373	#endif
	374	ret = sir;
	375	ret = (ret << 8) + ir;
	376	return (intr_kind)ret;
	377	}
	378
	379	void wizchip_setinterruptmask(intr_kind intr)
	380	{
	381	uint8_t imr = (uint8_t)intr;
	382	uint8_t simr = (uint8_t)((uint16_t)intr >> 8);
	383	#if _WIZCHIP_ < 5500
	384	imr &= ~(1<<4); // IK_WOL
	385	#endif
	386	#if _WIZCHIP_ == 5200
	387	imr &= ~(1 << 6);
	388	#endif
	389
	390	#if _WIZCHIP_ < 5200
	391	simr &= 0x0F;
	392	#endif
	393
	394	#if _WIZCHIP_ == 5100
	395	imr \|= simr;
	396	setIMR(imr);
	397	#else
	398	setIMR(imr);
	399	setSIMR(simr);
	400	#endif
	401	}
	402
	403	intr_kind wizchip_getinterruptmask(void)
	404	{
	405	uint8_t imr = 0;
	406	uint8_t simr = 0;
	407	uint16_t ret = 0;
	408	#if _WIZCHIP_ == 5100
	409	imr = getIMR();
	410	simr = imr 0x0F;
	411	#else
	412	imr = getIMR();
	413	simr = getSIMR();
	414	#endif
	415
	416	#if _WIZCHIP_ < 5500
	417	imr &= ~(1<<4); // IK_WOL
	418	#endif
	419	#if _WIZCHIP_ == 5200
	420	imr &= ~(1 << 6); // IK_DEST_UNREACH
	421	#endif
	422	ret = simr;
	423	ret = (ret << 8) + imr;
	424	return (intr_kind)ret;
	425	}
	426
	427	int8_t wizphy_getphylink(void)
	428	{
	429	int8_t tmp;
	430	#if _WIZCHIP_ == 5200
	431	if(getPHYSTATUS() & PHYSTATUS_LINK)
	432	tmp = PHY_LINK_ON;
	433	else
	434	tmp = PHY_LINK_OFF;
	435	#elif _WIZCHIP_ == 5500
	436	if(getPHYCFGR() & PHYCFGR_LNK_ON)
	437	tmp = PHY_LINK_ON;
	438	else
	439	tmp = PHY_LINK_OFF;
	440	#else
	441	tmp = -1;
	442	#endif
	443	return tmp;
	444	}
	445
	446	#if _WIZCHIP_ > 5100
	447
	448	int8_t wizphy_getphypmode(void)
	449	{
	450	int8_t tmp = 0;
	451	#if _WIZCHIP_ == 5200
	452	if(getPHYSTATUS() & PHYSTATUS_POWERDOWN)
	453	tmp = PHY_POWER_DOWN;
	454	else
	455	tmp = PHY_POWER_NORM;
	456	#elif _WIZCHIP_ == 5500
	457	if(getPHYCFGR() & PHYCFGR_OPMDC_PDOWN)
	458	tmp = PHY_POWER_DOWN;
	459	else
	460	tmp = PHY_POWER_NORM;
	461	#else
	462	tmp = -1;
	463	#endif
	464	return tmp;
	465	}
	466	#endif
	467
	468	#if _WIZCHIP_ == 5500
	469	void wizphy_reset(void)
	470	{
	471	uint8_t tmp = getPHYCFGR();
	472	tmp &= PHYCFGR_RST;
	473	setPHYCFGR(tmp);
	474	tmp = getPHYCFGR();
	475	tmp \|= ~PHYCFGR_RST;
	476	setPHYCFGR(tmp);
	477	}
	478
	479	void wizphy_setphyconf(wiz_PhyConf* phyconf)
	480	{
	481	uint8_t tmp = 0;
	482	if(phyconf->by == PHY_CONFBY_SW)
	483	tmp \|= PHYCFGR_OPMD;
	484	else
	485	tmp &= ~PHYCFGR_OPMD;
	486	if(phyconf->mode == PHY_MODE_AUTONEGO)
	487	tmp \|= PHYCFGR_OPMDC_ALLA;
	488	else
	489	{
	490	if(phyconf->duplex == PHY_DUPLEX_FULL)
	491	{
	492	if(phyconf->speed == PHY_SPEED_100)
	493	tmp \|= PHYCFGR_OPMDC_100F;
	494	else
	495	tmp \|= PHYCFGR_OPMDC_10F;
	496	}
	497	else
	498	{
	499	if(phyconf->speed == PHY_SPEED_100)
	500	tmp \|= PHYCFGR_OPMDC_100H;
	501	else
	502	tmp \|= PHYCFGR_OPMDC_10H;
	503	}
	504	}
	505	setPHYCFGR(tmp);
	506	wizphy_reset();
	507	}
	508
	509	void wizphy_getphyconf(wiz_PhyConf* phyconf)
	510	{
	511	uint8_t tmp = 0;
	512	tmp = getPHYCFGR();
	513	phyconf->by = (tmp & PHYCFGR_OPMD) ? PHY_CONFBY_SW : PHY_CONFBY_HW;
	514	switch(tmp & PHYCFGR_OPMDC_ALLA)
	515	{
	516	case PHYCFGR_OPMDC_ALLA:
	517	case PHYCFGR_OPMDC_100FA:
	518	phyconf->mode = PHY_MODE_AUTONEGO;
	519	break;
	520	default:
	521	phyconf->mode = PHY_MODE_MANUAL;
	522	break;
	523	}
	524	switch(tmp & PHYCFGR_OPMDC_ALLA)
	525	{
	526	case PHYCFGR_OPMDC_100FA:
	527	case PHYCFGR_OPMDC_100F:
	528	case PHYCFGR_OPMDC_100H:
	529	phyconf->speed = PHY_SPEED_100;
	530	break;
	531	default:
	532	phyconf->speed = PHY_SPEED_10;
	533	break;
	534	}
	535	switch(tmp & PHYCFGR_OPMDC_ALLA)
	536	{
	537	case PHYCFGR_OPMDC_100FA:
	538	case PHYCFGR_OPMDC_100F:
	539	case PHYCFGR_OPMDC_10F:
	540	phyconf->duplex = PHY_DUPLEX_FULL;
	541	break;
	542	default:
	543	phyconf->duplex = PHY_DUPLEX_HALF;
	544	break;
	545	}
	546	}
	547
	548	void wizphy_getphystat(wiz_PhyConf* phyconf)
	549	{
	550	uint8_t tmp = getPHYCFGR();
	551	phyconf->duplex = (tmp & PHYCFGR_DPX_FULL) ? PHY_DUPLEX_FULL : PHY_DUPLEX_HALF;
	552	phyconf->speed = (tmp & PHYCFGR_SPD_100) ? PHY_SPEED_100 : PHY_SPEED_10;
	553	}
	554
	555	int8_t wizphy_setphypmode(uint8_t pmode)
	556	{
	557	uint8_t tmp = 0;
	558	tmp = getPHYCFGR();
	559	if((tmp & PHYCFGR_OPMD)== 0) return -1;
	560	tmp &= ~PHYCFGR_OPMDC_ALLA;
	561	if( pmode == PHY_POWER_DOWN)
	562	tmp \|= PHYCFGR_OPMDC_PDOWN;
	563	else
	564	tmp \|= PHYCFGR_OPMDC_ALLA;
	565	setPHYCFGR(tmp);
	566	wizphy_reset();
	567	tmp = getPHYCFGR();
	568	if( pmode == PHY_POWER_DOWN)
	569	{
	570	if(tmp & PHYCFGR_OPMDC_PDOWN) return 0;
	571	}
	572	else
	573	{
	574	if(tmp & PHYCFGR_OPMDC_ALLA) return 0;
	575	}
	576	return -1;
	577	}
	578	#endif
	579
	580
	581	void wizchip_setnetinfo(wiz_NetInfo* pnetinfo)
	582	{
	583	setSHAR(pnetinfo->mac);
	584	setGAR(pnetinfo->gw);
	585	setSUBR(pnetinfo->sn);
	586	setSIPR(pnetinfo->ip);
	587	_DNS_[0] = pnetinfo->dns[0];
	588	_DNS_[1] = pnetinfo->dns[1];
	589	_DNS_[2] = pnetinfo->dns[2];
	590	_DNS_[3] = pnetinfo->dns[3];
	591	_DHCP_ = pnetinfo->dhcp;
	592	}
	593
	594	void wizchip_getnetinfo(wiz_NetInfo* pnetinfo)
	595	{
	596	getSHAR(pnetinfo->mac);
	597	getGAR(pnetinfo->gw);
	598	getSUBR(pnetinfo->sn);
	599	getSIPR(pnetinfo->ip);
	600	pnetinfo->dns[0]= _DNS_[0];
	601	pnetinfo->dns[1]= _DNS_[1];
	602	pnetinfo->dns[2]= _DNS_[2];
	603	pnetinfo->dns[3]= _DNS_[3];
	604	pnetinfo->dhcp = _DHCP_;
	605	}
	606
	607	int8_t wizchip_setnetmode(netmode_type netmode)
	608	{
	609	uint8_t tmp = 0;
	610	#if _WIZCHIP_ != 5500
	611	if(netmode & ~(NM_WAKEONLAN \| NM_PPPOE \| NM_PINGBLOCK)) return -1;
	612	#else
	613	if(netmode & ~(NM_WAKEONLAN \| NM_PPPOE \| NM_PINGBLOCK \| NM_FORCEARP)) return -1;
	614	#endif
	615	tmp = getMR();
	616	tmp \|= (uint8_t)netmode;
	617	setMR(tmp);
	618	return 0;
	619	}
	620
	621	netmode_type wizchip_getnetmode(void)
	622	{
	623	return (netmode_type) getMR();
	624	}
	625
	626	void wizchip_settimeout(wiz_NetTimeout* nettime)
	627	{
	628	setRCR(nettime->retry_cnt);
	629	setRTR(nettime->time_100us);
	630	}
	631
	632	void wizchip_gettimeout(wiz_NetTimeout* nettime)
	633	{
	634	nettime->retry_cnt = getRCR();
	635	nettime->time_100us = getRTR();
	636	}