| 提交 | 用户 | age | ||
| bfc108 | 1 | /** |
| Q | 2 | ****************************************************************************** |
| 3 | * @file stm32f0xx_it.c | |
| 4 | * @brief Interrupt Service Routines. | |
| 5 | ****************************************************************************** | |
| 6 | * | |
| 7 | * COPYRIGHT(c) 2018 STMicroelectronics | |
| 8 | * | |
| 9 | * Redistribution and use in source and binary forms, with or without modification, | |
| 10 | * are permitted provided that the following conditions are met: | |
| 11 | * 1. Redistributions of source code must retain the above copyright notice, | |
| 12 | * this list of conditions and the following disclaimer. | |
| 13 | * 2. Redistributions in binary form must reproduce the above copyright notice, | |
| 14 | * this list of conditions and the following disclaimer in the documentation | |
| 15 | * and/or other materials provided with the distribution. | |
| 16 | * 3. Neither the name of STMicroelectronics nor the names of its contributors | |
| 17 | * may be used to endorse or promote products derived from this software | |
| 18 | * without specific prior written permission. | |
| 19 | * | |
| 20 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" | |
| 21 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE | |
| 22 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE | |
| 23 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE | |
| 24 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL | |
| 25 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR | |
| 26 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER | |
| 27 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, | |
| 28 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE | |
| 29 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | |
| 30 | * | |
| 31 | ****************************************************************************** | |
| 32 | */ | |
| 33 | /* Includes ------------------------------------------------------------------*/ | |
| 34 | #include "stm32f0xx_hal.h" | |
| 35 | #include "stm32f0xx.h" | |
| 36 | #include "stm32f0xx_it.h" | |
| 37 | ||
| 38 | /* USER CODE BEGIN 0 */ | |
| 39 | #include "functions.h" | |
| 40 | /* USER CODE END 0 */ | |
| 41 | ||
| 42 | /* External variables --------------------------------------------------------*/ | |
| 43 | ||
| 44 | /******************************************************************************/ | |
| 45 | /* Cortex-M0 Processor Interruption and Exception Handlers */ | |
| 46 | /******************************************************************************/ | |
| 47 | ||
| 48 | /** | |
| 49 | * @brief This function handles Non maskable interrupt. | |
| 50 | */ | |
| 51 | void NMI_Handler(void) | |
| 52 | { | |
| 53 | /* USER CODE BEGIN NonMaskableInt_IRQn 0 */ | |
| 54 | ||
| 55 | /* USER CODE END NonMaskableInt_IRQn 0 */ | |
| 56 | /* USER CODE BEGIN NonMaskableInt_IRQn 1 */ | |
| 57 | ||
| 58 | /* USER CODE END NonMaskableInt_IRQn 1 */ | |
| 59 | } | |
| 60 | ||
| 61 | /** | |
| 62 | * @brief This function handles Hard fault interrupt. | |
| 63 | */ | |
| 64 | void HardFault_Handler(void) | |
| 65 | { | |
| 66 | /* USER CODE BEGIN HardFault_IRQn 0 */ | |
| 67 | ||
| 68 | /* USER CODE END HardFault_IRQn 0 */ | |
| 69 | while (1) | |
| 70 | { | |
| 71 | /* USER CODE BEGIN W1_HardFault_IRQn 0 */ | |
| 72 | /* USER CODE END W1_HardFault_IRQn 0 */ | |
| 73 | } | |
| 74 | /* USER CODE BEGIN HardFault_IRQn 1 */ | |
| 75 | ||
| 76 | /* USER CODE END HardFault_IRQn 1 */ | |
| 77 | } | |
| 78 | ||
| 79 | /** | |
| 80 | * @brief This function handles System service call via SWI instruction. | |
| 81 | */ | |
| 82 | void SVC_Handler(void) | |
| 83 | { | |
| 84 | /* USER CODE BEGIN SVC_IRQn 0 */ | |
| 85 | ||
| 86 | /* USER CODE END SVC_IRQn 0 */ | |
| 87 | /* USER CODE BEGIN SVC_IRQn 1 */ | |
| 88 | ||
| 89 | /* USER CODE END SVC_IRQn 1 */ | |
| 90 | } | |
| 91 | ||
| 92 | /** | |
| 93 | * @brief This function handles Pendable request for system service. | |
| 94 | */ | |
| 95 | void PendSV_Handler(void) | |
| 96 | { | |
| 97 | /* USER CODE BEGIN PendSV_IRQn 0 */ | |
| 98 | NVIC_ClearPendingIRQ(PendSV_IRQn); | |
| 99 | PendSvCount++; | |
| 100 | NVIC_DisableIRQ(PendSV_IRQn); | |
| 101 | /* USER CODE END PendSV_IRQn 0 */ | |
| 102 | /* USER CODE BEGIN PendSV_IRQn 1 */ | |
| 103 | ||
| 104 | /* USER CODE END PendSV_IRQn 1 */ | |
| 105 | } | |
| 106 | ||
| 107 | /** | |
| 108 | * @brief This function handles System tick timer. | |
| 109 | */ | |
| 110 | void SysTick_Handler(void) | |
| 111 | { | |
| 112 | /* USER CODE BEGIN SysTick_IRQn 0 */ | |
| 113 | ||
| 114 | /* USER CODE END SysTick_IRQn 0 */ | |
| 115 | HAL_IncTick(); | |
| 116 | HAL_SYSTICK_IRQHandler(); | |
| 117 | /* USER CODE BEGIN SysTick_IRQn 1 */ | |
| 118 | ||
| 119 | /* USER CODE END SysTick_IRQn 1 */ | |
| 120 | } | |
| 121 | ||
| 122 | /******************************************************************************/ | |
| 123 | /* STM32F0xx Peripheral Interrupt Handlers */ | |
| 124 | /* Add here the Interrupt Handlers for the used peripherals. */ | |
| 125 | /* For the available peripheral interrupt handler names, */ | |
| 126 | /* please refer to the startup file (startup_stm32f0xx.s). */ | |
| 127 | /******************************************************************************/ | |
| 128 | ||
| 129 | /** | |
| 130 | * @brief This function handles DMA1 channel 2 and 3 interrupts. | |
| 131 | */ | |
| 132 | void DMA1_Channel2_3_IRQHandler(void) | |
| 133 | { | |
| 134 | /* USER CODE BEGIN DMA1_Channel2_3_IRQn 0 */ | |
| 135 | Uart1DmaInts++; | |
| 136 | if (LL_DMA_IsActiveFlag_TC2(DMA1)) | |
| 137 | { | |
| 138 | ||
| 139 | Uart1Stat.SendBytes+=Uart1Stat.DMASendLen; | |
| 140 | DelData(&Uart1Stat.QTx,Uart1Stat.DMASendLen); | |
| 141 | LL_DMA_ClearFlag_TC2(DMA1); | |
| 142 | ||
| 143 | if (!IsEmpty(&Uart1Stat.QTx)) | |
| 144 | { | |
| 145 | int len1=GetContinueData(&Uart1Stat.QTx); | |
| 146 | // if (len1>128) len1=128; | |
| 147 | LL_DMA_DisableChannel(DMA1,LL_DMA_CHANNEL_2); | |
| 148 | LL_DMA_SetMemoryAddress(DMA1,LL_DMA_CHANNEL_2,(uint32_t)GetReadBuffer(&Uart1Stat.QTx)); | |
| 149 | LL_DMA_SetDataLength(DMA1,LL_DMA_CHANNEL_2,len1); | |
| 150 | LL_DMA_EnableChannel(DMA1,LL_DMA_CHANNEL_2); | |
| 151 | Uart1Stat.DMASendLen=len1; | |
| 152 | LL_USART_EnableDMAReq_TX(USART1); | |
| 153 | } | |
| 154 | else | |
| 155 | { | |
| 156 | Uart1Stat.DMASendLen=0; | |
| 157 | Uart1Stat.Sending=0; | |
| 158 | } | |
| 159 | } | |
| 160 | /* USER CODE END DMA1_Channel2_3_IRQn 0 */ | |
| 161 | ||
| 162 | /* USER CODE BEGIN DMA1_Channel2_3_IRQn 1 */ | |
| 163 | if (LL_DMA_IsActiveFlag_TC3(DMA1)) | |
| 164 | { | |
| 165 | LL_DMA_ClearFlag_TC3(DMA1); | |
| 166 | ||
| 167 | } | |
| 168 | /* USER CODE END DMA1_Channel2_3_IRQn 1 */ | |
| 169 | } | |
| 170 | ||
| 171 | void DMA1_Channel4_5_IRQHandler(void) | |
| 172 | { | |
| 173 | /* USER CODE BEGIN DMA1_Channel4_5_IRQn 0 */ | |
| 174 | Uart2DmaInts++; | |
| 175 | if (LL_DMA_IsActiveFlag_TC4(DMA1)) | |
| 176 | { | |
| 177 | ||
| 178 | Uart2Stat.SendBytes+=Uart2Stat.DMASendLen; | |
| 179 | DelData(&Uart2Stat.QTx,Uart2Stat.DMASendLen); | |
| 180 | LL_DMA_ClearFlag_TC4(DMA1); | |
| 181 | ||
| 182 | if (!IsEmpty(&Uart2Stat.QTx)) | |
| 183 | { | |
| 184 | int len1=GetContinueData(&Uart2Stat.QTx); | |
| 185 | // if (len1>128) len1=128; | |
| 186 | LL_DMA_DisableChannel(DMA1,LL_DMA_CHANNEL_4); | |
| 187 | LL_DMA_SetMemoryAddress(DMA1,LL_DMA_CHANNEL_4,(uint32_t)GetReadBuffer(&Uart2Stat.QTx)); | |
| 188 | LL_DMA_SetDataLength(DMA1,LL_DMA_CHANNEL_4,len1); | |
| 189 | LL_DMA_EnableChannel(DMA1,LL_DMA_CHANNEL_4); | |
| 190 | Uart2Stat.DMASendLen=len1; | |
| 191 | LL_USART_EnableDMAReq_TX(USART2); | |
| 192 | } | |
| 193 | else | |
| 194 | { | |
| 195 | Uart2Stat.DMASendLen=0; | |
| 196 | Uart2Stat.Sending=0; | |
| 197 | } | |
| 198 | } | |
| 199 | /* USER CODE END DMA1_Channel4_5_IRQn 0 */ | |
| 200 | ||
| 201 | /* USER CODE BEGIN DMA1_Channel4_5_IRQn 1 */ | |
| 202 | if (LL_DMA_IsActiveFlag_TC5(DMA1)) | |
| 203 | { | |
| 204 | LL_DMA_ClearFlag_TC5(DMA1); | |
| 205 | ||
| 206 | } | |
| 207 | /* USER CODE END DMA1_Channel4_5_IRQn 1 */ | |
| 208 | } | |
| 209 | /** | |
| 210 | * @brief This function handles USART1 global interrupt. | |
| 211 | */ | |
| 212 | void USART1_IRQHandler(void) | |
| 213 | { | |
| 214 | /* USER CODE BEGIN USART1_IRQn 0 */ | |
| 215 | // LL_GPIO_TogglePin(GPIOB,LL_GPIO_PIN_7); | |
| 216 | ||
| 217 | if (LL_USART_IsActiveFlag_RXNE(USART1)) | |
| 218 | { | |
| 219 | Uart1BaudGot=1; | |
| 220 | Uart1BaudFirstGot=1; | |
| 221 | Uart1Stat.RXNECount++; | |
| 222 | unsigned char ch=LL_USART_ReceiveData8(USART1); | |
| 223 | PushOne(&Uart1Stat.QRx,ch); | |
| 224 | Uart1Stat.RecvBytes++; | |
| 225 | Uart1RecvBuf1[Uart1RecvBuf1DataLen++]=ch; | |
| 226 | //LL_USART_TransmitData8(USART1,ch); | |
| 227 | } | |
| 228 | if (LL_USART_IsActiveFlag_ORE(USART1)) | |
| 229 | { | |
| 230 | LL_USART_ClearFlag_ORE(USART1); | |
| 231 | Uart1Stat.OverRunCount++; | |
| 232 | } | |
| 233 | if (LL_USART_IsEnabledIT_IDLE(USART1)&&LL_USART_IsActiveFlag_IDLE(USART1)) | |
| 234 | {//接收完成 | |
| 235 | LL_USART_ClearFlag_IDLE(USART1); | |
| 236 | Uart1RecvDone(); | |
| 237 | } | |
| 238 | /* USER CODE END USART1_IRQn 0 */ | |
| 239 | /* USER CODE BEGIN USART1_IRQn 1 */ | |
| 240 | if (LL_USART_IsActiveFlag_TC(USART1)) | |
| 241 | {//发送完成 | |
| 242 | LL_USART_ClearFlag_TC(USART1); | |
| 243 | Uart1SendDone(); | |
| 244 | } | |
| 245 | /* USER CODE END USART1_IRQn 1 */ | |
| 246 | } | |
| 247 | ||
| 248 | void USART2_IRQHandler(void) | |
| 249 | { | |
| 250 | /* USER CODE BEGIN USART2_IRQn 0 */ | |
| 251 | // LL_GPIO_TogglePin(GPIOB,LL_GPIO_PIN_7); | |
| 252 | ||
| 253 | if (LL_USART_IsActiveFlag_RXNE(USART2)) | |
| 254 | { | |
| 255 | Uart2BaudGot=1; | |
| 256 | Uart2BaudFirstGot=1; | |
| 257 | Uart2Stat.RXNECount++; | |
| 258 | unsigned char ch=LL_USART_ReceiveData8(USART2); | |
| 259 | PushOne(&Uart2Stat.QRx,ch); | |
| 260 | Uart2Stat.RecvBytes++; | |
| 261 | Uart2RecvBuf1[Uart2RecvBuf1DataLen++]=ch; | |
| 262 | ||
| 263 | //LL_USART_TransmitData8(USART2,ch); | |
| 264 | } | |
| 265 | if (LL_USART_IsActiveFlag_ORE(USART2)) | |
| 266 | { | |
| 267 | LL_USART_ClearFlag_ORE(USART2); | |
| 268 | Uart2Stat.OverRunCount++; | |
| 269 | } | |
| 270 | if (LL_USART_IsEnabledIT_IDLE(USART2)&&LL_USART_IsActiveFlag_IDLE(USART2)) | |
| 271 | {//接收完成 | |
| 272 | LL_USART_ClearFlag_IDLE(USART2); | |
| 273 | Uart2RecvDone(); | |
| 274 | } | |
| 275 | /* USER CODE END USART2_IRQn 0 */ | |
| 276 | /* USER CODE BEGIN USART2_IRQn 1 */ | |
| 277 | if (LL_USART_IsActiveFlag_TC(USART2)) | |
| 278 | {//发送完成 | |
| 279 | LL_USART_ClearFlag_TC(USART2); | |
| 280 | Uart2SendDone(); | |
| 281 | } | |
| 282 | /* USER CODE END USART2_IRQn 1 */ | |
| 283 | } | |
| 284 | ||
| 285 | /* USER CODE BEGIN 1 */ | |
| 286 | ||
| 287 | /* USER CODE END 1 */ | |
| 288 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ | |
