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2021-06-20 bfc108e6097eff2bec73050e261f3b9e5db447b7

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bfc108	1	;****************** (C) COPYRIGHT 2016 STMicroelectronics ******************
Q	2	;* File Name : startup_stm32f072xb.s
	3	;* Author : MCD Application Team
	4	;* Description : STM32F072x8/STM32F072xB devices vector table for MDK-ARM toolchain.
	5	;* This module performs:
	6	;* - Set the initial SP
	7	;* - Set the initial PC == Reset_Handler
	8	;* - Set the vector table entries with the exceptions ISR address
	9	;* - Branches to __main in the C library (which eventually
	10	;* calls main()).
	11	;* After Reset the CortexM0 processor is in Thread mode,
	12	;* priority is Privileged, and the Stack is set to Main.
	13	;* <<< Use Configuration Wizard in Context Menu >>>
	14	;*******************************************************************************
	15	;*
	16	;* Redistribution and use in source and binary forms, with or without modification,
	17	;* are permitted provided that the following conditions are met:
	18	;* 1. Redistributions of source code must retain the above copyright notice,
	19	;* this list of conditions and the following disclaimer.
	20	;* 2. Redistributions in binary form must reproduce the above copyright notice,
	21	;* this list of conditions and the following disclaimer in the documentation
	22	;* and/or other materials provided with the distribution.
	23	;* 3. Neither the name of STMicroelectronics nor the names of its contributors
	24	;* may be used to endorse or promote products derived from this software
	25	;* without specific prior written permission.
	26	;*
	27	;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
	28	;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
	29	;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
	30	;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
	31	;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
	32	;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
	33	;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
	34	;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
	35	;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
	36	;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
	37	;
	38	;*******************************************************************************
	39
	40	; Amount of memory (in bytes) allocated for Stack
	41	; Tailor this value to your application needs
	42	; <h> Stack Configuration
	43	; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
	44	; </h>
	45
	46	Stack_Size EQU 0x00000400
	47
	48	AREA STACK, NOINIT, READWRITE, ALIGN=3
	49	Stack_Mem SPACE Stack_Size
	50	__initial_sp
	51
	52
	53	; <h> Heap Configuration
	54	; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
	55	; </h>
	56
	57	Heap_Size EQU 0x00000200
	58
	59	AREA HEAP, NOINIT, READWRITE, ALIGN=3
	60	__heap_base
	61	Heap_Mem SPACE Heap_Size
	62	__heap_limit
	63
	64	PRESERVE8
	65	THUMB
	66
	67
	68	; Vector Table Mapped to Address 0 at Reset
	69	AREA RESET, DATA, READONLY
	70	EXPORT __Vectors
	71	EXPORT __Vectors_End
	72	EXPORT __Vectors_Size
	73
	74	__Vectors DCD __initial_sp ; Top of Stack
	75	DCD Reset_Handler ; Reset Handler
	76	DCD NMI_Handler ; NMI Handler
	77	DCD HardFault_Handler ; Hard Fault Handler
	78	DCD 0 ; Reserved
	79	DCD 0 ; Reserved
	80	DCD 0 ; Reserved
	81	DCD 0 ; Reserved
	82	DCD 0 ; Reserved
	83	DCD 0 ; Reserved
	84	DCD 0 ; Reserved
	85	DCD SVC_Handler ; SVCall Handler
	86	DCD 0 ; Reserved
	87	DCD 0 ; Reserved
	88	DCD PendSV_Handler ; PendSV Handler
	89	DCD SysTick_Handler ; SysTick Handler
	90
	91	; External Interrupts
	92	DCD WWDG_IRQHandler ; Window Watchdog
	93	DCD PVD_VDDIO2_IRQHandler ; PVD through EXTI Line detect
	94	DCD RTC_IRQHandler ; RTC through EXTI Line
	95	DCD FLASH_IRQHandler ; FLASH
	96	DCD RCC_CRS_IRQHandler ; RCC and CRS
	97	DCD EXTI0_1_IRQHandler ; EXTI Line 0 and 1
	98	DCD EXTI2_3_IRQHandler ; EXTI Line 2 and 3
	99	DCD EXTI4_15_IRQHandler ; EXTI Line 4 to 15
	100	DCD TSC_IRQHandler ; TS
	101	DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
	102	DCD DMA1_Channel2_3_IRQHandler ; DMA1 Channel 2 and Channel 3
	103	DCD DMA1_Channel4_5_6_7_IRQHandler ; DMA1 Channel 4, Channel 5, Channel 6 and Channel 7
	104	DCD ADC1_COMP_IRQHandler ; ADC1, COMP1 and COMP2
	105	DCD TIM1_BRK_UP_TRG_COM_IRQHandler ; TIM1 Break, Update, Trigger and Commutation
	106	DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
	107	DCD TIM2_IRQHandler ; TIM2
	108	DCD TIM3_IRQHandler ; TIM3
	109	DCD TIM6_DAC_IRQHandler ; TIM6 and DAC
	110	DCD TIM7_IRQHandler ; TIM7
	111	DCD TIM14_IRQHandler ; TIM14
	112	DCD TIM15_IRQHandler ; TIM15
	113	DCD TIM16_IRQHandler ; TIM16
	114	DCD TIM17_IRQHandler ; TIM17
	115	DCD I2C1_IRQHandler ; I2C1
	116	DCD I2C2_IRQHandler ; I2C2
	117	DCD SPI1_IRQHandler ; SPI1
	118	DCD SPI2_IRQHandler ; SPI2
	119	DCD USART1_IRQHandler ; USART1
	120	DCD USART2_IRQHandler ; USART2
	121	DCD USART3_4_IRQHandler ; USART3 & USART4
	122	DCD CEC_CAN_IRQHandler ; CEC and CAN
	123	DCD USB_IRQHandler ; USB
	124
	125	__Vectors_End
	126
	127	__Vectors_Size EQU __Vectors_End - __Vectors
	128
	129	AREA \|.text\|, CODE, READONLY
	130
	131	; Reset handler routine
	132	Reset_Handler PROC
	133	EXPORT Reset_Handler [WEAK]
	134	IMPORT __main
	135	IMPORT SystemInit
	136	LDR R0, =SystemInit
	137	BLX R0
	138	LDR R0, =__main
	139	BX R0
	140	ENDP
	141
	142	; Dummy Exception Handlers (infinite loops which can be modified)
	143
	144	NMI_Handler PROC
	145	EXPORT NMI_Handler [WEAK]
	146	B .
	147	ENDP
	148	HardFault_Handler\
	149	PROC
	150	EXPORT HardFault_Handler [WEAK]
	151	B .
	152	ENDP
	153	SVC_Handler PROC
	154	EXPORT SVC_Handler [WEAK]
	155	B .
	156	ENDP
	157	PendSV_Handler PROC
	158	EXPORT PendSV_Handler [WEAK]
	159	B .
	160	ENDP
	161	SysTick_Handler PROC
	162	EXPORT SysTick_Handler [WEAK]
	163	B .
	164	ENDP
	165
	166	Default_Handler PROC
	167
	168	EXPORT WWDG_IRQHandler [WEAK]
	169	EXPORT PVD_VDDIO2_IRQHandler [WEAK]
	170	EXPORT RTC_IRQHandler [WEAK]
	171	EXPORT FLASH_IRQHandler [WEAK]
	172	EXPORT RCC_CRS_IRQHandler [WEAK]
	173	EXPORT EXTI0_1_IRQHandler [WEAK]
	174	EXPORT EXTI2_3_IRQHandler [WEAK]
	175	EXPORT EXTI4_15_IRQHandler [WEAK]
	176	EXPORT TSC_IRQHandler [WEAK]
	177	EXPORT DMA1_Channel1_IRQHandler [WEAK]
	178	EXPORT DMA1_Channel2_3_IRQHandler [WEAK]
	179	EXPORT DMA1_Channel4_5_6_7_IRQHandler [WEAK]
	180	EXPORT ADC1_COMP_IRQHandler [WEAK]
	181	EXPORT TIM1_BRK_UP_TRG_COM_IRQHandler [WEAK]
	182	EXPORT TIM1_CC_IRQHandler [WEAK]
	183	EXPORT TIM2_IRQHandler [WEAK]
	184	EXPORT TIM3_IRQHandler [WEAK]
	185	EXPORT TIM6_DAC_IRQHandler [WEAK]
	186	EXPORT TIM7_IRQHandler [WEAK]
	187	EXPORT TIM14_IRQHandler [WEAK]
	188	EXPORT TIM15_IRQHandler [WEAK]
	189	EXPORT TIM16_IRQHandler [WEAK]
	190	EXPORT TIM17_IRQHandler [WEAK]
	191	EXPORT I2C1_IRQHandler [WEAK]
	192	EXPORT I2C2_IRQHandler [WEAK]
	193	EXPORT SPI1_IRQHandler [WEAK]
	194	EXPORT SPI2_IRQHandler [WEAK]
	195	EXPORT USART1_IRQHandler [WEAK]
	196	EXPORT USART2_IRQHandler [WEAK]
	197	EXPORT USART3_4_IRQHandler [WEAK]
	198	EXPORT CEC_CAN_IRQHandler [WEAK]
	199	EXPORT USB_IRQHandler [WEAK]
	200
	201
	202	WWDG_IRQHandler
	203	PVD_VDDIO2_IRQHandler
	204	RTC_IRQHandler
	205	FLASH_IRQHandler
	206	RCC_CRS_IRQHandler
	207	EXTI0_1_IRQHandler
	208	EXTI2_3_IRQHandler
	209	EXTI4_15_IRQHandler
	210	TSC_IRQHandler
	211	DMA1_Channel1_IRQHandler
	212	DMA1_Channel2_3_IRQHandler
	213	DMA1_Channel4_5_6_7_IRQHandler
	214	ADC1_COMP_IRQHandler
	215	TIM1_BRK_UP_TRG_COM_IRQHandler
	216	TIM1_CC_IRQHandler
	217	TIM2_IRQHandler
	218	TIM3_IRQHandler
	219	TIM6_DAC_IRQHandler
	220	TIM7_IRQHandler
	221	TIM14_IRQHandler
	222	TIM15_IRQHandler
	223	TIM16_IRQHandler
	224	TIM17_IRQHandler
	225	I2C1_IRQHandler
	226	I2C2_IRQHandler
	227	SPI1_IRQHandler
	228	SPI2_IRQHandler
	229	USART1_IRQHandler
	230	USART2_IRQHandler
	231	USART3_4_IRQHandler
	232	CEC_CAN_IRQHandler
	233	USB_IRQHandler
	234
	235	B .
	236
	237	ENDP
	238
	239	ALIGN
	240
	241	;*******************************************************************************
	242	; User Stack and Heap initialization
	243	;*******************************************************************************
	244	IF :DEF:__MICROLIB
	245
	246	EXPORT __initial_sp
	247	EXPORT __heap_base
	248	EXPORT __heap_limit
	249
	250	ELSE
	251
	252	IMPORT __use_two_region_memory
	253	EXPORT __user_initial_stackheap
	254
	255	__user_initial_stackheap
	256
	257	LDR R0, = Heap_Mem
	258	LDR R1, =(Stack_Mem + Stack_Size)
	259	LDR R2, = (Heap_Mem + Heap_Size)
	260	LDR R3, = Stack_Mem
	261	BX LR
	262
	263	ALIGN
	264
	265	ENDIF
	266
	267	END
	268
	269	;********************** (C) COPYRIGHT STMicroelectronics *END OF FILE***