F030C8xx_KBus.git

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2023-02-01 7a2ff321965f1f24f3047fedd44a83f451f1f793

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bfc108	1	/**
Q	2	******************************************************************************
	3	* @file : functions.c
	4	* @brief : funcstions program body
	5	******************************************************************************
	6	*/
	7	//#include "globaldef.h"
	8	#include "functions.h"
	9	#include "string.h"
	10	#include "stm32f0xx_hal.h"
a7db3c	11	#if (BOARD_TYPE == 14)
d69aae	12	#include "fp0.h"
Q	13	#endif
bfc108	14	extern __IO uint32_t uwTick;
Q	15	//#include "Myprotocol.h"
	16	int TickFreq=10000;
	17	int CoreClkMHz; //=SystemCoreClock/1000000;
	18	int TickPriodClk; //=SystemCoreClock/TickFreq;
	19	unsigned int TickPrioduS; //
	20	volatile unsigned int nCurTick=0;
	21	volatile unsigned int CurTickuS=0;
091773	22	//volatile unsigned int ThisRunTime=0; //开机时间
Q	23	//volatile unsigned int TotalRunTime=0; //总开机时间
	24	//volatile unsigned int PwrCount=0; //开机次数
	25	unsigned short ClkuS; //每个Clk的nS数，
bfc108	26
Q	27	int InituS(int TickFreq1)
	28	{
091773	29	TickPrioduS=1000000/TickFreq1; //每个SysTick的微秒数
Q	30	CoreClkMHz=HAL_RCC_GetHCLKFreq()/1000000; //=SystemCoreClock/1000000;每uS的时钟数
	31	TickPriodClk=SystemCoreClock/TickFreq1; //每个SysTick的时钟数
bfc108	32	ClkuS=(1000000LL*65536)/SystemCoreClock;
Q	33	CurTickuS=TickPrioduS+100u;
	34	return 0;
	35	}
	36
	37	inline unsigned int GetuS(void)
	38	{
	39	// unsigned short Clk1=SysTick->VAL;
	40
	41	int CurTickuS1=CurTickuS;
	42	int Val1=SysTick->VAL;
	43	if (CurTickuS1 != CurTickuS )
	44	{
	45	CurTickuS1=CurTickuS;
	46	Val1=SysTick->VAL;
	47	}
	48	uint32_t us1=CurTickuS1-(((Val1)*1365)>>16);
	49	return us1;
	50	}
	51
	52	inline unsigned int GetTick(void)
	53	{
	54	// unsigned short Clk1=SysTick->VAL;
	55	return nCurTick;
	56	}
a7db3c	57
bfc108	58	const unsigned short crc16_table[256] = {
Q	59	0x0000, 0x1189, 0x2312, 0x329b, 0x4624, 0x57ad, 0x6536, 0x74bf,
	60	0x8c48, 0x9dc1, 0xaf5a, 0xbed3, 0xca6c, 0xdbe5, 0xe97e, 0xf8f7,
	61	0x1081, 0x0108, 0x3393, 0x221a, 0x56a5, 0x472c, 0x75b7, 0x643e,
	62	0x9cc9, 0x8d40, 0xbfdb, 0xae52, 0xdaed, 0xcb64, 0xf9ff, 0xe876,
	63	0x2102, 0x308b, 0x0210, 0x1399, 0x6726, 0x76af, 0x4434, 0x55bd,
	64	0xad4a, 0xbcc3, 0x8e58, 0x9fd1, 0xeb6e, 0xfae7, 0xc87c, 0xd9f5,
	65	0x3183, 0x200a, 0x1291, 0x0318, 0x77a7, 0x662e, 0x54b5, 0x453c,
	66	0xbdcb, 0xac42, 0x9ed9, 0x8f50, 0xfbef, 0xea66, 0xd8fd, 0xc974,
	67	0x4204, 0x538d, 0x6116, 0x709f, 0x0420, 0x15a9, 0x2732, 0x36bb,
	68	0xce4c, 0xdfc5, 0xed5e, 0xfcd7, 0x8868, 0x99e1, 0xab7a, 0xbaf3,
	69	0x5285, 0x430c, 0x7197, 0x601e, 0x14a1, 0x0528, 0x37b3, 0x263a,
	70	0xdecd, 0xcf44, 0xfddf, 0xec56, 0x98e9, 0x8960, 0xbbfb, 0xaa72,
	71	0x6306, 0x728f, 0x4014, 0x519d, 0x2522, 0x34ab, 0x0630, 0x17b9,
	72	0xef4e, 0xfec7, 0xcc5c, 0xddd5, 0xa96a, 0xb8e3, 0x8a78, 0x9bf1,
	73	0x7387, 0x620e, 0x5095, 0x411c, 0x35a3, 0x242a, 0x16b1, 0x0738,
	74	0xffcf, 0xee46, 0xdcdd, 0xcd54, 0xb9eb, 0xa862, 0x9af9, 0x8b70,
	75	0x8408, 0x9581, 0xa71a, 0xb693, 0xc22c, 0xd3a5, 0xe13e, 0xf0b7,
	76	0x0840, 0x19c9, 0x2b52, 0x3adb, 0x4e64, 0x5fed, 0x6d76, 0x7cff,
	77	0x9489, 0x8500, 0xb79b, 0xa612, 0xd2ad, 0xc324, 0xf1bf, 0xe036,
	78	0x18c1, 0x0948, 0x3bd3, 0x2a5a, 0x5ee5, 0x4f6c, 0x7df7, 0x6c7e,
	79	0xa50a, 0xb483, 0x8618, 0x9791, 0xe32e, 0xf2a7, 0xc03c, 0xd1b5,
	80	0x2942, 0x38cb, 0x0a50, 0x1bd9, 0x6f66, 0x7eef, 0x4c74, 0x5dfd,
	81	0xb58b, 0xa402, 0x9699, 0x8710, 0xf3af, 0xe226, 0xd0bd, 0xc134,
	82	0x39c3, 0x284a, 0x1ad1, 0x0b58, 0x7fe7, 0x6e6e, 0x5cf5, 0x4d7c,
	83	0xc60c, 0xd785, 0xe51e, 0xf497, 0x8028, 0x91a1, 0xa33a, 0xb2b3,
	84	0x4a44, 0x5bcd, 0x6956, 0x78df, 0x0c60, 0x1de9, 0x2f72, 0x3efb,
	85	0xd68d, 0xc704, 0xf59f, 0xe416, 0x90a9, 0x8120, 0xb3bb, 0xa232,
	86	0x5ac5, 0x4b4c, 0x79d7, 0x685e, 0x1ce1, 0x0d68, 0x3ff3, 0x2e7a,
	87	0xe70e, 0xf687, 0xc41c, 0xd595, 0xa12a, 0xb0a3, 0x8238, 0x93b1,
	88	0x6b46, 0x7acf, 0x4854, 0x59dd, 0x2d62, 0x3ceb, 0x0e70, 0x1ff9,
	89	0xf78f, 0xe606, 0xd49d, 0xc514, 0xb1ab, 0xa022, 0x92b9, 0x8330,
	90	0x7bc7, 0x6a4e, 0x58d5, 0x495c, 0x3de3, 0x2c6a, 0x1ef1, 0x0f78
	91	};
	92
	93	unsigned short crc_check(const unsigned char * data, unsigned int length)
	94	{
	95	unsigned short crc_reg = 0xFFFF;
d69aae	96	while (length--)
Q	97	{
	98	crc_reg = (crc_reg >> 8) ^ crc16_table[(crc_reg ^ *data++) & 0xff];
	99	}
a7db3c	100	return (~crc_reg) & 0xFFFF;
bfc108	101	}
Q	102
	103	const uint16_t polynom = 0xA001;
	104
	105	unsigned short crc16bitbybit(const unsigned char *ptr, unsigned int len)
	106	{
	107	uint8_t i;
	108	uint16_t crc = 0xffff;
	109
	110	if (len == 0) {
	111	len = 1;
	112	}
	113	while (len--) {
	114	crc ^= *ptr;
	115	for (i = 0; i<8; i++)
	116	{
	117	if (crc & 1) {
	118	crc >>= 1;
	119	crc ^= polynom;
	120	}
	121	else {
	122	crc >>= 1;
	123	}
	124	}
	125	ptr++;
	126	}
	127	return(crc);
	128	}
	129
e1f350	130	/* Table of CRC values for high-order byte */
bfc108	131	const uint8_t crctablehi[] = {
Q	132	0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81,
	133	0x40, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0,
	134	0x80, 0x41, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40, 0x00, 0xC1, 0x81, 0x40, 0x01,
	135	0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41,
	136	0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40, 0x00, 0xC1, 0x81,
	137	0x40, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0,
	138	0x80, 0x41, 0x00, 0xC1, 0x81, 0x40, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01,
	139	0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40,
	140	0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81,
	141	0x40, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0,
	142	0x80, 0x41, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40, 0x00, 0xC1, 0x81, 0x40, 0x01,
	143	0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41,
	144	0x00, 0xC1, 0x81, 0x40, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81,
	145	0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0,
	146	0x80, 0x41, 0x00, 0xC1, 0x81, 0x40, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01,
	147	0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41,
	148	0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81,
	149	0x40
	150	};
e1f350	151	/* Table of CRC values for low-order byte */
bfc108	152	const uint8_t crctablelo[] = {
Q	153	0x00, 0xC0, 0xC1, 0x01, 0xC3, 0x03, 0x02, 0xC2, 0xC6, 0x06, 0x07, 0xC7, 0x05, 0xC5, 0xC4,
	154	0x04, 0xCC, 0x0C, 0x0D, 0xCD, 0x0F, 0xCF, 0xCE, 0x0E, 0x0A, 0xCA, 0xCB, 0x0B, 0xC9, 0x09,
	155	0x08, 0xC8, 0xD8, 0x18, 0x19, 0xD9, 0x1B, 0xDB, 0xDA, 0x1A, 0x1E, 0xDE, 0xDF, 0x1F, 0xDD,
	156	0x1D, 0x1C, 0xDC, 0x14, 0xD4, 0xD5, 0x15, 0xD7, 0x17, 0x16, 0xD6, 0xD2, 0x12, 0x13, 0xD3,
	157	0x11, 0xD1, 0xD0, 0x10, 0xF0, 0x30, 0x31, 0xF1, 0x33, 0xF3, 0xF2, 0x32, 0x36, 0xF6, 0xF7,
	158	0x37, 0xF5, 0x35, 0x34, 0xF4, 0x3C, 0xFC, 0xFD, 0x3D, 0xFF, 0x3F, 0x3E, 0xFE, 0xFA, 0x3A,
	159	0x3B, 0xFB, 0x39, 0xF9, 0xF8, 0x38, 0x28, 0xE8, 0xE9, 0x29, 0xEB, 0x2B, 0x2A, 0xEA, 0xEE,
	160	0x2E, 0x2F, 0xEF, 0x2D, 0xED, 0xEC, 0x2C, 0xE4, 0x24, 0x25, 0xE5, 0x27, 0xE7, 0xE6, 0x26,
	161	0x22, 0xE2, 0xE3, 0x23, 0xE1, 0x21, 0x20, 0xE0, 0xA0, 0x60, 0x61, 0xA1, 0x63, 0xA3, 0xA2,
	162	0x62, 0x66, 0xA6, 0xA7, 0x67, 0xA5, 0x65, 0x64, 0xA4, 0x6C, 0xAC, 0xAD, 0x6D, 0xAF, 0x6F,
	163	0x6E, 0xAE, 0xAA, 0x6A, 0x6B, 0xAB, 0x69, 0xA9, 0xA8, 0x68, 0x78, 0xB8, 0xB9, 0x79, 0xBB,
	164	0x7B, 0x7A, 0xBA, 0xBE, 0x7E, 0x7F, 0xBF, 0x7D, 0xBD, 0xBC, 0x7C, 0xB4, 0x74, 0x75, 0xB5,
	165	0x77, 0xB7, 0xB6, 0x76, 0x72, 0xB2, 0xB3, 0x73, 0xB1, 0x71, 0x70, 0xB0, 0x50, 0x90, 0x91,
	166	0x51, 0x93, 0x53, 0x52, 0x92, 0x96, 0x56, 0x57, 0x97, 0x55, 0x95, 0x94, 0x54, 0x9C, 0x5C,
	167	0x5D, 0x9D, 0x5F, 0x9F, 0x9E, 0x5E, 0x5A, 0x9A, 0x9B, 0x5B, 0x99, 0x59, 0x58, 0x98, 0x88,
	168	0x48, 0x49, 0x89, 0x4B, 0x8B, 0x8A, 0x4A, 0x4E, 0x8E, 0x8F, 0x4F, 0x8D, 0x4D, 0x4C, 0x8C,
	169	0x44, 0x84, 0x85, 0x45, 0x87, 0x47, 0x46, 0x86, 0x82, 0x42, 0x43, 0x83, 0x41, 0x81, 0x80,
	170	0x40
	171	};
	172
	173	uint16_t crc16table(const uint8_t *ptr, uint16_t len)
	174	{
	175	uint8_t crchi = 0xff;
	176	uint8_t crclo = 0xff;
	177	uint16_t index;
	178	while (len--)
	179	{
	180	index = crclo ^ *ptr++;
	181	crclo = crchi ^ crctablehi[index];
	182	crchi = crctablelo[index];
	183	}
	184	return (crchi << 8 \| crclo);
	185	}
	186
	187	void modbuscrc16test()
	188	{
	189	printf("\n");
	190	printf(" Modbus CRC16 tester\n");
	191	printf("-----------------------------------------------------------------------\n");
	192	uint8_t crc16_data[] = { 0x01, 0x04, 0x04, 0x43, 0x6b, 0x58, 0x0e }; // expected crc value 0xD825.
	193	printf(" modbus crc16table test, expected value : 0xd825, calculate value : 0x%x\n", crc16table(crc16_data, sizeof(crc16_data)));
e1f350	194	// printf(" modbus crc16tablefast test, expected value : 0xd825, calculate value : 0x%x\n", crc16tablefast(crc16_data, sizeof(crc16_data)));
bfc108	195	printf(" modbus crc16bitbybit test, expected value : 0xd825, calculate value : 0x%x\n", crc16bitbybit(crc16_data, sizeof(crc16_data)));
Q	196	}
	197
	198	int InitUartstat(stUartStat * pUartstat,void * pBufRx, int nSizeRx, void * pBufTx, int nSizeTx)
	199	{
	200	memset(pUartstat,sizeof(stUartStat),0);
	201	initQueue(&pUartstat->QRx,pBufRx,nSizeRx);
	202	initQueue(&pUartstat->QTx,pBufTx,nSizeTx);
	203	return 0;
	204	}
	205
	206	int Uart1SendDMA(void * pData, int nSize)
	207	{
	208	LL_DMA_DisableChannel(DMA1,LL_DMA_CHANNEL_2);
	209	LL_DMA_ConfigAddresses(DMA1,LL_DMA_CHANNEL_2, (uint32_t)pData,
	210	(uint32_t)&USART1->TDR, LL_DMA_DIRECTION_MEMORY_TO_PERIPH);
	211	LL_DMA_SetDataLength(DMA1,LL_DMA_CHANNEL_2,nSize);
	212	LL_DMA_EnableChannel(DMA1,LL_DMA_CHANNEL_2);
	213	Uart1Stat.DMASendLen=nSize;
	214	Uart1Stat.Sending=1;
	215	LL_DMA_EnableIT_TC(DMA1,LL_DMA_CHANNEL_2);
	216	LL_USART_EnableDMAReq_TX(USART1);
	217	return nSize;
	218	}
	219
	220	int Uart1TriggerSendDMA()
	221	{
	222	if (!Uart1Stat.Sending&&!IsEmpty(&Uart1Stat.QTx))
	223	{
	224	int len1=GetContinueData(&Uart1Stat.QTx);
	225	Uart1SendDMA(GetReadBuffer(&Uart1Stat.QTx),len1);
	226	}
	227	return 0;
	228	}
	229
e1f350	230	int Uart2RecvDMA(void * pBuf, int nSize)
Q	231	{
	232	LL_DMA_DisableChannel(DMA1,LL_DMA_CHANNEL_5);
	233	LL_DMA_ConfigAddresses(DMA1,LL_DMA_CHANNEL_5, (uint32_t)&USART2->RDR,
	234	(uint32_t)pBuf, LL_DMA_DIRECTION_PERIPH_TO_MEMORY);
	235	LL_DMA_SetDataLength(DMA1,LL_DMA_CHANNEL_5,nSize);
	236	LL_DMA_EnableChannel(DMA1,LL_DMA_CHANNEL_5);
	237	Uart2Stat.DMARecvLen=nSize;
	238	Uart2Stat.Recving=1;
	239	LL_DMA_EnableIT_TC(DMA1,LL_DMA_CHANNEL_5);
	240	LL_USART_EnableDMAReq_RX(USART2);
	241	return 0;
	242	}
bfc108	243	int Uart2SendDMA(void * pData, int nSize)
Q	244	{
	245	LL_DMA_DisableChannel(DMA1,LL_DMA_CHANNEL_4);
	246	LL_DMA_ConfigAddresses(DMA1,LL_DMA_CHANNEL_4, (uint32_t)pData,
	247	(uint32_t)&USART2->TDR, LL_DMA_DIRECTION_MEMORY_TO_PERIPH);
	248	LL_DMA_SetDataLength(DMA1,LL_DMA_CHANNEL_4,nSize);
	249	LL_DMA_EnableChannel(DMA1,LL_DMA_CHANNEL_4);
	250	Uart2Stat.DMASendLen=nSize;
	251	Uart2Stat.Sending=1;
	252	LL_DMA_EnableIT_TC(DMA1,LL_DMA_CHANNEL_4);
	253	LL_USART_EnableDMAReq_TX(USART2);
	254	return nSize;
	255	}
	256	int Uart2TriggerSendDMA()
	257	{
	258	if (!Uart2Stat.Sending&&!IsEmpty(&Uart2Stat.QTx))
	259	{
	260	int len1=GetContinueData(&Uart2Stat.QTx);
	261	Uart2SendDMA(GetReadBuffer(&Uart2Stat.QTx),len1);
	262	}
	263	return 0;
	264	}
e1f350	265
Q	266	void TriggerPendSV()
	267	{
	268	SCB->ICSR=SCB_ICSR_PENDSVSET_Msk; //1<<SCB_ICSR_PENDSVSET_Pos;
	269	}
	270
	271	void PendSvCallBack()
	272	{
a7db3c	273	#if (BOARD_TYPE == 14)
d69aae	274	///*
Q	275	if (bSPI1RecvDone)
	276	{
	277	bSPI1RecvDone=0;
	278	ParseFP0Pkg(SPI1RecvBuf,nSPI1RecvLenInBuf);
	279	}
	280	//*/
	281	#endif
e1f350	282	if (Uart2Stat.bPacketRecved)
Q	283	{
f4f290	284	KBusParsePacket(2, (pPacket)Uart2RecvBuf1, Uart2RecvBuf1DataLen);
e1f350	285	Uart2RecvBuf1DataLen=0;
Q	286	Uart2Stat.bPacketRecved=0;
	287	Uart2RecvDMA(Uart2RecvBuf1,sizeof(Uart2RecvBuf1));
	288	}
	289	}
d69aae	290
Q	291	void SPI1_IRQ_CallBack()
	292	{
	293	uint8_t value;
	294	// LL_GPIO_TogglePin(GPIOB,LL_GPIO_PIN_7);
	295	if (LL_SPI_IsActiveFlag_RXNE(SPI1))
	296	{
	297	value = LL_SPI_ReceiveData8( SPI1);
a7db3c	298	#if (BOARD_TYPE == 14)
d69aae	299	KMem.SDD[62]++;
Q	300	KMem.SDT[122]++;
	301	if (!bSPI1Sending)
	302	{
	303	KMem.SDB[128+KMem.SDT[123]] = value;
	304	KMem.SDT[123]++; if (KMem.SDT[123]>=100) {KMem.SDT[123]=81;}
	305	}
	306	if (!bSPI1Sending && (1 \|\| bSPI1Recving))
	307	{
	308	SPI1RecvBuf[nSPI1RecvPos]=value;
	309	nSPI1RecvPos++;
	310
	311	if (value==0x0d)
	312	{
	313	KMem.SDB[128+KMem.SDT[123]] = nSPI1RecvPos;
	314	KMem.SDT[123]++; if (KMem.SDT[123]>=100) {KMem.SDT[123]=81;}
	315
	316	nSPI1RecvLenInBuf=nSPI1RecvPos;
	317	bSPI1RecvDone=1;
	318	nSPI1RecvPos=0;
	319	bSPI1Recving=0;
	320
	321
	322	TriggerPendSV();
	323	}
	324	}
	325	if (bSPI1Sending)
	326	{
	327	nSPI1SentLen++;
	328	KMem.SDD[63]++;
	329
	330	if (nSPI1SentLen >= nSPI1ToSendLen) {
	331	SetACKPin_1();
	332	bSPI1Sending=0;
	333	bSPI1SendDone=1;
	334	bSPI1Recving=1;
	335	nSPI1RecvPos=0;
	336	SetFP0DEPin_0();
	337	}
	338	else {
	339	value = SPI1SendBuf[nSPI1SentLen];
	340	LL_SPI_TransmitData8(SPI1,value);
	341	KMem.SDB[128+KMem.SDT[123]] = value;
	342	KMem.SDT[123]++; if (KMem.SDT[123]>=100) {KMem.SDT[123]=81;}
	343	}
	344	}
	345	#endif
	346	}
	347	}
	348
bfc108	349	void Uart1SendDone()
Q	350	{
	351	Uart1Stat.TcCount++;
	352	return;
	353	}
	354
	355	void Uart1RecvDone()
	356	{
	357	Uart1Stat.IdelCount++;
	358	// NVIC_SetPendingIRQ(PendSV_IRQn);
e1f350	359	// SCB->ICSR=SCB_ICSR_PENDSVSET_Msk; //1<<SCB_ICSR_PENDSVSET_Pos;
Q	360
bfc108	361	if (Uart1RecvBuf1DataLen >0)
Q	362	{
	363	Uart1Stat.bPacketRecved=1;
e1f350	364	// SCB->ICSR=SCB_ICSR_PENDSVSET_Msk; //1<<SCB_ICSR_PENDSVSET_Pos;
bfc108	365	// KLParsePacket(Uart1RecvBuf1,Uart1RecvBuf1DataLen);
Q	366	// Uart1RecvBuf1DataLen=0;
	367	}
	368	}
	369
	370	void Uart2SendDone()
	371	{
	372	Uart2Stat.TcCount++;
	373	}
	374	void Uart2RecvDone()
	375	{
e1f350	376	Uart2RecvBuf1DataLen=sizeof(Uart2RecvBuf1) - LL_DMA_GetDataLength(DMA1,LL_DMA_CHANNEL_5);
bfc108	377	Uart2Stat.bPacketRecved=1;
Q	378	Uart2Stat.IdelCount++;
e1f350	379	if (Uart2RecvBuf1DataLen>0)
Q	380	TriggerPendSV();
	381	// ParsePacket((pPacket)Uart2RecvBuf1,Uart2RecvBuf1DataLen);
bfc108	382	}
Q	383
	384	int PutStr(char * str1, int len1)
	385	{
	386	// Uart1SendDMA(str1,len1);
d69aae	387	PushIn(&Uart1Stat.QTx,str1,len1);
bfc108	388	// LL_USART_EnableIT_TXE(USART1);
Q	389	// LL_USART_EnableIT_TC(USART1);
d69aae	390	Uart1TriggerSendDMA();
bfc108	391	return len1;
Q	392	}
	393	int PutStr1(char * str1, int len1)
	394	{
	395	// Uart1SendDMA(str1,len1);
	396	PushIn(&Uart1Stat.QTx,str1,len1);
	397	// LL_USART_EnableIT_TXE(USART1);
	398	// LL_USART_EnableIT_TC(USART1);
	399	Uart1TriggerSendDMA();
	400	return len1;
	401	}
	402	int PutStr2(char * str1, int len1)
	403	{
e1f350	404	Uart2SendDMA(str1,len1);
Q	405	// PushIn(&Uart2Stat.QTx,str1,len1);
bfc108	406	// LL_USART_EnableIT_TXE(USART1);
Q	407	// LL_USART_EnableIT_TC(USART1);
e1f350	408	// Uart2TriggerSendDMA();
bfc108	409	return len1;
Q	410	}
	411
d69aae	412	int SendPacket(int nChn, void * pBuf,int len1)
bfc108	413	{
d69aae	414	if (nChn==1) {
Q	415	PutStr1((char *)pBuf,len1);
	416	// PushIn(&Uart1Stat.QTx,p1,len1);
	417	// Uart1TriggerSendDMA();
	418	Uart1Stat.SentPacket++;
	419	}else if (nChn==2){
	420	PutStr2((char *)pBuf,len1);
	421	// PushIn(&Uart2Stat.QTx,p1,len1);
	422	// Uart2TriggerSendDMA();
	423	Uart2Stat.SentPacket++;
	424	}
	425	return len1;
bfc108	426	}
d69aae	427	/*
bfc108	428	int SendPacket1(void * pBuf,int len1)
Q	429	{
	430	PutStr1((char *)pBuf,len1);
	431	// PushIn(&Uart1Stat.QTx,p1,len1);
	432	// Uart1TriggerSendDMA();
	433	Uart1Stat.SentPacket++;
	434	return len1;
	435	}
	436	int SendPacket2(pPacket p1,int len1)
	437	{
	438	PutStr2((char *)p1,len1);
	439	// PushIn(&Uart2Stat.QTx,p1,len1);
	440	// Uart2TriggerSendDMA();
	441	Uart2Stat.SentPacket++;
	442	return len1;
	443	}
d69aae	444	*/
bfc108	445	void ToggleRunLed() { LL_GPIO_TogglePin(GPIOC,LL_GPIO_PIN_13);}
Q	446	void ToggleErrLed() { LL_GPIO_TogglePin(GPIOC,LL_GPIO_PIN_14);}
a7db3c	447	#if (BOARD_TYPE == 14)
d69aae	448	void ToggleOutStat() { LL_GPIO_TogglePin(GPIOC,LL_GPIO_PIN_15);}
Q	449
	450	void SetOutStat(uchar bOn)
	451	{
	452	if (bOn) {LL_GPIO_SetOutputPin(GPIOC,LL_GPIO_PIN_15);}
	453	else {LL_GPIO_ResetOutputPin(GPIOC,LL_GPIO_PIN_15);}
	454	}
	455	#else
bfc108	456	void ToggleOutStat() { LL_GPIO_TogglePin(GPIOA,LL_GPIO_PIN_11);}
Q	457
	458	void SetOutStat(uchar bOn)
	459	{
	460	if (bOn) {LL_GPIO_SetOutputPin(GPIOA,LL_GPIO_PIN_11);}
	461	else {LL_GPIO_ResetOutputPin(GPIOA,LL_GPIO_PIN_11);}
	462	}
d69aae	463	#endif
bfc108	464
Q	465	void SetRunLed(uchar bOn)
	466	{
	467	if (bOn) {LL_GPIO_ResetOutputPin(GPIOC,LL_GPIO_PIN_13);}
	468	else {LL_GPIO_SetOutputPin(GPIOC,LL_GPIO_PIN_13);}
	469	}
	470	void SetErrLed(uchar bOn)
	471	{
	472	if (bOn) {LL_GPIO_ResetOutputPin(GPIOC,LL_GPIO_PIN_14);}
	473	else {LL_GPIO_SetOutputPin(GPIOC,LL_GPIO_PIN_14);}
	474	}
	475	void SetLeds(uchar bRun, uchar bErr)
	476	{
	477	SetRunLed(bRun); SetErrLed (bErr);
	478	}
	479
	480	#define set165SL_0() LL_GPIO_ResetOutputPin(GPIOA,LL_GPIO_PIN_4)
	481	#define set165SL_1() LL_GPIO_SetOutputPin(GPIOA,LL_GPIO_PIN_4)
	482	#define set165CLK_0() LL_GPIO_ResetOutputPin(GPIOA,LL_GPIO_PIN_5)
	483	#define set165CLK_1() LL_GPIO_SetOutputPin(GPIOA,LL_GPIO_PIN_5)
	484	#define Get165SER() LL_GPIO_IsInputPinSet(GPIOA,LL_GPIO_PIN_6)
	485	#define GetCfg165SER() LL_GPIO_IsInputPinSet(GPIOA,LL_GPIO_PIN_7)
	486
	487	unsigned int Input165_8()
	488	{
	489	int x1=0;
e1f350	490	__disable_irq();
bfc108	491	set165SL_0(); set165SL_1();
Q	492	unsigned int mask1=0x0080;
	493	volatile uint32_t * p1=&GPIOA->IDR;
	494	for (uint32_t i=8;i;i--)
	495	{
	496	//if (Get165SER()) {}
	497	//else x1\|=mask1;
	498	if (*p1&LL_GPIO_PIN_6) {}
	499	else x1\|=mask1;
	500	//x1<<=1;
	501	//x1\|=!Get165SER();
	502	set165CLK_0();
	503	mask1>>=1;
	504	set165CLK_1();
	505	}
e1f350	506	__enable_irq();
bfc108	507	return x1;
Q	508	}
	509
	510	unsigned int Input165(int nBit)
	511	{
	512	int x1=0;
e1f350	513	__disable_irq();
bfc108	514	set165SL_0(); set165SL_1();
Q	515	unsigned int mask1=1<<(nBit-1);
	516	volatile uint32_t * p1=&GPIOA->IDR;
	517	for (uint32_t i=nBit;i;i--)
	518	{
	519	//if (Get165SER()) {}
	520	//else x1\|=mask1;
	521	if (*p1&LL_GPIO_PIN_6) {}
	522	else x1\|=mask1;
	523	//x1<<=1;
	524	//x1\|=!Get165SER();
	525	set165CLK_0();
	526	mask1>>=1;
	527	set165CLK_1();
	528	}
e1f350	529	__enable_irq();
bfc108	530	return x1;
Q	531	}
	532	unsigned int Input165_R(int nBit)
	533	{
e1f350	534	__disable_irq();
bfc108	535	set165SL_0(); set165SL_1();
Q	536	int nBytes = nBit /8;
	537	volatile uint32_t * p1=&GPIOA->IDR;
	538	union stdata
	539	{
	540	int intvalue;
	541	unsigned char Bytes[4];
	542	}rdata;
	543	rdata.intvalue=0;
	544	for (int i=0;i<nBytes;i++)
	545	{
	546	int x1=0;
	547	unsigned int mask1=1<<(7);
	548	for (uint32_t i=8;i;i--)
	549	{
	550	//if (Get165SER()) {}
	551	//else x1\|=mask1;
	552	if (*p1&LL_GPIO_PIN_6) {}
	553	else x1\|=mask1;
	554	//x1<<=1;
	555	//x1\|=!Get165SER();
	556	set165CLK_0();
	557	mask1>>=1;
	558	set165CLK_1();
	559	}
	560	rdata.Bytes[i]=x1;
	561	}
e1f350	562	__enable_irq();
bfc108	563	return rdata.intvalue;
Q	564	}
	565
	566	unsigned int Input165Cfg(int nBit)
	567	{
	568	int x1=0;
e1f350	569	__disable_irq();
bfc108	570	set165SL_0(); set165SL_1();
Q	571	unsigned int mask1=1<<(nBit-1);
	572	volatile uint32_t * p1=&GPIOA->IDR;
	573	for (uint32_t i=nBit;i;i--)
	574	{
	575	//if (Get165SER()) {}
	576	//else x1\|=mask1;
	577	if (*p1&LL_GPIO_PIN_7) {}
	578	else x1\|=mask1;
	579	//x1<<=1;
	580	//x1\|=!Get165SER();
	581	set165CLK_0();
	582	mask1>>=1;
	583	set165CLK_1();
	584	}
e1f350	585	__enable_irq();
bfc108	586	return x1;
Q	587	}
	588
	589	unsigned int GetInput()
	590	{
	591	int BoradType=GetBoardType();
	592	switch (BoradType)
	593	{
	594
	595	case 1:
	596	return Input165(8);
	597	case 2:
	598	return Input165(8);
	599	case 3:
	600	return Input165(16);
	601	case 4:
	602	return Input165(8);
	603	case 5:
	604	case 7:
	605	return Input165(16);
	606	case 6:
	607	case 8:
	608	return Input165(8);
	609	case 9:
	610	return Input165_R(16);
	611	case 10:
	612	return Input165_R(8);
0aeaad	613	case 11:
Q	614	return Input165_R(8);
a7db3c	615	case 13:
Q	616	return Input165_R(16);
	617	case 14:
f4f290	618	return 0; //FP0
a7db3c	619	case 15:
Q	620	return Input165_R(16);
7a2ff3	621	case 16:
Q	622	return Input165_R(8);
	623
bfc108	624	default:
Q	625	break;
	626	}
	627	return 0;
	628
	629	}
	630	int ReadConfig_0()
	631	{
	632	return 0;
	633	}
	634
	635	int ReadConfig_1()
	636	{
	637	// uchar x = LL_GPIO_ReadInputPort(GPIOB);
	638	// uchar x1 = LL_GPIO_IsInputPinSet(GPIOB,LL_GPIO_PIN_10);
	639	// uchar x2=(x&0x7) \| (x1 << 3 ) ;
	640	uchar x2=0;
	641	x2=(GPIOB->IDR&0x7) \| ((GPIOB->IDR &0x400)>>7);
	642	x2= (~x2)&0xf;
	643	return x2;
	644	}
	645
	646	int ReadConfig_2()
	647	{
	648	uchar x2=0;
	649	x2=(GPIOB->IDR&0x7) \| ((GPIOB->IDR &0x400)>>7);
	650	x2= (~x2)&0xf;
	651	return x2;
	652	}
	653
	654	int ReadConfig_3()
	655	{
	656	uchar x2=0;
	657	x2 = Input165(24)&0xff;
	658	return x2;
	659
	660	}
	661	int ReadConfig_4()
	662	{
	663
	664	uchar x2=0;
	665	x2 = Input165(16)&0xff;
	666	return x2;
	667	}
	668
	669	int ReadConfig_5()
	670	{
	671	uchar x2=0;
	672	x2 = Input165Cfg(8)&0xff;
	673	return x2;
	674	}
	675
0aeaad	676	int ReadConfig_11()
Q	677	{
	678	uchar x2=0;
	679	x2=((GPIOB->IDR&0x2)<<2);
	680	x2= ((~x2)&0x8)\|1;
	681	return x2;
	682	}
	683
bfc108	684	int ReadJumperSW()
Q	685	{
	686	int BoradType=GetBoardType();
	687	switch (BoradType)
	688	{
	689	case 0:
	690	return ReadConfig_0();
	691	case 1:
	692	return ReadConfig_1(); //old board 4 in 4 o
	693	case 2:
	694	return ReadConfig_2(); //old board 8 in 8 o
	695	case 3:
	696	return ReadConfig_3(); //Master 16 in16 o
	697	case 4:
	698	return ReadConfig_4(); //Slave 8 in 8 o
	699	case 5:
	700	case 7:
	701	return ReadConfig_5(); // New Master 16 in16 o
	702	case 6:
	703	case 8:
	704	return ReadConfig_5(); //New Slave 8 in 8 o
	705	case 9:
	706	case 10:
a7db3c	707	return ReadConfig_5(); //New Master Slave 8 in 8 o
0aeaad	708	case 11:
Q	709	return ReadConfig_11(); //Mini Board
d69aae	710	case 13:
Q	711	return ReadConfig_5();
a7db3c	712	case 14:
Q	713	return (~(LL_GPIO_ReadInputPort(GPIOA)>>4))&0x0f; //FP0
	714	case 15:
7a2ff3	715	case 16:
a7db3c	716	return ReadConfig_5(); //Wireless Master Slave 8 in 8 o
bfc108	717	default:
Q	718
	719	return 0;
	720	}
	721	}
	722
e1f350	723	#define SRCLK2_0() LL_GPIO_ResetOutputPin(GPIOB,LL_GPIO_PIN_13)
Q	724	#define SRCLK2_1() LL_GPIO_SetOutputPin(GPIOB,LL_GPIO_PIN_13)
	725	#define STRCLK2_0() LL_GPIO_ResetOutputPin(GPIOB,LL_GPIO_PIN_12)
	726	#define STRCLK2_1() LL_GPIO_SetOutputPin(GPIOB,LL_GPIO_PIN_12)
	727	#define SER2_0() LL_GPIO_ResetOutputPin(GPIOB,LL_GPIO_PIN_15)
	728	#define SER2_1() LL_GPIO_SetOutputPin(GPIOB,LL_GPIO_PIN_15)
bfc108	729
Q	730	void Enable595(uchar bEnable)
	731	{
	732	if (bEnable) {LL_GPIO_ResetOutputPin(GPIOA,LL_GPIO_PIN_8);}
	733	else {LL_GPIO_SetOutputPin(GPIOA,LL_GPIO_PIN_8);}
	734	}
	735
	736	void Output595_8(unsigned int cc)
	737	{
	738	//unsigned char i;
091773	739	;// 74HC595输出程序，输出8位
bfc108	740	// cc=~0x3f;
e1f350	741	__disable_irq();
Q	742	STRCLK2_1();
bfc108	743	unsigned int mask1=0x0080;
Q	744	//volatile uint32_t * p1 = &GPIOB->BRR;
	745	//volatile uint32_t * p2 = &GPIOB->BSRR;
	746	for (;mask1;)
	747	{
e1f350	748	SRCLK2_0();
bfc108	749	//*p1=LL_GPIO_PIN_13;
e1f350	750	if (cc&mask1) {SER2_1();}
Q	751	else {SER2_0();}
bfc108	752	mask1>>=1;
e1f350	753	SRCLK2_1();
bfc108	754	// __nop();
Q	755	//*p2=LL_GPIO_PIN_13;
	756	}
e1f350	757	STRCLK2_0();
Q	758	STRCLK2_1();
	759	__enable_irq();
bfc108	760	}
a7db3c	761
bfc108	762	void Output595_16(unsigned int cc)
Q	763	{
	764	//unsigned char i;
091773	765	;// 74HC595输出程序，输出8位
bfc108	766	// cc=~0x3f;
e1f350	767	__disable_irq();
Q	768	STRCLK2_1();
bfc108	769	unsigned int mask1=0x8000;
Q	770	//volatile uint32_t * p1 = &GPIOB->BRR;
	771	//volatile uint32_t * p2 = &GPIOB->BSRR;
	772	for (;mask1;)
	773	{
e1f350	774	SRCLK2_0();
bfc108	775	//*p1=LL_GPIO_PIN_13;
e1f350	776	if (cc&mask1) {SER2_1();}
Q	777	else {SER2_0();}
bfc108	778	mask1>>=1;
e1f350	779	SRCLK2_1();
bfc108	780	// __nop();
Q	781	//*p2=LL_GPIO_PIN_13;
	782	}
e1f350	783	STRCLK2_0();
Q	784	STRCLK2_1();
	785	__enable_irq();
bfc108	786	}
e1f350	787
d69aae	788	/*
e1f350	789	#define STRCLK12_0() LL_GPIO_ResetOutputPin(GPIOB,LL_GPIO_PIN_7)
Q	790	#define STRCLK12_1() LL_GPIO_SetOutputPin(GPIOB,LL_GPIO_PIN_7)
	791
	792	void PutOutputSPI1(unsigned int Y)
	793	{
	794	__disable_irq();
	795	STRCLK12_1();
	796	LL_SPI_TransmitData8(SPI1,Y>>8);
	797	int i=0;
	798	while (LL_SPI_IsActiveFlag_TXE(SPI1) == RESET)
	799	{
	800	}
	801	KMem.SDD[28]=i;
	802	i=0;
	803	while (LL_SPI_IsActiveFlag_BSY(SPI1) == SET)
	804	{
	805	i++;
	806	}
	807	LL_SPI_TransmitData8(SPI1,Y);
	808	while (LL_SPI_IsActiveFlag_TXE(SPI1) == RESET)
	809	{
	810	}
	811	KMem.SDD[28]=i;
	812	i=0;
	813	while (LL_SPI_IsActiveFlag_BSY(SPI1) == SET)
	814	{
	815	i++;
	816	}
	817	KMem.SDD[30]=i;
	818	STRCLK12_0();
d69aae	819	__nop();
Q	820	STRCLK12_1();
	821	__enable_irq();
e1f350	822	}
d69aae	823	*/
e1f350	824
Q	825	void PutOutputSPI2(unsigned int Y)
	826	{
	827	__disable_irq();
	828	STRCLK2_1();
	829	LL_SPI_TransmitData8(SPI2,Y>>8);
0aeaad	830	int i=0;
Q	831	while (LL_SPI_IsActiveFlag_TXE(SPI2) == RESET)
	832	{
	833	}
	834	KMem.SDD[28]=i;
	835	i=0;
	836	while (LL_SPI_IsActiveFlag_BSY(SPI2) == SET)
	837	{
	838	i++;
	839	}
e1f350	840	LL_SPI_TransmitData8(SPI2,Y);
Q	841	while (LL_SPI_IsActiveFlag_TXE(SPI2) == RESET)
	842	{
	843	}
	844	KMem.SDD[28]=i;
	845	i=0;
	846	while (LL_SPI_IsActiveFlag_BSY(SPI2) == SET)
	847	{
	848	i++;
	849	}
0aeaad	850	KMem.SDD[30]=i;
e1f350	851	STRCLK2_0();
d69aae	852	STRCLK2_1();
e1f350	853	__enable_irq();
Q	854	}
	855
	856	void PutOutput(unsigned int Y)
	857	{
a7db3c	858	#if (BOARD_TYPE == 14)
d69aae	859	return ;
Q	860	#endif
e1f350	861	PutOutputSPI2(Y);
Q	862	//Output595_16(Y);
0aeaad	863	}
bfc108	864
7a2ff3	865	#if (BOARD_TYPE == 9 \|\| BOARD_TYPE == 10 \|\| BOARD_TYPE == 15 \|\| BOARD_TYPE == 16)
bfc108	866	//#pragma message("9,10")
091773	867	// V4.2 管脚排列向右移动了一位。
bfc108	868	#define SRCLK1_0() LL_GPIO_ResetOutputPin(GPIOB,LL_GPIO_PIN_1)
Q	869	#define SRCLK1_1() LL_GPIO_SetOutputPin(GPIOB,LL_GPIO_PIN_1)
	870	#define STRCLK1_0() LL_GPIO_ResetOutputPin(GPIOB,LL_GPIO_PIN_2)
	871	#define STRCLK1_1() LL_GPIO_SetOutputPin(GPIOB,LL_GPIO_PIN_2)
	872	#define OE1_0() LL_GPIO_ResetOutputPin(GPIOB,LL_GPIO_PIN_10)
	873	#define OE1_1() LL_GPIO_SetOutputPin(GPIOB,LL_GPIO_PIN_10)
	874	#define SER1_0() LL_GPIO_ResetOutputPin(GPIOB,LL_GPIO_PIN_11)
	875	#define SER1_1() LL_GPIO_SetOutputPin(GPIOB,LL_GPIO_PIN_11)
091773	876	#else //按照原来的管脚排列
bfc108	877	#define SRCLK1_0() LL_GPIO_ResetOutputPin(GPIOB,LL_GPIO_PIN_0)
Q	878	#define SRCLK1_1() LL_GPIO_SetOutputPin(GPIOB,LL_GPIO_PIN_0)
	879	#define STRCLK1_0() LL_GPIO_ResetOutputPin(GPIOB,LL_GPIO_PIN_1)
	880	#define STRCLK1_1() LL_GPIO_SetOutputPin(GPIOB,LL_GPIO_PIN_1)
	881	#define OE1_0() LL_GPIO_ResetOutputPin(GPIOB,LL_GPIO_PIN_2)
	882	#define OE1_1() LL_GPIO_SetOutputPin(GPIOB,LL_GPIO_PIN_2)
	883	#define SER1_0() LL_GPIO_ResetOutputPin(GPIOB,LL_GPIO_PIN_10)
	884	#define SER1_1() LL_GPIO_SetOutputPin(GPIOB,LL_GPIO_PIN_10)
	885	#endif
	886
	887
	888	void EnableDisIn(uchar bEnable)
	889	{
	890	if (bEnable) {OE1_0();}
	891	else {OE1_1();}
	892	}
a7db3c	893
bfc108	894	void displayInput(unsigned int cc)
Q	895	{
	896	//unsigned char i;
091773	897	;// 74HC595输出程序，输出8位
bfc108	898	// cc=~0x3f;
e1f350	899	__disable_irq();
bfc108	900	STRCLK1_1();
Q	901	unsigned int mask1=0x8000;
	902	//volatile uint32_t * p1 = &GPIOB->BRR;
	903	//volatile uint32_t * p2 = &GPIOB->BSRR;`````
	904	for (;mask1;)
	905	{
	906	SRCLK1_0();
	907	//*p1=LL_GPIO_PIN_13;
	908	if (cc&mask1) {SER1_1();}
	909	else {SER1_0();}
	910	mask1>>=1;
	911	SRCLK1_1();
	912	// __nop();
	913	//*p2=LL_GPIO_PIN_13;
	914	}
	915	STRCLK1_0();
e1f350	916	STRCLK1_1();
Q	917	__enable_irq();
bfc108	918	}