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2023-02-01 47857ed32cb8737a25f26970b222e29727f1c93b

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bfc108	1	/**
Q	2	******************************************************************************
	3	* @file stm32f0xx_hal_tim_ex.c
	4	* @author MCD Application Team
	5	* @brief TIM HAL module driver.
	6	* This file provides firmware functions to manage the following
	7	* functionalities of the Timer Extended peripheral:
	8	* + Time Hall Sensor Interface Initialization
	9	* + Time Hall Sensor Interface Start
	10	* + Time Complementary signal bread and dead time configuration
	11	* + Time Master and Slave synchronization configuration
	12	* + Timer remapping capabilities configuration
	13	@verbatim
	14	==============================================================================
	15	##### TIMER Extended features #####
	16	==============================================================================
	17	[..]
	18	The Timer Extended features include:
	19	(#) Complementary outputs with programmable dead-time for :
	20	(++) Output Compare
	21	(++) PWM generation (Edge and Center-aligned Mode)
	22	(++) One-pulse mode output
	23	(#) Synchronization circuit to control the timer with external signals and to
	24	interconnect several timers together.
	25	(#) Break input to put the timer output signals in reset state or in a known state.
	26	(#) Supports incremental (quadrature) encoder and hall-sensor circuitry for
	27	positioning purposes
	28
	29	##### How to use this driver #####
	30	==============================================================================
	31	[..]
	32	(#) Initialize the TIM low level resources by implementing the following functions
	33	depending from feature used :
	34	(++) Complementary Output Compare : HAL_TIM_OC_MspInit()
	35	(++) Complementary PWM generation : HAL_TIM_PWM_MspInit()
	36	(++) Complementary One-pulse mode output : HAL_TIM_OnePulse_MspInit()
	37	(++) Hall Sensor output : HAL_TIM_HallSensor_MspInit()
	38
	39	(#) Initialize the TIM low level resources :
	40	(##) Enable the TIM interface clock using __HAL_RCC_TIMx_CLK_ENABLE();
	41	(##) TIM pins configuration
	42	(+++) Enable the clock for the TIM GPIOs using the following function:
	43	__HAL_RCC_GPIOx_CLK_ENABLE();
	44	(+++) Configure these TIM pins in Alternate function mode using HAL_GPIO_Init();
	45
	46	(#) The external Clock can be configured, if needed (the default clock is the
	47	internal clock from the APBx), using the following function:
	48	HAL_TIM_ConfigClockSource, the clock configuration should be done before
	49	any start function.
	50
	51	(#) Configure the TIM in the desired functioning mode using one of the
	52	initialization function of this driver:
	53	(++) HAL_TIMEx_HallSensor_Init and HAL_TIMEx_ConfigCommutationEvent: to use the
	54	Timer Hall Sensor Interface and the commutation event with the corresponding
	55	Interrupt and DMA request if needed (Note that One Timer is used to interface
	56	with the Hall sensor Interface and another Timer should be used to use
	57	the commutation event).
	58
	59	(#) Activate the TIM peripheral using one of the start functions:
	60	(++) Complementary Output Compare : HAL_TIMEx_OCN_Start(), HAL_TIMEx_OCN_Start_DMA(), HAL_TIMEx_OCN_Start_IT()
	61	(++) Complementary PWM generation : HAL_TIMEx_PWMN_Start(), HAL_TIMEx_PWMN_Start_DMA(), HAL_TIMEx_PWMN_Start_IT()
	62	(++) Complementary One-pulse mode output : HAL_TIMEx_OnePulseN_Start(), HAL_TIMEx_OnePulseN_Start_IT()
	63	(++) Hall Sensor output : HAL_TIMEx_HallSensor_Start(), HAL_TIMEx_HallSensor_Start_DMA(), HAL_TIMEx_HallSensor_Start_IT().
	64
	65
	66	@endverbatim
	67	******************************************************************************
	68	* @attention
	69	*
	70	* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
	71	*
	72	* Redistribution and use in source and binary forms, with or without modification,
	73	* are permitted provided that the following conditions are met:
	74	* 1. Redistributions of source code must retain the above copyright notice,
	75	* this list of conditions and the following disclaimer.
	76	* 2. Redistributions in binary form must reproduce the above copyright notice,
	77	* this list of conditions and the following disclaimer in the documentation
	78	* and/or other materials provided with the distribution.
	79	* 3. Neither the name of STMicroelectronics nor the names of its contributors
	80	* may be used to endorse or promote products derived from this software
	81	* without specific prior written permission.
	82	*
	83	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
	84	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
	85	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
	86	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
	87	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
	88	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
	89	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
	90	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
	91	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
	92	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
	93	*
	94	******************************************************************************
	95	*/
	96
	97	/* Includes ------------------------------------------------------------------*/
	98	#include "stm32f0xx_hal.h"
	99
	100	/** @addtogroup STM32F0xx_HAL_Driver
	101	* @{
	102	*/
	103
	104	/** @defgroup TIMEx TIMEx
	105	* @brief TIM Extended HAL module driver
	106	* @{
	107	*/
	108
	109	#ifdef HAL_TIM_MODULE_ENABLED
	110
	111	/* Private typedef -----------------------------------------------------------*/
	112	/* Private define ------------------------------------------------------------*/
	113	/* Private macro -------------------------------------------------------------*/
	114	/* Private variables ---------------------------------------------------------*/
	115	/* Private function prototypes -----------------------------------------------*/
	116
	117	/** @defgroup TIMEx_Private_Functions TIMEx Private Functions
	118	* @{
	119	*/
	120	static void TIM_CCxNChannelCmd(TIM_TypeDef* TIMx, uint32_t Channel, uint32_t ChannelNState);
	121	/**
	122	* @}
	123	*/
	124
	125	/* Exported functions ---------------------------------------------------------*/
	126
	127	/** @defgroup TIMEx_Exported_Functions TIMEx Exported Functions
	128	* @{
	129	*/
	130
	131	/** @defgroup TIMEx_Exported_Functions_Group1 Timer Hall Sensor functions
	132	* @brief Timer Hall Sensor functions
	133	*
	134	@verbatim
	135	==============================================================================
	136	##### Timer Hall Sensor functions #####
	137	==============================================================================
	138	[..]
	139	This section provides functions allowing to:
	140	(+) Initialize and configure TIM HAL Sensor.
	141	(+) De-initialize TIM HAL Sensor.
	142	(+) Start the Hall Sensor Interface.
	143	(+) Stop the Hall Sensor Interface.
	144	(+) Start the Hall Sensor Interface and enable interrupts.
	145	(+) Stop the Hall Sensor Interface and disable interrupts.
	146	(+) Start the Hall Sensor Interface and enable DMA transfers.
	147	(+) Stop the Hall Sensor Interface and disable DMA transfers.
	148
	149	@endverbatim
	150	* @{
	151	*/
	152	/**
	153	* @brief Initializes the TIM Hall Sensor Interface and create the associated handle.
	154	* @param htim TIM Encoder Interface handle
	155	* @param sConfig TIM Hall Sensor configuration structure
	156	* @retval HAL status
	157	*/
	158	HAL_StatusTypeDef HAL_TIMEx_HallSensor_Init(TIM_HandleTypeDef htim, TIM_HallSensor_InitTypeDef sConfig)
	159	{
	160	TIM_OC_InitTypeDef OC_Config;
	161
	162	/* Check the TIM handle allocation */
	163	if(htim == NULL)
	164	{
	165	return HAL_ERROR;
	166	}
	167
	168	assert_param(IS_TIM_HALL_INTERFACE_INSTANCE(htim->Instance));
	169	assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
	170	assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
	171	assert_param(IS_TIM_IC_POLARITY(sConfig->IC1Polarity));
	172	assert_param(IS_TIM_IC_PRESCALER(sConfig->IC1Prescaler));
	173	assert_param(IS_TIM_IC_FILTER(sConfig->IC1Filter));
	174	assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload));
	175
	176	if(htim->State == HAL_TIM_STATE_RESET)
	177	{
	178	/* Allocate lock resource and initialize it */
	179	htim->Lock = HAL_UNLOCKED;
	180
	181	/* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */
	182	HAL_TIMEx_HallSensor_MspInit(htim);
	183	}
	184
	185	/* Set the TIM state */
	186	htim->State= HAL_TIM_STATE_BUSY;
	187
	188	/* Configure the Time base in the Encoder Mode */
	189	TIM_Base_SetConfig(htim->Instance, &htim->Init);
	190
	191	/* Configure the Channel 1 as Input Channel to interface with the three Outputs of the Hall sensor */
	192	TIM_TI1_SetConfig(htim->Instance, sConfig->IC1Polarity, TIM_ICSELECTION_TRC, sConfig->IC1Filter);
	193
	194	/* Reset the IC1PSC Bits */
	195	htim->Instance->CCMR1 &= ~TIM_CCMR1_IC1PSC;
	196	/* Set the IC1PSC value */
	197	htim->Instance->CCMR1 \|= sConfig->IC1Prescaler;
	198
	199	/* Enable the Hall sensor interface (XOR function of the three inputs) */
	200	htim->Instance->CR2 \|= TIM_CR2_TI1S;
	201
	202	/* Select the TIM_TS_TI1F_ED signal as Input trigger for the TIM */
	203	htim->Instance->SMCR &= ~TIM_SMCR_TS;
	204	htim->Instance->SMCR \|= TIM_TS_TI1F_ED;
	205
	206	/* Use the TIM_TS_TI1F_ED signal to reset the TIM counter each edge detection */
	207	htim->Instance->SMCR &= ~TIM_SMCR_SMS;
	208	htim->Instance->SMCR \|= TIM_SLAVEMODE_RESET;
	209
	210	/* Program channel 2 in PWM 2 mode with the desired Commutation_Delay*/
	211	OC_Config.OCFastMode = TIM_OCFAST_DISABLE;
	212	OC_Config.OCIdleState = TIM_OCIDLESTATE_RESET;
	213	OC_Config.OCMode = TIM_OCMODE_PWM2;
	214	OC_Config.OCNIdleState = TIM_OCNIDLESTATE_RESET;
	215	OC_Config.OCNPolarity = TIM_OCNPOLARITY_HIGH;
	216	OC_Config.OCPolarity = TIM_OCPOLARITY_HIGH;
	217	OC_Config.Pulse = sConfig->Commutation_Delay;
	218
	219	TIM_OC2_SetConfig(htim->Instance, &OC_Config);
	220
	221	/* Select OC2REF as trigger output on TRGO: write the MMS bits in the TIMx_CR2
	222	register to 101 */
	223	htim->Instance->CR2 &= ~TIM_CR2_MMS;
	224	htim->Instance->CR2 \|= TIM_TRGO_OC2REF;
	225
	226	/* Initialize the TIM state*/
	227	htim->State= HAL_TIM_STATE_READY;
	228
	229	return HAL_OK;
	230	}
	231
	232	/**
	233	* @brief DeInitializes the TIM Hall Sensor interface
	234	* @param htim TIM Hall Sensor handle
	235	* @retval HAL status
	236	*/
	237	HAL_StatusTypeDef HAL_TIMEx_HallSensor_DeInit(TIM_HandleTypeDef *htim)
	238	{
	239	/* Check the parameters */
	240	assert_param(IS_TIM_INSTANCE(htim->Instance));
	241
	242	htim->State = HAL_TIM_STATE_BUSY;
	243
	244	/* Disable the TIM Peripheral Clock */
	245	__HAL_TIM_DISABLE(htim);
	246
	247	/* DeInit the low level hardware: GPIO, CLOCK, NVIC */
	248	HAL_TIMEx_HallSensor_MspDeInit(htim);
	249
	250	/* Change TIM state */
	251	htim->State = HAL_TIM_STATE_RESET;
	252
	253	/* Release Lock */
	254	__HAL_UNLOCK(htim);
	255
	256	return HAL_OK;
	257	}
	258
	259	/**
	260	* @brief Initializes the TIM Hall Sensor MSP.
	261	* @param htim TIM handle
	262	* @retval None
	263	*/
	264	__weak void HAL_TIMEx_HallSensor_MspInit(TIM_HandleTypeDef *htim)
	265	{
	266	/* Prevent unused argument(s) compilation warning */
	267	UNUSED(htim);
	268
	269	/* NOTE : This function Should not be modified, when the callback is needed,
	270	the HAL_TIMEx_HallSensor_MspInit could be implemented in the user file
	271	*/
	272	}
	273
	274	/**
	275	* @brief DeInitializes TIM Hall Sensor MSP.
	276	* @param htim TIM handle
	277	* @retval None
	278	*/
	279	__weak void HAL_TIMEx_HallSensor_MspDeInit(TIM_HandleTypeDef *htim)
	280	{
	281	/* Prevent unused argument(s) compilation warning */
	282	UNUSED(htim);
	283
	284	/* NOTE : This function Should not be modified, when the callback is needed,
	285	the HAL_TIMEx_HallSensor_MspDeInit could be implemented in the user file
	286	*/
	287	}
	288
	289	/**
	290	* @brief Starts the TIM Hall Sensor Interface.
	291	* @param htim TIM Hall Sensor handle
	292	* @retval HAL status
	293	*/
	294	HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start(TIM_HandleTypeDef *htim)
	295	{
	296	/* Check the parameters */
	297	assert_param(IS_TIM_HALL_INTERFACE_INSTANCE(htim->Instance));
	298
	299	/* Enable the Input Capture channel 1
	300	(in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */
	301	TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
	302
	303	/* Enable the Peripheral */
	304	__HAL_TIM_ENABLE(htim);
	305
	306	/* Return function status */
	307	return HAL_OK;
	308	}
	309
	310	/**
	311	* @brief Stops the TIM Hall sensor Interface.
	312	* @param htim TIM Hall Sensor handle
	313	* @retval HAL status
	314	*/
	315	HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop(TIM_HandleTypeDef *htim)
	316	{
	317	/* Check the parameters */
	318	assert_param(IS_TIM_HALL_INTERFACE_INSTANCE(htim->Instance));
	319
	320	/* Disable the Input Capture channels 1, 2 and 3
	321	(in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */
	322	TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
	323
	324	/* Disable the Peripheral */
	325	__HAL_TIM_DISABLE(htim);
	326
	327	/* Return function status */
	328	return HAL_OK;
	329	}
	330
	331	/**
	332	* @brief Starts the TIM Hall Sensor Interface in interrupt mode.
	333	* @param htim TIM Hall Sensor handle
	334	* @retval HAL status
	335	*/
	336	HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_IT(TIM_HandleTypeDef *htim)
	337	{
	338	/* Check the parameters */
	339	assert_param(IS_TIM_HALL_INTERFACE_INSTANCE(htim->Instance));
	340
	341	/* Enable the capture compare Interrupts 1 event */
	342	__HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
	343
	344	/* Enable the Input Capture channel 1
	345	(in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */
	346	TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
	347
	348	/* Enable the Peripheral */
	349	__HAL_TIM_ENABLE(htim);
	350
	351	/* Return function status */
	352	return HAL_OK;
	353	}
	354
	355	/**
	356	* @brief Stops the TIM Hall Sensor Interface in interrupt mode.
	357	* @param htim TIM handle
	358	* @retval HAL status
	359	*/
	360	HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_IT(TIM_HandleTypeDef *htim)
	361	{
	362	/* Check the parameters */
	363	assert_param(IS_TIM_HALL_INTERFACE_INSTANCE(htim->Instance));
	364
	365	/* Disable the Input Capture channel 1
	366	(in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */
	367	TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
	368
	369	/* Disable the capture compare Interrupts event */
	370	__HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
	371
	372	/* Disable the Peripheral */
	373	__HAL_TIM_DISABLE(htim);
	374
	375	/* Return function status */
	376	return HAL_OK;
	377	}
	378
	379	/**
	380	* @brief Starts the TIM Hall Sensor Interface in DMA mode.
	381	* @param htim TIM Hall Sensor handle
	382	* @param pData The destination Buffer address.
	383	* @param Length The length of data to be transferred from TIM peripheral to memory.
	384	* @retval HAL status
	385	*/
	386	HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef htim, uint32_t pData, uint16_t Length)
	387	{
	388	/* Check the parameters */
	389	assert_param(IS_TIM_HALL_INTERFACE_INSTANCE(htim->Instance));
	390
	391	if((htim->State == HAL_TIM_STATE_BUSY))
	392	{
	393	return HAL_BUSY;
	394	}
	395	else if((htim->State == HAL_TIM_STATE_READY))
	396	{
	397	if(((uint32_t)pData == 0U ) && (Length > 0U))
	398	{
	399	return HAL_ERROR;
	400	}
	401	else
	402	{
	403	htim->State = HAL_TIM_STATE_BUSY;
	404	}
	405	}
	406	/* Enable the Input Capture channel 1
	407	(in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */
	408	TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
	409
	410	/* Set the DMA Input Capture 1 Callback */
	411	htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMACaptureCplt;
	412	/* Set the DMA error callback */
	413	htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ;
	414
	415	/* Enable the DMA channel for Capture 1*/
	416	HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)&htim->Instance->CCR1, (uint32_t)pData, Length);
	417
	418	/* Enable the capture compare 1 Interrupt */
	419	__HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1);
	420
	421	/* Enable the Peripheral */
	422	__HAL_TIM_ENABLE(htim);
	423
	424	/* Return function status */
	425	return HAL_OK;
	426	}
	427
	428	/**
	429	* @brief Stops the TIM Hall Sensor Interface in DMA mode.
	430	* @param htim TIM handle
	431	* @retval HAL status
	432	*/
	433	HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_DMA(TIM_HandleTypeDef *htim)
	434	{
	435	/* Check the parameters */
	436	assert_param(IS_TIM_HALL_INTERFACE_INSTANCE(htim->Instance));
	437
	438	/* Disable the Input Capture channel 1
	439	(in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */
	440	TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
	441
	442
	443	/* Disable the capture compare Interrupts 1 event */
	444	__HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1);
	445
	446	/* Disable the Peripheral */
	447	__HAL_TIM_DISABLE(htim);
	448
	449	/* Return function status */
	450	return HAL_OK;
	451	}
	452
	453	/**
	454	* @}
	455	*/
	456
	457	/** @defgroup TIMEx_Exported_Functions_Group2 Timer Complementary Output Compare functions
	458	* @brief Timer Complementary Output Compare functions
	459	*
	460	@verbatim
	461	==============================================================================
	462	##### Timer Complementary Output Compare functions #####
	463	==============================================================================
	464	[..]
	465	This section provides functions allowing to:
	466	(+) Start the Complementary Output Compare/PWM.
	467	(+) Stop the Complementary Output Compare/PWM.
	468	(+) Start the Complementary Output Compare/PWM and enable interrupts.
	469	(+) Stop the Complementary Output Compare/PWM and disable interrupts.
	470	(+) Start the Complementary Output Compare/PWM and enable DMA transfers.
	471	(+) Stop the Complementary Output Compare/PWM and disable DMA transfers.
	472
	473	@endverbatim
	474	* @{
	475	*/
	476
	477	/**
	478	* @brief Starts the TIM Output Compare signal generation on the complementary
	479	* output.
	480	* @param htim TIM Output Compare handle
	481	* @param Channel TIM Channel to be enabled
	482	* This parameter can be one of the following values:
	483	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
	484	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
	485	* @arg TIM_CHANNEL_3: TIM Channel 3 selected
	486	* @arg TIM_CHANNEL_4: TIM Channel 4 selected
	487	* @retval HAL status
	488	*/
	489	HAL_StatusTypeDef HAL_TIMEx_OCN_Start(TIM_HandleTypeDef *htim, uint32_t Channel)
	490	{
	491	/* Check the parameters */
	492	assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
	493
	494	/* Enable the Capture compare channel N */
	495	TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
	496
	497	/* Enable the Main Ouput */
	498	__HAL_TIM_MOE_ENABLE(htim);
	499
	500	/* Enable the Peripheral */
	501	__HAL_TIM_ENABLE(htim);
	502
	503	/* Return function status */
	504	return HAL_OK;
	505	}
	506
	507	/**
	508	* @brief Stops the TIM Output Compare signal generation on the complementary
	509	* output.
	510	* @param htim TIM handle
	511	* @param Channel TIM Channel to be disabled
	512	* This parameter can be one of the following values:
	513	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
	514	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
	515	* @arg TIM_CHANNEL_3: TIM Channel 3 selected
	516	* @arg TIM_CHANNEL_4: TIM Channel 4 selected
	517	* @retval HAL status
	518	*/
	519	HAL_StatusTypeDef HAL_TIMEx_OCN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel)
	520	{
	521	/* Check the parameters */
	522	assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
	523
	524	/* Disable the Capture compare channel N */
	525	TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
	526
	527	/* Disable the Main Ouput */
	528	__HAL_TIM_MOE_DISABLE(htim);
	529
	530	/* Disable the Peripheral */
	531	__HAL_TIM_DISABLE(htim);
	532
	533	/* Return function status */
	534	return HAL_OK;
	535	}
	536
	537	/**
	538	* @brief Starts the TIM Output Compare signal generation in interrupt mode
	539	* on the complementary output.
	540	* @param htim TIM OC handle
	541	* @param Channel TIM Channel to be enabled
	542	* This parameter can be one of the following values:
	543	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
	544	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
	545	* @arg TIM_CHANNEL_3: TIM Channel 3 selected
	546	* @arg TIM_CHANNEL_4: TIM Channel 4 selected
	547	* @retval HAL status
	548	*/
	549	HAL_StatusTypeDef HAL_TIMEx_OCN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
	550	{
	551	/* Check the parameters */
	552	assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
	553
	554	switch (Channel)
	555	{
	556	case TIM_CHANNEL_1:
	557	{
	558	/* Enable the TIM Output Compare interrupt */
	559	__HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
	560	}
	561	break;
	562
	563	case TIM_CHANNEL_2:
	564	{
	565	/* Enable the TIM Output Compare interrupt */
	566	__HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);
	567	}
	568	break;
	569
	570	case TIM_CHANNEL_3:
	571	{
	572	/* Enable the TIM Output Compare interrupt */
	573	__HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3);
	574	}
	575	break;
	576
	577	case TIM_CHANNEL_4:
	578	{
	579	/* Enable the TIM Output Compare interrupt */
	580	__HAL_TIM_ENABLE_IT(htim, TIM_IT_CC4);
	581	}
	582	break;
	583
	584	default:
	585	break;
	586	}
	587
	588	/* Enable the TIM Break interrupt */
	589	__HAL_TIM_ENABLE_IT(htim, TIM_IT_BREAK);
	590
	591	/* Enable the Capture compare channel N */
	592	TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
	593
	594	/* Enable the Main Ouput */
	595	__HAL_TIM_MOE_ENABLE(htim);
	596
	597	/* Enable the Peripheral */
	598	__HAL_TIM_ENABLE(htim);
	599
	600	/* Return function status */
	601	return HAL_OK;
	602	}
	603
	604	/**
	605	* @brief Stops the TIM Output Compare signal generation in interrupt mode
	606	* on the complementary output.
	607	* @param htim TIM Output Compare handle
	608	* @param Channel TIM Channel to be disabled
	609	* This parameter can be one of the following values:
	610	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
	611	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
	612	* @arg TIM_CHANNEL_3: TIM Channel 3 selected
	613	* @arg TIM_CHANNEL_4: TIM Channel 4 selected
	614	* @retval HAL status
	615	*/
	616	HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
	617	{
	618	uint32_t tmpccer = 0U;
	619
	620	/* Check the parameters */
	621	assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
	622
	623	switch (Channel)
	624	{
	625	case TIM_CHANNEL_1:
	626	{
	627	/* Disable the TIM Output Compare interrupt */
	628	__HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
	629	}
	630	break;
	631
	632	case TIM_CHANNEL_2:
	633	{
	634	/* Disable the TIM Output Compare interrupt */
	635	__HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
	636	}
	637	break;
	638
	639	case TIM_CHANNEL_3:
	640	{
	641	/* Disable the TIM Output Compare interrupt */
	642	__HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3);
	643	}
	644	break;
	645
	646	case TIM_CHANNEL_4:
	647	{
	648	/* Disable the TIM Output Compare interrupt */
	649	__HAL_TIM_DISABLE_IT(htim, TIM_IT_CC4);
	650	}
	651	break;
	652
	653	default:
	654	break;
	655	}
	656
	657	/* Disable the Capture compare channel N */
	658	TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
	659
	660	/* Disable the TIM Break interrupt (only if no more channel is active) */
	661	tmpccer = htim->Instance->CCER;
	662	if ((tmpccer & (TIM_CCER_CC1NE \| TIM_CCER_CC2NE \| TIM_CCER_CC3NE)) == RESET)
	663	{
	664	__HAL_TIM_DISABLE_IT(htim, TIM_IT_BREAK);
	665	}
	666
	667	/* Disable the Main Ouput */
	668	__HAL_TIM_MOE_DISABLE(htim);
	669
	670	/* Disable the Peripheral */
	671	__HAL_TIM_DISABLE(htim);
	672
	673	/* Return function status */
	674	return HAL_OK;
	675	}
	676
	677	/**
	678	* @brief Starts the TIM Output Compare signal generation in DMA mode
	679	* on the complementary output.
	680	* @param htim TIM Output Compare handle
	681	* @param Channel TIM Channel to be enabled
	682	* This parameter can be one of the following values:
	683	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
	684	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
	685	* @arg TIM_CHANNEL_3: TIM Channel 3 selected
	686	* @arg TIM_CHANNEL_4: TIM Channel 4 selected
	687	* @param pData The source Buffer address.
	688	* @param Length The length of data to be transferred from memory to TIM peripheral
	689	* @retval HAL status
	690	*/
	691	HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef htim, uint32_t Channel, uint32_t pData, uint16_t Length)
	692	{
	693	/* Check the parameters */
	694	assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
	695
	696	if((htim->State == HAL_TIM_STATE_BUSY))
	697	{
	698	return HAL_BUSY;
	699	}
	700	else if((htim->State == HAL_TIM_STATE_READY))
	701	{
	702	if(((uint32_t)pData == 0U ) && (Length > 0U))
	703	{
	704	return HAL_ERROR;
	705	}
	706	else
	707	{
	708	htim->State = HAL_TIM_STATE_BUSY;
	709	}
	710	}
	711	switch (Channel)
	712	{
	713	case TIM_CHANNEL_1:
	714	{
	715	/* Set the DMA Period elapsed callback */
	716	htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMADelayPulseCplt;
	717
	718	/* Set the DMA error callback */
	719	htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ;
	720
	721	/* Enable the DMA channel */
	722	HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance->CCR1, Length);
	723
	724	/* Enable the TIM Output Compare DMA request */
	725	__HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1);
	726	}
	727	break;
	728
	729	case TIM_CHANNEL_2:
	730	{
	731	/* Set the DMA Period elapsed callback */
	732	htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMADelayPulseCplt;
	733
	734	/* Set the DMA error callback */
	735	htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAError ;
	736
	737	/* Enable the DMA channel */
	738	HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance->CCR2, Length);
	739
	740	/* Enable the TIM Output Compare DMA request */
	741	__HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2);
	742	}
	743	break;
	744
	745	case TIM_CHANNEL_3:
	746	{
	747	/* Set the DMA Period elapsed callback */
	748	htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = TIM_DMADelayPulseCplt;
	749
	750	/* Set the DMA error callback */
	751	htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAError ;
	752
	753	/* Enable the DMA channel */
	754	HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance->CCR3,Length);
	755
	756	/* Enable the TIM Output Compare DMA request */
	757	__HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3);
	758	}
	759	break;
	760
	761	case TIM_CHANNEL_4:
	762	{
	763	/* Set the DMA Period elapsed callback */
	764	htim->hdma[TIM_DMA_ID_CC4]->XferCpltCallback = TIM_DMADelayPulseCplt;
	765
	766	/* Set the DMA error callback */
	767	htim->hdma[TIM_DMA_ID_CC4]->XferErrorCallback = TIM_DMAError ;
	768
	769	/* Enable the DMA channel */
	770	HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)pData, (uint32_t)&htim->Instance->CCR4, Length);
	771
	772	/* Enable the TIM Output Compare DMA request */
	773	__HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC4);
	774	}
	775	break;
	776
	777	default:
	778	break;
	779	}
	780
	781	/* Enable the Capture compare channel N */
	782	TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
	783
	784	/* Enable the Main Ouput */
	785	__HAL_TIM_MOE_ENABLE(htim);
	786
	787	/* Enable the Peripheral */
	788	__HAL_TIM_ENABLE(htim);
	789
	790	/* Return function status */
	791	return HAL_OK;
	792	}
	793
	794	/**
	795	* @brief Stops the TIM Output Compare signal generation in DMA mode
	796	* on the complementary output.
	797	* @param htim TIM Output Compare handle
	798	* @param Channel TIM Channel to be disabled
	799	* This parameter can be one of the following values:
	800	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
	801	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
	802	* @arg TIM_CHANNEL_3: TIM Channel 3 selected
	803	* @arg TIM_CHANNEL_4: TIM Channel 4 selected
	804	* @retval HAL status
	805	*/
	806	HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel)
	807	{
	808	/* Check the parameters */
	809	assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
	810
	811	switch (Channel)
	812	{
	813	case TIM_CHANNEL_1:
	814	{
	815	/* Disable the TIM Output Compare DMA request */
	816	__HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1);
	817	}
	818	break;
	819
	820	case TIM_CHANNEL_2:
	821	{
	822	/* Disable the TIM Output Compare DMA request */
	823	__HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2);
	824	}
	825	break;
	826
	827	case TIM_CHANNEL_3:
	828	{
	829	/* Disable the TIM Output Compare DMA request */
	830	__HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3);
	831	}
	832	break;
	833
	834	case TIM_CHANNEL_4:
	835	{
	836	/* Disable the TIM Output Compare interrupt */
	837	__HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC4);
	838	}
	839	break;
	840
	841	default:
	842	break;
	843	}
	844
	845	/* Disable the Capture compare channel N */
	846	TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
	847
	848	/* Disable the Main Ouput */
	849	__HAL_TIM_MOE_DISABLE(htim);
	850
	851	/* Disable the Peripheral */
	852	__HAL_TIM_DISABLE(htim);
	853
	854	/* Change the htim state */
	855	htim->State = HAL_TIM_STATE_READY;
	856
	857	/* Return function status */
	858	return HAL_OK;
	859	}
	860
	861	/**
	862	* @}
	863	*/
	864
	865	/** @defgroup TIMEx_Exported_Functions_Group3 Timer Complementary PWM functions
	866	* @brief Timer Complementary PWM functions
	867	*
	868	@verbatim
	869	==============================================================================
	870	##### Timer Complementary PWM functions #####
	871	==============================================================================
	872	[..]
	873	This section provides functions allowing to:
	874	(+) Start the Complementary PWM.
	875	(+) Stop the Complementary PWM.
	876	(+) Start the Complementary PWM and enable interrupts.
	877	(+) Stop the Complementary PWM and disable interrupts.
	878	(+) Start the Complementary PWM and enable DMA transfers.
	879	(+) Stop the Complementary PWM and disable DMA transfers.
	880	(+) Start the Complementary Input Capture measurement.
	881	(+) Stop the Complementary Input Capture.
	882	(+) Start the Complementary Input Capture and enable interrupts.
	883	(+) Stop the Complementary Input Capture and disable interrupts.
	884	(+) Start the Complementary Input Capture and enable DMA transfers.
	885	(+) Stop the Complementary Input Capture and disable DMA transfers.
	886	(+) Start the Complementary One Pulse generation.
	887	(+) Stop the Complementary One Pulse.
	888	(+) Start the Complementary One Pulse and enable interrupts.
	889	(+) Stop the Complementary One Pulse and disable interrupts.
	890
	891	@endverbatim
	892	* @{
	893	*/
	894
	895	/**
	896	* @brief Starts the PWM signal generation on the complementary output.
	897	* @param htim TIM handle
	898	* @param Channel TIM Channel to be enabled
	899	* This parameter can be one of the following values:
	900	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
	901	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
	902	* @arg TIM_CHANNEL_3: TIM Channel 3 selected
	903	* @arg TIM_CHANNEL_4: TIM Channel 4 selected
	904	* @retval HAL status
	905	*/
	906	HAL_StatusTypeDef HAL_TIMEx_PWMN_Start(TIM_HandleTypeDef *htim, uint32_t Channel)
	907	{
	908	/* Check the parameters */
	909	assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
	910
	911	/* Enable the complementary PWM output */
	912	TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
	913
	914	/* Enable the Main Ouput */
	915	__HAL_TIM_MOE_ENABLE(htim);
	916
	917	/* Enable the Peripheral */
	918	__HAL_TIM_ENABLE(htim);
	919
	920	/* Return function status */
	921	return HAL_OK;
	922	}
	923
	924	/**
	925	* @brief Stops the PWM signal generation on the complementary output.
	926	* @param htim TIM handle
	927	* @param Channel TIM Channel to be disabled
	928	* This parameter can be one of the following values:
	929	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
	930	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
	931	* @arg TIM_CHANNEL_3: TIM Channel 3 selected
	932	* @arg TIM_CHANNEL_4: TIM Channel 4 selected
	933	* @retval HAL status
	934	*/
	935	HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel)
	936	{
	937	/* Check the parameters */
	938	assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
	939
	940	/* Disable the complementary PWM output */
	941	TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
	942
	943	/* Disable the Main Ouput */
	944	__HAL_TIM_MOE_DISABLE(htim);
	945
	946	/* Disable the Peripheral */
	947	__HAL_TIM_DISABLE(htim);
	948
	949	/* Return function status */
	950	return HAL_OK;
	951	}
	952
	953	/**
	954	* @brief Starts the PWM signal generation in interrupt mode on the
	955	* complementary output.
	956	* @param htim TIM handle
	957	* @param Channel TIM Channel to be disabled
	958	* This parameter can be one of the following values:
	959	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
	960	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
	961	* @arg TIM_CHANNEL_3: TIM Channel 3 selected
	962	* @arg TIM_CHANNEL_4: TIM Channel 4 selected
	963	* @retval HAL status
	964	*/
	965	HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
	966	{
	967	/* Check the parameters */
	968	assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
	969
	970	switch (Channel)
	971	{
	972	case TIM_CHANNEL_1:
	973	{
	974	/* Enable the TIM Capture/Compare 1 interrupt */
	975	__HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
	976	}
	977	break;
	978
	979	case TIM_CHANNEL_2:
	980	{
	981	/* Enable the TIM Capture/Compare 2 interrupt */
	982	__HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);
	983	}
	984	break;
	985
	986	case TIM_CHANNEL_3:
	987	{
	988	/* Enable the TIM Capture/Compare 3 interrupt */
	989	__HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3);
	990	}
	991	break;
	992
	993	case TIM_CHANNEL_4:
	994	{
	995	/* Enable the TIM Capture/Compare 4 interrupt */
	996	__HAL_TIM_ENABLE_IT(htim, TIM_IT_CC4);
	997	}
	998	break;
	999
	1000	default:
	1001	break;
	1002	}
	1003
	1004	/* Enable the TIM Break interrupt */
	1005	__HAL_TIM_ENABLE_IT(htim, TIM_IT_BREAK);
	1006
	1007	/* Enable the complementary PWM output */
	1008	TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
	1009
	1010	/* Enable the Main Ouput */
	1011	__HAL_TIM_MOE_ENABLE(htim);
	1012
	1013	/* Enable the Peripheral */
	1014	__HAL_TIM_ENABLE(htim);
	1015
	1016	/* Return function status */
	1017	return HAL_OK;
	1018	}
	1019
	1020	/**
	1021	* @brief Stops the PWM signal generation in interrupt mode on the
	1022	* complementary output.
	1023	* @param htim TIM handle
	1024	* @param Channel TIM Channel to be disabled
	1025	* This parameter can be one of the following values:
	1026	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
	1027	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
	1028	* @arg TIM_CHANNEL_3: TIM Channel 3 selected
	1029	* @arg TIM_CHANNEL_4: TIM Channel 4 selected
	1030	* @retval HAL status
	1031	*/
	1032	HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_IT (TIM_HandleTypeDef *htim, uint32_t Channel)
	1033	{
	1034	uint32_t tmpccer = 0U;
	1035
	1036	/* Check the parameters */
	1037	assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
	1038
	1039	switch (Channel)
	1040	{
	1041	case TIM_CHANNEL_1:
	1042	{
	1043	/* Disable the TIM Capture/Compare 1 interrupt */
	1044	__HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
	1045	}
	1046	break;
	1047
	1048	case TIM_CHANNEL_2:
	1049	{
	1050	/* Disable the TIM Capture/Compare 2 interrupt */
	1051	__HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
	1052	}
	1053	break;
	1054
	1055	case TIM_CHANNEL_3:
	1056	{
	1057	/* Disable the TIM Capture/Compare 3 interrupt */
	1058	__HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3);
	1059	}
	1060	break;
	1061
	1062	case TIM_CHANNEL_4:
	1063	{
	1064	/* Disable the TIM Capture/Compare 3 interrupt */
	1065	__HAL_TIM_DISABLE_IT(htim, TIM_IT_CC4);
	1066	}
	1067	break;
	1068
	1069	default:
	1070	break;
	1071	}
	1072
	1073	/* Disable the complementary PWM output */
	1074	TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
	1075
	1076	/* Disable the TIM Break interrupt (only if no more channel is active) */
	1077	tmpccer = htim->Instance->CCER;
	1078	if ((tmpccer & (TIM_CCER_CC1NE \| TIM_CCER_CC2NE \| TIM_CCER_CC3NE)) == RESET)
	1079	{
	1080	__HAL_TIM_DISABLE_IT(htim, TIM_IT_BREAK);
	1081	}
	1082
	1083	/* Disable the Main Ouput */
	1084	__HAL_TIM_MOE_DISABLE(htim);
	1085
	1086	/* Disable the Peripheral */
	1087	__HAL_TIM_DISABLE(htim);
	1088
	1089	/* Return function status */
	1090	return HAL_OK;
	1091	}
	1092
	1093	/**
	1094	* @brief Starts the TIM PWM signal generation in DMA mode on the
	1095	* complementary output
	1096	* @param htim TIM handle
	1097	* @param Channel TIM Channel to be enabled
	1098	* This parameter can be one of the following values:
	1099	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
	1100	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
	1101	* @arg TIM_CHANNEL_3: TIM Channel 3 selected
	1102	* @arg TIM_CHANNEL_4: TIM Channel 4 selected
	1103	* @param pData The source Buffer address.
	1104	* @param Length The length of data to be transferred from memory to TIM peripheral
	1105	* @retval HAL status
	1106	*/
	1107	HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef htim, uint32_t Channel, uint32_t pData, uint16_t Length)
	1108	{
	1109	/* Check the parameters */
	1110	assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
	1111
	1112	if((htim->State == HAL_TIM_STATE_BUSY))
	1113	{
	1114	return HAL_BUSY;
	1115	}
	1116	else if((htim->State == HAL_TIM_STATE_READY))
	1117	{
	1118	if(((uint32_t)pData == 0U ) && (Length > 0U))
	1119	{
	1120	return HAL_ERROR;
	1121	}
	1122	else
	1123	{
	1124	htim->State = HAL_TIM_STATE_BUSY;
	1125	}
	1126	}
	1127	switch (Channel)
	1128	{
	1129	case TIM_CHANNEL_1:
	1130	{
	1131	/* Set the DMA Period elapsed callback */
	1132	htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMADelayPulseCplt;
	1133
	1134	/* Set the DMA error callback */
	1135	htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ;
	1136
	1137	/* Enable the DMA channel */
	1138	HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance->CCR1, Length);
	1139
	1140	/* Enable the TIM Capture/Compare 1 DMA request */
	1141	__HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1);
	1142	}
	1143	break;
	1144
	1145	case TIM_CHANNEL_2:
	1146	{
	1147	/* Set the DMA Period elapsed callback */
	1148	htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMADelayPulseCplt;
	1149
	1150	/* Set the DMA error callback */
	1151	htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAError ;
	1152
	1153	/* Enable the DMA channel */
	1154	HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance->CCR2, Length);
	1155
	1156	/* Enable the TIM Capture/Compare 2 DMA request */
	1157	__HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2);
	1158	}
	1159	break;
	1160
	1161	case TIM_CHANNEL_3:
	1162	{
	1163	/* Set the DMA Period elapsed callback */
	1164	htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = TIM_DMADelayPulseCplt;
	1165
	1166	/* Set the DMA error callback */
	1167	htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAError ;
	1168
	1169	/* Enable the DMA channel */
	1170	HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance->CCR3,Length);
	1171
	1172	/* Enable the TIM Capture/Compare 3 DMA request */
	1173	__HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3);
	1174	}
	1175	break;
	1176
	1177	case TIM_CHANNEL_4:
	1178	{
	1179	/* Set the DMA Period elapsed callback */
	1180	htim->hdma[TIM_DMA_ID_CC4]->XferCpltCallback = TIM_DMADelayPulseCplt;
	1181
	1182	/* Set the DMA error callback */
	1183	htim->hdma[TIM_DMA_ID_CC4]->XferErrorCallback = TIM_DMAError ;
	1184
	1185	/* Enable the DMA channel */
	1186	HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)pData, (uint32_t)&htim->Instance->CCR4, Length);
	1187
	1188	/* Enable the TIM Capture/Compare 4 DMA request */
	1189	__HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC4);
	1190	}
	1191	break;
	1192
	1193	default:
	1194	break;
	1195	}
	1196
	1197	/* Enable the complementary PWM output */
	1198	TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
	1199
	1200	/* Enable the Main Ouput */
	1201	__HAL_TIM_MOE_ENABLE(htim);
	1202
	1203	/* Enable the Peripheral */
	1204	__HAL_TIM_ENABLE(htim);
	1205
	1206	/* Return function status */
	1207	return HAL_OK;
	1208	}
	1209
	1210	/**
	1211	* @brief Stops the TIM PWM signal generation in DMA mode on the complementary
	1212	* output
	1213	* @param htim TIM handle
	1214	* @param Channel TIM Channel to be disabled
	1215	* This parameter can be one of the following values:
	1216	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
	1217	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
	1218	* @arg TIM_CHANNEL_3: TIM Channel 3 selected
	1219	* @arg TIM_CHANNEL_4: TIM Channel 4 selected
	1220	* @retval HAL status
	1221	*/
	1222	HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel)
	1223	{
	1224	/* Check the parameters */
	1225	assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
	1226
	1227	switch (Channel)
	1228	{
	1229	case TIM_CHANNEL_1:
	1230	{
	1231	/* Disable the TIM Capture/Compare 1 DMA request */
	1232	__HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1);
	1233	}
	1234	break;
	1235
	1236	case TIM_CHANNEL_2:
	1237	{
	1238	/* Disable the TIM Capture/Compare 2 DMA request */
	1239	__HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2);
	1240	}
	1241	break;
	1242
	1243	case TIM_CHANNEL_3:
	1244	{
	1245	/* Disable the TIM Capture/Compare 3 DMA request */
	1246	__HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3);
	1247	}
	1248	break;
	1249
	1250	case TIM_CHANNEL_4:
	1251	{
	1252	/* Disable the TIM Capture/Compare 4 DMA request */
	1253	__HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC4);
	1254	}
	1255	break;
	1256
	1257	default:
	1258	break;
	1259	}
	1260
	1261	/* Disable the complementary PWM output */
	1262	TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
	1263
	1264	/* Disable the Main Ouput */
	1265	__HAL_TIM_MOE_DISABLE(htim);
	1266
	1267	/* Disable the Peripheral */
	1268	__HAL_TIM_DISABLE(htim);
	1269
	1270	/* Change the htim state */
	1271	htim->State = HAL_TIM_STATE_READY;
	1272
	1273	/* Return function status */
	1274	return HAL_OK;
	1275	}
	1276
	1277	/**
	1278	* @}
	1279	*/
	1280
	1281	/** @defgroup TIMEx_Exported_Functions_Group4 Timer Complementary One Pulse functions
	1282	* @brief Timer Complementary One Pulse functions
	1283	*
	1284	@verbatim
	1285	==============================================================================
	1286	##### Timer Complementary One Pulse functions #####
	1287	==============================================================================
	1288	[..]
	1289	This section provides functions allowing to:
	1290	(+) Start the Complementary One Pulse generation.
	1291	(+) Stop the Complementary One Pulse.
	1292	(+) Start the Complementary One Pulse and enable interrupts.
	1293	(+) Stop the Complementary One Pulse and disable interrupts.
	1294
	1295	@endverbatim
	1296	* @{
	1297	*/
	1298
	1299	/**
	1300	* @brief Starts the TIM One Pulse signal generation on the complemetary
	1301	* output.
	1302	* @param htim TIM One Pulse handle
	1303	* @param OutputChannel TIM Channel to be enabled
	1304	* This parameter can be one of the following values:
	1305	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
	1306	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
	1307	* @retval HAL status
	1308	*/
	1309	HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
	1310	{
	1311	/* Check the parameters */
	1312	assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel));
	1313
	1314	/* Enable the complementary One Pulse output */
	1315	TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_ENABLE);
	1316
	1317	/* Enable the Main Ouput */
	1318	__HAL_TIM_MOE_ENABLE(htim);
	1319
	1320	/* Return function status */
	1321	return HAL_OK;
	1322	}
	1323
	1324	/**
	1325	* @brief Stops the TIM One Pulse signal generation on the complementary
	1326	* output.
	1327	* @param htim TIM One Pulse handle
	1328	* @param OutputChannel TIM Channel to be disabled
	1329	* This parameter can be one of the following values:
	1330	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
	1331	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
	1332	* @retval HAL status
	1333	*/
	1334	HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
	1335	{
	1336
	1337	/* Check the parameters */
	1338	assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel));
	1339
	1340	/* Disable the complementary One Pulse output */
	1341	TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_DISABLE);
	1342
	1343	/* Disable the Main Ouput */
	1344	__HAL_TIM_MOE_DISABLE(htim);
	1345
	1346	/* Disable the Peripheral */
	1347	__HAL_TIM_DISABLE(htim);
	1348
	1349	/* Return function status */
	1350	return HAL_OK;
	1351	}
	1352
	1353	/**
	1354	* @brief Starts the TIM One Pulse signal generation in interrupt mode on the
	1355	* complementary channel.
	1356	* @param htim TIM One Pulse handle
	1357	* @param OutputChannel TIM Channel to be enabled
	1358	* This parameter can be one of the following values:
	1359	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
	1360	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
	1361	* @retval HAL status
	1362	*/
	1363	HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
	1364	{
	1365	/* Check the parameters */
	1366	assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel));
	1367
	1368	/* Enable the TIM Capture/Compare 1 interrupt */
	1369	__HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
	1370
	1371	/* Enable the TIM Capture/Compare 2 interrupt */
	1372	__HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);
	1373
	1374	/* Enable the complementary One Pulse output */
	1375	TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_ENABLE);
	1376
	1377	/* Enable the Main Ouput */
	1378	__HAL_TIM_MOE_ENABLE(htim);
	1379
	1380	/* Return function status */
	1381	return HAL_OK;
	1382	}
	1383
	1384	/**
	1385	* @brief Stops the TIM One Pulse signal generation in interrupt mode on the
	1386	* complementary channel.
	1387	* @param htim TIM One Pulse handle
	1388	* @param OutputChannel TIM Channel to be disabled
	1389	* This parameter can be one of the following values:
	1390	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
	1391	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
	1392	* @retval HAL status
	1393	*/
	1394	HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
	1395	{
	1396	/* Check the parameters */
	1397	assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel));
	1398
	1399	/* Disable the TIM Capture/Compare 1 interrupt */
	1400	__HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
	1401
	1402	/* Disable the TIM Capture/Compare 2 interrupt */
	1403	__HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
	1404
	1405	/* Disable the complementary One Pulse output */
	1406	TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_DISABLE);
	1407
	1408	/* Disable the Main Ouput */
	1409	__HAL_TIM_MOE_DISABLE(htim);
	1410
	1411	/* Disable the Peripheral */
	1412	__HAL_TIM_DISABLE(htim);
	1413
	1414	/* Return function status */
	1415	return HAL_OK;
	1416	}
	1417
	1418	/**
	1419	* @}
	1420	*/
	1421	/** @defgroup TIMEx_Exported_Functions_Group5 Peripheral Control functions
	1422	* @brief Peripheral Control functions
	1423	*
	1424	@verbatim
	1425	==============================================================================
	1426	##### Peripheral Control functions #####
	1427	==============================================================================
	1428	[..]
	1429	This section provides functions allowing to:
	1430	(+) Configure the commutation event in case of use of the Hall sensor interface.
	1431	(+) Configure Complementary channels, break features and dead time.
	1432	(+) Configure Master synchronization.
	1433	(+) Configure timer remapping capabilities.
	1434
	1435	@endverbatim
	1436	* @{
	1437	*/
	1438	/**
	1439	* @brief Configure the TIM commutation event sequence.
	1440	* @note: this function is mandatory to use the commutation event in order to
	1441	* update the configuration at each commutation detection on the TRGI input of the Timer,
	1442	* the typical use of this feature is with the use of another Timer(interface Timer)
	1443	* configured in Hall sensor interface, this interface Timer will generate the
	1444	* commutation at its TRGO output (connected to Timer used in this function) each time
	1445	* the TI1 of the Interface Timer detect a commutation at its input TI1.
	1446	* @param htim TIM handle
	1447	* @param InputTrigger the Internal trigger corresponding to the Timer Interfacing with the Hall sensor
	1448	* This parameter can be one of the following values:
	1449	* @arg TIM_TS_ITR0: Internal trigger 0 selected
	1450	* @arg TIM_TS_ITR1: Internal trigger 1 selected
	1451	* @arg TIM_TS_ITR2: Internal trigger 2 selected
	1452	* @arg TIM_TS_ITR3: Internal trigger 3 selected
	1453	* @arg TIM_TS_NONE: No trigger is needed
	1454	* @param CommutationSource the Commutation Event source
	1455	* This parameter can be one of the following values:
	1456	* @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer
	1457	* @arg TIM_COMMUTATION_SOFTWARE: Commutation source is set by software using the COMG bit
	1458	* @retval HAL status
	1459	*/
	1460	HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent(TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource)
	1461	{
	1462	/* Check the parameters */
	1463	assert_param(IS_TIM_COMMUTATION_EVENT_INSTANCE(htim->Instance));
	1464	assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger));
	1465
	1466	__HAL_LOCK(htim);
	1467
	1468	if ((InputTrigger == TIM_TS_ITR0) \|\| (InputTrigger == TIM_TS_ITR1) \|\|
	1469	(InputTrigger == TIM_TS_ITR2) \|\| (InputTrigger == TIM_TS_ITR3))
	1470	{
	1471	/* Select the Input trigger */
	1472	htim->Instance->SMCR &= ~TIM_SMCR_TS;
	1473	htim->Instance->SMCR \|= InputTrigger;
	1474	}
	1475
	1476	/* Select the Capture Compare preload feature */
	1477	htim->Instance->CR2 \|= TIM_CR2_CCPC;
	1478	/* Select the Commutation event source */
	1479	htim->Instance->CR2 &= ~TIM_CR2_CCUS;
	1480	htim->Instance->CR2 \|= CommutationSource;
	1481
	1482	__HAL_UNLOCK(htim);
	1483
	1484	return HAL_OK;
	1485	}
	1486
	1487	/**
	1488	* @brief Configure the TIM commutation event sequence with interrupt.
	1489	* @note: this function is mandatory to use the commutation event in order to
	1490	* update the configuration at each commutation detection on the TRGI input of the Timer,
	1491	* the typical use of this feature is with the use of another Timer(interface Timer)
	1492	* configured in Hall sensor interface, this interface Timer will generate the
	1493	* commutation at its TRGO output (connected to Timer used in this function) each time
	1494	* the TI1 of the Interface Timer detect a commutation at its input TI1.
	1495	* @param htim TIM handle
	1496	* @param InputTrigger the Internal trigger corresponding to the Timer Interfacing with the Hall sensor
	1497	* This parameter can be one of the following values:
	1498	* @arg TIM_TS_ITR0: Internal trigger 0 selected
	1499	* @arg TIM_TS_ITR1: Internal trigger 1 selected
	1500	* @arg TIM_TS_ITR2: Internal trigger 2 selected
	1501	* @arg TIM_TS_ITR3: Internal trigger 3 selected
	1502	* @arg TIM_TS_NONE: No trigger is needed
	1503	* @param CommutationSource the Commutation Event source
	1504	* This parameter can be one of the following values:
	1505	* @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer
	1506	* @arg TIM_COMMUTATION_SOFTWARE: Commutation source is set by software using the COMG bit
	1507	* @retval HAL status
	1508	*/
	1509	HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent_IT(TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource)
	1510	{
	1511	/* Check the parameters */
	1512	assert_param(IS_TIM_COMMUTATION_EVENT_INSTANCE(htim->Instance));
	1513	assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger));
	1514
	1515	__HAL_LOCK(htim);
	1516
	1517	if ((InputTrigger == TIM_TS_ITR0) \|\| (InputTrigger == TIM_TS_ITR1) \|\|
	1518	(InputTrigger == TIM_TS_ITR2) \|\| (InputTrigger == TIM_TS_ITR3))
	1519	{
	1520	/* Select the Input trigger */
	1521	htim->Instance->SMCR &= ~TIM_SMCR_TS;
	1522	htim->Instance->SMCR \|= InputTrigger;
	1523	}
	1524
	1525	/* Select the Capture Compare preload feature */
	1526	htim->Instance->CR2 \|= TIM_CR2_CCPC;
	1527	/* Select the Commutation event source */
	1528	htim->Instance->CR2 &= ~TIM_CR2_CCUS;
	1529	htim->Instance->CR2 \|= CommutationSource;
	1530
	1531	/* Enable the Commutation Interrupt Request */
	1532	__HAL_TIM_ENABLE_IT(htim, TIM_IT_COM);
	1533
	1534	__HAL_UNLOCK(htim);
	1535
	1536	return HAL_OK;
	1537	}
	1538
	1539	/**
	1540	* @brief Configure the TIM commutation event sequence with DMA.
	1541	* @note: this function is mandatory to use the commutation event in order to
	1542	* update the configuration at each commutation detection on the TRGI input of the Timer,
	1543	* the typical use of this feature is with the use of another Timer(interface Timer)
	1544	* configured in Hall sensor interface, this interface Timer will generate the
	1545	* commutation at its TRGO output (connected to Timer used in this function) each time
	1546	* the TI1 of the Interface Timer detect a commutation at its input TI1.
	1547	* @note: The user should configure the DMA in his own software, in This function only the COMDE bit is set
	1548	* @param htim TIM handle
	1549	* @param InputTrigger the Internal trigger corresponding to the Timer Interfacing with the Hall sensor
	1550	* This parameter can be one of the following values:
	1551	* @arg TIM_TS_ITR0: Internal trigger 0 selected
	1552	* @arg TIM_TS_ITR1: Internal trigger 1 selected
	1553	* @arg TIM_TS_ITR2: Internal trigger 2 selected
	1554	* @arg TIM_TS_ITR3: Internal trigger 3 selected
	1555	* @arg TIM_TS_NONE: No trigger is needed
	1556	* @param CommutationSource the Commutation Event source
	1557	* This parameter can be one of the following values:
	1558	* @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer
	1559	* @arg TIM_COMMUTATION_SOFTWARE: Commutation source is set by software using the COMG bit
	1560	* @retval HAL status
	1561	*/
	1562	HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent_DMA(TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource)
	1563	{
	1564	/* Check the parameters */
	1565	assert_param(IS_TIM_COMMUTATION_EVENT_INSTANCE(htim->Instance));
	1566	assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger));
	1567
	1568	__HAL_LOCK(htim);
	1569
	1570	if ((InputTrigger == TIM_TS_ITR0) \|\| (InputTrigger == TIM_TS_ITR1) \|\|
	1571	(InputTrigger == TIM_TS_ITR2) \|\| (InputTrigger == TIM_TS_ITR3))
	1572	{
	1573	/* Select the Input trigger */
	1574	htim->Instance->SMCR &= ~TIM_SMCR_TS;
	1575	htim->Instance->SMCR \|= InputTrigger;
	1576	}
	1577
	1578	/* Select the Capture Compare preload feature */
	1579	htim->Instance->CR2 \|= TIM_CR2_CCPC;
	1580	/* Select the Commutation event source */
	1581	htim->Instance->CR2 &= ~TIM_CR2_CCUS;
	1582	htim->Instance->CR2 \|= CommutationSource;
	1583
	1584	/* Enable the Commutation DMA Request */
	1585	/* Set the DMA Commutation Callback */
	1586	htim->hdma[TIM_DMA_ID_COMMUTATION]->XferCpltCallback = TIMEx_DMACommutationCplt;
	1587	/* Set the DMA error callback */
	1588	htim->hdma[TIM_DMA_ID_COMMUTATION]->XferErrorCallback = TIM_DMAError;
	1589
	1590	/* Enable the Commutation DMA Request */
	1591	__HAL_TIM_ENABLE_DMA(htim, TIM_DMA_COM);
	1592
	1593	__HAL_UNLOCK(htim);
	1594
	1595	return HAL_OK;
	1596	}
	1597
	1598	/**
	1599	* @brief Configures the TIM in master mode.
	1600	* @param htim TIM handle.
	1601	* @param sMasterConfig pointer to a TIM_MasterConfigTypeDef structure that
	1602	* contains the selected trigger output (TRGO) and the Master/Slave
	1603	* mode.
	1604	* @retval HAL status
	1605	*/
	1606	HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef htim, TIM_MasterConfigTypeDef sMasterConfig)
	1607	{
	1608	/* Check the parameters */
	1609	assert_param(IS_TIM_MASTER_INSTANCE(htim->Instance));
	1610	assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger));
	1611	assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode));
	1612
	1613	__HAL_LOCK(htim);
	1614
	1615	htim->State = HAL_TIM_STATE_BUSY;
	1616
	1617	/* Reset the MMS Bits */
	1618	htim->Instance->CR2 &= ~TIM_CR2_MMS;
	1619	/* Select the TRGO source */
	1620	htim->Instance->CR2 \|= sMasterConfig->MasterOutputTrigger;
	1621
	1622	/* Reset the MSM Bit */
	1623	htim->Instance->SMCR &= ~TIM_SMCR_MSM;
	1624	/* Set or Reset the MSM Bit */
	1625	htim->Instance->SMCR \|= sMasterConfig->MasterSlaveMode;
	1626
	1627	htim->State = HAL_TIM_STATE_READY;
	1628
	1629	__HAL_UNLOCK(htim);
	1630
	1631	return HAL_OK;
	1632	}
	1633
	1634	/**
	1635	* @brief Configures the Break feature, dead time, Lock level, OSSI/OSSR State
	1636	* and the AOE(automatic output enable).
	1637	* @param htim TIM handle
	1638	* @param sBreakDeadTimeConfig pointer to a TIM_ConfigBreakDeadConfigTypeDef structure that
	1639	* contains the BDTR Register configuration information for the TIM peripheral.
	1640	* @retval HAL status
	1641	*/
	1642	HAL_StatusTypeDef HAL_TIMEx_ConfigBreakDeadTime(TIM_HandleTypeDef *htim,
	1643	TIM_BreakDeadTimeConfigTypeDef *sBreakDeadTimeConfig)
	1644	{
	1645	uint32_t tmpbdtr = 0;
	1646
	1647	/* Check the parameters */
	1648	assert_param(IS_TIM_BREAK_INSTANCE(htim->Instance));
	1649	assert_param(IS_TIM_OSSR_STATE(sBreakDeadTimeConfig->OffStateRunMode));
	1650	assert_param(IS_TIM_OSSI_STATE(sBreakDeadTimeConfig->OffStateIDLEMode));
	1651	assert_param(IS_TIM_LOCK_LEVEL(sBreakDeadTimeConfig->LockLevel));
	1652	assert_param(IS_TIM_DEADTIME(sBreakDeadTimeConfig->DeadTime));
	1653	assert_param(IS_TIM_BREAK_STATE(sBreakDeadTimeConfig->BreakState));
	1654	assert_param(IS_TIM_BREAK_POLARITY(sBreakDeadTimeConfig->BreakPolarity));
	1655	assert_param(IS_TIM_AUTOMATIC_OUTPUT_STATE(sBreakDeadTimeConfig->AutomaticOutput));
	1656
	1657	/* Process Locked */
	1658	__HAL_LOCK(htim);
	1659
	1660	htim->State = HAL_TIM_STATE_BUSY;
	1661
	1662	/* Set the Lock level, the Break enable Bit and the Polarity, the OSSR State,
	1663	the OSSI State, the dead time value and the Automatic Output Enable Bit */
	1664
	1665	/* Set the BDTR bits */
	1666	MODIFY_REG(tmpbdtr, TIM_BDTR_DTG, sBreakDeadTimeConfig->DeadTime);
	1667	MODIFY_REG(tmpbdtr, TIM_BDTR_LOCK, sBreakDeadTimeConfig->LockLevel);
	1668	MODIFY_REG(tmpbdtr, TIM_BDTR_OSSI, sBreakDeadTimeConfig->OffStateIDLEMode);
	1669	MODIFY_REG(tmpbdtr, TIM_BDTR_OSSR, sBreakDeadTimeConfig->OffStateRunMode);
	1670	MODIFY_REG(tmpbdtr, TIM_BDTR_BKE, sBreakDeadTimeConfig->BreakState);
	1671	MODIFY_REG(tmpbdtr, TIM_BDTR_BKP, sBreakDeadTimeConfig->BreakPolarity);
	1672	MODIFY_REG(tmpbdtr, TIM_BDTR_AOE, sBreakDeadTimeConfig->AutomaticOutput);
	1673	MODIFY_REG(tmpbdtr, TIM_BDTR_MOE, sBreakDeadTimeConfig->AutomaticOutput);
	1674
	1675	/* Set TIMx_BDTR */
	1676	htim->Instance->BDTR = tmpbdtr;
	1677
	1678	htim->State = HAL_TIM_STATE_READY;
	1679
	1680	__HAL_UNLOCK(htim);
	1681
	1682	return HAL_OK;
	1683	}
	1684
	1685	/**
	1686	* @brief Configures the TIM14 Remapping input capabilities.
	1687	* @param htim TIM handle.
	1688	* @param Remap specifies the TIM remapping source.
	1689	* This parameter can be one of the following values:
	1690	* @arg TIM_TIM14_GPIO: TIM14 TI1 is connected to GPIO
	1691	* @arg TIM_TIM14_RTC: TIM14 TI1 is connected to RTC_clock
	1692	* @arg TIM_TIM14_HSE: TIM14 TI1 is connected to HSE/32
	1693	* @arg TIM_TIM14_MCO: TIM14 TI1 is connected to MCO
	1694	* @retval HAL status
	1695	*/
	1696	HAL_StatusTypeDef HAL_TIMEx_RemapConfig(TIM_HandleTypeDef *htim, uint32_t Remap)
	1697	{
	1698	__HAL_LOCK(htim);
	1699
	1700	/* Check parameters */
	1701	assert_param(IS_TIM_REMAP_INSTANCE(htim->Instance));
	1702	assert_param(IS_TIM_REMAP(Remap));
	1703
	1704	/* Set the Timer remapping configuration */
	1705	htim->Instance->OR = Remap;
	1706
	1707	htim->State = HAL_TIM_STATE_READY;
	1708
	1709	__HAL_UNLOCK(htim);
	1710
	1711	return HAL_OK;
	1712	}
	1713
	1714	/**
	1715	* @}
	1716	*/
	1717
	1718	/** @addtogroup TIM_Exported_Functions_Group8
	1719	* @{
	1720	*/
	1721	#if defined(STM32F051x8) \|\| defined(STM32F058xx) \|\| \
	1722	defined(STM32F071xB) \|\| defined(STM32F072xB) \|\| defined(STM32F078xx) \|\| \
	1723	defined(STM32F091xC) \|\| defined (STM32F098xx)
	1724	/**
	1725	* @brief Configures the OCRef clear feature
	1726	* @param htim TIM handle
	1727	* @param sClearInputConfig pointer to a TIM_ClearInputConfigTypeDef structure that
	1728	* contains the OCREF clear feature and parameters for the TIM peripheral.
	1729	* @param Channel specifies the TIM Channel
	1730	* This parameter can be one of the following values:
	1731	* @arg TIM_CHANNEL_1: TIM Channel 1
	1732	* @arg TIM_CHANNEL_2: TIM Channel 2
	1733	* @arg TIM_CHANNEL_3: TIM Channel 3
	1734	* @arg TIM_CHANNEL_4: TIM Channel 4
	1735	* @arg TIM_Channel_5: TIM Channel 5
	1736	* @retval None
	1737	*/
	1738	HAL_StatusTypeDef HAL_TIM_ConfigOCrefClear(TIM_HandleTypeDef *htim,
	1739	TIM_ClearInputConfigTypeDef *sClearInputConfig,
	1740	uint32_t Channel)
	1741	{
	1742	uint32_t tmpsmcr = 0U;
	1743
	1744	/* Check the parameters */
	1745	assert_param(IS_TIM_OCXREF_CLEAR_INSTANCE(htim->Instance));
	1746	assert_param(IS_TIM_CLEARINPUT_SOURCE(sClearInputConfig->ClearInputSource));
	1747
	1748	/* Check input state */
	1749	__HAL_LOCK(htim);
	1750
	1751	htim->State = HAL_TIM_STATE_BUSY;
	1752
	1753	switch (sClearInputConfig->ClearInputSource)
	1754	{
	1755	case TIM_CLEARINPUTSOURCE_NONE:
	1756	{
	1757	/* Get the TIMx SMCR register value */
	1758	tmpsmcr = htim->Instance->SMCR;
	1759
	1760	/* Clear the OCREF clear selection bit */
	1761	tmpsmcr &= ~TIM_SMCR_OCCS;
	1762
	1763	/* Clear the ETR Bits */
	1764	tmpsmcr &= ~(TIM_SMCR_ETF \| TIM_SMCR_ETPS \| TIM_SMCR_ECE \| TIM_SMCR_ETP);
	1765
	1766	/* Set TIMx_SMCR */
	1767	htim->Instance->SMCR = tmpsmcr;
	1768	}
	1769	break;
	1770
	1771	case TIM_CLEARINPUTSOURCE_OCREFCLR:
	1772	{
	1773	/* Clear the OCREF clear selection bit */
	1774	htim->Instance->SMCR &= ~TIM_SMCR_OCCS;
	1775	}
	1776	break;
	1777
	1778	case TIM_CLEARINPUTSOURCE_ETR:
	1779	{
	1780	/* Check the parameters */
	1781	assert_param(IS_TIM_CLEARINPUT_POLARITY(sClearInputConfig->ClearInputPolarity));
	1782	assert_param(IS_TIM_CLEARINPUT_PRESCALER(sClearInputConfig->ClearInputPrescaler));
	1783	assert_param(IS_TIM_CLEARINPUT_FILTER(sClearInputConfig->ClearInputFilter));
	1784
	1785	TIM_ETR_SetConfig(htim->Instance,
	1786	sClearInputConfig->ClearInputPrescaler,
	1787	sClearInputConfig->ClearInputPolarity,
	1788	sClearInputConfig->ClearInputFilter);
	1789
	1790	/* Set the OCREF clear selection bit */
	1791	htim->Instance->SMCR \|= TIM_SMCR_OCCS;
	1792	}
	1793	break;
	1794	default:
	1795	break;
	1796	}
	1797
	1798	switch (Channel)
	1799	{
	1800	case TIM_CHANNEL_1:
	1801	{
	1802	if(sClearInputConfig->ClearInputState != RESET)
	1803	{
	1804	/* Enable the Ocref clear feature for Channel 1 */
	1805	htim->Instance->CCMR1 \|= TIM_CCMR1_OC1CE;
	1806	}
	1807	else
	1808	{
	1809	/* Disable the Ocref clear feature for Channel 1 */
	1810	htim->Instance->CCMR1 &= ~TIM_CCMR1_OC1CE;
	1811	}
	1812	}
	1813	break;
	1814	case TIM_CHANNEL_2:
	1815	{
	1816	if(sClearInputConfig->ClearInputState != RESET)
	1817	{
	1818	/* Enable the Ocref clear feature for Channel 2 */
	1819	htim->Instance->CCMR1 \|= TIM_CCMR1_OC2CE;
	1820	}
	1821	else
	1822	{
	1823	/* Disable the Ocref clear feature for Channel 2 */
	1824	htim->Instance->CCMR1 &= ~TIM_CCMR1_OC2CE;
	1825	}
	1826	}
	1827	break;
	1828	case TIM_CHANNEL_3:
	1829	{
	1830	if(sClearInputConfig->ClearInputState != RESET)
	1831	{
	1832	/* Enable the Ocref clear feature for Channel 3 */
	1833	htim->Instance->CCMR2 \|= TIM_CCMR2_OC3CE;
	1834	}
	1835	else
	1836	{
	1837	/* Disable the Ocref clear feature for Channel 3 */
	1838	htim->Instance->CCMR2 &= ~TIM_CCMR2_OC3CE;
	1839	}
	1840	}
	1841	break;
	1842	case TIM_CHANNEL_4:
	1843	{
	1844	if(sClearInputConfig->ClearInputState != RESET)
	1845	{
	1846	/* Enable the Ocref clear feature for Channel 4 */
	1847	htim->Instance->CCMR2 \|= TIM_CCMR2_OC4CE;
	1848	}
	1849	else
	1850	{
	1851	/* Disable the Ocref clear feature for Channel 4 */
	1852	htim->Instance->CCMR2 &= ~TIM_CCMR2_OC4CE;
	1853	}
	1854	}
	1855	break;
	1856	default:
	1857	break;
	1858	}
	1859
	1860	htim->State = HAL_TIM_STATE_READY;
	1861
	1862	__HAL_UNLOCK(htim);
	1863
	1864	return HAL_OK;
	1865	}
	1866	#endif /* STM32F051x8 \|\| STM32F058xx \|\| */
	1867	/* STM32F071xB \|\| STM32F072xB \|\| STM32F078xx \|\| */
	1868	/* STM32F091xC \|\| STM32F098xx */
	1869	/**
	1870	* @}
	1871	*/
	1872
	1873	/** @defgroup TIMEx_Exported_Functions_Group6 Extension Callbacks functions
	1874	* @brief Extension Callbacks functions
	1875	*
	1876	@verbatim
	1877	==============================================================================
	1878	##### Extension Callbacks functions #####
	1879	==============================================================================
	1880	[..]
	1881	This section provides Extension TIM callback functions:
	1882	(+) Timer Commutation callback
	1883	(+) Timer Break callback
	1884
	1885	@endverbatim
	1886	* @{
	1887	*/
	1888
	1889	/**
	1890	* @brief Hall commutation changed callback in non blocking mode
	1891	* @param htim TIM handle
	1892	* @retval None
	1893	*/
	1894	__weak void HAL_TIMEx_CommutationCallback(TIM_HandleTypeDef *htim)
	1895	{
	1896	/* Prevent unused argument(s) compilation warning */
	1897	UNUSED(htim);
	1898
	1899	/* NOTE : This function Should not be modified, when the callback is needed,
	1900	the HAL_TIMEx_CommutationCallback could be implemented in the user file
	1901	*/
	1902	}
	1903
	1904	/**
	1905	* @brief Hall Break detection callback in non blocking mode
	1906	* @param htim TIM handle
	1907	* @retval None
	1908	*/
	1909	__weak void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim)
	1910	{
	1911	/* Prevent unused argument(s) compilation warning */
	1912	UNUSED(htim);
	1913
	1914	/* NOTE : This function Should not be modified, when the callback is needed,
	1915	the HAL_TIMEx_BreakCallback could be implemented in the user file
	1916	*/
	1917	}
	1918
	1919	/**
	1920	* @brief TIM DMA Commutation callback.
	1921	* @param hdma pointer to DMA handle.
	1922	* @retval None
	1923	*/
	1924	void TIMEx_DMACommutationCplt(DMA_HandleTypeDef *hdma)
	1925	{
	1926	TIM_HandleTypeDef* htim = ( TIM_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
	1927
	1928	htim->State= HAL_TIM_STATE_READY;
	1929
	1930	HAL_TIMEx_CommutationCallback(htim);
	1931	}
	1932
	1933	/**
	1934	* @}
	1935	*/
	1936
	1937	/** @defgroup TIMEx_Exported_Functions_Group7 Extension Peripheral State functions
	1938	* @brief Extension Peripheral State functions
	1939	*
	1940	@verbatim
	1941	==============================================================================
	1942	##### Extension Peripheral State functions #####
	1943	==============================================================================
	1944	[..]
	1945	This subsection permit to get in run-time the status of the peripheral
	1946	and the data flow.
	1947
	1948	@endverbatim
	1949	* @{
	1950	*/
	1951
	1952	/**
	1953	* @brief Return the TIM Hall Sensor interface state
	1954	* @param htim TIM Hall Sensor handle
	1955	* @retval HAL state
	1956	*/
	1957	HAL_TIM_StateTypeDef HAL_TIMEx_HallSensor_GetState(TIM_HandleTypeDef *htim)
	1958	{
	1959	return htim->State;
	1960	}
	1961
	1962	/**
	1963	* @}
	1964	*/
	1965
	1966	/**
	1967	* @}
	1968	*/
	1969
	1970	/** @addtogroup TIMEx_Private_Functions
	1971	* @{
	1972	*/
	1973
	1974	/**
	1975	* @brief Enables or disables the TIM Capture Compare Channel xN.
	1976	* @param TIMx to select the TIM peripheral
	1977	* @param Channel specifies the TIM Channel
	1978	* This parameter can be one of the following values:
	1979	* @arg TIM_CHANNEL_1: TIM Channel 1
	1980	* @arg TIM_CHANNEL_2: TIM Channel 2
	1981	* @arg TIM_CHANNEL_3: TIM Channel 3
	1982	* @param ChannelNState specifies the TIM Channel CCxNE bit new state.
	1983	* This parameter can be: TIM_CCxN_ENABLE or TIM_CCxN_Disable.
	1984	* @retval None
	1985	*/
	1986	static void TIM_CCxNChannelCmd(TIM_TypeDef* TIMx, uint32_t Channel, uint32_t ChannelNState)
	1987	{
	1988	uint32_t tmp = 0U;
	1989
	1990	tmp = TIM_CCER_CC1NE << Channel;
	1991
	1992	/* Reset the CCxNE Bit */
	1993	TIMx->CCER &= ~tmp;
	1994
	1995	/* Set or reset the CCxNE Bit */
	1996	TIMx->CCER \|= (uint32_t)(ChannelNState << Channel);
	1997	}
	1998
	1999	/**
	2000	* @}
	2001	*/
	2002
	2003	#endif /* HAL_TIM_MODULE_ENABLED */
	2004	/**
	2005	* @}
	2006	*/
	2007
	2008	/**
	2009	* @}
	2010	*/
	2011
	2012	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/