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2023-02-01 47857ed32cb8737a25f26970b222e29727f1c93b

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bfc108	1	/**
Q	2	******************************************************************************
	3	* @file stm32f0xx_hal_cec.c
	4	* @author MCD Application Team
	5	* @brief CEC HAL module driver.
	6	* This file provides firmware functions to manage the following
	7	* functionalities of the High Definition Multimedia Interface
	8	* Consumer Electronics Control Peripheral (CEC).
	9	* + Initialization and de-initialization functions
	10	* + IO operation functions
	11	* + Peripheral Control functions
	12	*
	13	*
	14	@verbatim
	15	===============================================================================
	16	##### How to use this driver #####
	17	===============================================================================
	18	[..]
	19	The CEC HAL driver can be used as follow:
	20
	21	(#) Declare a CEC_HandleTypeDef handle structure.
	22	(#) Initialize the CEC low level resources by implementing the HAL_CEC_MspInit ()API:
	23	(##) Enable the CEC interface clock.
	24	(##) CEC pins configuration:
	25	(+) Enable the clock for the CEC GPIOs.
	26	(+) Configure these CEC pins as alternate function pull-up.
	27	(##) NVIC configuration if you need to use interrupt process (HAL_CEC_Transmit_IT()
	28	and HAL_CEC_Receive_IT() APIs):
	29	(+) Configure the CEC interrupt priority.
	30	(+) Enable the NVIC CEC IRQ handle.
	31	(@) The specific CEC interrupts (Transmission complete interrupt,
	32	RXNE interrupt and Error Interrupts) will be managed using the macros
	33	__HAL_CEC_ENABLE_IT() and __HAL_CEC_DISABLE_IT() inside the transmit
	34	and receive process.
	35
	36	(#) Program the Signal Free Time (SFT) and SFT option, Tolerance, reception stop in
	37	in case of Bit Rising Error, Error-Bit generation conditions, device logical
	38	address and Listen mode in the hcec Init structure.
	39
	40	(#) Initialize the CEC registers by calling the HAL_CEC_Init() API.
	41
	42	(@) This API (HAL_CEC_Init()) configures also the low level Hardware GPIO, CLOCK, CORTEX...etc)
	43	by calling the customed HAL_CEC_MspInit() API.
	44
	45	@endverbatim
	46	******************************************************************************
	47	* @attention
	48	*
	49	* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
	50	*
	51	* Redistribution and use in source and binary forms, with or without modification,
	52	* are permitted provided that the following conditions are met:
	53	* 1. Redistributions of source code must retain the above copyright notice,
	54	* this list of conditions and the following disclaimer.
	55	* 2. Redistributions in binary form must reproduce the above copyright notice,
	56	* this list of conditions and the following disclaimer in the documentation
	57	* and/or other materials provided with the distribution.
	58	* 3. Neither the name of STMicroelectronics nor the names of its contributors
	59	* may be used to endorse or promote products derived from this software
	60	* without specific prior written permission.
	61	*
	62	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
	63	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
	64	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
	65	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
	66	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
	67	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
	68	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
	69	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
	70	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
	71	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
	72	*
	73	******************************************************************************
	74	*/
	75
	76	/* Includes ------------------------------------------------------------------*/
	77	#include "stm32f0xx_hal.h"
	78
	79	#ifdef HAL_CEC_MODULE_ENABLED
	80
	81	#if defined(STM32F042x6) \|\| defined(STM32F048xx) \|\|\
	82	defined(STM32F051x8) \|\| defined(STM32F058xx) \|\|\
	83	defined(STM32F071xB) \|\| defined(STM32F072xB) \|\| defined(STM32F078xx) \|\|\
	84	defined(STM32F091xC) \|\| defined (STM32F098xx)
	85
	86	/** @addtogroup STM32F0xx_HAL_Driver
	87	* @{
	88	*/
	89
	90	/** @defgroup CEC CEC
	91	* @brief HAL CEC module driver
	92	* @{
	93	*/
	94
	95	/* Private typedef -----------------------------------------------------------*/
	96	/* Private define ------------------------------------------------------------*/
	97	/** @defgroup CEC_Private_Constants CEC Private Constants
	98	* @{
	99	*/
	100	/**
	101	* @}
	102	*/
	103
	104	/* Private macro -------------------------------------------------------------*/
	105	/* Private variables ---------------------------------------------------------*/
	106	/* Private function prototypes -----------------------------------------------*/
	107	/** @defgroup CEC_Private_Functions CEC Private Functions
	108	* @{
	109	*/
	110	/**
	111	* @}
	112	*/
	113
	114	/* Exported functions ---------------------------------------------------------*/
	115
	116	/** @defgroup CEC_Exported_Functions CEC Exported Functions
	117	* @{
	118	*/
	119
	120	/** @defgroup CEC_Exported_Functions_Group1 Initialization and de-initialization functions
	121	* @brief Initialization and Configuration functions
	122	*
	123	@verbatim
	124	===============================================================================
	125	##### Initialization and Configuration functions #####
	126	===============================================================================
	127	[..]
	128	This subsection provides a set of functions allowing to initialize the CEC
	129	(+) The following parameters need to be configured:
	130	(++) SignalFreeTime
	131	(++) Tolerance
	132	(++) BRERxStop (RX stopped or not upon Bit Rising Error)
	133	(++) BREErrorBitGen (Error-Bit generation in case of Bit Rising Error)
	134	(++) LBPEErrorBitGen (Error-Bit generation in case of Long Bit Period Error)
	135	(++) BroadcastMsgNoErrorBitGen (Error-bit generation in case of broadcast message error)
	136	(++) SignalFreeTimeOption (SFT Timer start definition)
	137	(++) OwnAddress (CEC device address)
	138	(++) ListenMode
	139
	140	@endverbatim
	141	* @{
	142	*/
	143
	144	/**
	145	* @brief Initializes the CEC mode according to the specified
	146	* parameters in the CEC_InitTypeDef and creates the associated handle .
	147	* @param hcec CEC handle
	148	* @retval HAL status
	149	*/
	150	HAL_StatusTypeDef HAL_CEC_Init(CEC_HandleTypeDef *hcec)
	151	{
	152	/* Check the CEC handle allocation */
	153	if((hcec == NULL) \|\|(hcec->Init.RxBuffer == NULL))
	154	{
	155	return HAL_ERROR;
	156	}
	157
	158	/* Check the parameters */
	159	assert_param(IS_CEC_ALL_INSTANCE(hcec->Instance));
	160	assert_param(IS_CEC_SIGNALFREETIME(hcec->Init.SignalFreeTime));
	161	assert_param(IS_CEC_TOLERANCE(hcec->Init.Tolerance));
	162	assert_param(IS_CEC_BRERXSTOP(hcec->Init.BRERxStop));
	163	assert_param(IS_CEC_BREERRORBITGEN(hcec->Init.BREErrorBitGen));
	164	assert_param(IS_CEC_LBPEERRORBITGEN(hcec->Init.LBPEErrorBitGen));
	165	assert_param(IS_CEC_BROADCASTERROR_NO_ERRORBIT_GENERATION(hcec->Init.BroadcastMsgNoErrorBitGen));
	166	assert_param(IS_CEC_SFTOP(hcec->Init.SignalFreeTimeOption));
	167	assert_param(IS_CEC_LISTENING_MODE(hcec->Init.ListenMode));
	168	assert_param(IS_CEC_OWN_ADDRESS(hcec->Init.OwnAddress));
	169
	170	if(hcec->gState == HAL_CEC_STATE_RESET)
	171	{
	172	/* Allocate lock resource and initialize it */
	173	hcec->Lock = HAL_UNLOCKED;
	174	/* Init the low level hardware : GPIO, CLOCK */
	175	HAL_CEC_MspInit(hcec);
	176	}
	177	hcec->gState = HAL_CEC_STATE_BUSY;
	178
	179	/* Disable the Peripheral */
	180	__HAL_CEC_DISABLE(hcec);
	181
	182	/* Write to CEC Control Register */
	183	hcec->Instance->CFGR = hcec->Init.SignalFreeTime \| hcec->Init.Tolerance \| hcec->Init.BRERxStop\|\
	184	hcec->Init.BREErrorBitGen \| hcec->Init.LBPEErrorBitGen \| hcec->Init.BroadcastMsgNoErrorBitGen \|\
	185	hcec->Init.SignalFreeTimeOption \|((uint32_t)(hcec->Init.OwnAddress)<<16U) \|\
	186	hcec->Init.ListenMode;
	187
	188	/* Enable the following CEC Transmission/Reception interrupts as
	189	* well as the following CEC Transmission/Reception Errors interrupts
	190	* Rx Byte Received IT
	191	* End of Reception IT
	192	* Rx overrun
	193	* Rx bit rising error
	194	* Rx short bit period error
	195	* Rx long bit period error
	196	* Rx missing acknowledge
	197	* Tx Byte Request IT
	198	* End of Transmission IT
	199	* Tx Missing Acknowledge IT
	200	* Tx-Error IT
	201	* Tx-Buffer Underrun IT
	202	* Tx arbitration lost */
	203	__HAL_CEC_ENABLE_IT(hcec, CEC_IT_RXBR\|CEC_IT_RXEND\|CEC_IER_RX_ALL_ERR\|CEC_IT_TXBR\|CEC_IT_TXEND\|CEC_IER_TX_ALL_ERR);
	204
	205	/* Enable the CEC Peripheral */
	206	__HAL_CEC_ENABLE(hcec);
	207
	208	hcec->ErrorCode = HAL_CEC_ERROR_NONE;
	209	hcec->gState = HAL_CEC_STATE_READY;
	210	hcec->RxState = HAL_CEC_STATE_READY;
	211
	212	return HAL_OK;
	213	}
	214
	215	/**
	216	* @brief DeInitializes the CEC peripheral
	217	* @param hcec CEC handle
	218	* @retval HAL status
	219	*/
	220	HAL_StatusTypeDef HAL_CEC_DeInit(CEC_HandleTypeDef *hcec)
	221	{
	222	/* Check the CEC handle allocation */
	223	if(hcec == NULL)
	224	{
	225	return HAL_ERROR;
	226	}
	227
	228	/* Check the parameters */
	229	assert_param(IS_CEC_ALL_INSTANCE(hcec->Instance));
	230
	231	hcec->gState = HAL_CEC_STATE_BUSY;
	232
	233	/* DeInit the low level hardware */
	234	HAL_CEC_MspDeInit(hcec);
	235	/* Disable the Peripheral */
	236	__HAL_CEC_DISABLE(hcec);
	237
	238	/* Clear Flags */
	239	__HAL_CEC_CLEAR_FLAG(hcec,CEC_FLAG_TXEND\|CEC_FLAG_TXBR\|CEC_FLAG_RXBR\|CEC_FLAG_RXEND\|CEC_ISR_ALL_ERROR);
	240
	241	/* Disable the following CEC Transmission/Reception interrupts as
	242	* well as the following CEC Transmission/Reception Errors interrupts
	243	* Rx Byte Received IT
	244	* End of Reception IT
	245	* Rx overrun
	246	* Rx bit rising error
	247	* Rx short bit period error
	248	* Rx long bit period error
	249	* Rx missing acknowledge
	250	* Tx Byte Request IT
	251	* End of Transmission IT
	252	* Tx Missing Acknowledge IT
	253	* Tx-Error IT
	254	* Tx-Buffer Underrun IT
	255	* Tx arbitration lost */
	256	__HAL_CEC_DISABLE_IT(hcec, CEC_IT_RXBR\|CEC_IT_RXEND\|CEC_IER_RX_ALL_ERR\|CEC_IT_TXBR\|CEC_IT_TXEND\|CEC_IER_TX_ALL_ERR);
	257
	258	hcec->ErrorCode = HAL_CEC_ERROR_NONE;
	259	hcec->gState = HAL_CEC_STATE_RESET;
	260	hcec->RxState = HAL_CEC_STATE_RESET;
	261
	262	/* Process Unlock */
	263	__HAL_UNLOCK(hcec);
	264
	265	return HAL_OK;
	266	}
	267
	268	/**
	269	* @brief Initializes the Own Address of the CEC device
	270	* @param hcec CEC handle
	271	* @param CEC_OwnAddress The CEC own address.
	272	* @retval HAL status
	273	*/
	274	HAL_StatusTypeDef HAL_CEC_SetDeviceAddress(CEC_HandleTypeDef *hcec, uint16_t CEC_OwnAddress)
	275	{
	276	/* Check the parameters */
	277	assert_param(IS_CEC_OWN_ADDRESS(CEC_OwnAddress));
	278
	279	if ((hcec->gState == HAL_CEC_STATE_READY) && (hcec->RxState == HAL_CEC_STATE_READY))
	280	{
	281	/* Process Locked */
	282	__HAL_LOCK(hcec);
	283
	284	hcec->gState = HAL_CEC_STATE_BUSY;
	285
	286	/* Disable the Peripheral */
	287	__HAL_CEC_DISABLE(hcec);
	288
	289	if(CEC_OwnAddress != CEC_OWN_ADDRESS_NONE)
	290	{
	291	hcec->Instance->CFGR \|= ((uint32_t)CEC_OwnAddress<<16U);
	292	}
	293	else
	294	{
	295	hcec->Instance->CFGR &= ~(CEC_CFGR_OAR);
	296	}
	297
	298	hcec->gState = HAL_CEC_STATE_READY;
	299	hcec->ErrorCode = HAL_CEC_ERROR_NONE;
	300
	301	/* Process Unlocked */
	302	__HAL_UNLOCK(hcec);
	303
	304	/* Enable the Peripheral */
	305	__HAL_CEC_ENABLE(hcec);
	306
	307	return HAL_OK;
	308	}
	309	else
	310	{
	311	return HAL_BUSY;
	312	}
	313	}
	314
	315	/**
	316	* @brief CEC MSP Init
	317	* @param hcec CEC handle
	318	* @retval None
	319	*/
	320	__weak void HAL_CEC_MspInit(CEC_HandleTypeDef *hcec)
	321	{
	322	/* Prevent unused argument(s) compilation warning */
	323	UNUSED(hcec);
	324	/* NOTE : This function should not be modified, when the callback is needed,
	325	the HAL_CEC_MspInit can be implemented in the user file
	326	*/
	327	}
	328
	329	/**
	330	* @brief CEC MSP DeInit
	331	* @param hcec CEC handle
	332	* @retval None
	333	*/
	334	__weak void HAL_CEC_MspDeInit(CEC_HandleTypeDef *hcec)
	335	{
	336	/* Prevent unused argument(s) compilation warning */
	337	UNUSED(hcec);
	338	/* NOTE : This function should not be modified, when the callback is needed,
	339	the HAL_CEC_MspDeInit can be implemented in the user file
	340	*/
	341	}
	342
	343	/**
	344	* @}
	345	*/
	346
	347	/** @defgroup CEC_Exported_Functions_Group2 Input and Output operation functions
	348	* @brief CEC Transmit/Receive functions
	349	*
	350	@verbatim
	351	===============================================================================
	352	##### IO operation functions #####
	353	===============================================================================
	354	This subsection provides a set of functions allowing to manage the CEC data transfers.
	355
	356	(#) The CEC handle must contain the initiator (TX side) and the destination (RX side)
	357	logical addresses (4-bit long addresses, 0x0F for broadcast messages destination)
	358
	359	(#) The communication is performed using Interrupts.
	360	These API's return the HAL status.
	361	The end of the data processing will be indicated through the
	362	dedicated CEC IRQ when using Interrupt mode.
	363	The HAL_CEC_TxCpltCallback(), HAL_CEC_RxCpltCallback() user callbacks
	364	will be executed respectivelly at the end of the transmit or Receive process
	365	The HAL_CEC_ErrorCallback()user callback will be executed when a communication
	366	error is detected
	367
	368	(#) API's with Interrupt are :
	369	(+) HAL_CEC_Transmit_IT()
	370	(+) HAL_CEC_IRQHandler()
	371
	372	(#) A set of User Callbacks are provided:
	373	(+) HAL_CEC_TxCpltCallback()
	374	(+) HAL_CEC_RxCpltCallback()
	375	(+) HAL_CEC_ErrorCallback()
	376
	377	@endverbatim
	378	* @{
	379	*/
	380
	381	/**
	382	* @brief Send data in interrupt mode
	383	* @param hcec CEC handle
	384	* @param InitiatorAddress Initiator address
	385	* @param DestinationAddress destination logical address
	386	* @param pData pointer to input byte data buffer
	387	* @param Size amount of data to be sent in bytes (without counting the header).
	388	* 0 means only the header is sent (ping operation).
	389	* Maximum TX size is 15 bytes (1 opcode and up to 14 operands).
	390	* @retval HAL status
	391	*/
	392	HAL_StatusTypeDef HAL_CEC_Transmit_IT(CEC_HandleTypeDef hcec, uint8_t InitiatorAddress, uint8_t DestinationAddress, uint8_t pData, uint32_t Size)
	393	{
	394	/* if the IP isn't already busy and if there is no previous transmission
	395	already pending due to arbitration lost */
	396	if (hcec->gState == HAL_CEC_STATE_READY)
	397	{
	398	if((pData == NULL ) && (Size > 0U))
	399	{
	400	return HAL_ERROR;
	401	}
	402
	403	assert_param(IS_CEC_ADDRESS(DestinationAddress));
	404	assert_param(IS_CEC_ADDRESS(InitiatorAddress));
	405	assert_param(IS_CEC_MSGSIZE(Size));
	406
	407	/* Process Locked */
	408	__HAL_LOCK(hcec);
	409	hcec->pTxBuffPtr = pData;
	410	hcec->gState = HAL_CEC_STATE_BUSY_TX;
	411	hcec->ErrorCode = HAL_CEC_ERROR_NONE;
	412
	413	/* initialize the number of bytes to send,
	414	* 0 means only one header is sent (ping operation) */
	415	hcec->TxXferCount = Size;
	416
	417	/* in case of no payload (Size = 0), sender is only pinging the system;
	418	Set TX End of Message (TXEOM) bit, must be set before writing data to TXDR */
	419	if (Size == 0U)
	420	{
	421	__HAL_CEC_LAST_BYTE_TX_SET(hcec);
	422	}
	423
	424	/* send header block */
	425	hcec->Instance->TXDR = ((uint8_t)(InitiatorAddress << CEC_INITIATOR_LSB_POS) \|(uint8_t) DestinationAddress);
	426	/* Set TX Start of Message (TXSOM) bit */
	427	__HAL_CEC_FIRST_BYTE_TX_SET(hcec);
	428
	429	/* Process Unlocked */
	430	__HAL_UNLOCK(hcec);
	431
	432	return HAL_OK;
	433
	434	}
	435	else
	436	{
	437	return HAL_BUSY;
	438	}
	439	}
	440
	441	/**
	442	* @brief Get size of the received frame.
	443	* @param hcec CEC handle
	444	* @retval Frame size
	445	*/
	446	uint32_t HAL_CEC_GetLastReceivedFrameSize(CEC_HandleTypeDef *hcec)
	447	{
	448	return hcec->RxXferSize;
	449	}
	450
	451	/**
	452	* @brief Change Rx Buffer.
	453	* @param hcec CEC handle
	454	* @param Rxbuffer Rx Buffer
	455	* @note This function can be called only inside the HAL_CEC_RxCpltCallback()
	456	* @retval Frame size
	457	*/
	458	void HAL_CEC_ChangeRxBuffer(CEC_HandleTypeDef hcec, uint8_t Rxbuffer)
	459	{
	460	hcec->Init.RxBuffer = Rxbuffer;
	461	}
	462
	463	/**
	464	* @brief This function handles CEC interrupt requests.
	465	* @param hcec CEC handle
	466	* @retval None
	467	*/
	468	void HAL_CEC_IRQHandler(CEC_HandleTypeDef *hcec)
	469	{
	470
	471	/* save interrupts register for further error or interrupts handling purposes */
	472	uint32_t reg = 0U;
	473	reg = hcec->Instance->ISR;
	474
	475
	476	/* ----------------------------Arbitration Lost Management----------------------------------*/
	477	/* CEC TX arbitration error interrupt occurred --------------------------------------*/
	478	if((reg & CEC_FLAG_ARBLST) != RESET)
	479	{
	480	hcec->ErrorCode = HAL_CEC_ERROR_ARBLST;
	481	__HAL_CEC_CLEAR_FLAG(hcec, CEC_FLAG_ARBLST);
	482	}
	483
	484	/* ----------------------------Rx Management----------------------------------*/
	485	/* CEC RX byte received interrupt ---------------------------------------------------*/
	486	if((reg & CEC_FLAG_RXBR) != RESET)
	487	{
	488	/* reception is starting */
	489	hcec->RxState = HAL_CEC_STATE_BUSY_RX;
	490	hcec->RxXferSize++;
	491	/* read received byte */
	492	*hcec->Init.RxBuffer++ = hcec->Instance->RXDR;
	493	__HAL_CEC_CLEAR_FLAG(hcec, CEC_FLAG_RXBR);
	494	}
	495
	496	/* CEC RX end received interrupt ---------------------------------------------------*/
	497	if((reg & CEC_FLAG_RXEND) != RESET)
	498	{
	499	/* clear IT */
	500	__HAL_CEC_CLEAR_FLAG(hcec, CEC_FLAG_RXEND);
	501
	502	/* Rx process is completed, restore hcec->RxState to Ready */
	503	hcec->RxState = HAL_CEC_STATE_READY;
	504	hcec->ErrorCode = HAL_CEC_ERROR_NONE;
	505	hcec->Init.RxBuffer -= hcec->RxXferSize;
	506	HAL_CEC_RxCpltCallback(hcec, hcec->RxXferSize);
	507	hcec->RxXferSize = 0U;
	508	}
	509
	510	/* ----------------------------Tx Management----------------------------------*/
	511	/* CEC TX byte request interrupt ------------------------------------------------*/
	512	if((reg & CEC_FLAG_TXBR) != RESET)
	513	{
	514	if (hcec->TxXferCount == 0U)
	515	{
	516	/* if this is the last byte transmission, set TX End of Message (TXEOM) bit */
	517	__HAL_CEC_LAST_BYTE_TX_SET(hcec);
	518	hcec->Instance->TXDR = *hcec->pTxBuffPtr++;
	519	}
	520	else
	521	{
	522	hcec->Instance->TXDR = *hcec->pTxBuffPtr++;
	523	hcec->TxXferCount--;
	524	}
	525	/* clear Tx-Byte request flag */
	526	__HAL_CEC_CLEAR_FLAG(hcec,CEC_FLAG_TXBR);
	527	}
	528
	529	/* CEC TX end interrupt ------------------------------------------------*/
	530	if((reg & CEC_FLAG_TXEND) != RESET)
	531	{
	532	__HAL_CEC_CLEAR_FLAG(hcec, CEC_FLAG_TXEND);
	533
	534	/* Tx process is ended, restore hcec->gState to Ready */
	535	hcec->gState = HAL_CEC_STATE_READY;
	536	/* Call the Process Unlocked before calling the Tx call back API to give the possibility to
	537	start again the Transmission under the Tx call back API */
	538	__HAL_UNLOCK(hcec);
	539	hcec->ErrorCode = HAL_CEC_ERROR_NONE;
	540	HAL_CEC_TxCpltCallback(hcec);
	541	}
	542
	543	/* ----------------------------Rx/Tx Error Management----------------------------------*/
	544	if ((reg & (CEC_ISR_RXOVR\|CEC_ISR_BRE\|CEC_ISR_SBPE\|CEC_ISR_LBPE\|CEC_ISR_RXACKE\|CEC_ISR_TXUDR\|CEC_ISR_TXERR\|CEC_ISR_TXACKE)) != 0U)
	545	{
	546	hcec->ErrorCode = reg;
	547	__HAL_CEC_CLEAR_FLAG(hcec, HAL_CEC_ERROR_RXOVR\|HAL_CEC_ERROR_BRE\|CEC_FLAG_LBPE\|CEC_FLAG_SBPE\|HAL_CEC_ERROR_RXACKE\|HAL_CEC_ERROR_TXUDR\|HAL_CEC_ERROR_TXERR\|HAL_CEC_ERROR_TXACKE);
	548
	549
	550	if((reg & (CEC_ISR_RXOVR\|CEC_ISR_BRE\|CEC_ISR_SBPE\|CEC_ISR_LBPE\|CEC_ISR_RXACKE)) != RESET)
	551	{
	552	hcec->Init.RxBuffer-=hcec->RxXferSize;
	553	hcec->RxXferSize = 0U;
	554	hcec->RxState = HAL_CEC_STATE_READY;
	555	}
	556	else if (((reg & (CEC_ISR_TXUDR\|CEC_ISR_TXERR\|CEC_ISR_TXACKE)) != RESET) && ((reg & CEC_ISR_ARBLST) == RESET))
	557	{
	558	/* Set the CEC state ready to be able to start again the process */
	559	hcec->gState = HAL_CEC_STATE_READY;
	560	}
	561
	562	/* Error Call Back */
	563	HAL_CEC_ErrorCallback(hcec);
	564	}
	565
	566	}
	567
	568	/**
	569	* @brief Tx Transfer completed callback
	570	* @param hcec CEC handle
	571	* @retval None
	572	*/
	573	__weak void HAL_CEC_TxCpltCallback(CEC_HandleTypeDef *hcec)
	574	{
	575	/* Prevent unused argument(s) compilation warning */
	576	UNUSED(hcec);
	577	/* NOTE : This function should not be modified, when the callback is needed,
	578	the HAL_CEC_TxCpltCallback can be implemented in the user file
	579	*/
	580	}
	581
	582	/**
	583	* @brief Rx Transfer completed callback
	584	* @param hcec CEC handle
	585	* @param RxFrameSize Size of frame
	586	* @retval None
	587	*/
	588	__weak void HAL_CEC_RxCpltCallback(CEC_HandleTypeDef *hcec, uint32_t RxFrameSize)
	589	{
	590	/* Prevent unused argument(s) compilation warning */
	591	UNUSED(hcec);
	592	UNUSED(RxFrameSize);
	593	/* NOTE : This function should not be modified, when the callback is needed,
	594	the HAL_CEC_RxCpltCallback can be implemented in the user file
	595	*/
	596	}
	597
	598	/**
	599	* @brief CEC error callbacks
	600	* @param hcec CEC handle
	601	* @retval None
	602	*/
	603	__weak void HAL_CEC_ErrorCallback(CEC_HandleTypeDef *hcec)
	604	{
	605	/* Prevent unused argument(s) compilation warning */
	606	UNUSED(hcec);
	607	/* NOTE : This function should not be modified, when the callback is needed,
	608	the HAL_CEC_ErrorCallback can be implemented in the user file
	609	*/
	610	}
	611	/**
	612	* @}
	613	*/
	614
	615	/** @defgroup CEC_Exported_Functions_Group3 Peripheral Control function
	616	* @brief CEC control functions
	617	*
	618	@verbatim
	619	===============================================================================
	620	##### Peripheral Control function #####
	621	===============================================================================
	622	[..]
	623	This subsection provides a set of functions allowing to control the CEC.
	624	(+) HAL_CEC_GetState() API can be helpful to check in run-time the state of the CEC peripheral.
	625	(+) HAL_CEC_GetError() API can be helpful to check in run-time the error of the CEC peripheral.
	626	@endverbatim
	627	* @{
	628	*/
	629	/**
	630	* @brief return the CEC state
	631	* @param hcec pointer to a CEC_HandleTypeDef structure that contains
	632	* the configuration information for the specified CEC module.
	633	* @retval HAL state
	634	*/
	635	HAL_CEC_StateTypeDef HAL_CEC_GetState(CEC_HandleTypeDef *hcec)
	636	{
	637	uint32_t temp1 = 0x00U, temp2 = 0x00U;
	638	temp1 = hcec->gState;
	639	temp2 = hcec->RxState;
	640
	641	return (HAL_CEC_StateTypeDef)(temp1 \| temp2);
	642	}
	643
	644	/**
	645	* @brief Return the CEC error code
	646	* @param hcec pointer to a CEC_HandleTypeDef structure that contains
	647	* the configuration information for the specified CEC.
	648	* @retval CEC Error Code
	649	*/
	650	uint32_t HAL_CEC_GetError(CEC_HandleTypeDef *hcec)
	651	{
	652	return hcec->ErrorCode;
	653	}
	654
	655	/**
	656	* @}
	657	*/
	658
	659	/**
	660	* @}
	661	*/
	662
	663	/**
	664	* @}
	665	*/
	666
	667	/**
	668	* @}
	669	*/
	670	#endif /* defined(STM32F042x6) \|\| defined(STM32F048xx) \|\| defined(STM32F051x8) \|\| defined(STM32F058xx) \|\| */
	671	/* defined(STM32F071xB) \|\| defined(STM32F072xB) \|\| defined(STM32F078xx) \|\| */
	672	/* defined(STM32F091xC) \|\| defined (STM32F098xx) */
	673
	674	#endif /* HAL_CEC_MODULE_ENABLED */
	675
	676	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/