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/**
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******************************************************************************
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* @file stm32f0xx_hal_uart_ex.h
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* @author MCD Application Team
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* @brief Header file of UART HAL Extended module.
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******************************************************************************
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* @attention
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*
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* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
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*
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* Redistribution and use in source and binary forms, with or without modification,
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* are permitted provided that the following conditions are met:
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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* 3. Neither the name of STMicroelectronics nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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******************************************************************************
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*/
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/* Define to prevent recursive inclusion -------------------------------------*/
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#ifndef __STM32F0xx_HAL_UART_EX_H
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#define __STM32F0xx_HAL_UART_EX_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* Includes ------------------------------------------------------------------*/
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#include "stm32f0xx_hal_def.h"
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/** @addtogroup STM32F0xx_HAL_Driver
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* @{
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*/
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/** @addtogroup UARTEx
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* @{
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*/
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/* Exported types ------------------------------------------------------------*/
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#if !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC)
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/** @defgroup UARTEx_Exported_Types UARTEx Exported Types
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* @{
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*/
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/**
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* @brief UART wake up from stop mode parameters
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*/
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typedef struct
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{
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uint32_t WakeUpEvent; /*!< Specifies which event will activat the Wakeup from Stop mode flag (WUF).
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This parameter can be a value of @ref UART_WakeUp_from_Stop_Selection.
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If set to UART_WAKEUP_ON_ADDRESS, the two other fields below must
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be filled up. */
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uint16_t AddressLength; /*!< Specifies whether the address is 4 or 7-bit long.
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This parameter can be a value of @ref UART_WakeUp_Address_Length. */
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uint8_t Address; /*!< UART/USART node address (7-bit long max). */
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} UART_WakeUpTypeDef;
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/**
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* @}
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*/
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#endif /* !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC) */
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/* Exported constants --------------------------------------------------------*/
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/** @defgroup UARTEx_Exported_Constants UARTEx Exported Constants
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* @{
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*/
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/** @defgroup UARTEx_Word_Length UARTEx Word Length
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* @{
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*/
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#if defined (STM32F042x6) || defined (STM32F048xx) || defined (STM32F070x6) || \
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defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || defined (STM32F070xB) || \
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defined (STM32F091xC) || defined (STM32F098xx) || defined (STM32F030xC)
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#define UART_WORDLENGTH_7B ((uint32_t)USART_CR1_M1) /*!< 7-bit long UART frame */
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#define UART_WORDLENGTH_8B (0x00000000U) /*!< 8-bit long UART frame */
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#define UART_WORDLENGTH_9B ((uint32_t)USART_CR1_M0) /*!< 9-bit long UART frame */
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#else
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#define UART_WORDLENGTH_8B (0x00000000U) /*!< 8-bit long UART frame */
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#define UART_WORDLENGTH_9B ((uint32_t)USART_CR1_M) /*!< 9-bit long UART frame */
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#endif /* defined (STM32F042x6) || defined (STM32F048xx) || defined (STM32F070x6) || \
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defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || defined (STM32F070xB) || \
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defined (STM32F091xC) || defined (STM32F098xx) || defined (STM32F030xC) */
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/**
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* @}
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*/
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/** @defgroup UARTEx_AutoBaud_Rate_Mode UARTEx Advanced Feature AutoBaud Rate Mode
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* @{
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*/
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#if defined (STM32F042x6) || defined (STM32F048xx) || defined (STM32F070x6) || \
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defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || defined (STM32F070xB) || \
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defined (STM32F091xC) || defined (STM32F098xx) || defined (STM32F030xC)
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#define UART_ADVFEATURE_AUTOBAUDRATE_ONSTARTBIT (0x00000000U) /*!< Auto Baud rate detection on start bit */
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#define UART_ADVFEATURE_AUTOBAUDRATE_ONFALLINGEDGE ((uint32_t)USART_CR2_ABRMODE_0) /*!< Auto Baud rate detection on falling edge */
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#define UART_ADVFEATURE_AUTOBAUDRATE_ON0X7FFRAME ((uint32_t)USART_CR2_ABRMODE_1) /*!< Auto Baud rate detection on 0x7F frame detection */
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#define UART_ADVFEATURE_AUTOBAUDRATE_ON0X55FRAME ((uint32_t)USART_CR2_ABRMODE) /*!< Auto Baud rate detection on 0x55 frame detection */
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#else
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#define UART_ADVFEATURE_AUTOBAUDRATE_ONSTARTBIT (0x00000000U) /*!< Auto Baud rate detection on start bit */
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#define UART_ADVFEATURE_AUTOBAUDRATE_ONFALLINGEDGE ((uint32_t)USART_CR2_ABRMODE_0) /*!< Auto Baud rate detection on falling edge */
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#endif /* defined (STM32F042x6) || defined (STM32F048xx) || defined (STM32F070x6) || \
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defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || defined (STM32F070xB) || \
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defined (STM32F091xC) || defined (STM32F098xx) || defined (STM32F030xC) */
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/**
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* @}
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*/
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#if !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC)
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/** @defgroup UARTEx_LIN UARTEx Local Interconnection Network mode
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* @{
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*/
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#define UART_LIN_DISABLE (0x00000000U) /*!< Local Interconnect Network disable */
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#define UART_LIN_ENABLE ((uint32_t)USART_CR2_LINEN) /*!< Local Interconnect Network enable */
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/**
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* @}
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*/
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/** @defgroup UARTEx_LIN_Break_Detection UARTEx LIN Break Detection
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* @{
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*/
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#define UART_LINBREAKDETECTLENGTH_10B (0x00000000U) /*!< LIN 10-bit break detection length */
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#define UART_LINBREAKDETECTLENGTH_11B ((uint32_t)USART_CR2_LBDL) /*!< LIN 11-bit break detection length */
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/**
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* @}
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*/
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#endif /* !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC) */
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/** @defgroup UART_Flags UARTEx Status Flags
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* Elements values convention: 0xXXXX
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* - 0xXXXX : Flag mask in the ISR register
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* @{
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*/
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#if !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC)
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#define UART_FLAG_REACK (0x00400000U) /*!< UART receive enable acknowledge flag */
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#endif /* !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC) */
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#define UART_FLAG_TEACK (0x00200000U) /*!< UART transmit enable acknowledge flag */
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#if !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC)
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#define UART_FLAG_WUF (0x00100000U) /*!< UART wake-up from stop mode flag */
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#endif /* !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC) */
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#define UART_FLAG_RWU (0x00080000U) /*!< UART receiver wake-up from mute mode flag */
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#define UART_FLAG_SBKF (0x00040000U) /*!< UART send break flag */
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#define UART_FLAG_CMF (0x00020000U) /*!< UART character match flag */
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#define UART_FLAG_BUSY (0x00010000U) /*!< UART busy flag */
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#define UART_FLAG_ABRF (0x00008000U) /*!< UART auto Baud rate flag */
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#define UART_FLAG_ABRE (0x00004000U) /*!< UART auto Baud rate error */
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#if !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC)
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#define UART_FLAG_EOBF (0x00001000U) /*!< UART end of block flag */
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#endif /* !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC) */
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#define UART_FLAG_RTOF (0x00000800U) /*!< UART receiver timeout flag */
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#define UART_FLAG_CTS (0x00000400U) /*!< UART clear to send flag */
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#define UART_FLAG_CTSIF (0x00000200U) /*!< UART clear to send interrupt flag */
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#if !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC)
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#define UART_FLAG_LBDF (0x00000100U) /*!< UART LIN break detection flag (not available on F030xx devices)*/
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#endif /* !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC) */
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#define UART_FLAG_TXE (0x00000080U) /*!< UART transmit data register empty */
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#define UART_FLAG_TC (0x00000040U) /*!< UART transmission complete */
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#define UART_FLAG_RXNE (0x00000020U) /*!< UART read data register not empty */
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#define UART_FLAG_IDLE (0x00000010U) /*!< UART idle flag */
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#define UART_FLAG_ORE (0x00000008U) /*!< UART overrun error */
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#define UART_FLAG_NE (0x00000004U) /*!< UART noise error */
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#define UART_FLAG_FE (0x00000002U) /*!< UART frame error */
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#define UART_FLAG_PE (0x00000001U) /*!< UART parity error */
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/**
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* @}
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*/
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/** @defgroup UART_Interrupt_definition UARTEx Interrupts Definition
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* Elements values convention: 000ZZZZZ0XXYYYYYb
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* - YYYYY : Interrupt source position in the XX register (5bits)
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* - XX : Interrupt source register (2bits)
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* - 01: CR1 register
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* - 10: CR2 register
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* - 11: CR3 register
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* - ZZZZZ : Flag position in the ISR register(5bits)
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* @{
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*/
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#define UART_IT_PE (0x0028U) /*!< UART parity error interruption */
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#define UART_IT_TXE (0x0727U) /*!< UART transmit data register empty interruption */
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#define UART_IT_TC (0x0626U) /*!< UART transmission complete interruption */
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#define UART_IT_RXNE (0x0525U) /*!< UART read data register not empty interruption */
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#define UART_IT_IDLE (0x0424U) /*!< UART idle interruption */
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#if !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC)
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#define UART_IT_LBD (0x0846U) /*!< UART LIN break detection interruption */
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#endif /* !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC) */
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#define UART_IT_CTS (0x096AU) /*!< UART CTS interruption */
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#define UART_IT_CM (0x112EU) /*!< UART character match interruption */
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#if !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC)
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#define UART_IT_WUF (0x1476U) /*!< UART wake-up from stop mode interruption */
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#endif /* !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC) */
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/**
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* @}
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*/
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/** @defgroup UART_IT_CLEAR_Flags UARTEx Interruption Clear Flags
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* @{
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*/
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#define UART_CLEAR_PEF USART_ICR_PECF /*!< Parity Error Clear Flag */
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#define UART_CLEAR_FEF USART_ICR_FECF /*!< Framing Error Clear Flag */
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#define UART_CLEAR_NEF USART_ICR_NCF /*!< Noise detected Clear Flag */
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#define UART_CLEAR_OREF USART_ICR_ORECF /*!< Overrun Error Clear Flag */
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#define UART_CLEAR_IDLEF USART_ICR_IDLECF /*!< IDLE line detected Clear Flag */
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#define UART_CLEAR_TCF USART_ICR_TCCF /*!< Transmission Complete Clear Flag */
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#if !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC)
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#define UART_CLEAR_LBDF USART_ICR_LBDCF /*!< LIN Break Detection Clear Flag (not available on F030xx devices)*/
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#endif /* !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC) */
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#define UART_CLEAR_CTSF USART_ICR_CTSCF /*!< CTS Interrupt Clear Flag */
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#define UART_CLEAR_RTOF USART_ICR_RTOCF /*!< Receiver Time Out Clear Flag */
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#if !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC)
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#define UART_CLEAR_EOBF USART_ICR_EOBCF /*!< End Of Block Clear Flag */
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#endif /* !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC) */
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#define UART_CLEAR_CMF USART_ICR_CMCF /*!< Character Match Clear Flag */
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#if !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC)
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#define UART_CLEAR_WUF USART_ICR_WUCF /*!< Wake Up from stop mode Clear Flag */
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#endif /* !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC) */
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/**
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* @}
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*/
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/** @defgroup UART_Request_Parameters UARTEx Request Parameters
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* @{
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*/
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#define UART_AUTOBAUD_REQUEST ((uint32_t)USART_RQR_ABRRQ) /*!< Auto-Baud Rate Request */
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#define UART_SENDBREAK_REQUEST ((uint32_t)USART_RQR_SBKRQ) /*!< Send Break Request */
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#define UART_MUTE_MODE_REQUEST ((uint32_t)USART_RQR_MMRQ) /*!< Mute Mode Request */
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#define UART_RXDATA_FLUSH_REQUEST ((uint32_t)USART_RQR_RXFRQ) /*!< Receive Data flush Request */
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#if !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC)
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#define UART_TXDATA_FLUSH_REQUEST ((uint32_t)USART_RQR_TXFRQ) /*!< Transmit data flush Request */
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#else
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#endif /* !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC) */
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/**
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* @}
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*/
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#if !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC)
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/** @defgroup UART_Stop_Mode_Enable UARTEx Advanced Feature Stop Mode Enable
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* @{
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*/
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#define UART_ADVFEATURE_STOPMODE_DISABLE (0x00000000U) /*!< UART stop mode disable */
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#define UART_ADVFEATURE_STOPMODE_ENABLE ((uint32_t)USART_CR1_UESM) /*!< UART stop mode enable */
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/**
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* @}
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*/
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/** @defgroup UART_WakeUp_from_Stop_Selection UART WakeUp From Stop Selection
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* @{
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*/
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#define UART_WAKEUP_ON_ADDRESS (0x00000000U) /*!< UART wake-up on address */
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#define UART_WAKEUP_ON_STARTBIT ((uint32_t)USART_CR3_WUS_1) /*!< UART wake-up on start bit */
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#define UART_WAKEUP_ON_READDATA_NONEMPTY ((uint32_t)USART_CR3_WUS) /*!< UART wake-up on receive data register not empty */
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/**
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* @}
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*/
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#endif /* !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC) */
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/**
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* @}
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*/
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/* Exported macros ------------------------------------------------------------*/
|
|
279 |
/** @defgroup UARTEx_Exported_Macros UARTEx Exported Macros
|
|
280 |
* @{
|
|
281 |
*/
|
|
282 |
|
|
283 |
/** @brief Flush the UART Data registers.
|
|
284 |
* @param __HANDLE__ specifies the UART Handle.
|
|
285 |
* @retval None
|
|
286 |
*/
|
|
287 |
#if !defined(STM32F030x6) && !defined(STM32F030x8)
|
|
288 |
#define __HAL_UART_FLUSH_DRREGISTER(__HANDLE__) \
|
|
289 |
do{ \
|
|
290 |
SET_BIT((__HANDLE__)->Instance->RQR, UART_RXDATA_FLUSH_REQUEST); \
|
|
291 |
SET_BIT((__HANDLE__)->Instance->RQR, UART_TXDATA_FLUSH_REQUEST); \
|
|
292 |
} while(0)
|
|
293 |
#else
|
|
294 |
#define __HAL_UART_FLUSH_DRREGISTER(__HANDLE__) \
|
|
295 |
do{ \
|
|
296 |
SET_BIT((__HANDLE__)->Instance->RQR, UART_RXDATA_FLUSH_REQUEST); \
|
|
297 |
} while(0)
|
|
298 |
#endif /* !defined(STM32F030x6) && !defined(STM32F030x8) */
|
|
299 |
|
|
300 |
/**
|
|
301 |
* @}
|
|
302 |
*/
|
|
303 |
|
|
304 |
/* Private macros ------------------------------------------------------------*/
|
|
305 |
/** @defgroup UARTEx_Private_Macros UARTEx Private Macros
|
|
306 |
* @{
|
|
307 |
*/
|
|
308 |
|
|
309 |
/** @brief Report the UART clock source.
|
|
310 |
* @param __HANDLE__ specifies the UART Handle.
|
|
311 |
* @param __CLOCKSOURCE__ output variable.
|
|
312 |
* @retval UART clocking source, written in __CLOCKSOURCE__.
|
|
313 |
*/
|
|
314 |
#if defined(STM32F030x6) || defined(STM32F031x6) || defined(STM32F038xx)
|
|
315 |
#define UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \
|
|
316 |
do { \
|
|
317 |
switch(__HAL_RCC_GET_USART1_SOURCE()) \
|
|
318 |
{ \
|
|
319 |
case RCC_USART1CLKSOURCE_PCLK1: \
|
|
320 |
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
|
|
321 |
break; \
|
|
322 |
case RCC_USART1CLKSOURCE_HSI: \
|
|
323 |
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
|
|
324 |
break; \
|
|
325 |
case RCC_USART1CLKSOURCE_SYSCLK: \
|
|
326 |
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
|
|
327 |
break; \
|
|
328 |
case RCC_USART1CLKSOURCE_LSE: \
|
|
329 |
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
|
|
330 |
break; \
|
|
331 |
default: \
|
|
332 |
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
|
|
333 |
break; \
|
|
334 |
} \
|
|
335 |
} while(0)
|
|
336 |
#elif defined (STM32F030x8) || defined (STM32F070x6) || \
|
|
337 |
defined (STM32F042x6) || defined (STM32F048xx) || \
|
|
338 |
defined (STM32F051x8) || defined (STM32F058xx)
|
|
339 |
#define UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \
|
|
340 |
do { \
|
|
341 |
if((__HANDLE__)->Instance == USART1) \
|
|
342 |
{ \
|
|
343 |
switch(__HAL_RCC_GET_USART1_SOURCE()) \
|
|
344 |
{ \
|
|
345 |
case RCC_USART1CLKSOURCE_PCLK1: \
|
|
346 |
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
|
|
347 |
break; \
|
|
348 |
case RCC_USART1CLKSOURCE_HSI: \
|
|
349 |
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
|
|
350 |
break; \
|
|
351 |
case RCC_USART1CLKSOURCE_SYSCLK: \
|
|
352 |
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
|
|
353 |
break; \
|
|
354 |
case RCC_USART1CLKSOURCE_LSE: \
|
|
355 |
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
|
|
356 |
break; \
|
|
357 |
default: \
|
|
358 |
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
|
|
359 |
break; \
|
|
360 |
} \
|
|
361 |
} \
|
|
362 |
else if((__HANDLE__)->Instance == USART2) \
|
|
363 |
{ \
|
|
364 |
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
|
|
365 |
} \
|
|
366 |
else \
|
|
367 |
{ \
|
|
368 |
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
|
|
369 |
} \
|
|
370 |
} while(0)
|
|
371 |
#elif defined(STM32F070xB)
|
|
372 |
#define UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \
|
|
373 |
do { \
|
|
374 |
if((__HANDLE__)->Instance == USART1) \
|
|
375 |
{ \
|
|
376 |
switch(__HAL_RCC_GET_USART1_SOURCE()) \
|
|
377 |
{ \
|
|
378 |
case RCC_USART1CLKSOURCE_PCLK1: \
|
|
379 |
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
|
|
380 |
break; \
|
|
381 |
case RCC_USART1CLKSOURCE_HSI: \
|
|
382 |
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
|
|
383 |
break; \
|
|
384 |
case RCC_USART1CLKSOURCE_SYSCLK: \
|
|
385 |
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
|
|
386 |
break; \
|
|
387 |
case RCC_USART1CLKSOURCE_LSE: \
|
|
388 |
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
|
|
389 |
break; \
|
|
390 |
default: \
|
|
391 |
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
|
|
392 |
break; \
|
|
393 |
} \
|
|
394 |
} \
|
|
395 |
else if((__HANDLE__)->Instance == USART2) \
|
|
396 |
{ \
|
|
397 |
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
|
|
398 |
} \
|
|
399 |
else if((__HANDLE__)->Instance == USART3) \
|
|
400 |
{ \
|
|
401 |
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
|
|
402 |
} \
|
|
403 |
else if((__HANDLE__)->Instance == USART4) \
|
|
404 |
{ \
|
|
405 |
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
|
|
406 |
} \
|
|
407 |
else \
|
|
408 |
{ \
|
|
409 |
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
|
|
410 |
} \
|
|
411 |
} while(0)
|
|
412 |
#elif defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx)
|
|
413 |
#define UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \
|
|
414 |
do { \
|
|
415 |
if((__HANDLE__)->Instance == USART1) \
|
|
416 |
{ \
|
|
417 |
switch(__HAL_RCC_GET_USART1_SOURCE()) \
|
|
418 |
{ \
|
|
419 |
case RCC_USART1CLKSOURCE_PCLK1: \
|
|
420 |
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
|
|
421 |
break; \
|
|
422 |
case RCC_USART1CLKSOURCE_HSI: \
|
|
423 |
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
|
|
424 |
break; \
|
|
425 |
case RCC_USART1CLKSOURCE_SYSCLK: \
|
|
426 |
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
|
|
427 |
break; \
|
|
428 |
case RCC_USART1CLKSOURCE_LSE: \
|
|
429 |
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
|
|
430 |
break; \
|
|
431 |
default: \
|
|
432 |
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
|
|
433 |
break; \
|
|
434 |
} \
|
|
435 |
} \
|
|
436 |
else if((__HANDLE__)->Instance == USART2) \
|
|
437 |
{ \
|
|
438 |
switch(__HAL_RCC_GET_USART2_SOURCE()) \
|
|
439 |
{ \
|
|
440 |
case RCC_USART2CLKSOURCE_PCLK1: \
|
|
441 |
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
|
|
442 |
break; \
|
|
443 |
case RCC_USART2CLKSOURCE_HSI: \
|
|
444 |
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
|
|
445 |
break; \
|
|
446 |
case RCC_USART2CLKSOURCE_SYSCLK: \
|
|
447 |
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
|
|
448 |
break; \
|
|
449 |
case RCC_USART2CLKSOURCE_LSE: \
|
|
450 |
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
|
|
451 |
break; \
|
|
452 |
default: \
|
|
453 |
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
|
|
454 |
break; \
|
|
455 |
} \
|
|
456 |
} \
|
|
457 |
else if((__HANDLE__)->Instance == USART3) \
|
|
458 |
{ \
|
|
459 |
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
|
|
460 |
} \
|
|
461 |
else if((__HANDLE__)->Instance == USART4) \
|
|
462 |
{ \
|
|
463 |
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
|
|
464 |
} \
|
|
465 |
else \
|
|
466 |
{ \
|
|
467 |
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
|
|
468 |
} \
|
|
469 |
} while(0)
|
|
470 |
#elif defined(STM32F091xC) || defined (STM32F098xx)
|
|
471 |
#define UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \
|
|
472 |
do { \
|
|
473 |
if((__HANDLE__)->Instance == USART1) \
|
|
474 |
{ \
|
|
475 |
switch(__HAL_RCC_GET_USART1_SOURCE()) \
|
|
476 |
{ \
|
|
477 |
case RCC_USART1CLKSOURCE_PCLK1: \
|
|
478 |
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
|
|
479 |
break; \
|
|
480 |
case RCC_USART1CLKSOURCE_HSI: \
|
|
481 |
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
|
|
482 |
break; \
|
|
483 |
case RCC_USART1CLKSOURCE_SYSCLK: \
|
|
484 |
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
|
|
485 |
break; \
|
|
486 |
case RCC_USART1CLKSOURCE_LSE: \
|
|
487 |
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
|
|
488 |
break; \
|
|
489 |
default: \
|
|
490 |
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
|
|
491 |
break; \
|
|
492 |
} \
|
|
493 |
} \
|
|
494 |
else if((__HANDLE__)->Instance == USART2) \
|
|
495 |
{ \
|
|
496 |
switch(__HAL_RCC_GET_USART2_SOURCE()) \
|
|
497 |
{ \
|
|
498 |
case RCC_USART2CLKSOURCE_PCLK1: \
|
|
499 |
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
|
|
500 |
break; \
|
|
501 |
case RCC_USART2CLKSOURCE_HSI: \
|
|
502 |
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
|
|
503 |
break; \
|
|
504 |
case RCC_USART2CLKSOURCE_SYSCLK: \
|
|
505 |
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
|
|
506 |
break; \
|
|
507 |
case RCC_USART2CLKSOURCE_LSE: \
|
|
508 |
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
|
|
509 |
break; \
|
|
510 |
default: \
|
|
511 |
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
|
|
512 |
break; \
|
|
513 |
} \
|
|
514 |
} \
|
|
515 |
else if((__HANDLE__)->Instance == USART3) \
|
|
516 |
{ \
|
|
517 |
switch(__HAL_RCC_GET_USART3_SOURCE()) \
|
|
518 |
{ \
|
|
519 |
case RCC_USART3CLKSOURCE_PCLK1: \
|
|
520 |
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
|
|
521 |
break; \
|
|
522 |
case RCC_USART3CLKSOURCE_HSI: \
|
|
523 |
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
|
|
524 |
break; \
|
|
525 |
case RCC_USART3CLKSOURCE_SYSCLK: \
|
|
526 |
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
|
|
527 |
break; \
|
|
528 |
case RCC_USART3CLKSOURCE_LSE: \
|
|
529 |
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
|
|
530 |
break; \
|
|
531 |
default: \
|
|
532 |
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
|
|
533 |
break; \
|
|
534 |
} \
|
|
535 |
} \
|
|
536 |
else if((__HANDLE__)->Instance == USART4) \
|
|
537 |
{ \
|
|
538 |
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
|
|
539 |
} \
|
|
540 |
else if((__HANDLE__)->Instance == USART5) \
|
|
541 |
{ \
|
|
542 |
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
|
|
543 |
} \
|
|
544 |
else if((__HANDLE__)->Instance == USART6) \
|
|
545 |
{ \
|
|
546 |
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
|
|
547 |
} \
|
|
548 |
else if((__HANDLE__)->Instance == USART7) \
|
|
549 |
{ \
|
|
550 |
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
|
|
551 |
} \
|
|
552 |
else if((__HANDLE__)->Instance == USART8) \
|
|
553 |
{ \
|
|
554 |
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
|
|
555 |
} \
|
|
556 |
else \
|
|
557 |
{ \
|
|
558 |
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
|
|
559 |
} \
|
|
560 |
} while(0)
|
|
561 |
#elif defined(STM32F030xC)
|
|
562 |
#define UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \
|
|
563 |
do { \
|
|
564 |
if((__HANDLE__)->Instance == USART1) \
|
|
565 |
{ \
|
|
566 |
switch(__HAL_RCC_GET_USART1_SOURCE()) \
|
|
567 |
{ \
|
|
568 |
case RCC_USART1CLKSOURCE_PCLK1: \
|
|
569 |
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
|
|
570 |
break; \
|
|
571 |
case RCC_USART1CLKSOURCE_HSI: \
|
|
572 |
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
|
|
573 |
break; \
|
|
574 |
case RCC_USART1CLKSOURCE_SYSCLK: \
|
|
575 |
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
|
|
576 |
break; \
|
|
577 |
case RCC_USART1CLKSOURCE_LSE: \
|
|
578 |
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
|
|
579 |
break; \
|
|
580 |
default: \
|
|
581 |
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
|
|
582 |
break; \
|
|
583 |
} \
|
|
584 |
} \
|
|
585 |
else if((__HANDLE__)->Instance == USART2) \
|
|
586 |
{ \
|
|
587 |
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
|
|
588 |
} \
|
|
589 |
else if((__HANDLE__)->Instance == USART3) \
|
|
590 |
{ \
|
|
591 |
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
|
|
592 |
} \
|
|
593 |
else if((__HANDLE__)->Instance == USART4) \
|
|
594 |
{ \
|
|
595 |
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
|
|
596 |
} \
|
|
597 |
else if((__HANDLE__)->Instance == USART5) \
|
|
598 |
{ \
|
|
599 |
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
|
|
600 |
} \
|
|
601 |
else if((__HANDLE__)->Instance == USART6) \
|
|
602 |
{ \
|
|
603 |
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
|
|
604 |
} \
|
|
605 |
else \
|
|
606 |
{ \
|
|
607 |
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
|
|
608 |
} \
|
|
609 |
} while(0)
|
|
610 |
|
|
611 |
#endif /* defined(STM32F030x6) || defined(STM32F031x6) || defined(STM32F038xx) */
|
|
612 |
|
|
613 |
|
|
614 |
/** @brief Compute the UART mask to apply to retrieve the received data
|
|
615 |
* according to the word length and to the parity bits activation.
|
|
616 |
* @note If PCE = 1, the parity bit is not included in the data extracted
|
|
617 |
* by the reception API().
|
|
618 |
* This masking operation is not carried out in the case of
|
|
619 |
* DMA transfers.
|
|
620 |
* @param __HANDLE__ specifies the UART Handle.
|
|
621 |
* @retval None, the mask to apply to UART RDR register is stored in (__HANDLE__)->Mask field.
|
|
622 |
*/
|
|
623 |
#if defined (STM32F042x6) || defined (STM32F048xx) || defined (STM32F070x6) || \
|
|
624 |
defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || defined (STM32F070xB) || \
|
|
625 |
defined (STM32F091xC) || defined (STM32F098xx) || defined (STM32F030xC)
|
|
626 |
#define UART_MASK_COMPUTATION(__HANDLE__) \
|
|
627 |
do { \
|
|
628 |
if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_9B) \
|
|
629 |
{ \
|
|
630 |
if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \
|
|
631 |
{ \
|
|
632 |
(__HANDLE__)->Mask = 0x01FFU; \
|
|
633 |
} \
|
|
634 |
else \
|
|
635 |
{ \
|
|
636 |
(__HANDLE__)->Mask = 0x00FFU; \
|
|
637 |
} \
|
|
638 |
} \
|
|
639 |
else if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_8B) \
|
|
640 |
{ \
|
|
641 |
if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \
|
|
642 |
{ \
|
|
643 |
(__HANDLE__)->Mask = 0x00FFU; \
|
|
644 |
} \
|
|
645 |
else \
|
|
646 |
{ \
|
|
647 |
(__HANDLE__)->Mask = 0x007FU; \
|
|
648 |
} \
|
|
649 |
} \
|
|
650 |
else if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_7B) \
|
|
651 |
{ \
|
|
652 |
if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \
|
|
653 |
{ \
|
|
654 |
(__HANDLE__)->Mask = 0x007FU; \
|
|
655 |
} \
|
|
656 |
else \
|
|
657 |
{ \
|
|
658 |
(__HANDLE__)->Mask = 0x003FU; \
|
|
659 |
} \
|
|
660 |
} \
|
|
661 |
} while(0)
|
|
662 |
#else
|
|
663 |
#define UART_MASK_COMPUTATION(__HANDLE__) \
|
|
664 |
do { \
|
|
665 |
if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_9B) \
|
|
666 |
{ \
|
|
667 |
if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \
|
|
668 |
{ \
|
|
669 |
(__HANDLE__)->Mask = 0x01FFU; \
|
|
670 |
} \
|
|
671 |
else \
|
|
672 |
{ \
|
|
673 |
(__HANDLE__)->Mask = 0x00FFU; \
|
|
674 |
} \
|
|
675 |
} \
|
|
676 |
else if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_8B) \
|
|
677 |
{ \
|
|
678 |
if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \
|
|
679 |
{ \
|
|
680 |
(__HANDLE__)->Mask = 0x00FFU; \
|
|
681 |
} \
|
|
682 |
else \
|
|
683 |
{ \
|
|
684 |
(__HANDLE__)->Mask = 0x007FU; \
|
|
685 |
} \
|
|
686 |
} \
|
|
687 |
} while(0)
|
|
688 |
#endif /* defined (STM32F042x6) || defined (STM32F048xx) || defined (STM32F070x6) || \
|
|
689 |
defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || defined (STM32F070xB) || \
|
|
690 |
defined (STM32F091xC) || defined (STM32F098xx) || defined (STM32F030xC) */
|
|
691 |
|
|
692 |
/**
|
|
693 |
* @brief Ensure that UART frame length is valid.
|
|
694 |
* @param __LENGTH__ UART frame length.
|
|
695 |
* @retval SET (__LENGTH__ is valid) or RESET (__LENGTH__ is invalid)
|
|
696 |
*/
|
|
697 |
#if defined (STM32F042x6) || defined (STM32F048xx) || defined (STM32F070x6) || \
|
|
698 |
defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || defined (STM32F070xB) || \
|
|
699 |
defined (STM32F091xC) || defined (STM32F098xx) || defined (STM32F030xC)
|
|
700 |
#define IS_UART_WORD_LENGTH(__LENGTH__) (((__LENGTH__) == UART_WORDLENGTH_7B) || \
|
|
701 |
((__LENGTH__) == UART_WORDLENGTH_8B) || \
|
|
702 |
((__LENGTH__) == UART_WORDLENGTH_9B))
|
|
703 |
#else
|
|
704 |
#define IS_UART_WORD_LENGTH(__LENGTH__) (((__LENGTH__) == UART_WORDLENGTH_8B) || \
|
|
705 |
((__LENGTH__) == UART_WORDLENGTH_9B))
|
|
706 |
#endif /* defined (STM32F042x6) || defined (STM32F048xx) || defined (STM32F070x6) || \
|
|
707 |
defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || defined (STM32F070xB) || \
|
|
708 |
defined (STM32F091xC) || defined (STM32F098xx) || defined (STM32F030xC) */
|
|
709 |
|
|
710 |
/**
|
|
711 |
* @brief Ensure that UART auto Baud rate detection mode is valid.
|
|
712 |
* @param __MODE__ UART auto Baud rate detection mode.
|
|
713 |
* @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid)
|
|
714 |
*/
|
|
715 |
#if defined (STM32F042x6) || defined (STM32F048xx) || defined (STM32F070x6) || \
|
|
716 |
defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || defined (STM32F070xB) || \
|
|
717 |
defined (STM32F091xC) || defined (STM32F098xx) || defined (STM32F030xC)
|
|
718 |
#define IS_UART_ADVFEATURE_AUTOBAUDRATEMODE(__MODE__) (((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ONSTARTBIT) || \
|
|
719 |
((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ONFALLINGEDGE) || \
|
|
720 |
((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ON0X7FFRAME) || \
|
|
721 |
((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ON0X55FRAME))
|
|
722 |
#else
|
|
723 |
#define IS_UART_ADVFEATURE_AUTOBAUDRATEMODE(__MODE__) (((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ONSTARTBIT) || \
|
|
724 |
((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ONFALLINGEDGE))
|
|
725 |
#endif /* defined (STM32F042x6) || defined (STM32F048xx) || defined (STM32F070x6) || \
|
|
726 |
defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || defined (STM32F070xB) || \
|
|
727 |
defined (STM32F091xC) || defined (STM32F098xx) || defined (STM32F030xC) */
|
|
728 |
|
|
729 |
|
|
730 |
#if !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC)
|
|
731 |
/**
|
|
732 |
* @brief Ensure that UART LIN state is valid.
|
|
733 |
* @param __LIN__ UART LIN state.
|
|
734 |
* @retval SET (__LIN__ is valid) or RESET (__LIN__ is invalid)
|
|
735 |
*/
|
|
736 |
#define IS_UART_LIN(__LIN__) (((__LIN__) == UART_LIN_DISABLE) || \
|
|
737 |
((__LIN__) == UART_LIN_ENABLE))
|
|
738 |
|
|
739 |
/**
|
|
740 |
* @brief Ensure that UART LIN break detection length is valid.
|
|
741 |
* @param __LENGTH__ UART LIN break detection length.
|
|
742 |
* @retval SET (__LENGTH__ is valid) or RESET (__LENGTH__ is invalid)
|
|
743 |
*/
|
|
744 |
#define IS_UART_LIN_BREAK_DETECT_LENGTH(__LENGTH__) (((__LENGTH__) == UART_LINBREAKDETECTLENGTH_10B) || \
|
|
745 |
((__LENGTH__) == UART_LINBREAKDETECTLENGTH_11B))
|
|
746 |
#endif /* !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC) */
|
|
747 |
|
|
748 |
/**
|
|
749 |
* @brief Ensure that UART request parameter is valid.
|
|
750 |
* @param __PARAM__ UART request parameter.
|
|
751 |
* @retval SET (__PARAM__ is valid) or RESET (__PARAM__ is invalid)
|
|
752 |
*/
|
|
753 |
#if !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC)
|
|
754 |
#define IS_UART_REQUEST_PARAMETER(__PARAM__) (((__PARAM__) == UART_AUTOBAUD_REQUEST) || \
|
|
755 |
((__PARAM__) == UART_SENDBREAK_REQUEST) || \
|
|
756 |
((__PARAM__) == UART_MUTE_MODE_REQUEST) || \
|
|
757 |
((__PARAM__) == UART_RXDATA_FLUSH_REQUEST) || \
|
|
758 |
((__PARAM__) == UART_TXDATA_FLUSH_REQUEST))
|
|
759 |
#else
|
|
760 |
#define IS_UART_REQUEST_PARAMETER(__PARAM__) (((__PARAM__) == UART_AUTOBAUD_REQUEST) || \
|
|
761 |
((__PARAM__) == UART_SENDBREAK_REQUEST) || \
|
|
762 |
((__PARAM__) == UART_MUTE_MODE_REQUEST) || \
|
|
763 |
((__PARAM__) == UART_RXDATA_FLUSH_REQUEST))
|
|
764 |
#endif /* !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC) */
|
|
765 |
|
|
766 |
#if !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC)
|
|
767 |
/**
|
|
768 |
* @brief Ensure that UART stop mode state is valid.
|
|
769 |
* @param __STOPMODE__ UART stop mode state.
|
|
770 |
* @retval SET (__STOPMODE__ is valid) or RESET (__STOPMODE__ is invalid)
|
|
771 |
*/
|
|
772 |
#define IS_UART_ADVFEATURE_STOPMODE(__STOPMODE__) (((__STOPMODE__) == UART_ADVFEATURE_STOPMODE_DISABLE) || \
|
|
773 |
((__STOPMODE__) == UART_ADVFEATURE_STOPMODE_ENABLE))
|
|
774 |
|
|
775 |
/**
|
|
776 |
* @brief Ensure that UART wake-up selection is valid.
|
|
777 |
* @param __WAKE__ UART wake-up selection.
|
|
778 |
* @retval SET (__WAKE__ is valid) or RESET (__WAKE__ is invalid)
|
|
779 |
*/
|
|
780 |
#define IS_UART_WAKEUP_SELECTION(__WAKE__) (((__WAKE__) == UART_WAKEUP_ON_ADDRESS) || \
|
|
781 |
((__WAKE__) == UART_WAKEUP_ON_STARTBIT) || \
|
|
782 |
((__WAKE__) == UART_WAKEUP_ON_READDATA_NONEMPTY))
|
|
783 |
#endif /* !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC) */
|
|
784 |
|
|
785 |
/**
|
|
786 |
* @}
|
|
787 |
*/
|
|
788 |
|
|
789 |
/* Exported functions --------------------------------------------------------*/
|
|
790 |
/** @addtogroup UARTEx_Exported_Functions
|
|
791 |
* @{
|
|
792 |
*/
|
|
793 |
|
|
794 |
/** @addtogroup UARTEx_Exported_Functions_Group1
|
|
795 |
* @brief Extended Initialization and Configuration Functions
|
|
796 |
* @{
|
|
797 |
*/
|
|
798 |
/* Initialization and de-initialization functions ****************************/
|
|
799 |
HAL_StatusTypeDef HAL_RS485Ex_Init(UART_HandleTypeDef *huart, uint32_t Polarity, uint32_t AssertionTime, uint32_t DeassertionTime);
|
|
800 |
#if !defined(STM32F030x6) && !defined(STM32F030x8)&& !defined(STM32F070xB)&& !defined(STM32F070x6)&& !defined(STM32F030xC)
|
|
801 |
HAL_StatusTypeDef HAL_LIN_Init(UART_HandleTypeDef *huart, uint32_t BreakDetectLength);
|
|
802 |
#endif /* !defined(STM32F030x6) && !defined(STM32F030x8)&& !defined(STM32F070xB)&& !defined(STM32F070x6)&& !defined(STM32F030xC) */
|
|
803 |
/**
|
|
804 |
* @}
|
|
805 |
*/
|
|
806 |
|
|
807 |
/** @addtogroup UARTEx_Exported_Functions_Group2
|
|
808 |
* @brief Extended UART Interrupt handling function
|
|
809 |
* @{
|
|
810 |
*/
|
|
811 |
|
|
812 |
/* IO operation functions ***************************************************/
|
|
813 |
#if !defined(STM32F030x6) && !defined(STM32F030x8)&& !defined(STM32F070xB)&& !defined(STM32F070x6)&& !defined(STM32F030xC)
|
|
814 |
void HAL_UARTEx_WakeupCallback(UART_HandleTypeDef *huart);
|
|
815 |
#endif /* !defined(STM32F030x6) && !defined(STM32F030x8)&& !defined(STM32F070xB)&& !defined(STM32F070x6)&& !defined(STM32F030xC) */
|
|
816 |
/**
|
|
817 |
* @}
|
|
818 |
*/
|
|
819 |
|
|
820 |
/** @addtogroup UARTEx_Exported_Functions_Group3
|
|
821 |
* @brief Extended Peripheral Control functions
|
|
822 |
* @{
|
|
823 |
*/
|
|
824 |
|
|
825 |
/* Peripheral Control functions **********************************************/
|
|
826 |
HAL_StatusTypeDef HAL_MultiProcessorEx_AddressLength_Set(UART_HandleTypeDef *huart, uint32_t AddressLength);
|
|
827 |
#if !defined(STM32F030x6) && !defined(STM32F030x8)&& !defined(STM32F070xB)&& !defined(STM32F070x6) && !defined(STM32F030xC)
|
|
828 |
HAL_StatusTypeDef HAL_UARTEx_StopModeWakeUpSourceConfig(UART_HandleTypeDef *huart, UART_WakeUpTypeDef WakeUpSelection);
|
|
829 |
HAL_StatusTypeDef HAL_UARTEx_EnableStopMode(UART_HandleTypeDef *huart);
|
|
830 |
HAL_StatusTypeDef HAL_UARTEx_DisableStopMode(UART_HandleTypeDef *huart);
|
|
831 |
HAL_StatusTypeDef HAL_LIN_SendBreak(UART_HandleTypeDef *huart);
|
|
832 |
#endif /* !defined(STM32F030x6) && !defined(STM32F030x8)&& !defined(STM32F070xB)&& !defined(STM32F070x6)&& !defined(STM32F030xC) */
|
|
833 |
/**
|
|
834 |
* @}
|
|
835 |
*/
|
|
836 |
/* Peripheral State functions ************************************************/
|
|
837 |
|
|
838 |
/**
|
|
839 |
* @}
|
|
840 |
*/
|
|
841 |
|
|
842 |
/* Private functions ---------------------------------------------------------*/
|
|
843 |
|
|
844 |
/**
|
|
845 |
* @}
|
|
846 |
*/
|
|
847 |
|
|
848 |
/**
|
|
849 |
* @}
|
|
850 |
*/
|
|
851 |
|
|
852 |
#ifdef __cplusplus
|
|
853 |
}
|
|
854 |
#endif
|
|
855 |
|
|
856 |
#endif /* __STM32F0xx_HAL_UART_EX_H */
|
|
857 |
|
|
858 |
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
|
859 |
|