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2023-02-01 4392349b649164f2b498ca5157ecd141631ea96f

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bfc108	1	/**
Q	2	******************************************************************************
	3	* @file stm32f0xx_it.c
	4	* @brief Interrupt Service Routines.
	5	******************************************************************************
	6	*
	7	* COPYRIGHT(c) 2018 STMicroelectronics
	8	*
	9	* Redistribution and use in source and binary forms, with or without modification,
	10	* are permitted provided that the following conditions are met:
	11	* 1. Redistributions of source code must retain the above copyright notice,
	12	* this list of conditions and the following disclaimer.
	13	* 2. Redistributions in binary form must reproduce the above copyright notice,
	14	* this list of conditions and the following disclaimer in the documentation
	15	* and/or other materials provided with the distribution.
	16	* 3. Neither the name of STMicroelectronics nor the names of its contributors
	17	* may be used to endorse or promote products derived from this software
	18	* without specific prior written permission.
	19	*
	20	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
	21	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
	22	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
	23	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
	24	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
	25	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
	26	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
	27	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
	28	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
	29	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
	30	*
	31	******************************************************************************
	32	*/
	33	/* Includes ------------------------------------------------------------------*/
	34	#include "stm32f0xx_hal.h"
	35	#include "stm32f0xx.h"
	36	#include "stm32f0xx_it.h"
	37
	38	/* USER CODE BEGIN 0 */
	39	#include "functions.h"
	40	/* USER CODE END 0 */
	41
	42	/* External variables --------------------------------------------------------*/
	43
	44	/******************************************************************************/
	45	/* Cortex-M0 Processor Interruption and Exception Handlers */
	46	/******************************************************************************/
	47
	48	/**
	49	* @brief This function handles Non maskable interrupt.
	50	*/
	51	void NMI_Handler(void)
	52	{
	53	/* USER CODE BEGIN NonMaskableInt_IRQn 0 */
	54
	55	/* USER CODE END NonMaskableInt_IRQn 0 */
	56	/* USER CODE BEGIN NonMaskableInt_IRQn 1 */
	57
	58	/* USER CODE END NonMaskableInt_IRQn 1 */
	59	}
	60
	61	/**
	62	* @brief This function handles Hard fault interrupt.
	63	*/
	64	void HardFault_Handler(void)
	65	{
	66	/* USER CODE BEGIN HardFault_IRQn 0 */
	67
	68	/* USER CODE END HardFault_IRQn 0 */
	69	while (1)
	70	{
	71	/* USER CODE BEGIN W1_HardFault_IRQn 0 */
	72	/* USER CODE END W1_HardFault_IRQn 0 */
	73	}
	74	/* USER CODE BEGIN HardFault_IRQn 1 */
	75
	76	/* USER CODE END HardFault_IRQn 1 */
	77	}
	78
	79	/**
	80	* @brief This function handles System service call via SWI instruction.
	81	*/
	82	void SVC_Handler(void)
	83	{
	84	/* USER CODE BEGIN SVC_IRQn 0 */
	85
	86	/* USER CODE END SVC_IRQn 0 */
	87	/* USER CODE BEGIN SVC_IRQn 1 */
	88
	89	/* USER CODE END SVC_IRQn 1 */
	90	}
	91
	92	/**
	93	* @brief This function handles Pendable request for system service.
	94	*/
	95	void PendSV_Handler(void)
	96	{
	97	/* USER CODE BEGIN PendSV_IRQn 0 */
e1f350	98	SCB->ICSR=SCB_ICSR_PENDSVCLR_Msk; //1<<SCB_ICSR_PENDSVCLR_Pos;
Q	99	// NVIC_ClearPendingIRQ(PendSV_IRQn);
bfc108	100	PendSvCount++;
e1f350	101	// NVIC_DisableIRQ(PendSV_IRQn);
Q	102	PendSvCallBack();
bfc108	103	/* USER CODE END PendSV_IRQn 0 */
Q	104	/* USER CODE BEGIN PendSV_IRQn 1 */
	105
	106	/* USER CODE END PendSV_IRQn 1 */
	107	}
	108
	109	/**
	110	* @brief This function handles System tick timer.
	111	*/
	112	void SysTick_Handler(void)
	113	{
	114	/* USER CODE BEGIN SysTick_IRQn 0 */
	115
	116	/* USER CODE END SysTick_IRQn 0 */
	117	HAL_IncTick();
	118	HAL_SYSTICK_IRQHandler();
	119	/* USER CODE BEGIN SysTick_IRQn 1 */
	120
	121	/* USER CODE END SysTick_IRQn 1 */
	122	}
	123
	124	/******************************************************************************/
	125	/* STM32F0xx Peripheral Interrupt Handlers */
	126	/* Add here the Interrupt Handlers for the used peripherals. */
	127	/* For the available peripheral interrupt handler names, */
	128	/* please refer to the startup file (startup_stm32f0xx.s). */
	129	/******************************************************************************/
d69aae	130	/**
Q	131	* @brief This function handles TIM6 global interrupt.
	132	*/
	133	void TIM6_IRQHandler(void)
	134	{
	135	/* USER CODE BEGIN TIM6_IRQn 0 */
	136	if (LL_TIM_IsActiveFlag_UPDATE(TIM6)) { LL_TIM_ClearFlag_UPDATE(TIM6);}
	137
	138	// KMem.SDD[46]+=1000;
	139	// KMem.SDT[93] = LL_TIM_GetCounter(TIM6);
	140	/* USER CODE END TIM6_IRQn 0 */
	141	/* USER CODE BEGIN TIM6_IRQn 1 */
	142
	143	/* USER CODE END TIM6_IRQn 1 */
	144	}
bfc108	145
Q	146	/**
	147	* @brief This function handles DMA1 channel 2 and 3 interrupts.
	148	*/
	149	void DMA1_Channel2_3_IRQHandler(void)
	150	{
	151	/* USER CODE BEGIN DMA1_Channel2_3_IRQn 0 */
0fe6b0	152	Uart1Stat.DMACount++;
bfc108	153	if (LL_DMA_IsActiveFlag_TC2(DMA1))
Q	154	{
	155
	156	Uart1Stat.SendBytes+=Uart1Stat.DMASendLen;
	157	DelData(&Uart1Stat.QTx,Uart1Stat.DMASendLen);
	158	LL_DMA_ClearFlag_TC2(DMA1);
	159
	160	if (!IsEmpty(&Uart1Stat.QTx))
	161	{
	162	int len1=GetContinueData(&Uart1Stat.QTx);
	163	// if (len1>128) len1=128;
	164	LL_DMA_DisableChannel(DMA1,LL_DMA_CHANNEL_2);
	165	LL_DMA_SetMemoryAddress(DMA1,LL_DMA_CHANNEL_2,(uint32_t)GetReadBuffer(&Uart1Stat.QTx));
	166	LL_DMA_SetDataLength(DMA1,LL_DMA_CHANNEL_2,len1);
	167	LL_DMA_EnableChannel(DMA1,LL_DMA_CHANNEL_2);
	168	Uart1Stat.DMASendLen=len1;
	169	LL_USART_EnableDMAReq_TX(USART1);
	170	}
	171	else
	172	{
	173	Uart1Stat.DMASendLen=0;
0fe6b0	174	Uart1Stat.bSending=0;
bfc108	175	}
Q	176	}
	177	/* USER CODE END DMA1_Channel2_3_IRQn 0 */
	178
	179	/* USER CODE BEGIN DMA1_Channel2_3_IRQn 1 */
	180	if (LL_DMA_IsActiveFlag_TC3(DMA1))
	181	{
	182	LL_DMA_ClearFlag_TC3(DMA1);
	183
	184	}
	185	/* USER CODE END DMA1_Channel2_3_IRQn 1 */
	186	}
	187
	188	void DMA1_Channel4_5_IRQHandler(void)
	189	{
	190	/* USER CODE BEGIN DMA1_Channel4_5_IRQn 0 */
0fe6b0	191	Uart2Stat.DMACount++;
bfc108	192	if (LL_DMA_IsActiveFlag_TC4(DMA1))
Q	193	{
e1f350	194	LL_DMA_ClearFlag_TC4(DMA1);
Q	195	/*
bfc108	196	Uart2Stat.SendBytes+=Uart2Stat.DMASendLen;
Q	197	DelData(&Uart2Stat.QTx,Uart2Stat.DMASendLen);
e1f350	198
bfc108	199
Q	200	if (!IsEmpty(&Uart2Stat.QTx))
	201	{
	202	int len1=GetContinueData(&Uart2Stat.QTx);
	203	// if (len1>128) len1=128;
	204	LL_DMA_DisableChannel(DMA1,LL_DMA_CHANNEL_4);
	205	LL_DMA_SetMemoryAddress(DMA1,LL_DMA_CHANNEL_4,(uint32_t)GetReadBuffer(&Uart2Stat.QTx));
	206	LL_DMA_SetDataLength(DMA1,LL_DMA_CHANNEL_4,len1);
	207	LL_DMA_EnableChannel(DMA1,LL_DMA_CHANNEL_4);
	208	Uart2Stat.DMASendLen=len1;
	209	LL_USART_EnableDMAReq_TX(USART2);
	210	}
	211	else
e1f350	212	*/
bfc108	213	{
Q	214	Uart2Stat.DMASendLen=0;
0fe6b0	215	Uart2Stat.bSending=0;
bfc108	216	}
Q	217	}
	218	/* USER CODE END DMA1_Channel4_5_IRQn 0 */
	219
	220	/* USER CODE BEGIN DMA1_Channel4_5_IRQn 1 */
	221	if (LL_DMA_IsActiveFlag_TC5(DMA1))
	222	{
	223	LL_DMA_ClearFlag_TC5(DMA1);
e1f350	224
bfc108	225
Q	226	}
	227	/* USER CODE END DMA1_Channel4_5_IRQn 1 */
	228	}
d69aae	229
Q	230	void SPI1_IRQHandler(void)
	231	{
	232	/* USER CODE BEGIN SPI1_IRQn 0 */
	233	SPI1_IRQ_CallBack();
	234	/* USER CODE END SPI1_IRQn 0 */
	235	/* USER CODE BEGIN SPI1_IRQn 1 */
	236
	237	/* USER CODE END SPI1_IRQn 1 */
	238	}
	239
bfc108	240	/**
Q	241	* @brief This function handles USART1 global interrupt.
	242	*/
	243	void USART1_IRQHandler(void)
	244	{
	245	/* USER CODE BEGIN USART1_IRQn 0 */
	246	// LL_GPIO_TogglePin(GPIOB,LL_GPIO_PIN_7);
	247
	248	if (LL_USART_IsActiveFlag_RXNE(USART1))
	249	{
	250	Uart1BaudGot=1;
	251	Uart1BaudFirstGot=1;
	252	Uart1Stat.RXNECount++;
	253	unsigned char ch=LL_USART_ReceiveData8(USART1);
e1f350	254	// PushOne(&Uart1Stat.QRx,ch);
bfc108	255	Uart1Stat.RecvBytes++;
Q	256	Uart1RecvBuf1[Uart1RecvBuf1DataLen++]=ch;
	257	//LL_USART_TransmitData8(USART1,ch);
	258	}
	259	if (LL_USART_IsActiveFlag_ORE(USART1))
	260	{
	261	LL_USART_ClearFlag_ORE(USART1);
	262	Uart1Stat.OverRunCount++;
	263	}
	264	if (LL_USART_IsEnabledIT_IDLE(USART1)&&LL_USART_IsActiveFlag_IDLE(USART1))
0fe6b0	265	{//接收完成
bfc108	266	LL_USART_ClearFlag_IDLE(USART1);
Q	267	Uart1RecvDone();
	268	}
	269	/* USER CODE END USART1_IRQn 0 */
	270	/* USER CODE BEGIN USART1_IRQn 1 */
	271	if (LL_USART_IsActiveFlag_TC(USART1))
0fe6b0	272	{//发送完成
bfc108	273	LL_USART_ClearFlag_TC(USART1);
Q	274	Uart1SendDone();
	275	}
	276	/* USER CODE END USART1_IRQn 1 */
	277	}
	278
	279	void USART2_IRQHandler(void)
	280	{
	281	/* USER CODE BEGIN USART2_IRQn 0 */
	282	// LL_GPIO_TogglePin(GPIOB,LL_GPIO_PIN_7);
	283
	284	if (LL_USART_IsActiveFlag_RXNE(USART2))
	285	{
e1f350	286	// unsigned char ch=LL_USART_ReceiveData8(USART2);
Q	287	// Uart2Stat.RXNECount++;
	288	// PushOne(&Uart2Stat.QRx,ch);
	289	// Uart2Stat.RecvBytes++;
	290	// Uart2RecvBuf1[Uart2RecvBuf1DataLen++]=ch;
bfc108	291
Q	292	//LL_USART_TransmitData8(USART2,ch);
	293	}
	294	if (LL_USART_IsActiveFlag_ORE(USART2))
	295	{
	296	LL_USART_ClearFlag_ORE(USART2);
	297	Uart2Stat.OverRunCount++;
	298	}
	299	if (LL_USART_IsEnabledIT_IDLE(USART2)&&LL_USART_IsActiveFlag_IDLE(USART2))
0fe6b0	300	{//接收完成
bfc108	301	LL_USART_ClearFlag_IDLE(USART2);
Q	302	Uart2RecvDone();
	303	}
	304	/* USER CODE END USART2_IRQn 0 */
	305	/* USER CODE BEGIN USART2_IRQn 1 */
	306	if (LL_USART_IsActiveFlag_TC(USART2))
0fe6b0	307	{//发送完成
bfc108	308	LL_USART_ClearFlag_TC(USART2);
Q	309	Uart2SendDone();
	310	}
	311	/* USER CODE END USART2_IRQn 1 */
	312	}
	313
	314	/* USER CODE BEGIN 1 */
	315
	316	/* USER CODE END 1 */
	317	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/