| 提交 | 用户 | age | ||
| 8b51c7 | 1 | /** |
| Q | 2 | ****************************************************************************** |
| 3 | * @file : BSP.c | |
| 4 | * @brief : Board Speciafic program | |
| 5 | ****************************************************************************** | |
| 6 | * | |
| 7 | ****************************************************************************** | |
| 8 | */ | |
| 9 | /* Includes ------------------------------------------------------------------*/ | |
| 10 | ||
| 11 | #include "BSP.h" | |
| 12 | ||
| 13 | #include "Globaldef.h" | |
| 14 | #include "Functions.h" | |
| 15 | ||
| 16 | /** | |
| 17 | * @brief System Clock Configuration | |
| 18 | * @retval None | |
| 19 | */ | |
| 20 | ||
| 21 | void SystemClock_Config(void) | |
| 22 | { | |
| 23 | RCC_OscInitTypeDef RCC_OscInitStruct = {0}; | |
| 24 | RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; | |
| 25 | ||
| 26 | /** Initializes the CPU, AHB and APB busses clocks | |
| 27 | */ | |
| 28 | RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; | |
| 29 | RCC_OscInitStruct.HSEState = RCC_HSE_ON; | |
| 30 | RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; | |
| 31 | RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; | |
| 32 | // RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; | |
| 33 | ||
| 34 | #if (XLAT_FREQ == 12) | |
| 35 | RCC_OscInitStruct.PLL.PREDIV = RCC_PREDIV_DIV3; | |
| 36 | #else | |
| 37 | RCC_OscInitStruct.PLL.PREDIV = RCC_PREDIV_DIV2; | |
| 38 | #endif | |
| 39 | ||
| 40 | RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL12; | |
| 41 | if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) | |
| 42 | { | |
| 43 | Error_Handler(); | |
| 44 | } | |
| 45 | /** Initializes the CPU, AHB and APB busses clocks | |
| 46 | */ | |
| 47 | RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK | |
| 48 | |RCC_CLOCKTYPE_PCLK1; | |
| 49 | RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; | |
| 50 | RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; | |
| 51 | RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; | |
| 52 | ||
| 53 | if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) != HAL_OK) | |
| 54 | { | |
| 55 | Error_Handler(); | |
| 56 | } | |
| 57 | ||
| 58 | //RCC_OscInitTypeDef RCC_OscInitStruct; | |
| 59 | //RCC_ClkInitTypeDef RCC_ClkInitStruct; | |
| 60 | RCC_PeriphCLKInitTypeDef PeriphClkInit; | |
| 61 | ||
| 62 | /**Initializes the CPU, AHB and APB busses clocks | |
| 63 | */ | |
| 64 | ||
| 65 | PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USART1; | |
| 66 | PeriphClkInit.Usart1ClockSelection = RCC_USART1CLKSOURCE_SYSCLK; | |
| 67 | ||
| 68 | if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) | |
| 69 | { | |
| 70 | _Error_Handler(__FILE__, __LINE__); | |
| 71 | } | |
| 72 | ||
| 73 | /**Configure the Systick interrupt time | |
| 74 | */ | |
| 75 | // HAL_SYSTICK_Config(HAL_RCC_GetHCLKFreq()/10000); | |
| 76 | HAL_SYSTICK_Config(48000000/10000); | |
| 77 | ||
| 78 | /**Configure the Systick | |
| 79 | */ | |
| 80 | HAL_SYSTICK_CLKSourceConfig(SYSTICK_CLKSOURCE_HCLK); | |
| 81 | ||
| 82 | /* SysTick_IRQn interrupt configuration */ | |
| 83 | HAL_NVIC_SetPriority(SysTick_IRQn, 0, 0); | |
| 84 | } | |
| 85 | ||
| 86 | void MX_IWDG_Init(void) | |
| 87 | { | |
| 88 | ||
| 89 | /* USER CODE BEGIN IWDG_Init 0 */ | |
| 90 | ||
| 91 | /* USER CODE END IWDG_Init 0 */ | |
| 92 | ||
| 93 | /* USER CODE BEGIN IWDG_Init 1 */ | |
| 94 | ||
| 95 | /* USER CODE END IWDG_Init 1 */ | |
| 96 | LL_IWDG_Enable(IWDG); | |
| 97 | LL_IWDG_EnableWriteAccess(IWDG); | |
| 98 | LL_IWDG_SetPrescaler(IWDG, LL_IWDG_PRESCALER_64); | |
| 99 | LL_IWDG_SetReloadCounter(IWDG, 4095); | |
| 100 | while (LL_IWDG_IsReady(IWDG) != 1) | |
| 101 | { | |
| 102 | } | |
| 103 | ||
| 104 | LL_IWDG_SetWindow(IWDG, 4095); | |
| 105 | LL_IWDG_ReloadCounter(IWDG); | |
| 106 | /* USER CODE BEGIN IWDG_Init 2 */ | |
| 107 | ||
| 108 | /* USER CODE END IWDG_Init 2 */ | |
| 109 | ||
| 110 | } | |
| 111 | /** | |
| 112 | * @brief TIM6 Initialization Function | |
| 113 | * @param None | |
| 114 | * @retval None | |
| 115 | */ | |
| 116 | void MX_TIM6_Init(void) | |
| 117 | { | |
| 118 | ||
| 119 | /* USER CODE BEGIN TIM6_Init 0 */ | |
| 120 | ||
| 121 | /* USER CODE END TIM6_Init 0 */ | |
| 122 | ||
| 123 | LL_TIM_InitTypeDef TIM_InitStruct = {0}; | |
| 124 | ||
| 125 | /* Peripheral clock enable */ | |
| 126 | LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_TIM6); | |
| 127 | ||
| 128 | /* TIM6 interrupt Init */ | |
| 129 | NVIC_SetPriority(TIM6_IRQn, 0); | |
| 130 | NVIC_EnableIRQ(TIM6_IRQn); | |
| 131 | ||
| 132 | /* USER CODE BEGIN TIM6_Init 1 */ | |
| 133 | ||
| 134 | /* USER CODE END TIM6_Init 1 */ | |
| 135 | TIM_InitStruct.Prescaler = 47; | |
| 136 | TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; | |
| 137 | TIM_InitStruct.Autoreload = 999; | |
| 138 | LL_TIM_Init(TIM6, &TIM_InitStruct); | |
| 139 | LL_TIM_DisableARRPreload(TIM6); | |
| 140 | /* USER CODE BEGIN TIM6_Init 2 */ | |
| 141 | LL_TIM_EnableIT_UPDATE(TIM6); | |
| 142 | /* USER CODE END TIM6_Init 2 */ | |
| 143 | ||
| 144 | } | |
| 145 | /* ADC init function */ | |
| 146 | void MX_ADC_Init(void) | |
| 147 | { | |
| 148 | ||
| 149 | LL_ADC_InitTypeDef ADC_InitStruct; | |
| 150 | LL_ADC_REG_InitTypeDef ADC_REG_InitStruct; | |
| 151 | ||
| 152 | /* Peripheral clock enable */ | |
| 153 | LL_APB1_GRP2_EnableClock(LL_APB1_GRP2_PERIPH_ADC1); | |
| 154 | ||
| 155 | /**Configure Regular Channel | |
| 156 | */ | |
| 157 | LL_ADC_REG_SetSequencerChAdd(ADC1, LL_ADC_CHANNEL_0|LL_ADC_CHANNEL_1); | |
| 158 | ||
| 159 | LL_ADC_SetCommonPathInternalCh(__LL_ADC_COMMON_INSTANCE(ADC1), LL_ADC_PATH_INTERNAL_TEMPSENSOR|LL_ADC_PATH_INTERNAL_VREFINT); | |
| 160 | ||
| 161 | /**Configure Regular Channel | |
| 162 | */ | |
| 163 | LL_ADC_REG_SetSequencerChAdd(ADC1, LL_ADC_CHANNEL_TEMPSENSOR|LL_ADC_CHANNEL_VREFINT); | |
| 164 | ||
| 165 | LL_ADC_SetCommonPathInternalCh(__LL_ADC_COMMON_INSTANCE(ADC1), LL_ADC_PATH_INTERNAL_TEMPSENSOR|LL_ADC_PATH_INTERNAL_VREFINT); | |
| 166 | ||
| 167 | /**Configure the global features of the ADC (Clock, Resolution, Data Alignment and number of conversion) | |
| 168 | */ | |
| 169 | ADC_InitStruct.Clock = LL_ADC_CLOCK_ASYNC; | |
| 170 | ADC_InitStruct.Resolution = LL_ADC_RESOLUTION_12B; | |
| 171 | ADC_InitStruct.DataAlignment = LL_ADC_DATA_ALIGN_RIGHT; | |
| 172 | ADC_InitStruct.LowPowerMode = LL_ADC_LP_MODE_NONE; | |
| 173 | LL_ADC_Init(ADC1, &ADC_InitStruct); | |
| 174 | ||
| 175 | ADC_REG_InitStruct.TriggerSource = LL_ADC_REG_TRIG_SOFTWARE; | |
| 176 | ADC_REG_InitStruct.SequencerDiscont = LL_ADC_REG_SEQ_DISCONT_DISABLE; | |
| 177 | ADC_REG_InitStruct.ContinuousMode = LL_ADC_REG_CONV_SINGLE; | |
| 178 | ADC_REG_InitStruct.DMATransfer = LL_ADC_REG_DMA_TRANSFER_LIMITED; | |
| 179 | ADC_REG_InitStruct.Overrun = LL_ADC_REG_OVR_DATA_PRESERVED; | |
| 180 | LL_ADC_REG_Init(ADC1, &ADC_REG_InitStruct); | |
| 181 | ||
| 182 | LL_ADC_REG_SetSequencerScanDirection(ADC1, LL_ADC_REG_SEQ_SCAN_DIR_FORWARD); | |
| 183 | ||
| 184 | LL_ADC_SetSamplingTimeCommonChannels(ADC1, LL_ADC_SAMPLINGTIME_28CYCLES_5); | |
| 185 | ||
| 186 | LL_ADC_EnableIT_EOC(ADC1); | |
| 187 | ||
| 188 | LL_ADC_DisableIT_EOS(ADC1); | |
| 189 | ||
| 190 | LL_ADC_StartCalibration(ADC1); | |
| 191 | ||
| 192 | // LL_ADC_EnableInternalRegulator(ADC1); | |
| 193 | ||
| 194 | // ADC_TempSensorCmd(ENABLE);//????????? | |
| 195 | // ADC_VrefintCmd(ENABLE); //???????? | |
| 196 | ||
| 197 | ||
| 198 | //ADC_TempSensorCmd(ENABLE);// | |
| 199 | //ADC_ChannelConfig(); | |
| 200 | //ADC_VrefintCmd(ENABLE); // | |
| 201 | ||
| 202 | while( LL_ADC_IsCalibrationOnGoing(ADC1)); | |
| 203 | LL_ADC_Enable(ADC1); | |
| 204 | /* | |
| 205 | LL_ADC_REG_SetDMATransfer(ADC1,LL_ADC_REG_DMA_TRANSFER_UNLIMITED); | |
| 206 | LL_ADC_REG_StartConversion(ADC1); | |
| 207 | */ | |
| 208 | } | |
| 209 | ||
| 210 | /* SPI1 init function */ | |
| 211 | void MX_SPI1_Init(void) | |
| 212 | { | |
| 213 | ||
| 214 | LL_SPI_InitTypeDef SPI_InitStruct = {0}; | |
| 215 | ||
| 216 | LL_GPIO_InitTypeDef GPIO_InitStruct = {0}; | |
| 217 | ||
| 218 | /* Peripheral clock enable */ | |
| 219 | LL_APB1_GRP2_EnableClock(LL_APB1_GRP2_PERIPH_SPI1); | |
| 220 | ||
| 221 | /**SPI1 GPIO Configuration | |
| 222 | PA5 ------> SPI1_SCK | |
| 223 | PA6 ------> SPI1_MISO | |
| 224 | PA7 ------> SPI1_MOSI | |
| 225 | */ | |
| 226 | // GPIO_InitStruct.Pin = LL_GPIO_PIN_5; | |
| 227 | // GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; | |
| 228 | // GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_HIGH; | |
| 229 | // GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; | |
| 230 | // GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; | |
| 231 | // GPIO_InitStruct.Alternate = LL_GPIO_AF_0; | |
| 232 | // LL_GPIO_Init(GPIOA, &GPIO_InitStruct); | |
| 233 | ||
| 234 | // GPIO_InitStruct.Pin = LL_GPIO_PIN_6; | |
| 235 | // GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; | |
| 236 | // GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_HIGH; | |
| 237 | // GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; | |
| 238 | // GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; | |
| 239 | // GPIO_InitStruct.Alternate = LL_GPIO_AF_0; | |
| 240 | // LL_GPIO_Init(GPIOA, &GPIO_InitStruct); | |
| 241 | ||
| 242 | // GPIO_InitStruct.Pin = LL_GPIO_PIN_7; | |
| 243 | // GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; | |
| 244 | // GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_HIGH; | |
| 245 | // GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; | |
| 246 | // GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; | |
| 247 | // GPIO_InitStruct.Alternate = LL_GPIO_AF_0; | |
| 248 | // LL_GPIO_Init(GPIOA, &GPIO_InitStruct); | |
| 249 | ||
| 250 | LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOB); | |
| 251 | /**SPI1 GPIO Configuration | |
| 252 | PB3 ------> SPI1_SCK | |
| 253 | PB4 ------> SPI1_MISO | |
| 254 | PB5 ------> SPI1_MOSI | |
| 255 | */ | |
| 256 | GPIO_InitStruct.Pin = LL_GPIO_PIN_3; | |
| 257 | GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; | |
| 258 | GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_HIGH; | |
| 259 | GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; | |
| 260 | GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; | |
| 261 | GPIO_InitStruct.Alternate = LL_GPIO_AF_0; | |
| 262 | LL_GPIO_Init(GPIOB, &GPIO_InitStruct); | |
| 263 | ||
| 264 | GPIO_InitStruct.Pin = LL_GPIO_PIN_4; | |
| 265 | GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; | |
| 266 | GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_HIGH; | |
| 267 | GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; | |
| 268 | GPIO_InitStruct.Pull = LL_GPIO_PULL_UP; | |
| 269 | GPIO_InitStruct.Alternate = LL_GPIO_AF_0; | |
| 270 | LL_GPIO_Init(GPIOB, &GPIO_InitStruct); | |
| 271 | ||
| 272 | GPIO_InitStruct.Pin = LL_GPIO_PIN_5; | |
| 273 | GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; | |
| 274 | GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_HIGH; | |
| 275 | GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; | |
| 276 | GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; | |
| 277 | GPIO_InitStruct.Alternate = LL_GPIO_AF_0; | |
| 278 | LL_GPIO_Init(GPIOB, &GPIO_InitStruct); | |
| 279 | ||
| 280 | /* SPI1 interrupt Init */ | |
| 281 | NVIC_SetPriority(SPI1_IRQn, 0); | |
| 282 | // NVIC_EnableIRQ(SPI1_IRQn); | |
| 283 | /* USER CODE BEGIN SPI1_Init 1 */ | |
| 284 | ||
| 285 | #if (BOARD_TYPE == 13) | |
| 286 | ||
| 287 | NVIC_EnableIRQ(SPI1_IRQn); | |
| 288 | SPI_InitStruct.TransferDirection = LL_SPI_FULL_DUPLEX; | |
| 289 | SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; | |
| 290 | SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_8BIT; | |
| 291 | SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH; //LL_SPI_POLARITY_LOW; | |
| 292 | SPI_InitStruct.ClockPhase = LL_SPI_PHASE_2EDGE ; //LL_SPI_PHASE_1EDGE; | |
| 293 | SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; | |
| 294 | SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV2; | |
| 295 | SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; | |
| 296 | SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; | |
| 297 | SPI_InitStruct.CRCPoly = 7; | |
| 298 | LL_SPI_Init(SPI1, &SPI_InitStruct); | |
| 299 | ||
| 300 | LL_SPI_SetStandard(SPI1, LL_SPI_PROTOCOL_MOTOROLA); | |
| 301 | ||
| 302 | LL_SPI_SetRxFIFOThreshold(SPI1,LL_SPI_RX_FIFO_TH_QUARTER); | |
| 303 | // LL_SPI_EnableNSSPulseMgt(SPI1); | |
| 304 | ||
| 305 | #elif (BOARD_TYPE == 14) | |
| 306 | ||
| 307 | NVIC_EnableIRQ(SPI1_IRQn); | |
| 308 | SPI_InitStruct.TransferDirection = LL_SPI_FULL_DUPLEX; | |
| 309 | SPI_InitStruct.Mode = LL_SPI_MODE_SLAVE; | |
| 310 | SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_8BIT; | |
| 311 | SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_LOW; //LL_SPI_POLARITY_LOW; | |
| 312 | SPI_InitStruct.ClockPhase = LL_SPI_PHASE_2EDGE ; //LL_SPI_PHASE_1EDGE; | |
| 313 | SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; | |
| 314 | SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV4; | |
| 315 | SPI_InitStruct.BitOrder = LL_SPI_LSB_FIRST; | |
| 316 | SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; | |
| 317 | SPI_InitStruct.CRCPoly = 7; | |
| 318 | LL_SPI_Init(SPI1, &SPI_InitStruct); | |
| 319 | ||
| 320 | LL_SPI_SetStandard(SPI1, LL_SPI_PROTOCOL_MOTOROLA); | |
| 321 | LL_SPI_DisableNSSPulseMgt(SPI1); | |
| 322 | LL_SPI_SetRxFIFOThreshold(SPI1,LL_SPI_RX_FIFO_TH_QUARTER); | |
| 323 | // LL_SPI_EnableNSSPulseMgt(SPI1); | |
| 324 | ||
| 325 | #else | |
| 326 | ||
| 327 | /* USER CODE END SPI1_Init 1 */ | |
| 328 | ||
| 329 | /* SPI1 parameter configuration*/ | |
| 330 | SPI_InitStruct.TransferDirection = LL_SPI_FULL_DUPLEX; | |
| 331 | SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; | |
| 332 | SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_8BIT; | |
| 333 | SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_LOW; | |
| 334 | SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE; | |
| 335 | SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; | |
| 336 | SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV4; | |
| 337 | SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; | |
| 338 | SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; | |
| 339 | SPI_InitStruct.CRCPoly = 7; | |
| 340 | LL_SPI_Init(SPI1, &SPI_InitStruct); | |
| 341 | ||
| 342 | LL_SPI_SetStandard(SPI1, LL_SPI_PROTOCOL_MOTOROLA); | |
| 343 | ||
| 344 | LL_SPI_SetRxFIFOThreshold(SPI1,LL_SPI_RX_FIFO_TH_QUARTER); | |
| 345 | // LL_SPI_EnableNSSPulseMgt(SPI1); | |
| 346 | ||
| 347 | /* USER CODE BEGIN SPI1_Init 2 */ | |
| 348 | ||
| 349 | #endif | |
| 350 | ||
| 351 | LL_SPI_Enable(SPI1); | |
| 352 | /* USER CODE END SPI1_Init 2 */ | |
| 353 | } | |
| 354 | ||
| 355 | /* SPI2 init function */ | |
| 356 | void MX_SPI2_Init(void) | |
| 357 | { | |
| 358 | ||
| 359 | LL_SPI_InitTypeDef SPI_InitStruct = {0}; | |
| 360 | ||
| 361 | LL_GPIO_InitTypeDef GPIO_InitStruct = {0}; | |
| 362 | ||
| 363 | /* Peripheral clock enable */ | |
| 364 | LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_SPI2); | |
| 365 | ||
| 366 | LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOB); | |
| 367 | /**SPI2 GPIO Configuration | |
| 368 | PB13 ------> SPI2_SCK | |
| 369 | PB14 ------> SPI2_MISO | |
| 370 | PB15 ------> SPI2_MOSI | |
| 371 | */ | |
| 372 | GPIO_InitStruct.Pin = LL_GPIO_PIN_13; | |
| 373 | GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; | |
| 374 | GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_HIGH; | |
| 375 | GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; | |
| 376 | GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; | |
| 377 | GPIO_InitStruct.Alternate = LL_GPIO_AF_0; | |
| 378 | LL_GPIO_Init(GPIOB, &GPIO_InitStruct); | |
| 379 | ||
| 380 | GPIO_InitStruct.Pin = LL_GPIO_PIN_14; | |
| 381 | GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; | |
| 382 | GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_HIGH; | |
| 383 | GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; | |
| 384 | GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; | |
| 385 | GPIO_InitStruct.Alternate = LL_GPIO_AF_0; | |
| 386 | LL_GPIO_Init(GPIOB, &GPIO_InitStruct); | |
| 387 | ||
| 388 | GPIO_InitStruct.Pin = LL_GPIO_PIN_15; | |
| 389 | GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; | |
| 390 | GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_HIGH; | |
| 391 | GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; | |
| 392 | GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; | |
| 393 | GPIO_InitStruct.Alternate = LL_GPIO_AF_0; | |
| 394 | LL_GPIO_Init(GPIOB, &GPIO_InitStruct); | |
| 395 | ||
| 396 | /* SPI2 interrupt Init */ | |
| 397 | //NVIC_SetPriority(SPI2_IRQn, 0); | |
| 398 | //NVIC_EnableIRQ(SPI2_IRQn); | |
| 399 | /* USER CODE BEGIN SPI2_Init 1 */ | |
| 400 | ||
| 401 | /* USER CODE END SPI2_Init 1 */ | |
| 402 | ||
| 403 | /* SPI2 parameter configuration*/ | |
| 404 | SPI_InitStruct.TransferDirection = LL_SPI_FULL_DUPLEX; | |
| 405 | SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; | |
| 406 | SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_8BIT; | |
| 407 | SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_LOW; //LL_SPI_POLARITY_HIGH;//LL_SPI_POLARITY_LOW; | |
| 408 | SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE; //LL_SPI_PHASE_1EDGE; | |
| 409 | SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; | |
| 410 | SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV2; | |
| 411 | SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; | |
| 412 | SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; | |
| 413 | SPI_InitStruct.CRCPoly = 7; | |
| 414 | LL_SPI_Init(SPI2, &SPI_InitStruct); | |
| 415 | LL_SPI_SetStandard(SPI2, LL_SPI_PROTOCOL_MOTOROLA); | |
| 416 | LL_SPI_EnableNSSPulseMgt(SPI2); | |
| 417 | /* USER CODE BEGIN SP21_Init 2 */ | |
| 418 | LL_SPI_Enable(SPI2); | |
| 419 | /* USER CODE END SPI2_Init 2 */ | |
| 420 | } | |
| 421 | ||
| 422 | ||
| 423 | /* USART1 init function */ | |
| 424 | void MX_USART1_UART_Init(void) | |
| 425 | { | |
| 426 | ||
| 427 | LL_USART_InitTypeDef USART_InitStruct; | |
| 428 | ||
| 429 | LL_GPIO_InitTypeDef GPIO_InitStruct; | |
| 430 | ||
| 431 | /* Peripheral clock enable */ | |
| 432 | LL_APB1_GRP2_EnableClock(LL_APB1_GRP2_PERIPH_USART1); | |
| 433 | ||
| 434 | /**USART1 GPIO Configuration | |
| 435 | // PA1 ------> USART1_DE | |
| 436 | PA9 ------> USART1_TX | |
| 437 | PA10 ------> USART1_RX | |
| 438 | */ | |
| 439 | GPIO_InitStruct.Pin = LL_GPIO_PIN_9|LL_GPIO_PIN_10; | |
| 440 | GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; | |
| 441 | GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_HIGH; | |
| 442 | GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; | |
| 443 | GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; | |
| 444 | GPIO_InitStruct.Alternate = LL_GPIO_AF_1; | |
| 445 | LL_GPIO_Init(GPIOA, &GPIO_InitStruct); | |
| 446 | ||
| 447 | /* USART1 DMA Init */ | |
| 448 | ||
| 449 | /* USART1_TX Init */ | |
| 450 | LL_DMA_SetDataTransferDirection(DMA1, LL_DMA_CHANNEL_2, LL_DMA_DIRECTION_MEMORY_TO_PERIPH); | |
| 451 | LL_DMA_SetChannelPriorityLevel(DMA1, LL_DMA_CHANNEL_2, LL_DMA_PRIORITY_LOW); | |
| 452 | LL_DMA_SetMode(DMA1, LL_DMA_CHANNEL_2, LL_DMA_MODE_NORMAL); | |
| 453 | LL_DMA_SetPeriphIncMode(DMA1, LL_DMA_CHANNEL_2, LL_DMA_PERIPH_NOINCREMENT); | |
| 454 | LL_DMA_SetMemoryIncMode(DMA1, LL_DMA_CHANNEL_2, LL_DMA_MEMORY_INCREMENT); | |
| 455 | LL_DMA_SetPeriphSize(DMA1, LL_DMA_CHANNEL_2, LL_DMA_PDATAALIGN_BYTE); | |
| 456 | LL_DMA_SetMemorySize(DMA1, LL_DMA_CHANNEL_2, LL_DMA_MDATAALIGN_BYTE); | |
| 457 | ||
| 458 | /* USART1_RX Init */ | |
| 459 | LL_DMA_SetDataTransferDirection(DMA1, LL_DMA_CHANNEL_3, LL_DMA_DIRECTION_PERIPH_TO_MEMORY); | |
| 460 | LL_DMA_SetChannelPriorityLevel(DMA1, LL_DMA_CHANNEL_3, LL_DMA_PRIORITY_LOW); | |
| 461 | LL_DMA_SetMode(DMA1, LL_DMA_CHANNEL_3, LL_DMA_MODE_NORMAL); | |
| 462 | LL_DMA_SetPeriphIncMode(DMA1, LL_DMA_CHANNEL_3, LL_DMA_PERIPH_NOINCREMENT); | |
| 463 | LL_DMA_SetMemoryIncMode(DMA1, LL_DMA_CHANNEL_3, LL_DMA_MEMORY_INCREMENT); | |
| 464 | LL_DMA_SetPeriphSize(DMA1, LL_DMA_CHANNEL_3, LL_DMA_PDATAALIGN_BYTE); | |
| 465 | LL_DMA_SetMemorySize(DMA1, LL_DMA_CHANNEL_3, LL_DMA_MDATAALIGN_BYTE); | |
| 466 | ||
| 467 | /* USART1 interrupt Init */ | |
| 468 | NVIC_SetPriority(USART1_IRQn, 0); | |
| 469 | NVIC_EnableIRQ(USART1_IRQn); | |
| 470 | ||
| 471 | USART_InitStruct.BaudRate = 115200; | |
| 472 | USART_InitStruct.DataWidth = LL_USART_DATAWIDTH_8B; | |
| 473 | USART_InitStruct.StopBits = LL_USART_STOPBITS_1; | |
| 474 | USART_InitStruct.Parity = LL_USART_PARITY_NONE; | |
| 475 | USART_InitStruct.TransferDirection = LL_USART_DIRECTION_TX_RX; | |
| 476 | USART_InitStruct.HardwareFlowControl = LL_USART_HWCONTROL_NONE; | |
| 477 | USART_InitStruct.OverSampling = LL_USART_OVERSAMPLING_16; | |
| 478 | LL_USART_Init(USART1, &USART_InitStruct); | |
| 479 | // LL_USART_EnableDEMode(USART1); | |
| 480 | // LL_USART_SetDESignalPolarity(USART1, LL_USART_DE_POLARITY_LOW); | |
| 481 | // LL_USART_SetDEAssertionTime(USART1, 1); | |
| 482 | // LL_USART_SetDEDeassertionTime(USART1, 1); | |
| 483 | // LL_USART_EnableOneBitSamp(USART1); | |
| 484 | LL_USART_EnableAutoBaudRate(USART1); | |
| 485 | LL_USART_SetAutoBaudRateMode(USART1, LL_USART_AUTOBAUD_DETECT_ON_FALLINGEDGE); | |
| 486 | LL_USART_DisableOverrunDetect(USART1); | |
| 487 | LL_USART_ConfigAsyncMode(USART1); | |
| 488 | LL_USART_Enable(USART1); | |
| 489 | } | |
| 490 | ||
| 491 | ||
| 492 | /* USART2 init function */ | |
| 493 | void MX_USART2_UART_Init(void) | |
| 494 | { | |
| 495 | ||
| 496 | LL_USART_InitTypeDef USART_InitStruct = {0}; | |
| 497 | LL_GPIO_InitTypeDef GPIO_InitStruct = {0}; | |
| 498 | ||
| 499 | /* Peripheral clock enable */ | |
| 500 | LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_USART2); | |
| 501 | LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOA); | |
| 502 | ||
| 503 | /**USART2 GPIO Configuration | |
| 504 | PA1 ------> USART2_DE | |
| 505 | PA2 ------> USART2_TX | |
| 506 | PA3 ------> USART2_RX | |
| 507 | */ | |
| 508 | ||
| 509 | GPIO_InitStruct.Pin = LL_GPIO_PIN_1|LL_GPIO_PIN_2|LL_GPIO_PIN_3; | |
| 510 | GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; | |
| 511 | GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_HIGH; | |
| 512 | GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_OPENDRAIN; | |
| 513 | GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; | |
| 514 | GPIO_InitStruct.Alternate = LL_GPIO_AF_1; | |
| 515 | LL_GPIO_Init(GPIOA, &GPIO_InitStruct); | |
| 516 | ||
| 517 | /* USART2 DMA Init */ | |
| 518 | ||
| 519 | /* USART2_TX Init */ | |
| 520 | LL_DMA_SetDataTransferDirection(DMA1, LL_DMA_CHANNEL_4, LL_DMA_DIRECTION_MEMORY_TO_PERIPH); | |
| 521 | LL_DMA_SetChannelPriorityLevel(DMA1, LL_DMA_CHANNEL_4, LL_DMA_PRIORITY_LOW); | |
| 522 | LL_DMA_SetMode(DMA1, LL_DMA_CHANNEL_4, LL_DMA_MODE_NORMAL); | |
| 523 | LL_DMA_SetPeriphIncMode(DMA1, LL_DMA_CHANNEL_4, LL_DMA_PERIPH_NOINCREMENT); | |
| 524 | LL_DMA_SetMemoryIncMode(DMA1, LL_DMA_CHANNEL_4, LL_DMA_MEMORY_INCREMENT); | |
| 525 | LL_DMA_SetPeriphSize(DMA1, LL_DMA_CHANNEL_4, LL_DMA_PDATAALIGN_BYTE); | |
| 526 | LL_DMA_SetMemorySize(DMA1, LL_DMA_CHANNEL_4, LL_DMA_MDATAALIGN_BYTE); | |
| 527 | ||
| 528 | /* USART2_RX Init */ | |
| 529 | LL_DMA_SetDataTransferDirection(DMA1, LL_DMA_CHANNEL_5, LL_DMA_DIRECTION_PERIPH_TO_MEMORY); | |
| 530 | LL_DMA_SetChannelPriorityLevel(DMA1, LL_DMA_CHANNEL_5, LL_DMA_PRIORITY_LOW); | |
| 531 | LL_DMA_SetMode(DMA1, LL_DMA_CHANNEL_5, LL_DMA_MODE_NORMAL); | |
| 532 | LL_DMA_SetPeriphIncMode(DMA1, LL_DMA_CHANNEL_5, LL_DMA_PERIPH_NOINCREMENT); | |
| 533 | LL_DMA_SetMemoryIncMode(DMA1, LL_DMA_CHANNEL_5, LL_DMA_MEMORY_INCREMENT); | |
| 534 | LL_DMA_SetPeriphSize(DMA1, LL_DMA_CHANNEL_5, LL_DMA_PDATAALIGN_BYTE); | |
| 535 | LL_DMA_SetMemorySize(DMA1, LL_DMA_CHANNEL_5, LL_DMA_MDATAALIGN_BYTE); | |
| 536 | ||
| 537 | /* USART2 interrupt Init */ | |
| 538 | NVIC_SetPriority(USART2_IRQn, 0); | |
| 539 | NVIC_EnableIRQ(USART2_IRQn); | |
| 540 | ||
| 541 | NVIC_SetPriority(PendSV_IRQn, 255); | |
| 542 | NVIC_EnableIRQ(PendSV_IRQn); | |
| 543 | // NVIC_SetPendingIRQ(PendSV_IRQn); | |
| 544 | ||
| 545 | USART_InitStruct.BaudRate = 115200; | |
| 546 | USART_InitStruct.DataWidth = LL_USART_DATAWIDTH_8B; | |
| 547 | USART_InitStruct.StopBits = LL_USART_STOPBITS_1; | |
| 548 | USART_InitStruct.Parity = LL_USART_PARITY_NONE; | |
| 549 | USART_InitStruct.TransferDirection = LL_USART_DIRECTION_TX_RX; | |
| 550 | USART_InitStruct.HardwareFlowControl = LL_USART_HWCONTROL_NONE; | |
| 551 | USART_InitStruct.OverSampling = LL_USART_OVERSAMPLING_8; | |
| 552 | LL_USART_Init(USART2, &USART_InitStruct); | |
| 553 | ||
| 554 | LL_USART_EnableDEMode(USART2); | |
| 555 | LL_USART_SetDESignalPolarity(USART2, LL_USART_DE_POLARITY_LOW); | |
| 556 | // LL_USART_SetDESignalPolarity(USART2, LL_USART_DE_POLARITY_HIGH); | |
| 557 | LL_USART_SetDEAssertionTime(USART2, 3); | |
| 558 | LL_USART_SetDEDeassertionTime(USART2, 3); | |
| 559 | // LL_USART_EnableOneBitSamp(USART2); | |
| 560 | // LL_USART_EnableAutoBaudRate(USART2); | |
| 561 | // LL_USART_SetAutoBaudRateMode(USART2, LL_USART_AUTOBAUD_DETECT_ON_FALLINGEDGE); | |
| 562 | LL_USART_DisableOverrunDetect(USART2); | |
| 563 | LL_USART_ConfigAsyncMode(USART2); | |
| 564 | LL_USART_Enable(USART2); | |
| 565 | } | |
| 566 | ||
| 567 | /** | |
| 568 | * Enable DMA controller clock | |
| 569 | */ | |
| 570 | void MX_DMA_Init(void) | |
| 571 | { | |
| 572 | /* Init with LL driver */ | |
| 573 | /* DMA controller clock enable */ | |
| 574 | LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_DMA1); | |
| 575 | ||
| 576 | /* DMA interrupt init */ | |
| 577 | /* DMA1_Channel2_3_IRQn interrupt configuration */ | |
| 578 | NVIC_SetPriority(DMA1_Channel2_3_IRQn, 0); | |
| 579 | NVIC_EnableIRQ(DMA1_Channel2_3_IRQn); | |
| 580 | NVIC_SetPriority(DMA1_Channel4_5_IRQn, 0); | |
| 581 | NVIC_EnableIRQ(DMA1_Channel4_5_IRQn); | |
| 582 | } | |
| 583 | ||
| 584 | /** Configure pins as | |
| 585 | * Analog | |
| 586 | * Input | |
| 587 | * Output | |
| 588 | * EVENT_OUT | |
| 589 | * EXTI | |
| 590 | */ | |
| 591 | void MX_GPIO_Init(void) | |
| 592 | { | |
| 593 | ||
| 594 | LL_GPIO_InitTypeDef GPIO_InitStruct; | |
| 595 | ||
| 596 | /* GPIO Ports Clock Enable */ | |
| 597 | LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOC); | |
| 598 | /**/ | |
| 599 | GPIO_InitStruct.Pin = LL_GPIO_PIN_13|LL_GPIO_PIN_14|LL_GPIO_PIN_15; | |
| 600 | GPIO_InitStruct.Mode = LL_GPIO_MODE_OUTPUT; | |
| 601 | GPIO_InitStruct.Speed = LL_GPIO_SPEED_LOW; | |
| 602 | GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; | |
| 603 | GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; | |
| 604 | LL_GPIO_Init(GPIOC, &GPIO_InitStruct); | |
| 605 | ||
| 606 | // RCC_APB2PeriphClockCmd( RCC_APB2Periph_GPIOC|RCC_APB2Periph_AFIO,ENABLE ); | |
| 607 | // PWR_BackupAccessCmd( ENABLE );/* ????RTC??????*/ | |
| 608 | // RCC_LSEConfig( RCC_LSE_OFF ); /* ????????,PC14+PC15??????IO*/ | |
| 609 | // BKP_TamperPinCmd(DISABLE); /* ????????,PC13??????IO*/ | |
| 610 | ||
| 611 | ||
| 612 | } | |
