F030C8T6_Kbus_MIX.git

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2024-11-25 9aed5d7e7b3c7bf09da712e9c272ece401a7acc9

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8b51c7	1	/**
Q	2	******************************************************************************
	3	* @file : functions.c
	4	* @brief : funcstions program body
	5	******************************************************************************
	6	*/
	7	//#include "globaldef.h"
	8	#include "functions.h"
	9	#include "string.h"
	10	#include "stm32f0xx_hal.h"
	11	#if (BOARD_TYPE == 14)
	12	#include "fp0.h"
	13	#endif
	14	extern __IO uint32_t uwTick;
	15
	16	unsigned char Uart3RxBuf[UART3RXBUFSIZE];
	17	unsigned char Uart3TxBuf[UART3TXBUFSIZE];
	18	stUartStat Uart3Stat={0};
	19	unsigned int Uart3RecvBuf1DataLen =0;
	20	unsigned int Uart3ToSendLen =0 ;
	21	unsigned int Uart3SentLen = 0;
	22
	23	unsigned char Uart5RxBuf[UART5RXBUFSIZE];
	24	unsigned char Uart5TxBuf[UART5TXBUFSIZE];
	25	stUartStat Uart5Stat={0};
	26	unsigned int Uart5RecvBuf1DataLen =0;
	27	unsigned int Uart5ToSendLen =0 ;
	28	unsigned int Uart5SentLen = 0;
	29
	30	unsigned char Uart6RxBuf[UART6RXBUFSIZE];
	31	unsigned char Uart6TxBuf[UART6TXBUFSIZE];
	32	stUartStat Uart6Stat={0};
	33	unsigned int Uart6RecvBuf1DataLen =0;
	34	unsigned int Uart6ToSendLen =0 ;
	35	unsigned int Uart6SentLen = 0;
	36
	37	//#include "Myprotocol.h"
	38	int TickFreq=10000;
	39	int CoreClkMHz; //=SystemCoreClock/1000000;
	40	int TickPriodClk; //=SystemCoreClock/TickFreq;
	41	unsigned int TickPrioduS; //
	42	volatile unsigned int nCurTick=0;
	43	volatile unsigned int CurTickuS=0;
	44	//volatile unsigned int ThisRunTime=0; //开机时间
	45	//volatile unsigned int TotalRunTime=0; //总开机时间
	46	//volatile unsigned int PwrCount=0; //开机次数
	47	unsigned short ClkuS; //每个Clk的nS数，
	48
	49	int InituS(int TickFreq1)
	50	{
	51	TickPrioduS=1000000/TickFreq1; //每个SysTick的微秒数
	52	CoreClkMHz=HAL_RCC_GetHCLKFreq()/1000000; //=SystemCoreClock/1000000;每uS的时钟数
	53	TickPriodClk=SystemCoreClock/TickFreq1; //每个SysTick的时钟数
	54	ClkuS=(1000000LL*65536)/SystemCoreClock;
	55	CurTickuS=TickPrioduS+100u;
	56	return 0;
	57	}
	58
	59	inline unsigned int GetuS(void)
	60	{
	61	// unsigned short Clk1=SysTick->VAL;
	62
	63	int CurTickuS1=CurTickuS;
	64	int Val1=SysTick->VAL;
	65	if (CurTickuS1 != CurTickuS )
	66	{
	67	CurTickuS1=CurTickuS;
	68	Val1=SysTick->VAL;
	69	}
	70	uint32_t us1=CurTickuS1-(((Val1)*1365)>>16);
	71	return us1;
	72	}
	73
	74	inline unsigned int GetTick(void)
	75	{
	76	// unsigned short Clk1=SysTick->VAL;
	77	return nCurTick;
	78	}
	79
	80	void logData(unsigned char d)
	81	{
	82	KMem.WDB[128+KMem.WDT[123]] = d;
	83	KMem.WDT[123]++; if (KMem.WDT[123]>=100) {KMem.WDT[123]=81;}
	84	}
	85
	86	const unsigned short crc16_table[256] = {
	87	0x0000, 0x1189, 0x2312, 0x329b, 0x4624, 0x57ad, 0x6536, 0x74bf,
	88	0x8c48, 0x9dc1, 0xaf5a, 0xbed3, 0xca6c, 0xdbe5, 0xe97e, 0xf8f7,
	89	0x1081, 0x0108, 0x3393, 0x221a, 0x56a5, 0x472c, 0x75b7, 0x643e,
	90	0x9cc9, 0x8d40, 0xbfdb, 0xae52, 0xdaed, 0xcb64, 0xf9ff, 0xe876,
	91	0x2102, 0x308b, 0x0210, 0x1399, 0x6726, 0x76af, 0x4434, 0x55bd,
	92	0xad4a, 0xbcc3, 0x8e58, 0x9fd1, 0xeb6e, 0xfae7, 0xc87c, 0xd9f5,
	93	0x3183, 0x200a, 0x1291, 0x0318, 0x77a7, 0x662e, 0x54b5, 0x453c,
	94	0xbdcb, 0xac42, 0x9ed9, 0x8f50, 0xfbef, 0xea66, 0xd8fd, 0xc974,
	95	0x4204, 0x538d, 0x6116, 0x709f, 0x0420, 0x15a9, 0x2732, 0x36bb,
	96	0xce4c, 0xdfc5, 0xed5e, 0xfcd7, 0x8868, 0x99e1, 0xab7a, 0xbaf3,
	97	0x5285, 0x430c, 0x7197, 0x601e, 0x14a1, 0x0528, 0x37b3, 0x263a,
	98	0xdecd, 0xcf44, 0xfddf, 0xec56, 0x98e9, 0x8960, 0xbbfb, 0xaa72,
	99	0x6306, 0x728f, 0x4014, 0x519d, 0x2522, 0x34ab, 0x0630, 0x17b9,
	100	0xef4e, 0xfec7, 0xcc5c, 0xddd5, 0xa96a, 0xb8e3, 0x8a78, 0x9bf1,
	101	0x7387, 0x620e, 0x5095, 0x411c, 0x35a3, 0x242a, 0x16b1, 0x0738,
	102	0xffcf, 0xee46, 0xdcdd, 0xcd54, 0xb9eb, 0xa862, 0x9af9, 0x8b70,
	103	0x8408, 0x9581, 0xa71a, 0xb693, 0xc22c, 0xd3a5, 0xe13e, 0xf0b7,
	104	0x0840, 0x19c9, 0x2b52, 0x3adb, 0x4e64, 0x5fed, 0x6d76, 0x7cff,
	105	0x9489, 0x8500, 0xb79b, 0xa612, 0xd2ad, 0xc324, 0xf1bf, 0xe036,
	106	0x18c1, 0x0948, 0x3bd3, 0x2a5a, 0x5ee5, 0x4f6c, 0x7df7, 0x6c7e,
	107	0xa50a, 0xb483, 0x8618, 0x9791, 0xe32e, 0xf2a7, 0xc03c, 0xd1b5,
	108	0x2942, 0x38cb, 0x0a50, 0x1bd9, 0x6f66, 0x7eef, 0x4c74, 0x5dfd,
	109	0xb58b, 0xa402, 0x9699, 0x8710, 0xf3af, 0xe226, 0xd0bd, 0xc134,
	110	0x39c3, 0x284a, 0x1ad1, 0x0b58, 0x7fe7, 0x6e6e, 0x5cf5, 0x4d7c,
	111	0xc60c, 0xd785, 0xe51e, 0xf497, 0x8028, 0x91a1, 0xa33a, 0xb2b3,
	112	0x4a44, 0x5bcd, 0x6956, 0x78df, 0x0c60, 0x1de9, 0x2f72, 0x3efb,
	113	0xd68d, 0xc704, 0xf59f, 0xe416, 0x90a9, 0x8120, 0xb3bb, 0xa232,
	114	0x5ac5, 0x4b4c, 0x79d7, 0x685e, 0x1ce1, 0x0d68, 0x3ff3, 0x2e7a,
	115	0xe70e, 0xf687, 0xc41c, 0xd595, 0xa12a, 0xb0a3, 0x8238, 0x93b1,
	116	0x6b46, 0x7acf, 0x4854, 0x59dd, 0x2d62, 0x3ceb, 0x0e70, 0x1ff9,
	117	0xf78f, 0xe606, 0xd49d, 0xc514, 0xb1ab, 0xa022, 0x92b9, 0x8330,
	118	0x7bc7, 0x6a4e, 0x58d5, 0x495c, 0x3de3, 0x2c6a, 0x1ef1, 0x0f78
	119	};
	120
	121	unsigned short crc_check(const unsigned char * data, unsigned int length)
	122	{
	123	unsigned short crc_reg = 0xFFFF;
	124	while (length--)
	125	{
	126	crc_reg = (crc_reg >> 8) ^ crc16_table[(crc_reg ^ *data++) & 0xff];
	127	}
	128	return (~crc_reg) & 0xFFFF;
	129	}
	130
	131	const uint16_t polynom = 0xA001;
	132
	133	unsigned short crc16bitbybit(const unsigned char *ptr, unsigned int len)
	134	{
	135	uint8_t i;
	136	uint16_t crc = 0xffff;
	137
	138	if (len == 0) {
	139	len = 1;
	140	}
	141	while (len--) {
	142	crc ^= *ptr;
	143	for (i = 0; i<8; i++)
	144	{
	145	if (crc & 1) {
	146	crc >>= 1;
	147	crc ^= polynom;
	148	}
	149	else {
	150	crc >>= 1;
	151	}
	152	}
	153	ptr++;
	154	}
	155	return(crc);
	156	}
	157
	158	/* Table of CRC values for high-order byte */
	159	const uint8_t crctablehi[] = {
	160	0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81,
	161	0x40, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0,
	162	0x80, 0x41, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40, 0x00, 0xC1, 0x81, 0x40, 0x01,
	163	0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41,
	164	0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40, 0x00, 0xC1, 0x81,
	165	0x40, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0,
	166	0x80, 0x41, 0x00, 0xC1, 0x81, 0x40, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01,
	167	0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40,
	168	0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81,
	169	0x40, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0,
	170	0x80, 0x41, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40, 0x00, 0xC1, 0x81, 0x40, 0x01,
	171	0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41,
	172	0x00, 0xC1, 0x81, 0x40, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81,
	173	0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0,
	174	0x80, 0x41, 0x00, 0xC1, 0x81, 0x40, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01,
	175	0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41,
	176	0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81,
	177	0x40
	178	};
	179	/* Table of CRC values for low-order byte */
	180	const uint8_t crctablelo[] = {
	181	0x00, 0xC0, 0xC1, 0x01, 0xC3, 0x03, 0x02, 0xC2, 0xC6, 0x06, 0x07, 0xC7, 0x05, 0xC5, 0xC4,
	182	0x04, 0xCC, 0x0C, 0x0D, 0xCD, 0x0F, 0xCF, 0xCE, 0x0E, 0x0A, 0xCA, 0xCB, 0x0B, 0xC9, 0x09,
	183	0x08, 0xC8, 0xD8, 0x18, 0x19, 0xD9, 0x1B, 0xDB, 0xDA, 0x1A, 0x1E, 0xDE, 0xDF, 0x1F, 0xDD,
	184	0x1D, 0x1C, 0xDC, 0x14, 0xD4, 0xD5, 0x15, 0xD7, 0x17, 0x16, 0xD6, 0xD2, 0x12, 0x13, 0xD3,
	185	0x11, 0xD1, 0xD0, 0x10, 0xF0, 0x30, 0x31, 0xF1, 0x33, 0xF3, 0xF2, 0x32, 0x36, 0xF6, 0xF7,
	186	0x37, 0xF5, 0x35, 0x34, 0xF4, 0x3C, 0xFC, 0xFD, 0x3D, 0xFF, 0x3F, 0x3E, 0xFE, 0xFA, 0x3A,
	187	0x3B, 0xFB, 0x39, 0xF9, 0xF8, 0x38, 0x28, 0xE8, 0xE9, 0x29, 0xEB, 0x2B, 0x2A, 0xEA, 0xEE,
	188	0x2E, 0x2F, 0xEF, 0x2D, 0xED, 0xEC, 0x2C, 0xE4, 0x24, 0x25, 0xE5, 0x27, 0xE7, 0xE6, 0x26,
	189	0x22, 0xE2, 0xE3, 0x23, 0xE1, 0x21, 0x20, 0xE0, 0xA0, 0x60, 0x61, 0xA1, 0x63, 0xA3, 0xA2,
	190	0x62, 0x66, 0xA6, 0xA7, 0x67, 0xA5, 0x65, 0x64, 0xA4, 0x6C, 0xAC, 0xAD, 0x6D, 0xAF, 0x6F,
	191	0x6E, 0xAE, 0xAA, 0x6A, 0x6B, 0xAB, 0x69, 0xA9, 0xA8, 0x68, 0x78, 0xB8, 0xB9, 0x79, 0xBB,
	192	0x7B, 0x7A, 0xBA, 0xBE, 0x7E, 0x7F, 0xBF, 0x7D, 0xBD, 0xBC, 0x7C, 0xB4, 0x74, 0x75, 0xB5,
	193	0x77, 0xB7, 0xB6, 0x76, 0x72, 0xB2, 0xB3, 0x73, 0xB1, 0x71, 0x70, 0xB0, 0x50, 0x90, 0x91,
	194	0x51, 0x93, 0x53, 0x52, 0x92, 0x96, 0x56, 0x57, 0x97, 0x55, 0x95, 0x94, 0x54, 0x9C, 0x5C,
	195	0x5D, 0x9D, 0x5F, 0x9F, 0x9E, 0x5E, 0x5A, 0x9A, 0x9B, 0x5B, 0x99, 0x59, 0x58, 0x98, 0x88,
	196	0x48, 0x49, 0x89, 0x4B, 0x8B, 0x8A, 0x4A, 0x4E, 0x8E, 0x8F, 0x4F, 0x8D, 0x4D, 0x4C, 0x8C,
	197	0x44, 0x84, 0x85, 0x45, 0x87, 0x47, 0x46, 0x86, 0x82, 0x42, 0x43, 0x83, 0x41, 0x81, 0x80,
	198	0x40
	199	};
	200
	201	uint16_t crc16table(const uint8_t *ptr, uint16_t len)
	202	{
	203	uint8_t crchi = 0xff;
	204	uint8_t crclo = 0xff;
	205	uint16_t index;
	206	while (len--)
	207	{
	208	index = crclo ^ *ptr++;
	209	crclo = crchi ^ crctablehi[index];
	210	crchi = crctablelo[index];
	211	}
	212	return (crchi << 8 \| crclo);
	213	}
	214
	215	void modbuscrc16test()
	216	{
	217	printf("\n");
	218	printf(" Modbus CRC16 tester\n");
	219	printf("-----------------------------------------------------------------------\n");
	220	uint8_t crc16_data[] = { 0x01, 0x04, 0x04, 0x43, 0x6b, 0x58, 0x0e }; // expected crc value 0xD825.
	221	printf(" modbus crc16table test, expected value : 0xd825, calculate value : 0x%x\n", crc16table(crc16_data, sizeof(crc16_data)));
	222	// printf(" modbus crc16tablefast test, expected value : 0xd825, calculate value : 0x%x\n", crc16tablefast(crc16_data, sizeof(crc16_data)));
	223	printf(" modbus crc16bitbybit test, expected value : 0xd825, calculate value : 0x%x\n", crc16bitbybit(crc16_data, sizeof(crc16_data)));
	224	}
	225
	226	int InitUartstat(stUartStat * pUartstat,void * pBufRx, int nSizeRx, void * pBufTx, int nSizeTx)
	227	{
	228	memset(pUartstat,sizeof(stUartStat),0);
	229	initQueue(&pUartstat->QRx,pBufRx,nSizeRx);
	230	initQueue(&pUartstat->QTx,pBufTx,nSizeTx);
	231	return 0;
	232	}
	233
	234	int Uart1SendDMA(void * pData, int nSize)
	235	{
	236	LL_DMA_DisableChannel(DMA1,LL_DMA_CHANNEL_2);
	237	LL_DMA_ConfigAddresses(DMA1,LL_DMA_CHANNEL_2, (uint32_t)pData,
	238	(uint32_t)&USART1->TDR, LL_DMA_DIRECTION_MEMORY_TO_PERIPH);
	239	LL_DMA_SetDataLength(DMA1,LL_DMA_CHANNEL_2,nSize);
	240	LL_DMA_EnableChannel(DMA1,LL_DMA_CHANNEL_2);
	241	Uart1Stat.DMASendLen=nSize;
	242	Uart1Stat.bSending=1;
	243	LL_DMA_EnableIT_TC(DMA1,LL_DMA_CHANNEL_2);
	244	LL_USART_EnableDMAReq_TX(USART1);
	245	return nSize;
	246	}
	247
	248	int Uart1TriggerSendDMA()
	249	{
	250	if (!Uart1Stat.bSending&&!IsEmpty(&Uart1Stat.QTx))
	251	{
	252	int len1=GetContinueData(&Uart1Stat.QTx);
	253	Uart1SendDMA(GetReadBuffer(&Uart1Stat.QTx),len1);
	254	}
	255	return 0;
	256	}
	257
	258	void Uart2SetDE(void)
	259	{
	260	LL_GPIO_ResetOutputPin(GPIOA,LL_GPIO_PIN_1);
	261	}
	262	void Uart2UnsetDE(void)
	263	{
	264	LL_GPIO_SetOutputPin(GPIOA,LL_GPIO_PIN_1);
	265	}
	266	void DelayUs(int nUs)
	267	{
	268	for (int i=0;i<nUs;i++)
	269	for (volatile int j=0;j<24;j++)
	270	{
	271	__nop();
	272	}
	273	}
	274
	275	int Uart2RecvDMA(void * pBuf, int nSize)
	276	{
	277	LL_DMA_DisableChannel(DMA1,LL_DMA_CHANNEL_5);
	278	LL_DMA_ConfigAddresses(DMA1,LL_DMA_CHANNEL_5, (uint32_t)&USART2->RDR,
	279	(uint32_t)pBuf, LL_DMA_DIRECTION_PERIPH_TO_MEMORY);
	280	LL_DMA_SetDataLength(DMA1,LL_DMA_CHANNEL_5,nSize);
	281	LL_DMA_EnableChannel(DMA1,LL_DMA_CHANNEL_5);
	282	Uart2Stat.DMARecvLen=nSize;
	283	Uart2Stat.bRecving=1;
	284	LL_DMA_EnableIT_TC(DMA1,LL_DMA_CHANNEL_5);
	285	LL_USART_EnableDMAReq_RX(USART2);
	286	return 0;
	287	}
	288	int Uart2SendDMA(void * pData, int nSize)
	289	{
	290	#if (USART2_USE_HARDWARE_DE == 1)
	291
	292	#else
	293	Uart2SetDE();
	294	DelayUs(USART2_DE_ASSERTION_TIME);
	295	#endif
	296	LL_DMA_DisableChannel(DMA1,LL_DMA_CHANNEL_4);
	297	LL_DMA_ConfigAddresses(DMA1,LL_DMA_CHANNEL_4, (uint32_t)pData,
	298	(uint32_t)&USART2->TDR, LL_DMA_DIRECTION_MEMORY_TO_PERIPH);
	299	LL_DMA_SetDataLength(DMA1,LL_DMA_CHANNEL_4,nSize);
	300	LL_DMA_EnableChannel(DMA1,LL_DMA_CHANNEL_4);
	301	Uart2Stat.DMASendLen=nSize;
	302	Uart2Stat.bSending=1;
	303	LL_DMA_EnableIT_TC(DMA1,LL_DMA_CHANNEL_4);
	304	LL_USART_EnableDMAReq_TX(USART2);
	305	return nSize;
	306	}
	307	int Uart2TriggerSendDMA()
	308	{
	309	if (!Uart2Stat.bSending&&!IsEmpty(&Uart2Stat.QTx))
	310	{
	311	int len1=GetContinueData(&Uart2Stat.QTx);
	312	Uart2SendDMA(GetReadBuffer(&Uart2Stat.QTx),len1);
	313	}
	314	return 0;
	315	}
	316
	317	void TriggerPendSV()
	318	{
	319	SCB->ICSR=SCB_ICSR_PENDSVSET_Msk; //1<<SCB_ICSR_PENDSVSET_Pos;
	320	}
	321
	322
	323	void SPI1_IRQ_CallBack()
	324	{
	325	uint8_t value;
	326	// LL_GPIO_TogglePin(GPIOB,LL_GPIO_PIN_7);
	327	if (LL_SPI_IsActiveFlag_RXNE(SPI1))
	328	{
	329	value = LL_SPI_ReceiveData8( SPI1);
	330	#if (BOARD_TYPE == 14)
	331	KMem.WDD[62]++;
	332	KMem.WDT[122]++;
	333	if (!bSPI1Sending)
	334	{
	335	logData(value);
	336	}
	337	if (!bSPI1Sending && (1 \|\| bSPI1Recving))
	338	{
	339	SPI1RecvBuf[nSPI1RecvPos]=value;
	340	nSPI1RecvPos++;
	341
	342	if (value==0x0d)
	343	{
	344	logData(nSPI1RecvPos);
	345
	346	nSPI1RecvLenInBuf=nSPI1RecvPos;
	347	bSPI1RecvDone=1;
	348	nSPI1RecvPos=0;
	349	bSPI1Recving=0;
	350
	351	TriggerPendSV();
	352	}
	353	}
	354	if (bSPI1Sending)
	355	{
	356	nSPI1SentLen++;
	357	KMem.SDD[63]++;
	358
	359	if (nSPI1SentLen >= nSPI1ToSendLen) {
	360	SetACKPin_1();
	361	bSPI1Sending=0;
	362	bSPI1SendDone=1;
	363	bSPI1Recving=1;
	364	nSPI1RecvPos=0;
	365	SetFP0DEPin_0();
	366	}
	367	else {
	368	value = SPI1SendBuf[nSPI1SentLen];
	369	LL_SPI_TransmitData8(SPI1,value);
	370	logData(value);
	371	}
	372	}
	373	#endif
	374	}
	375	}
	376
	377	void Uart1SendDone()
	378	{
	379	Uart1Stat.TcCount++;
	380	return;
	381	}
	382
	383	void Uart1RecvDone()
	384	{
	385	Uart1Stat.IdelCount++;
	386	// NVIC_SetPendingIRQ(PendSV_IRQn);
	387	// SCB->ICSR=SCB_ICSR_PENDSVSET_Msk; //1<<SCB_ICSR_PENDSVSET_Pos;
	388
	389	if (Uart1RecvBuf1DataLen >0)
	390	{
	391	Uart1Stat.bPacketRecved=1;
	392	// SCB->ICSR=SCB_ICSR_PENDSVSET_Msk; //1<<SCB_ICSR_PENDSVSET_Pos;
	393	// KLParsePacket(Uart1RecvBuf1,Uart1RecvBuf1DataLen);
	394	// Uart1RecvBuf1DataLen=0;
	395	}
	396	}
	397
	398	void Uart2SendDone()
	399	{
	400	Uart2Stat.TcCount++;
	401	#if (USART2_USE_HARDWARE_DE == 1)
	402	#else
	403	Uart2UnsetDE();
	404	#endif
	405	}
	406	void Uart2RecvDone()
	407	{
	408	Uart2RecvBuf1DataLen=sizeof(Uart2RecvBuf1) - LL_DMA_GetDataLength(DMA1,LL_DMA_CHANNEL_5);
	409	Uart2Stat.bPacketRecved=1;
	410	Uart2Stat.IdelCount++;
	411	if (Uart2RecvBuf1DataLen>0)
	412	TriggerPendSV();
	413	// ParsePacket((pKBPacket)Uart2RecvBuf1,Uart2RecvBuf1DataLen);
	414	}
	415
	416	void Uart3SendDone()
	417	{
	418	// Uart1Stat.TcCount++;
	419	return;
	420	}
	421
	422	void Uart3RecvDone()
	423	{
	424	// Uart3Stat.IdelCount++;
	425	// NVIC_SetPendingIRQ(PendSV_IRQn);
	426	// SCB->ICSR=SCB_ICSR_PENDSVSET_Msk; //1<<SCB_ICSR_PENDSVSET_Pos;
	427
	428	if (Uart3RecvBuf1DataLen >0)
	429	{
	430	Uart3Stat.bPacketRecved=1;
	431	// SCB->ICSR=SCB_ICSR_PENDSVSET_Msk; //1<<SCB_ICSR_PENDSVSET_Pos;
	432	// KLParsePacket(Uart1RecvBuf1,Uart1RecvBuf1DataLen);
	433	// Uart1RecvBuf1DataLen=0;
	434	}
	435	}
	436	void Uart3SendPacket(char * str, int len)
	437	{
	438	memcpy(Uart3TxBuf,str,len);
	439	Uart3ToSendLen = len;
	440	LL_USART_EnableIT_TXE(USART3);
	441	}
	442
	443	void Uart5SendDone()
	444	{
	445	// Uart1Stat.TcCount++;
	446	return;
	447	}
	448
	449	void Uart5RecvDone()
	450	{
	451	// Uart5Stat.IdelCount++;
	452	// NVIC_SetPendingIRQ(PendSV_IRQn);
	453	// SCB->ICSR=SCB_ICSR_PENDSVSET_Msk; //1<<SCB_ICSR_PENDSVSET_Pos;
	454
	455	if (Uart5RecvBuf1DataLen >0)
	456	{
	457	Uart5Stat.bPacketRecved=1;
	458	// SCB->ICSR=SCB_ICSR_PENDSVSET_Msk; //1<<SCB_ICSR_PENDSVSET_Pos;
	459	// KLParsePacket(Uart1RecvBuf1,Uart1RecvBuf1DataLen);
	460	// Uart1RecvBuf1DataLen=0;
	461	}
	462	}
	463	void Uart5SendPacket(char * str, int len)
	464	{
	465	memcpy(Uart5TxBuf,str,len);
	466	Uart5ToSendLen = len;
	467
	468	LL_USART_EnableIT_TXE(USART5);
	469	}
	470
	471	void Uart6SendDone()
	472	{
	473	// Uart1Stat.TcCount++;
	474	return;
	475	}
	476
	477	void Uart6RecvDone()
	478	{
	479	// Uart5Stat.IdelCount++;
	480	// NVIC_SetPendingIRQ(PendSV_IRQn);
	481	// SCB->ICSR=SCB_ICSR_PENDSVSET_Msk; //1<<SCB_ICSR_PENDSVSET_Pos;
	482
	483	if (Uart6RecvBuf1DataLen >0)
	484	{
	485	Uart6Stat.bPacketRecved=1;
	486	// SCB->ICSR=SCB_ICSR_PENDSVSET_Msk; //1<<SCB_ICSR_PENDSVSET_Pos;
	487	// KLParsePacket(Uart1RecvBuf1,Uart1RecvBuf1DataLen);
	488	// Uart1RecvBuf1DataLen=0;
	489	}
	490	}
5dd1b7	491	void Uart6SendPacket(void * str, int len)
8b51c7	492	{
Q	493	memcpy(Uart6TxBuf,str,len);
	494	Uart6ToSendLen = len;
	495
	496	LL_USART_EnableIT_TXE(USART6);
	497	}
	498
5dd1b7	499	void SLPSendPacket(void * str, uchar len)
8b51c7	500	{
Q	501	Uart6SendPacket(str,len);
	502	}
	503
	504
	505	int PutStr(char * str1, int len1)
	506	{
	507	// Uart1SendDMA(str1,len1);
	508	PushIn(&Uart1Stat.QTx,str1,len1);
	509	// LL_USART_EnableIT_TXE(USART1);
	510	// LL_USART_EnableIT_TC(USART1);
	511	Uart1TriggerSendDMA();
	512	return len1;
	513	}
	514	int PutStr1(char * str1, int len1)
	515	{
	516	// Uart1SendDMA(str1,len1);
	517	PushIn(&Uart1Stat.QTx,str1,len1);
	518	// LL_USART_EnableIT_TXE(USART1);
	519	// LL_USART_EnableIT_TC(USART1);
	520	Uart1TriggerSendDMA();
	521	return len1;
	522	}
	523	int PutStr2(char * str1, int len1)
	524	{
	525	Uart2SendDMA(str1,len1);
	526	// PushIn(&Uart2Stat.QTx,str1,len1);
	527	// LL_USART_EnableIT_TXE(USART1);
	528	// LL_USART_EnableIT_TC(USART1);
	529	// Uart2TriggerSendDMA();
	530	return len1;
	531	}
	532
	533	int SendPacket(int nChn, void * pBuf,int len1)
	534	{
	535	if (nChn==1) {
	536	PutStr1((char *)pBuf,len1);
	537	// PushIn(&Uart1Stat.QTx,p1,len1);
	538	// Uart1TriggerSendDMA();
	539	Uart1Stat.SentPacket++;
	540	}else if (nChn==2){
	541	PutStr2((char *)pBuf,len1);
	542	// PushIn(&Uart2Stat.QTx,p1,len1);
	543	// Uart2TriggerSendDMA();
	544	Uart2Stat.SentPacket++;
	545	}
	546	return len1;
	547	}
	548	/*
	549	int SendPacket1(void * pBuf,int len1)
	550	{
	551	PutStr1((char *)pBuf,len1);
	552	// PushIn(&Uart1Stat.QTx,p1,len1);
	553	// Uart1TriggerSendDMA();
	554	Uart1Stat.SentPacket++;
	555	return len1;
	556	}
	557	int SendPacket2(pKBPacket p1,int len1)
	558	{
	559	PutStr2((char *)p1,len1);
	560	// PushIn(&Uart2Stat.QTx,p1,len1);
	561	// Uart2TriggerSendDMA();
	562	Uart2Stat.SentPacket++;
	563	return len1;
	564	}
	565	*/
	566	void ToggleRunLed() { LL_GPIO_TogglePin(GPIOC,LL_GPIO_PIN_13);}
	567	void ToggleErrLed() { LL_GPIO_TogglePin(GPIOC,LL_GPIO_PIN_14);}
	568	void ToggleErr2Led() { LL_GPIO_TogglePin(GPIOC,LL_GPIO_PIN_15);}
	569
	570	#if (BOARD_TYPE == 14)
	571	void ToggleOutStat() { LL_GPIO_TogglePin(GPIOC,LL_GPIO_PIN_15);}
	572
	573	void SetOutStat(uchar bOn)
	574	{
	575	if (bOn) {LL_GPIO_SetOutputPin(GPIOC,LL_GPIO_PIN_15);}
	576	else {LL_GPIO_ResetOutputPin(GPIOC,LL_GPIO_PIN_15);}
	577	}
	578	#else
	579	void ToggleOutStat() { LL_GPIO_TogglePin(GPIOA,LL_GPIO_PIN_11);}
	580
	581	void SetOutStat(uchar bOn)
	582	{
	583	if (bOn) {LL_GPIO_SetOutputPin(GPIOA,LL_GPIO_PIN_11);}
	584	else {LL_GPIO_ResetOutputPin(GPIOA,LL_GPIO_PIN_11);}
	585	}
	586	#endif
	587
	588	void SetRunLed(uchar bOn)
	589	{
	590	if (bOn) {LL_GPIO_ResetOutputPin(GPIOC,LL_GPIO_PIN_13);}
	591	else {LL_GPIO_SetOutputPin(GPIOC,LL_GPIO_PIN_13);}
	592	}
	593	void SetErrLed(uchar bOn)
	594	{
	595	if (bOn) {LL_GPIO_ResetOutputPin(GPIOC,LL_GPIO_PIN_14);}
	596	else {LL_GPIO_SetOutputPin(GPIOC,LL_GPIO_PIN_14);}
	597	}
	598	void SetErr2Led(uchar bOn)
	599	{
	600	if (bOn) {LL_GPIO_ResetOutputPin(GPIOC,LL_GPIO_PIN_15);}
	601	else {LL_GPIO_SetOutputPin(GPIOC,LL_GPIO_PIN_15);}
	602	}
	603	/*
	604	void SetLeds(uchar bRun, uchar bErr)
	605	{
	606	SetRunLed(bRun); SetErrLed (bErr);
	607	}
	608	*/
	609
	610	#define set165SL_0() LL_GPIO_ResetOutputPin(GPIOA,LL_GPIO_PIN_4)
	611	#define set165SL_1() LL_GPIO_SetOutputPin(GPIOA,LL_GPIO_PIN_4)
	612	#define set165CLK_0() LL_GPIO_ResetOutputPin(GPIOA,LL_GPIO_PIN_5)
	613	#define set165CLK_1() LL_GPIO_SetOutputPin(GPIOA,LL_GPIO_PIN_5)
	614	#define Get165SER() LL_GPIO_IsInputPinSet(GPIOA,LL_GPIO_PIN_6)
	615	#define GetCfg165SER() LL_GPIO_IsInputPinSet(GPIOA,LL_GPIO_PIN_7)
	616
	617	unsigned int Input165_8()
	618	{
	619	int x1=0;
	620	__disable_irq();
	621	set165SL_0(); set165SL_1();
	622	unsigned int mask1=0x0080;
	623	volatile uint32_t * p1=&GPIOA->IDR;
	624	for (uint32_t i=8;i;i--)
	625	{
	626	//if (Get165SER()) {}
	627	//else x1\|=mask1;
	628	if (*p1&LL_GPIO_PIN_6) {}
	629	else x1\|=mask1;
	630	//x1<<=1;
	631	//x1\|=!Get165SER();
	632	set165CLK_0();
	633	mask1>>=1;
	634	set165CLK_1();
	635	}
	636	__enable_irq();
	637	return x1;
	638	}
	639
	640	unsigned int Input165(int nBit)
	641	{
	642	int x1=0;
	643	__disable_irq();
	644	set165SL_0(); set165SL_1();
	645	unsigned int mask1=1<<(nBit-1);
	646	volatile uint32_t * p1=&GPIOA->IDR;
	647	for (uint32_t i=nBit;i;i--)
	648	{
	649	//if (Get165SER()) {}
	650	//else x1\|=mask1;
	651	if (*p1&LL_GPIO_PIN_6) {}
	652	else x1\|=mask1;
	653	//x1<<=1;
	654	//x1\|=!Get165SER();
	655	set165CLK_0();
	656	mask1>>=1;
	657	set165CLK_1();
	658	}
	659	__enable_irq();
	660	return x1;
	661	}
	662	unsigned int Input165_R(int nBit)
	663	{
	664	__disable_irq();
	665	set165SL_0(); set165SL_1();
	666	int nBytes = nBit /8;
	667	volatile uint32_t * p1=&GPIOA->IDR;
	668	union stdata
	669	{
	670	int intvalue;
	671	unsigned char Bytes[4];
	672	}rdata;
	673	rdata.intvalue=0;
	674	for (int i=0;i<nBytes;i++)
	675	{
	676	int x1=0;
	677	unsigned int mask1=1<<(7);
	678	for (uint32_t i=8;i;i--)
	679	{
	680	//if (Get165SER()) {}
	681	//else x1\|=mask1;
	682	if (*p1&LL_GPIO_PIN_6) {}
	683	else x1\|=mask1;
	684	//x1<<=1;
	685	//x1\|=!Get165SER();
	686	set165CLK_0();
	687	mask1>>=1;
	688	set165CLK_1();
	689	}
	690	rdata.Bytes[i]=x1;
	691	}
	692	__enable_irq();
	693	return rdata.intvalue;
	694	}
	695
	696	#define set165SL_C0() LL_GPIO_ResetOutputPin(GPIOA,LL_GPIO_PIN_12)
	697	#define set165SL_C1() LL_GPIO_SetOutputPin(GPIOA,LL_GPIO_PIN_12)
	698	#define set165CLK_C0() LL_GPIO_ResetOutputPin(GPIOB,LL_GPIO_PIN_13)
	699	#define set165CLK_C1() LL_GPIO_SetOutputPin(GPIOB,LL_GPIO_PIN_13)
	700	#define Get165SER_C() LL_GPIO_IsInputPinSet(GPIOB,LL_GPIO_PIN_14)
	701
	702
	703	unsigned int Input165_C(int nBit)
	704	{
	705	__disable_irq();
	706	set165SL_C0();
	707	__nop();
	708	__nop();
	709	__nop();
	710	__nop();
	711
	712	set165SL_C1();
	713	int nBytes = nBit /8;
	714	volatile uint32_t * p1=&GPIOB->IDR;
	715	union stdata
	716	{
	717	int intvalue;
	718	unsigned char Bytes[4];
	719	}rdata;
	720	rdata.intvalue=0;
	721	for (int i=0;i<nBytes;i++)
	722	{
	723	int x1=0;
	724	unsigned int mask1=1<<(7);
	725	for (uint32_t i=8;i;i--)
	726	{
	727	//if (Get165SER()) {}
	728	//else x1\|=mask1;
	729	if (*p1&LL_GPIO_PIN_14) {x1\|=mask1;}
	730	else {};
	731	//x1<<=1;
	732	//x1\|=!Get165SER();
	733	set165CLK_C0();
	734	mask1>>=1;
	735	__nop();
	736	__nop();
	737	__nop();
	738	__nop();
	739	__nop();
	740
	741	set165CLK_C1();
	742	}
	743	/*
	744	LL_SPI_TransmitData8(SPI2,0xff);
	745	while (LL_SPI_IsActiveFlag_TXE(SPI2) == RESET)
	746	{
	747	}
	748	while (LL_SPI_IsActiveFlag_BSY(SPI2) == SET)
	749	{
	750	}
	751	x1 = LL_SPI_ReceiveData8(SPI2);
	752	*/
	753	rdata.Bytes[i]=~x1;
	754	// rdata.Bytes[i]=0;
	755
	756	}
	757	__enable_irq();
	758	return rdata.intvalue;
	759	}
	760
	761	unsigned int Input165Cfg(int nBit)
	762	{
	763	int x1=0;
	764	__disable_irq();
	765	set165SL_0(); set165SL_1();
	766	unsigned int mask1=1<<(nBit-1);
	767	volatile uint32_t * p1=&GPIOA->IDR;
	768	for (uint32_t i=nBit;i;i--)
	769	{
	770	//if (Get165SER()) {}
	771	//else x1\|=mask1;
	772	if (*p1&LL_GPIO_PIN_7) {}
	773	else x1\|=mask1;
	774	//x1<<=1;
	775	//x1\|=!Get165SER();
	776	set165CLK_0();
	777	mask1>>=1;
	778	set165CLK_1();
	779	}
	780	__enable_irq();
	781	return x1;
	782	}
	783
	784	unsigned int GetInput()
	785	{
	786	int BoradType=GetBoardType();
	787	switch (BoradType)
	788	{
	789
	790	case 1:
	791	return Input165(8);
	792	case 2:
	793	return Input165(8);
	794	case 3:
	795	return Input165(16);
	796	case 4:
	797	return Input165(8);
	798	case 5:
	799	case 7:
	800	return Input165(16);
	801	case 6:
	802	case 8:
	803	return Input165(8);
	804	case 9:
	805	return Input165_R(16);
	806	case 10:
	807	return Input165_R(8);
	808	case 11:
	809	return Input165_R(8);
	810	case 13:
	811	return Input165_R(16);
	812	case 14:
	813	return 0; //FP0
	814	case 15:
	815	return Input165_R(16);
	816	case 16:
	817	return Input165_R(8);
	818
	819	case 17:
	820	return Input165_C(8);
	821
	822	default:
	823	break;
	824	}
	825	return 0;
	826
	827	}
	828	int ReadConfig_0()
	829	{
	830	return 0;
	831	}
	832
	833	int ReadConfig_1()
	834	{
	835	// uchar x = LL_GPIO_ReadInputPort(GPIOB);
	836	// uchar x1 = LL_GPIO_IsInputPinSet(GPIOB,LL_GPIO_PIN_10);
	837	// uchar x2=(x&0x7) \| (x1 << 3 ) ;
	838	uchar x2=0;
	839	x2=(GPIOB->IDR&0x7) \| ((GPIOB->IDR &0x400)>>7);
	840	x2= (~x2)&0xf;
	841	return x2;
	842	}
	843
	844	int ReadConfig_2()
	845	{
	846	uchar x2=0;
	847	x2=(GPIOB->IDR&0x7) \| ((GPIOB->IDR &0x400)>>7);
	848	x2= (~x2)&0xf;
	849	return x2;
	850	}
	851
	852	int ReadConfig_3()
	853	{
	854	uchar x2=0;
	855	x2 = Input165(24)&0xff;
	856	return x2;
	857
	858	}
	859	int ReadConfig_4()
	860	{
	861
	862	uchar x2=0;
	863	x2 = Input165(16)&0xff;
	864	return x2;
	865	}
	866
	867	int ReadConfig_5()
	868	{
	869	uchar x2=0;
	870	x2 = Input165Cfg(8)&0xff;
	871	return x2;
	872	}
	873
	874	int ReadConfig_11()
	875	{
	876	uchar x2=0;
	877	x2=((GPIOB->IDR&0x6)<<4);
	878	x2= ((~x2)&0x30)\|1;
	879	return x2;
	880	}
	881
	882	int ReadConfig_17()
	883	{
	884	shortbits v1;
	885	v1.value=0;
	886	shortbits x2;
	887	x2.value=GPIOA->IDR;
	888	v1.bit8 = ~x2.bit6;
	889	v1.bit9 = ~x2.bit7;
	890	v1.bit10 = ~x2.bit15;
	891	x2.value=GPIOB->IDR;
	892	v1.bit11 = ~x2.bit1;
	893	v1.bit12 = ~x2.bit2;
	894
	895	v1.bit0 = ~x2.bit5;
	896	v1.bit1 = ~x2.bit6;
	897	v1.bit2 = ~x2.bit7;
	898	v1.bit3 = ~x2.bit8;
	899	v1.bit4 = ~x2.bit9;
	900	x2.value=GPIOC->IDR;
	901	v1.bit13 = ~x2.bit15;
	902
	903	return v1.value;
	904	}
	905
	906	int ReadJumperSW()
	907	{
	908	int BoradType=GetBoardType();
	909	switch (BoradType)
	910	{
	911	case 0:
	912	return ReadConfig_0();
	913	case 1:
	914	return ReadConfig_1(); //old board 4 in 4 o
	915	case 2:
	916	return ReadConfig_2(); //old board 8 in 8 o
	917	case 3:
	918	return ReadConfig_3(); //Master 16 in16 o
	919	case 4:
	920	return ReadConfig_4(); //Slave 8 in 8 o
	921	case 5:
	922	case 7:
	923	return ReadConfig_5(); // New Master 16 in16 o
	924	case 6:
	925	case 8:
	926	return ReadConfig_5(); //New Slave 8 in 8 o
	927	case 9:
	928	case 10:
	929	return ReadConfig_5(); //New Master Slave 8 in 8 o
	930	case 11:
	931	return ReadConfig_11(); //Mini Board
	932	case 13:
	933	return ReadConfig_5();
	934	case 14:
	935	return (~(LL_GPIO_ReadInputPort(GPIOA)>>4))&0x0f; //FP0
	936	case 15:
	937	case 16:
	938	return ReadConfig_5(); //Wireless Master Slave 8 in 8 o
	939	case 17:
	940	return ReadConfig_17(); //Wireless Master Slave 8 in 8 o
	941	default:
	942
	943	return 0;
	944	}
	945	}
	946
	947	#define SRCLK2_0() LL_GPIO_ResetOutputPin(GPIOB,LL_GPIO_PIN_13)
	948	#define SRCLK2_1() LL_GPIO_SetOutputPin(GPIOB,LL_GPIO_PIN_13)
	949	#define STRCLK2_0() LL_GPIO_ResetOutputPin(GPIOB,LL_GPIO_PIN_12)
	950	#define STRCLK2_1() LL_GPIO_SetOutputPin(GPIOB,LL_GPIO_PIN_12)
	951	#define SER2_0() LL_GPIO_ResetOutputPin(GPIOB,LL_GPIO_PIN_15)
	952	#define SER2_1() LL_GPIO_SetOutputPin(GPIOB,LL_GPIO_PIN_15)
	953
	954	void Enable595(uchar bEnable)
	955	{
	956	if (bEnable) {LL_GPIO_ResetOutputPin(GPIOA,LL_GPIO_PIN_8);}
	957	else {LL_GPIO_SetOutputPin(GPIOA,LL_GPIO_PIN_8);}
	958	}
	959
	960	void Output595_8(unsigned int cc)
	961	{
	962	//unsigned char i;
	963	;// 74HC595输出程序，输出8位
	964	// cc=~0x3f;
	965	__disable_irq();
	966	STRCLK2_1();
	967	unsigned int mask1=0x0080;
	968	//volatile uint32_t * p1 = &GPIOB->BRR;
	969	//volatile uint32_t * p2 = &GPIOB->BSRR;
	970	for (;mask1;)
	971	{
	972	SRCLK2_0();
	973	//*p1=LL_GPIO_PIN_13;
	974	if (cc&mask1) {SER2_1();}
	975	else {SER2_0();}
	976	mask1>>=1;
	977	SRCLK2_1();
	978	// __nop();
	979	//*p2=LL_GPIO_PIN_13;
	980	}
	981	STRCLK2_0();
	982	STRCLK2_1();
	983	__enable_irq();
	984	}
	985
	986	void Output595_16(unsigned int cc)
	987	{
	988	//unsigned char i;
	989	;// 74HC595输出程序，输出16位
	990	// cc=~0x3f;
	991	__disable_irq();
	992	STRCLK2_1();
	993	unsigned int mask1=0x8000;
	994	//volatile uint32_t * p1 = &GPIOB->BRR;
	995	//volatile uint32_t * p2 = &GPIOB->BSRR;
	996	for (;mask1;)
	997	{
	998	SRCLK2_0();
	999	//*p1=LL_GPIO_PIN_13;
	1000	if (cc&mask1) {SER2_1();}
	1001	else {SER2_0();}
	1002	mask1>>=1;
	1003	SRCLK2_1();
	1004	// __nop();
	1005	//*p2=LL_GPIO_PIN_13;
	1006	}
	1007	STRCLK2_0();
	1008	STRCLK2_1();
	1009	__enable_irq();
	1010	}
	1011
	1012	/*
	1013	#define STRCLK12_0() LL_GPIO_ResetOutputPin(GPIOB,LL_GPIO_PIN_7)
	1014	#define STRCLK12_1() LL_GPIO_SetOutputPin(GPIOB,LL_GPIO_PIN_7)
	1015
	1016	void PutOutputSPI1(unsigned int Y)
	1017	{
	1018	__disable_irq();
	1019	STRCLK12_1();
	1020	LL_SPI_TransmitData8(SPI1,Y>>8);
	1021	int i=0;
	1022	while (LL_SPI_IsActiveFlag_TXE(SPI1) == RESET)
	1023	{
	1024	}
	1025	KMem.SDD[28]=i;
	1026	i=0;
	1027	while (LL_SPI_IsActiveFlag_BSY(SPI1) == SET)
	1028	{
	1029	i++;
	1030	}
	1031	LL_SPI_TransmitData8(SPI1,Y);
	1032	while (LL_SPI_IsActiveFlag_TXE(SPI1) == RESET)
	1033	{
	1034	}
	1035	KMem.SDD[28]=i;
	1036	i=0;
	1037	while (LL_SPI_IsActiveFlag_BSY(SPI1) == SET)
	1038	{
	1039	i++;
	1040	}
	1041	KMem.SDD[30]=i;
	1042	STRCLK12_0();
	1043	__nop();
	1044	STRCLK12_1();
	1045	__enable_irq();
	1046	}
	1047	*/
	1048
	1049	void PutOutputSPI2(unsigned int Y)
	1050	{
	1051	__disable_irq();
	1052	STRCLK2_1();
	1053	LL_SPI_TransmitData8(SPI2,Y>>8);
	1054	int i=0;
	1055	while (LL_SPI_IsActiveFlag_TXE(SPI2) == RESET)
	1056	{
	1057	}
	1058	KMem.SDD[28]=i;
	1059	i=0;
	1060	while (LL_SPI_IsActiveFlag_BSY(SPI2) == SET)
	1061	{
	1062	i++;
	1063	}
	1064	LL_SPI_TransmitData8(SPI2,Y);
	1065	while (LL_SPI_IsActiveFlag_TXE(SPI2) == RESET)
	1066	{
	1067	}
	1068	KMem.SDD[28]=i;
	1069	i=0;
	1070	while (LL_SPI_IsActiveFlag_BSY(SPI2) == SET)
	1071	{
	1072	i++;
	1073	}
	1074	KMem.SDD[30]=i;
	1075	STRCLK2_0();
	1076	STRCLK2_1();
	1077	__enable_irq();
	1078	}
	1079
	1080	void PutOutput(unsigned int Y)
	1081	{
	1082	#if (BOARD_TYPE == 14)
	1083	return ;
	1084	#else
	1085	// PutOutputSPI2(Y);
	1086	Output595_8(Y);
	1087	#endif
	1088	}
	1089
	1090	#if (BOARD_TYPE == 9 \|\| BOARD_TYPE == 10 \|\| BOARD_TYPE == 15 \|\| BOARD_TYPE == 16)
	1091	//#pragma message("9,10")
	1092	// V4.2 管脚排列向右移动了一位。
	1093	#define SRCLK1_0() LL_GPIO_ResetOutputPin(GPIOB,LL_GPIO_PIN_1)
	1094	#define SRCLK1_1() LL_GPIO_SetOutputPin(GPIOB,LL_GPIO_PIN_1)
	1095	#define STRCLK1_0() LL_GPIO_ResetOutputPin(GPIOB,LL_GPIO_PIN_2)
	1096	#define STRCLK1_1() LL_GPIO_SetOutputPin(GPIOB,LL_GPIO_PIN_2)
	1097	#define OE1_0() LL_GPIO_ResetOutputPin(GPIOB,LL_GPIO_PIN_10)
	1098	#define OE1_1() LL_GPIO_SetOutputPin(GPIOB,LL_GPIO_PIN_10)
	1099	#define SER1_0() LL_GPIO_ResetOutputPin(GPIOB,LL_GPIO_PIN_11)
	1100	#define SER1_1() LL_GPIO_SetOutputPin(GPIOB,LL_GPIO_PIN_11)
	1101	#else //按照原来的管脚排列
	1102	#define SRCLK1_0() LL_GPIO_ResetOutputPin(GPIOB,LL_GPIO_PIN_0)
	1103	#define SRCLK1_1() LL_GPIO_SetOutputPin(GPIOB,LL_GPIO_PIN_0)
	1104	#define STRCLK1_0() LL_GPIO_ResetOutputPin(GPIOB,LL_GPIO_PIN_1)
	1105	#define STRCLK1_1() LL_GPIO_SetOutputPin(GPIOB,LL_GPIO_PIN_1)
	1106	#define OE1_0() LL_GPIO_ResetOutputPin(GPIOB,LL_GPIO_PIN_2)
	1107	#define OE1_1() LL_GPIO_SetOutputPin(GPIOB,LL_GPIO_PIN_2)
	1108	#define SER1_0() LL_GPIO_ResetOutputPin(GPIOB,LL_GPIO_PIN_10)
	1109	#define SER1_1() LL_GPIO_SetOutputPin(GPIOB,LL_GPIO_PIN_10)
	1110	#endif
	1111
	1112
	1113	void EnableDisIn(uchar bEnable)
	1114	{
	1115	if (bEnable) {OE1_0();}
	1116	else {OE1_1();}
	1117	}
	1118	/*
	1119	void displayInput(unsigned int cc)
	1120	{
	1121	//unsigned char i;
	1122	;// 74HC595输出程序，输出8位
	1123	// cc=~0x3f;
	1124	__disable_irq();
	1125	STRCLK1_1();
	1126	unsigned int mask1=0x8000;
	1127	//volatile uint32_t * p1 = &GPIOB->BRR;
	1128	//volatile uint32_t * p2 = &GPIOB->BSRR;`````
	1129	for (;mask1;)
	1130	{
	1131	SRCLK1_0();
	1132	// *p1=LL_GPIO_PIN_13;
	1133	if (cc&mask1) {SER1_1();}
	1134	else {SER1_0();}
	1135	mask1>>=1;
	1136	SRCLK1_1();
	1137	// __nop();
	1138	// *p2=LL_GPIO_PIN_13;
	1139	}
	1140	STRCLK1_0();
	1141	STRCLK1_1();
	1142	__enable_irq();
	1143	}
	1144	*/
	1145