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| 483170 | 1 | /* ---------------------------------------------------------------------- |
| Q | 2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved. |
| 3 | * | |
| 4 | * $Date: 19. March 2015 | |
| 5 | * $Revision: V.1.4.5 | |
| 6 | * | |
| 7 | * Project: CMSIS DSP Library | |
| 8 | * Title: arm_pid_init_q15.c | |
| 9 | * | |
| 10 | * Description: Q15 PID Control initialization function | |
| 11 | * | |
| 12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 | |
| 13 | * | |
| 14 | * Redistribution and use in source and binary forms, with or without | |
| 15 | * modification, are permitted provided that the following conditions | |
| 16 | * are met: | |
| 17 | * - Redistributions of source code must retain the above copyright | |
| 18 | * notice, this list of conditions and the following disclaimer. | |
| 19 | * - Redistributions in binary form must reproduce the above copyright | |
| 20 | * notice, this list of conditions and the following disclaimer in | |
| 21 | * the documentation and/or other materials provided with the | |
| 22 | * distribution. | |
| 23 | * - Neither the name of ARM LIMITED nor the names of its contributors | |
| 24 | * may be used to endorse or promote products derived from this | |
| 25 | * software without specific prior written permission. | |
| 26 | * | |
| 27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS | |
| 28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT | |
| 29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS | |
| 30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE | |
| 31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, | |
| 32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, | |
| 33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; | |
| 34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER | |
| 35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT | |
| 36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN | |
| 37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE | |
| 38 | * POSSIBILITY OF SUCH DAMAGE. | |
| 39 | * -------------------------------------------------------------------- */ | |
| 40 | ||
| 41 | #include "arm_math.h" | |
| 42 | ||
| 43 | /** | |
| 44 | * @addtogroup PID | |
| 45 | * @{ | |
| 46 | */ | |
| 47 | ||
| 48 | /** | |
| 49 | * @details | |
| 50 | * @param[in,out] *S points to an instance of the Q15 PID structure. | |
| 51 | * @param[in] resetStateFlag flag to reset the state. 0 = no change in state 1 = reset the state. | |
| 52 | * @return none. | |
| 53 | * \par Description: | |
| 54 | * \par | |
| 55 | * The <code>resetStateFlag</code> specifies whether to set state to zero or not. \n | |
| 56 | * The function computes the structure fields: <code>A0</code>, <code>A1</code> <code>A2</code> | |
| 57 | * using the proportional gain( \c Kp), integral gain( \c Ki) and derivative gain( \c Kd) | |
| 58 | * also sets the state variables to all zeros. | |
| 59 | */ | |
| 60 | ||
| 61 | void arm_pid_init_q15( | |
| 62 | arm_pid_instance_q15 * S, | |
| 63 | int32_t resetStateFlag) | |
| 64 | { | |
| 65 | ||
| 66 | #ifndef ARM_MATH_CM0_FAMILY | |
| 67 | ||
| 68 | /* Run the below code for Cortex-M4 and Cortex-M3 */ | |
| 69 | ||
| 70 | /* Derived coefficient A0 */ | |
| 71 | S->A0 = __QADD16(__QADD16(S->Kp, S->Ki), S->Kd); | |
| 72 | ||
| 73 | /* Derived coefficients and pack into A1 */ | |
| 74 | ||
| 75 | #ifndef ARM_MATH_BIG_ENDIAN | |
| 76 | ||
| 77 | S->A1 = __PKHBT(-__QADD16(__QADD16(S->Kd, S->Kd), S->Kp), S->Kd, 16); | |
| 78 | ||
| 79 | #else | |
| 80 | ||
| 81 | S->A1 = __PKHBT(S->Kd, -__QADD16(__QADD16(S->Kd, S->Kd), S->Kp), 16); | |
| 82 | ||
| 83 | #endif /* #ifndef ARM_MATH_BIG_ENDIAN */ | |
| 84 | ||
| 85 | /* Check whether state needs reset or not */ | |
| 86 | if(resetStateFlag) | |
| 87 | { | |
| 88 | /* Clear the state buffer. The size will be always 3 samples */ | |
| 89 | memset(S->state, 0, 3u * sizeof(q15_t)); | |
| 90 | } | |
| 91 | ||
| 92 | #else | |
| 93 | ||
| 94 | /* Run the below code for Cortex-M0 */ | |
| 95 | ||
| 96 | q31_t temp; /*to store the sum */ | |
| 97 | ||
| 98 | /* Derived coefficient A0 */ | |
| 99 | temp = S->Kp + S->Ki + S->Kd; | |
| 100 | S->A0 = (q15_t) __SSAT(temp, 16); | |
| 101 | ||
| 102 | /* Derived coefficients and pack into A1 */ | |
| 103 | temp = -(S->Kd + S->Kd + S->Kp); | |
| 104 | S->A1 = (q15_t) __SSAT(temp, 16); | |
| 105 | S->A2 = S->Kd; | |
| 106 | ||
| 107 | ||
| 108 | ||
| 109 | /* Check whether state needs reset or not */ | |
| 110 | if(resetStateFlag) | |
| 111 | { | |
| 112 | /* Clear the state buffer. The size will be always 3 samples */ | |
| 113 | memset(S->state, 0, 3u * sizeof(q15_t)); | |
| 114 | } | |
| 115 | ||
| 116 | #endif /* #ifndef ARM_MATH_CM0_FAMILY */ | |
| 117 | ||
| 118 | } | |
| 119 | ||
| 120 | /** | |
| 121 | * @} end of PID group | |
| 122 | */ | |
