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| 483170 | 1 | /** |
| Q | 2 | ****************************************************************************** |
| 3 | * @file stm32f0xx_ll_utils.h | |
| 4 | * @author MCD Application Team | |
| 5 | * @brief Header file of UTILS LL module. | |
| 6 | @verbatim | |
| 7 | ============================================================================== | |
| 8 | ##### How to use this driver ##### | |
| 9 | ============================================================================== | |
| 10 | [..] | |
| 11 | The LL UTILS driver contains a set of generic APIs that can be | |
| 12 | used by user: | |
| 13 | (+) Device electronic signature | |
| 14 | (+) Timing functions | |
| 15 | (+) PLL configuration functions | |
| 16 | ||
| 17 | @endverbatim | |
| 18 | ****************************************************************************** | |
| 19 | * @attention | |
| 20 | * | |
| 21 | * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> | |
| 22 | * | |
| 23 | * Redistribution and use in source and binary forms, with or without modification, | |
| 24 | * are permitted provided that the following conditions are met: | |
| 25 | * 1. Redistributions of source code must retain the above copyright notice, | |
| 26 | * this list of conditions and the following disclaimer. | |
| 27 | * 2. Redistributions in binary form must reproduce the above copyright notice, | |
| 28 | * this list of conditions and the following disclaimer in the documentation | |
| 29 | * and/or other materials provided with the distribution. | |
| 30 | * 3. Neither the name of STMicroelectronics nor the names of its contributors | |
| 31 | * may be used to endorse or promote products derived from this software | |
| 32 | * without specific prior written permission. | |
| 33 | * | |
| 34 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" | |
| 35 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE | |
| 36 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE | |
| 37 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE | |
| 38 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL | |
| 39 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR | |
| 40 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER | |
| 41 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, | |
| 42 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE | |
| 43 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | |
| 44 | * | |
| 45 | ****************************************************************************** | |
| 46 | */ | |
| 47 | ||
| 48 | /* Define to prevent recursive inclusion -------------------------------------*/ | |
| 49 | #ifndef __STM32F0xx_LL_UTILS_H | |
| 50 | #define __STM32F0xx_LL_UTILS_H | |
| 51 | ||
| 52 | #ifdef __cplusplus | |
| 53 | extern "C" { | |
| 54 | #endif | |
| 55 | ||
| 56 | /* Includes ------------------------------------------------------------------*/ | |
| 57 | #include "stm32f0xx.h" | |
| 58 | ||
| 59 | /** @addtogroup STM32F0xx_LL_Driver | |
| 60 | * @{ | |
| 61 | */ | |
| 62 | ||
| 63 | /** @defgroup UTILS_LL UTILS | |
| 64 | * @{ | |
| 65 | */ | |
| 66 | ||
| 67 | /* Private types -------------------------------------------------------------*/ | |
| 68 | /* Private variables ---------------------------------------------------------*/ | |
| 69 | ||
| 70 | /* Private constants ---------------------------------------------------------*/ | |
| 71 | /** @defgroup UTILS_LL_Private_Constants UTILS Private Constants | |
| 72 | * @{ | |
| 73 | */ | |
| 74 | ||
| 75 | /* Max delay can be used in LL_mDelay */ | |
| 76 | #define LL_MAX_DELAY 0xFFFFFFFFU | |
| 77 | ||
| 78 | /** | |
| 79 | * @brief Unique device ID register base address | |
| 80 | */ | |
| 81 | #define UID_BASE_ADDRESS UID_BASE | |
| 82 | ||
| 83 | /** | |
| 84 | * @brief Flash size data register base address | |
| 85 | */ | |
| 86 | #define FLASHSIZE_BASE_ADDRESS FLASHSIZE_BASE | |
| 87 | ||
| 88 | /** | |
| 89 | * @} | |
| 90 | */ | |
| 91 | ||
| 92 | /* Private macros ------------------------------------------------------------*/ | |
| 93 | /** @defgroup UTILS_LL_Private_Macros UTILS Private Macros | |
| 94 | * @{ | |
| 95 | */ | |
| 96 | /** | |
| 97 | * @} | |
| 98 | */ | |
| 99 | /* Exported types ------------------------------------------------------------*/ | |
| 100 | /** @defgroup UTILS_LL_ES_INIT UTILS Exported structures | |
| 101 | * @{ | |
| 102 | */ | |
| 103 | /** | |
| 104 | * @brief UTILS PLL structure definition | |
| 105 | */ | |
| 106 | typedef struct | |
| 107 | { | |
| 108 | uint32_t PLLMul; /*!< Multiplication factor for PLL VCO input clock. | |
| 109 | This parameter can be a value of @ref RCC_LL_EC_PLL_MUL | |
| 110 | ||
| 111 | This feature can be modified afterwards using unitary function | |
| 112 | @ref LL_RCC_PLL_ConfigDomain_SYS(). */ | |
| 113 | ||
| 114 | #if defined(RCC_PLLSRC_PREDIV1_SUPPORT) | |
| 115 | uint32_t PLLDiv; /*!< Division factor for PLL VCO output clock. | |
| 116 | This parameter can be a value of @ref RCC_LL_EC_PREDIV_DIV | |
| 117 | ||
| 118 | This feature can be modified afterwards using unitary function | |
| 119 | @ref LL_RCC_PLL_ConfigDomain_SYS(). */ | |
| 120 | #else | |
| 121 | uint32_t Prediv; /*!< Division factor for HSE used as PLL clock source. | |
| 122 | This parameter can be a value of @ref RCC_LL_EC_PREDIV_DIV | |
| 123 | ||
| 124 | This feature can be modified afterwards using unitary function | |
| 125 | @ref LL_RCC_PLL_ConfigDomain_SYS(). */ | |
| 126 | #endif /* RCC_PLLSRC_PREDIV1_SUPPORT */ | |
| 127 | } LL_UTILS_PLLInitTypeDef; | |
| 128 | ||
| 129 | /** | |
| 130 | * @brief UTILS System, AHB and APB buses clock configuration structure definition | |
| 131 | */ | |
| 132 | typedef struct | |
| 133 | { | |
| 134 | uint32_t AHBCLKDivider; /*!< The AHB clock (HCLK) divider. This clock is derived from the system clock (SYSCLK). | |
| 135 | This parameter can be a value of @ref RCC_LL_EC_SYSCLK_DIV | |
| 136 | ||
| 137 | This feature can be modified afterwards using unitary function | |
| 138 | @ref LL_RCC_SetAHBPrescaler(). */ | |
| 139 | ||
| 140 | uint32_t APB1CLKDivider; /*!< The APB1 clock (PCLK1) divider. This clock is derived from the AHB clock (HCLK). | |
| 141 | This parameter can be a value of @ref RCC_LL_EC_APB1_DIV | |
| 142 | ||
| 143 | This feature can be modified afterwards using unitary function | |
| 144 | @ref LL_RCC_SetAPB1Prescaler(). */ | |
| 145 | } LL_UTILS_ClkInitTypeDef; | |
| 146 | ||
| 147 | /** | |
| 148 | * @} | |
| 149 | */ | |
| 150 | ||
| 151 | /* Exported constants --------------------------------------------------------*/ | |
| 152 | /** @defgroup UTILS_LL_Exported_Constants UTILS Exported Constants | |
| 153 | * @{ | |
| 154 | */ | |
| 155 | ||
| 156 | /** @defgroup UTILS_EC_HSE_BYPASS HSE Bypass activation | |
| 157 | * @{ | |
| 158 | */ | |
| 159 | #define LL_UTILS_HSEBYPASS_OFF 0x00000000U /*!< HSE Bypass is not enabled */ | |
| 160 | #define LL_UTILS_HSEBYPASS_ON 0x00000001U /*!< HSE Bypass is enabled */ | |
| 161 | /** | |
| 162 | * @} | |
| 163 | */ | |
| 164 | ||
| 165 | /** | |
| 166 | * @} | |
| 167 | */ | |
| 168 | ||
| 169 | /* Exported macro ------------------------------------------------------------*/ | |
| 170 | ||
| 171 | /* Exported functions --------------------------------------------------------*/ | |
| 172 | /** @defgroup UTILS_LL_Exported_Functions UTILS Exported Functions | |
| 173 | * @{ | |
| 174 | */ | |
| 175 | ||
| 176 | /** @defgroup UTILS_EF_DEVICE_ELECTRONIC_SIGNATURE DEVICE ELECTRONIC SIGNATURE | |
| 177 | * @{ | |
| 178 | */ | |
| 179 | ||
| 180 | /** | |
| 181 | * @brief Get Word0 of the unique device identifier (UID based on 96 bits) | |
| 182 | * @retval UID[31:0]: X and Y coordinates on the wafer expressed in BCD format | |
| 183 | */ | |
| 184 | __STATIC_INLINE uint32_t LL_GetUID_Word0(void) | |
| 185 | { | |
| 186 | return (uint32_t)(READ_REG(*((uint32_t *)UID_BASE_ADDRESS))); | |
| 187 | } | |
| 188 | ||
| 189 | /** | |
| 190 | * @brief Get Word1 of the unique device identifier (UID based on 96 bits) | |
| 191 | * @retval UID[63:32]: Wafer number (UID[39:32]) & LOT_NUM[23:0] (UID[63:40]) | |
| 192 | */ | |
| 193 | __STATIC_INLINE uint32_t LL_GetUID_Word1(void) | |
| 194 | { | |
| 195 | return (uint32_t)(READ_REG(*((uint32_t *)(UID_BASE_ADDRESS + 4U)))); | |
| 196 | } | |
| 197 | ||
| 198 | /** | |
| 199 | * @brief Get Word2 of the unique device identifier (UID based on 96 bits) | |
| 200 | * @retval UID[95:64]: Lot number (ASCII encoded) - LOT_NUM[55:24] | |
| 201 | */ | |
| 202 | __STATIC_INLINE uint32_t LL_GetUID_Word2(void) | |
| 203 | { | |
| 204 | return (uint32_t)(READ_REG(*((uint32_t *)(UID_BASE_ADDRESS + 8U)))); | |
| 205 | } | |
| 206 | ||
| 207 | /** | |
| 208 | * @brief Get Flash memory size | |
| 209 | * @note This bitfield indicates the size of the device Flash memory expressed in | |
| 210 | * Kbytes. As an example, 0x040 corresponds to 64 Kbytes. | |
| 211 | * @retval FLASH_SIZE[15:0]: Flash memory size | |
| 212 | */ | |
| 213 | __STATIC_INLINE uint32_t LL_GetFlashSize(void) | |
| 214 | { | |
| 215 | return (uint16_t)(READ_REG(*((uint32_t *)FLASHSIZE_BASE_ADDRESS))); | |
| 216 | } | |
| 217 | ||
| 218 | ||
| 219 | /** | |
| 220 | * @} | |
| 221 | */ | |
| 222 | ||
| 223 | /** @defgroup UTILS_LL_EF_DELAY DELAY | |
| 224 | * @{ | |
| 225 | */ | |
| 226 | ||
| 227 | /** | |
| 228 | * @brief This function configures the Cortex-M SysTick source of the time base. | |
| 229 | * @param HCLKFrequency HCLK frequency in Hz (can be calculated thanks to RCC helper macro) | |
| 230 | * @note When a RTOS is used, it is recommended to avoid changing the SysTick | |
| 231 | * configuration by calling this function, for a delay use rather osDelay RTOS service. | |
| 232 | * @param Ticks Number of ticks | |
| 233 | * @retval None | |
| 234 | */ | |
| 235 | __STATIC_INLINE void LL_InitTick(uint32_t HCLKFrequency, uint32_t Ticks) | |
| 236 | { | |
| 237 | /* Configure the SysTick to have interrupt in 1ms time base */ | |
| 238 | SysTick->LOAD = (uint32_t)((HCLKFrequency / Ticks) - 1UL); /* set reload register */ | |
| 239 | SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ | |
| 240 | SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | | |
| 241 | SysTick_CTRL_ENABLE_Msk; /* Enable the Systick Timer */ | |
| 242 | } | |
| 243 | ||
| 244 | void LL_Init1msTick(uint32_t HCLKFrequency); | |
| 245 | void LL_mDelay(uint32_t Delay); | |
| 246 | ||
| 247 | /** | |
| 248 | * @} | |
| 249 | */ | |
| 250 | ||
| 251 | /** @defgroup UTILS_EF_SYSTEM SYSTEM | |
| 252 | * @{ | |
| 253 | */ | |
| 254 | ||
| 255 | void LL_SetSystemCoreClock(uint32_t HCLKFrequency); | |
| 256 | ErrorStatus LL_PLL_ConfigSystemClock_HSI(LL_UTILS_PLLInitTypeDef *UTILS_PLLInitStruct, | |
| 257 | LL_UTILS_ClkInitTypeDef *UTILS_ClkInitStruct); | |
| 258 | #if defined(RCC_CFGR_SW_HSI48) | |
| 259 | ErrorStatus LL_PLL_ConfigSystemClock_HSI48(LL_UTILS_PLLInitTypeDef *UTILS_PLLInitStruct, | |
| 260 | LL_UTILS_ClkInitTypeDef *UTILS_ClkInitStruct); | |
| 261 | #endif /*RCC_CFGR_SW_HSI48*/ | |
| 262 | ErrorStatus LL_PLL_ConfigSystemClock_HSE(uint32_t HSEFrequency, uint32_t HSEBypass, | |
| 263 | LL_UTILS_PLLInitTypeDef *UTILS_PLLInitStruct, LL_UTILS_ClkInitTypeDef *UTILS_ClkInitStruct); | |
| 264 | ||
| 265 | /** | |
| 266 | * @} | |
| 267 | */ | |
| 268 | ||
| 269 | /** | |
| 270 | * @} | |
| 271 | */ | |
| 272 | ||
| 273 | /** | |
| 274 | * @} | |
| 275 | */ | |
| 276 | ||
| 277 | /** | |
| 278 | * @} | |
| 279 | */ | |
| 280 | ||
| 281 | #ifdef __cplusplus | |
| 282 | } | |
| 283 | #endif | |
| 284 | ||
| 285 | #endif /* __STM32F0xx_LL_UTILS_H */ | |
| 286 | ||
| 287 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ | |
