F030C8T6_Kbus_MIX.git

move some define from Kbus.h to KBusDefine.h

QuakeGod

2024-02-25 95322c84888cbe2e92024d4d65698f59b016cb52

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483170	1	/**
Q	2	******************************************************************************
	3	* @file stm32f0xx_hal_uart.h
	4	* @author MCD Application Team
	5	* @brief Header file of UART HAL module.
	6	******************************************************************************
	7	* @attention
	8	*
	9	* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
	10	*
	11	* Redistribution and use in source and binary forms, with or without modification,
	12	* are permitted provided that the following conditions are met:
	13	* 1. Redistributions of source code must retain the above copyright notice,
	14	* this list of conditions and the following disclaimer.
	15	* 2. Redistributions in binary form must reproduce the above copyright notice,
	16	* this list of conditions and the following disclaimer in the documentation
	17	* and/or other materials provided with the distribution.
	18	* 3. Neither the name of STMicroelectronics nor the names of its contributors
	19	* may be used to endorse or promote products derived from this software
	20	* without specific prior written permission.
	21	*
	22	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
	23	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
	24	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
	25	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
	26	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
	27	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
	28	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
	29	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
	30	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
	31	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
	32	*
	33	******************************************************************************
	34	*/
	35
	36	/* Define to prevent recursive inclusion -------------------------------------*/
	37	#ifndef __STM32F0xx_HAL_UART_H
	38	#define __STM32F0xx_HAL_UART_H
	39
	40	#ifdef __cplusplus
	41	extern "C" {
	42	#endif
	43
	44	/* Includes ------------------------------------------------------------------*/
	45	#include "stm32f0xx_hal_def.h"
	46
	47	/** @addtogroup STM32F0xx_HAL_Driver
	48	* @{
	49	*/
	50
	51	/** @addtogroup UART
	52	* @{
	53	*/
	54
	55	/* Exported types ------------------------------------------------------------*/
	56	/** @defgroup UART_Exported_Types UART Exported Types
	57	* @{
	58	*/
	59
	60	/**
	61	* @brief UART Init Structure definition
	62	*/
	63	typedef struct
	64	{
	65	uint32_t BaudRate; /*!< This member configures the UART communication baud rate.
	66	The baud rate register is computed using the following formula:
	67	- If oversampling is 16 or in LIN mode (LIN mode not available on F030xx devices),
	68	Baud Rate Register = ((PCLKx) / ((huart->Init.BaudRate)))
	69	- If oversampling is 8,
	70	Baud Rate Register[15:4] = ((2 * PCLKx) / ((huart->Init.BaudRate)))[15:4]
	71	Baud Rate Register[3] = 0
	72	Baud Rate Register[2:0] = (((2 * PCLKx) / ((huart->Init.BaudRate)))[3:0]) >> 1U */
	73
	74	uint32_t WordLength; /*!< Specifies the number of data bits transmitted or received in a frame.
	75	This parameter can be a value of @ref UARTEx_Word_Length. */
	76
	77	uint32_t StopBits; /*!< Specifies the number of stop bits transmitted.
	78	This parameter can be a value of @ref UART_Stop_Bits. */
	79
	80	uint32_t Parity; /*!< Specifies the parity mode.
	81	This parameter can be a value of @ref UART_Parity
	82	@note When parity is enabled, the computed parity is inserted
	83	at the MSB position of the transmitted data (9th bit when
	84	the word length is set to 9 data bits; 8th bit when the
	85	word length is set to 8 data bits). */
	86
	87	uint32_t Mode; /*!< Specifies whether the Receive or Transmit mode is enabled or disabled.
	88	This parameter can be a value of @ref UART_Mode. */
	89
	90	uint32_t HwFlowCtl; /*!< Specifies whether the hardware flow control mode is enabled
	91	or disabled.
	92	This parameter can be a value of @ref UART_Hardware_Flow_Control. */
	93
	94	uint32_t OverSampling; /*!< Specifies whether the Over sampling 8 is enabled or disabled, to achieve higher speed (up to f_PCLK/8).
	95	This parameter can be a value of @ref UART_Over_Sampling. */
	96
	97	uint32_t OneBitSampling; /*!< Specifies whether a single sample or three samples' majority vote is selected.
	98	Selecting the single sample method increases the receiver tolerance to clock
	99	deviations. This parameter can be a value of @ref UART_OneBit_Sampling. */
	100	}UART_InitTypeDef;
	101
	102	/**
	103	* @brief UART Advanced Features initalization structure definition
	104	*/
	105	typedef struct
	106	{
	107	uint32_t AdvFeatureInit; /*!< Specifies which advanced UART features is initialized. Several
	108	Advanced Features may be initialized at the same time .
	109	This parameter can be a value of @ref UART_Advanced_Features_Initialization_Type. */
	110
	111	uint32_t TxPinLevelInvert; /*!< Specifies whether the TX pin active level is inverted.
	112	This parameter can be a value of @ref UART_Tx_Inv. */
	113
	114	uint32_t RxPinLevelInvert; /*!< Specifies whether the RX pin active level is inverted.
	115	This parameter can be a value of @ref UART_Rx_Inv. */
	116
	117	uint32_t DataInvert; /*!< Specifies whether data are inverted (positive/direct logic
	118	vs negative/inverted logic).
	119	This parameter can be a value of @ref UART_Data_Inv. */
	120
	121	uint32_t Swap; /*!< Specifies whether TX and RX pins are swapped.
	122	This parameter can be a value of @ref UART_Rx_Tx_Swap. */
	123
	124	uint32_t OverrunDisable; /*!< Specifies whether the reception overrun detection is disabled.
	125	This parameter can be a value of @ref UART_Overrun_Disable. */
	126
	127	uint32_t DMADisableonRxError; /*!< Specifies whether the DMA is disabled in case of reception error.
	128	This parameter can be a value of @ref UART_DMA_Disable_on_Rx_Error. */
	129
	130	uint32_t AutoBaudRateEnable; /*!< Specifies whether auto Baud rate detection is enabled.
	131	This parameter can be a value of @ref UART_AutoBaudRate_Enable */
	132
	133	uint32_t AutoBaudRateMode; /*!< If auto Baud rate detection is enabled, specifies how the rate
	134	detection is carried out.
	135	This parameter can be a value of @ref UARTEx_AutoBaud_Rate_Mode. */
	136
	137	uint32_t MSBFirst; /*!< Specifies whether MSB is sent first on UART line.
	138	This parameter can be a value of @ref UART_MSB_First. */
	139	} UART_AdvFeatureInitTypeDef;
	140
	141
	142
	143	/**
	144	* @brief HAL UART State structures definition
	145	* @note HAL UART State value is a combination of 2 different substates: gState and RxState.
	146	* - gState contains UART state information related to global Handle management
	147	* and also information related to Tx operations.
	148	* gState value coding follow below described bitmap :
	149	* b7-b6 Error information
	150	* 00 : No Error
	151	* 01 : (Not Used)
	152	* 10 : Timeout
	153	* 11 : Error
	154	* b5 IP initilisation status
	155	* 0 : Reset (IP not initialized)
	156	* 1 : Init done (IP not initialized. HAL UART Init function already called)
	157	* b4-b3 (not used)
	158	* xx : Should be set to 00
	159	* b2 Intrinsic process state
	160	* 0 : Ready
	161	* 1 : Busy (IP busy with some configuration or internal operations)
	162	* b1 (not used)
	163	* x : Should be set to 0
	164	* b0 Tx state
	165	* 0 : Ready (no Tx operation ongoing)
	166	* 1 : Busy (Tx operation ongoing)
	167	* - RxState contains information related to Rx operations.
	168	* RxState value coding follow below described bitmap :
	169	* b7-b6 (not used)
	170	* xx : Should be set to 00
	171	* b5 IP initilisation status
	172	* 0 : Reset (IP not initialized)
	173	* 1 : Init done (IP not initialized)
	174	* b4-b2 (not used)
	175	* xxx : Should be set to 000
	176	* b1 Rx state
	177	* 0 : Ready (no Rx operation ongoing)
	178	* 1 : Busy (Rx operation ongoing)
	179	* b0 (not used)
	180	* x : Should be set to 0.
	181	*/
	182	typedef enum
	183	{
	184	HAL_UART_STATE_RESET = 0x00U, /*!< Peripheral is not initialized
	185	Value is allowed for gState and RxState */
	186	HAL_UART_STATE_READY = 0x20U, /*!< Peripheral Initialized and ready for use
	187	Value is allowed for gState and RxState */
	188	HAL_UART_STATE_BUSY = 0x24U, /*!< an internal process is ongoing
	189	Value is allowed for gState only */
	190	HAL_UART_STATE_BUSY_TX = 0x21U, /*!< Data Transmission process is ongoing
	191	Value is allowed for gState only */
	192	HAL_UART_STATE_BUSY_RX = 0x22U, /*!< Data Reception process is ongoing
	193	Value is allowed for RxState only */
	194	HAL_UART_STATE_BUSY_TX_RX = 0x23U, /*!< Data Transmission and Reception process is ongoing
	195	Not to be used for neither gState nor RxState.
	196	Value is result of combination (Or) between gState and RxState values */
	197	HAL_UART_STATE_TIMEOUT = 0xA0U, /*!< Timeout state
	198	Value is allowed for gState only */
	199	HAL_UART_STATE_ERROR = 0xE0U /*!< Error
	200	Value is allowed for gState only */
	201	}HAL_UART_StateTypeDef;
	202
	203	/**
	204	* @brief UART clock sources definition
	205	*/
	206	typedef enum
	207	{
	208	UART_CLOCKSOURCE_PCLK1 = 0x00U, /!< PCLK1 clock source /
	209	UART_CLOCKSOURCE_HSI = 0x02U, /!< HSI clock source /
	210	UART_CLOCKSOURCE_SYSCLK = 0x04U, /!< SYSCLK clock source /
	211	UART_CLOCKSOURCE_LSE = 0x08U, /!< LSE clock source /
	212	UART_CLOCKSOURCE_UNDEFINED = 0x10U /!< Undefined clock source /
	213	}UART_ClockSourceTypeDef;
	214
	215	/**
	216	* @brief UART handle Structure definition
	217	*/
	218	typedef struct
	219	{
	220	USART_TypeDef Instance; /!< UART registers base address */
	221
	222	UART_InitTypeDef Init; /!< UART communication parameters /
	223
	224	UART_AdvFeatureInitTypeDef AdvancedInit; /!< UART Advanced Features initialization parameters /
	225
	226	uint8_t pTxBuffPtr; /!< Pointer to UART Tx transfer Buffer */
	227
	228	uint16_t TxXferSize; /!< UART Tx Transfer size /
	229
	230	__IO uint16_t TxXferCount; /!< UART Tx Transfer Counter /
	231
	232	uint8_t pRxBuffPtr; /!< Pointer to UART Rx transfer Buffer */
	233
	234	uint16_t RxXferSize; /!< UART Rx Transfer size /
	235
	236	__IO uint16_t RxXferCount; /!< UART Rx Transfer Counter /
	237
	238	uint16_t Mask; /!< UART Rx RDR register mask /
	239
	240	DMA_HandleTypeDef hdmatx; /!< UART Tx DMA Handle parameters */
	241
	242	DMA_HandleTypeDef hdmarx; /!< UART Rx DMA Handle parameters */
	243
	244	HAL_LockTypeDef Lock; /!< Locking object /
	245
	246	__IO HAL_UART_StateTypeDef gState; /*!< UART state information related to global Handle management
	247	and also related to Tx operations.
	248	This parameter can be a value of @ref HAL_UART_StateTypeDef */
	249
	250	__IO HAL_UART_StateTypeDef RxState; /*!< UART state information related to Rx operations.
	251	This parameter can be a value of @ref HAL_UART_StateTypeDef */
	252
	253	__IO uint32_t ErrorCode; /!< UART Error code /
	254
	255	}UART_HandleTypeDef;
	256
	257	/**
	258	* @}
	259	*/
	260
	261	/* Exported constants --------------------------------------------------------*/
	262	/** @defgroup UART_Exported_Constants UART Exported Constants
	263	* @{
	264	*/
	265
	266	/** @defgroup UART_Error UART Error
	267	* @{
	268	*/
	269	#define HAL_UART_ERROR_NONE (0x00000000U) /!< No error /
	270	#define HAL_UART_ERROR_PE (0x00000001U) /!< Parity error /
	271	#define HAL_UART_ERROR_NE (0x00000002U) /!< Noise error /
	272	#define HAL_UART_ERROR_FE (0x00000004U) /!< frame error /
	273	#define HAL_UART_ERROR_ORE (0x00000008U) /!< Overrun error /
	274	#define HAL_UART_ERROR_DMA (0x00000010U) /!< DMA transfer error /
	275	#define HAL_UART_ERROR_BUSY (0x00000020U) /!< Busy Error /
	276	/**
	277	* @}
	278	*/
	279
	280	/** @defgroup UART_Stop_Bits UART Number of Stop Bits
	281	* @{
	282	*/
	283	#ifdef USART_SMARTCARD_SUPPORT
	284	#define UART_STOPBITS_0_5 USART_CR2_STOP_0 /!< UART frame with 0.5 stop bit /
	285	#define UART_STOPBITS_1 (0x00000000U) /!< UART frame with 1 stop bit /
	286	#define UART_STOPBITS_1_5 ((uint32_t)(USART_CR2_STOP_0 \| USART_CR2_STOP_1)) /!< UART frame with 1.5 stop bits /
	287	#define UART_STOPBITS_2 ((uint32_t)USART_CR2_STOP_1) /!< UART frame with 2 stop bits /
	288	#else
	289	#define UART_STOPBITS_1 (0x00000000U) /!< UART frame with 1 stop bit /
	290	#define UART_STOPBITS_2 ((uint32_t)USART_CR2_STOP_1) /!< UART frame with 2 stop bits /
	291	#endif
	292	/**
	293	* @}
	294	*/
	295
	296	/** @defgroup UART_Parity UART Parity
	297	* @{
	298	*/
	299	#define UART_PARITY_NONE (0x00000000U) /!< No parity /
	300	#define UART_PARITY_EVEN ((uint32_t)USART_CR1_PCE) /!< Even parity /
	301	#define UART_PARITY_ODD ((uint32_t)(USART_CR1_PCE \| USART_CR1_PS)) /!< Odd parity /
	302	/**
	303	* @}
	304	*/
	305
	306	/** @defgroup UART_Hardware_Flow_Control UART Hardware Flow Control
	307	* @{
	308	*/
	309	#define UART_HWCONTROL_NONE (0x00000000U) /!< No hardware control /
	310	#define UART_HWCONTROL_RTS ((uint32_t)USART_CR3_RTSE) /!< Request To Send /
	311	#define UART_HWCONTROL_CTS ((uint32_t)USART_CR3_CTSE) /!< Clear To Send /
	312	#define UART_HWCONTROL_RTS_CTS ((uint32_t)(USART_CR3_RTSE \| USART_CR3_CTSE)) /!< Request and Clear To Send /
	313	/**
	314	* @}
	315	*/
	316
	317	/** @defgroup UART_Mode UART Transfer Mode
	318	* @{
	319	*/
	320	#define UART_MODE_RX ((uint32_t)USART_CR1_RE) /!< RX mode /
	321	#define UART_MODE_TX ((uint32_t)USART_CR1_TE) /!< TX mode /
	322	#define UART_MODE_TX_RX ((uint32_t)(USART_CR1_TE \|USART_CR1_RE)) /!< RX and TX mode /
	323	/**
	324	* @}
	325	*/
	326
	327	/** @defgroup UART_State UART State
	328	* @{
	329	*/
	330	#define UART_STATE_DISABLE (0x00000000U) /!< UART disabled /
	331	#define UART_STATE_ENABLE ((uint32_t)USART_CR1_UE) /!< UART enabled /
	332	/**
	333	* @}
	334	*/
	335
	336	/** @defgroup UART_Over_Sampling UART Over Sampling
	337	* @{
	338	*/
	339	#define UART_OVERSAMPLING_16 (0x00000000U) /!< Oversampling by 16 /
	340	#define UART_OVERSAMPLING_8 ((uint32_t)USART_CR1_OVER8) /!< Oversampling by 8 /
	341	/**
	342	* @}
	343	*/
	344
	345	/** @defgroup UART_OneBit_Sampling UART One Bit Sampling Method
	346	* @{
	347	*/
	348	#define UART_ONE_BIT_SAMPLE_DISABLE (0x00000000U) /!< One-bit sampling disable /
	349	#define UART_ONE_BIT_SAMPLE_ENABLE ((uint32_t)USART_CR3_ONEBIT) /!< One-bit sampling enable /
	350	/**
	351	* @}
	352	*/
	353
	354	/** @defgroup UART_Receiver_TimeOut UART Receiver TimeOut
	355	* @{
	356	*/
	357	#define UART_RECEIVER_TIMEOUT_DISABLE (0x00000000U) /!< UART receiver timeout disable /
	358	#define UART_RECEIVER_TIMEOUT_ENABLE ((uint32_t)USART_CR2_RTOEN) /!< UART receiver timeout enable /
	359	/**
	360	* @}
	361	*/
	362
	363	/** @defgroup UART_DMA_Tx UART DMA Tx
	364	* @{
	365	*/
	366	#define UART_DMA_TX_DISABLE (0x00000000U) /!< UART DMA TX disabled /
	367	#define UART_DMA_TX_ENABLE ((uint32_t)USART_CR3_DMAT) /!< UART DMA TX enabled /
	368	/**
	369	* @}
	370	*/
	371
	372	/** @defgroup UART_DMA_Rx UART DMA Rx
	373	* @{
	374	*/
	375	#define UART_DMA_RX_DISABLE (0x00000000U) /!< UART DMA RX disabled /
	376	#define UART_DMA_RX_ENABLE ((uint32_t)USART_CR3_DMAR) /!< UART DMA RX enabled /
	377	/**
	378	* @}
	379	*/
	380
	381	/** @defgroup UART_Half_Duplex_Selection UART Half Duplex Selection
	382	* @{
	383	*/
	384	#define UART_HALF_DUPLEX_DISABLE (0x00000000U) /!< UART half-duplex disabled /
	385	#define UART_HALF_DUPLEX_ENABLE ((uint32_t)USART_CR3_HDSEL) /!< UART half-duplex enabled /
	386	/**
	387	* @}
	388	*/
	389
	390	/** @defgroup UART_WakeUp_Address_Length UART WakeUp Address Length
	391	* @{
	392	*/
	393	#define UART_ADDRESS_DETECT_4B (0x00000000U) /!< 4-bit long wake-up address /
	394	#define UART_ADDRESS_DETECT_7B ((uint32_t)USART_CR2_ADDM7) /!< 7-bit long wake-up address /
	395	/**
	396	* @}
	397	*/
	398
	399	/** @defgroup UART_WakeUp_Methods UART WakeUp Methods
	400	* @{
	401	*/
	402	#define UART_WAKEUPMETHOD_IDLELINE (0x00000000U) /!< UART wake-up on idle line /
	403	#define UART_WAKEUPMETHOD_ADDRESSMARK ((uint32_t)USART_CR1_WAKE) /!< UART wake-up on address mark /
	404	/**
	405	* @}
	406	*/
	407
	408	/** @defgroup UART_IT UART IT
	409	* Elements values convention: 0000ZZZZ0XXYYYYYb
	410	* - YYYYY : Interrupt source position in the XX register (5bits)
	411	* - XX : Interrupt source register (2bits)
	412	* - 01: CR1 register
	413	* - 10: CR2 register
	414	* - 11: CR3 register
	415	* - ZZZZ : Flag position in the ISR register(4bits)
	416	* @{
	417	*/
	418	#define UART_IT_ERR (0x0060U) /!< UART error interruption /
	419	#define UART_IT_ORE (0x0300U) /!< UART overrun error interruption /
	420	#define UART_IT_NE (0x0200U) /!< UART noise error interruption /
	421	#define UART_IT_FE (0x0100U) /!< UART frame error interruption /
	422	/**
	423	* @}
	424	*/
	425
	426	/** @defgroup UART_Advanced_Features_Initialization_Type UART Advanced Feature Initialization Type
	427	* @{
	428	*/
	429	#define UART_ADVFEATURE_NO_INIT (0x00000000U) /!< No advanced feature initialization /
	430	#define UART_ADVFEATURE_TXINVERT_INIT (0x00000001U) /!< TX pin active level inversion /
	431	#define UART_ADVFEATURE_RXINVERT_INIT (0x00000002U) /!< RX pin active level inversion /
	432	#define UART_ADVFEATURE_DATAINVERT_INIT (0x00000004U) /!< Binary data inversion /
	433	#define UART_ADVFEATURE_SWAP_INIT (0x00000008U) /!< TX/RX pins swap /
	434	#define UART_ADVFEATURE_RXOVERRUNDISABLE_INIT (0x00000010U) /!< RX overrun disable /
	435	#define UART_ADVFEATURE_DMADISABLEONERROR_INIT (0x00000020U) /!< DMA disable on Reception Error /
	436	#define UART_ADVFEATURE_AUTOBAUDRATE_INIT (0x00000040U) /!< Auto Baud rate detection initialization /
	437	#define UART_ADVFEATURE_MSBFIRST_INIT (0x00000080U) /!< Most significant bit sent/received first /
	438	/**
	439	* @}
	440	*/
	441
	442	/** @defgroup UART_Tx_Inv UART Advanced Feature TX Pin Active Level Inversion
	443	* @{
	444	*/
	445	#define UART_ADVFEATURE_TXINV_DISABLE (0x00000000U) /!< TX pin active level inversion disable /
	446	#define UART_ADVFEATURE_TXINV_ENABLE ((uint32_t)USART_CR2_TXINV) /!< TX pin active level inversion enable /
	447	/**
	448	* @}
	449	*/
	450
	451	/** @defgroup UART_Rx_Inv UART Advanced Feature RX Pin Active Level Inversion
	452	* @{
	453	*/
	454	#define UART_ADVFEATURE_RXINV_DISABLE (0x00000000U) /!< RX pin active level inversion disable /
	455	#define UART_ADVFEATURE_RXINV_ENABLE ((uint32_t)USART_CR2_RXINV) /!< RX pin active level inversion enable /
	456	/**
	457	* @}
	458	*/
	459
	460	/** @defgroup UART_Data_Inv UART Advanced Feature Binary Data Inversion
	461	* @{
	462	*/
	463	#define UART_ADVFEATURE_DATAINV_DISABLE (0x00000000U) /!< Binary data inversion disable /
	464	#define UART_ADVFEATURE_DATAINV_ENABLE ((uint32_t)USART_CR2_DATAINV) /!< Binary data inversion enable /
	465	/**
	466	* @}
	467	*/
	468
	469	/** @defgroup UART_Rx_Tx_Swap UART Advanced Feature RX TX Pins Swap
	470	* @{
	471	*/
	472	#define UART_ADVFEATURE_SWAP_DISABLE (0x00000000U) /!< TX/RX pins swap disable /
	473	#define UART_ADVFEATURE_SWAP_ENABLE ((uint32_t)USART_CR2_SWAP) /!< TX/RX pins swap enable /
	474	/**
	475	* @}
	476	*/
	477
	478	/** @defgroup UART_Overrun_Disable UART Advanced Feature Overrun Disable
	479	* @{
	480	*/
	481	#define UART_ADVFEATURE_OVERRUN_ENABLE (0x00000000U) /!< RX overrun enable /
	482	#define UART_ADVFEATURE_OVERRUN_DISABLE ((uint32_t)USART_CR3_OVRDIS) /!< RX overrun disable /
	483	/**
	484	* @}
	485	*/
	486
	487	/** @defgroup UART_AutoBaudRate_Enable UART Advanced Feature Auto BaudRate Enable
	488	* @{
	489	*/
	490	#define UART_ADVFEATURE_AUTOBAUDRATE_DISABLE (0x00000000U) /!< RX Auto Baud rate detection enable /
	491	#define UART_ADVFEATURE_AUTOBAUDRATE_ENABLE ((uint32_t)USART_CR2_ABREN) /!< RX Auto Baud rate detection disable /
	492	/**
	493	* @}
	494	*/
	495
	496	/** @defgroup UART_DMA_Disable_on_Rx_Error UART Advanced Feature DMA Disable On Rx Error
	497	* @{
	498	*/
	499	#define UART_ADVFEATURE_DMA_ENABLEONRXERROR (0x00000000U) /!< DMA enable on Reception Error /
	500	#define UART_ADVFEATURE_DMA_DISABLEONRXERROR ((uint32_t)USART_CR3_DDRE) /!< DMA disable on Reception Error /
	501	/**
	502	* @}
	503	*/
	504
	505	/** @defgroup UART_MSB_First UART Advanced Feature MSB First
	506	* @{
	507	*/
	508	#define UART_ADVFEATURE_MSBFIRST_DISABLE (0x00000000U) /!< Most significant bit sent/received first disable /
	509	#define UART_ADVFEATURE_MSBFIRST_ENABLE ((uint32_t)USART_CR2_MSBFIRST) /!< Most significant bit sent/received first enable /
	510	/**
	511	* @}
	512	*/
	513
	514	/** @defgroup UART_Mute_Mode UART Advanced Feature Mute Mode Enable
	515	* @{
	516	*/
	517	#define UART_ADVFEATURE_MUTEMODE_DISABLE (0x00000000U) /!< UART mute mode disable /
	518	#define UART_ADVFEATURE_MUTEMODE_ENABLE ((uint32_t)USART_CR1_MME) /!< UART mute mode enable /
	519	/**
	520	* @}
	521	*/
	522
	523	/** @defgroup UART_CR2_ADDRESS_LSB_POS UART Address-matching LSB Position In CR2 Register
	524	* @{
	525	*/
	526	#define UART_CR2_ADDRESS_LSB_POS ( 24U) /!< UART address-matching LSB position in CR2 register /
	527	/**
	528	* @}
	529	*/
	530
	531	/** @defgroup UART_DriverEnable_Polarity UART DriverEnable Polarity
	532	* @{
	533	*/
	534	#define UART_DE_POLARITY_HIGH (0x00000000U) /!< Driver enable signal is active high /
	535	#define UART_DE_POLARITY_LOW ((uint32_t)USART_CR3_DEP) /!< Driver enable signal is active low /
	536	/**
	537	* @}
	538	*/
	539
	540	/** @defgroup UART_CR1_DEAT_ADDRESS_LSB_POS UART Driver Enable Assertion Time LSB Position In CR1 Register
	541	* @{
	542	*/
	543	#define UART_CR1_DEAT_ADDRESS_LSB_POS ( 21U) /!< UART Driver Enable assertion time LSB position in CR1 register /
	544	/**
	545	* @}
	546	*/
	547
	548	/** @defgroup UART_CR1_DEDT_ADDRESS_LSB_POS UART Driver Enable DeAssertion Time LSB Position In CR1 Register
	549	* @{
	550	*/
	551	#define UART_CR1_DEDT_ADDRESS_LSB_POS ( 16U) /!< UART Driver Enable de-assertion time LSB position in CR1 register /
	552	/**
	553	* @}
	554	*/
	555
	556	/** @defgroup UART_Interruption_Mask UART Interruptions Flag Mask
	557	* @{
	558	*/
	559	#define UART_IT_MASK (0x001FU) /!< UART interruptions flags mask /
	560	/**
	561	* @}
	562	*/
	563
	564	/** @defgroup UART_TimeOut_Value UART polling-based communications time-out value
	565	* @{
	566	*/
	567	#define HAL_UART_TIMEOUT_VALUE 0x1FFFFFFU /!< UART polling-based communications time-out value /
	568	/**
	569	* @}
	570	*/
	571
	572
	573	/**
	574	* @}
	575	*/
	576
	577	/* Exported macros -----------------------------------------------------------*/
	578	/** @defgroup UART_Exported_Macros UART Exported Macros
	579	* @{
	580	*/
	581
	582	/** @brief Reset UART handle states.
	583	* @param __HANDLE__ UART handle.
	584	* @retval None
	585	*/
	586	#define __HAL_UART_RESET_HANDLE_STATE(__HANDLE__) do{ \
	587	(__HANDLE__)->gState = HAL_UART_STATE_RESET; \
	588	(__HANDLE__)->RxState = HAL_UART_STATE_RESET; \
	589	} while(0)
	590
	591	/** @brief Clear the specified UART pending flag.
	592	* @param __HANDLE__ specifies the UART Handle.
	593	* @param __FLAG__ specifies the flag to check.
	594	* This parameter can be any combination of the following values:
	595	* @arg @ref UART_CLEAR_PEF Parity Error Clear Flag
	596	* @arg @ref UART_CLEAR_FEF Framing Error Clear Flag
	597	* @arg @ref UART_CLEAR_NEF Noise detected Clear Flag
	598	* @arg @ref UART_CLEAR_OREF Overrun Error Clear Flag
	599	* @arg @ref UART_CLEAR_IDLEF IDLE line detected Clear Flag
	600	* @arg @ref UART_CLEAR_TCF Transmission Complete Clear Flag
	601	@if STM32F030x6
	602	@elseif STM32F030x8
	603	@elseif STM32F030xC
	604	@elseif STM32F070x6
	605	@elseif STM32F070xB
	606	@else
	607	* @arg @ref UART_CLEAR_LBDF LIN Break Detection Clear Flag (not available on all devices)
	608	@endif
	609	* @arg @ref UART_CLEAR_CTSF CTS Interrupt Clear Flag
	610	* @arg @ref UART_CLEAR_RTOF Receiver Time Out Clear Flag
	611	@if STM32F030x6
	612	@elseif STM32F030x8
	613	@elseif STM32F030xC
	614	@elseif STM32F070x6
	615	@elseif STM32F070xB
	616	@else
	617	* @arg @ref UART_CLEAR_EOBF End Of Block Clear Flag (not available on all devices)
	618	@endif
	619	* @arg @ref UART_CLEAR_CMF Character Match Clear Flag
	620	@if STM32F030x6
	621	@elseif STM32F030x8
	622	@elseif STM32F030xC
	623	@elseif STM32F070x6
	624	@elseif STM32F070xB
	625	@else
	626	* @arg @ref UART_CLEAR_WUF Wake Up from stop mode Clear Flag (not available on all devices)
	627	@endif
	628	* @retval None
	629	*/
	630	#define __HAL_UART_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__))
	631
	632	/** @brief Clear the UART PE pending flag.
	633	* @param __HANDLE__ specifies the UART Handle.
	634	* @retval None
	635	*/
	636	#define __HAL_UART_CLEAR_PEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_PEF)
	637
	638	/** @brief Clear the UART FE pending flag.
	639	* @param __HANDLE__ specifies the UART Handle.
	640	* @retval None
	641	*/
	642	#define __HAL_UART_CLEAR_FEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_FEF)
	643
	644	/** @brief Clear the UART NE pending flag.
	645	* @param __HANDLE__ specifies the UART Handle.
	646	* @retval None
	647	*/
	648	#define __HAL_UART_CLEAR_NEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_NEF)
	649
	650	/** @brief Clear the UART ORE pending flag.
	651	* @param __HANDLE__ specifies the UART Handle.
	652	* @retval None
	653	*/
	654	#define __HAL_UART_CLEAR_OREFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_OREF)
	655
	656	/** @brief Clear the UART IDLE pending flag.
	657	* @param __HANDLE__ specifies the UART Handle.
	658	* @retval None
	659	*/
	660	#define __HAL_UART_CLEAR_IDLEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_IDLEF)
	661
	662	/** @brief Check whether the specified UART flag is set or not.
	663	* @param __HANDLE__ specifies the UART Handle.
	664	* @param __FLAG__ specifies the flag to check.
	665	* This parameter can be one of the following values:
	666	@if STM32F030x6
	667	@elseif STM32F030x8
	668	@elseif STM32F030xC
	669	@elseif STM32F070x6
	670	@elseif STM32F070xB
	671	@else
	672	* @arg @ref UART_FLAG_REACK Receive enable acknowledge flag
	673	@endif
	674	* @arg @ref UART_FLAG_TEACK Transmit enable acknowledge flag
	675	@if STM32F030x6
	676	@elseif STM32F030x8
	677	@elseif STM32F030xC
	678	@elseif STM32F070x6
	679	@elseif STM32F070xB
	680	@else
	681	* @arg @ref UART_FLAG_WUF Wake up from stop mode flag (not available on F030xx devices)
	682	@endif
	683	* @arg @ref UART_FLAG_RWU Receiver wake up flag (not available on F030xx devices)
	684	* @arg @ref UART_FLAG_SBKF Send Break flag
	685	* @arg @ref UART_FLAG_CMF Character match flag
	686	* @arg @ref UART_FLAG_BUSY Busy flag
	687	* @arg @ref UART_FLAG_ABRF Auto Baud rate detection flag
	688	* @arg @ref UART_FLAG_ABRE Auto Baud rate detection error flag
	689	@if STM32F030x6
	690	@elseif STM32F030x8
	691	@elseif STM32F030xC
	692	@elseif STM32F070x6
	693	@elseif STM32F070xB
	694	@else
	695	* @arg @ref UART_FLAG_EOBF End of block flag (not available on F030xx devices)
	696	@endif
	697	* @arg @ref UART_FLAG_RTOF Receiver timeout flag
	698	* @arg @ref UART_FLAG_CTS CTS Change flag
	699	@if STM32F030x6
	700	@elseif STM32F030x8
	701	@elseif STM32F030xC
	702	@elseif STM32F070x6
	703	@elseif STM32F070xB
	704	@else
	705	* @arg @ref UART_FLAG_LBDF LIN Break detection flag (not available on F030xx devices)
	706	@endif
	707	* @arg @ref UART_FLAG_TXE Transmit data register empty flag
	708	* @arg @ref UART_FLAG_TC Transmission Complete flag
	709	* @arg @ref UART_FLAG_RXNE Receive data register not empty flag
	710	* @arg @ref UART_FLAG_IDLE Idle Line detection flag
	711	* @arg @ref UART_FLAG_ORE Overrun Error flag
	712	* @arg @ref UART_FLAG_NE Noise Error flag
	713	* @arg @ref UART_FLAG_FE Framing Error flag
	714	* @arg @ref UART_FLAG_PE Parity Error flag
	715	* @retval The new state of __FLAG__ (TRUE or FALSE).
	716	*/
	717	#define __HAL_UART_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->ISR & (__FLAG__)) == (__FLAG__))
	718
	719	/** @brief Enable the specified UART interrupt.
	720	* @param __HANDLE__ specifies the UART Handle.
	721	* @param __INTERRUPT__ specifies the UART interrupt source to enable.
	722	* This parameter can be one of the following values:
	723	@if STM32F030x6
	724	@elseif STM32F030x8
	725	@elseif STM32F030xC
	726	@elseif STM32F070x6
	727	@elseif STM32F070xB
	728	@else
	729	* @arg @ref UART_IT_WUF Wakeup from stop mode interrupt (not available on F030xx devices)
	730	@endif
	731	* @arg @ref UART_IT_CM Character match interrupt
	732	* @arg @ref UART_IT_CTS CTS change interrupt
	733	@if STM32F030x6
	734	@elseif STM32F030x8
	735	@elseif STM32F030xC
	736	@elseif STM32F070x6
	737	@elseif STM32F070xB
	738	@else
	739	* @arg @ref UART_IT_LBD LIN Break detection interrupt (not available on F030xx devices)
	740	@endif
	741	* @arg @ref UART_IT_TXE Transmit Data Register empty interrupt
	742	* @arg @ref UART_IT_TC Transmission complete interrupt
	743	* @arg @ref UART_IT_RXNE Receive Data register not empty interrupt
	744	* @arg @ref UART_IT_IDLE Idle line detection interrupt
	745	* @arg @ref UART_IT_PE Parity Error interrupt
	746	* @arg @ref UART_IT_ERR Error interrupt (Frame error, noise error, overrun error)
	747	* @retval None
	748	*/
	749	#define __HAL_UART_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U)? ((__HANDLE__)->Instance->CR1 \|= (1U << ((__INTERRUPT__) & UART_IT_MASK))): \
	750	((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U)? ((__HANDLE__)->Instance->CR2 \|= (1U << ((__INTERRUPT__) & UART_IT_MASK))): \
	751	((__HANDLE__)->Instance->CR3 \|= (1U << ((__INTERRUPT__) & UART_IT_MASK))))
	752
	753
	754	/** @brief Disable the specified UART interrupt.
	755	* @param __HANDLE__ specifies the UART Handle.
	756	* @param __INTERRUPT__ specifies the UART interrupt source to disable.
	757	* This parameter can be one of the following values:
	758	@if STM32F030x6
	759	@elseif STM32F030x8
	760	@elseif STM32F030xC
	761	@elseif STM32F070x6
	762	@elseif STM32F070xB
	763	@else
	764	* @arg @ref UART_IT_WUF Wakeup from stop mode interrupt (not available on F030xx devices)
	765	@endif
	766	* @arg @ref UART_IT_CM Character match interrupt
	767	* @arg @ref UART_IT_CTS CTS change interrupt
	768	@if STM32F030x6
	769	@elseif STM32F030x8
	770	@elseif STM32F030xC
	771	@elseif STM32F070x6
	772	@elseif STM32F070xB
	773	@else
	774	* @arg @ref UART_IT_LBD LIN Break detection interrupt (not available on F030xx devices)
	775	@endif
	776	* @arg @ref UART_IT_TXE Transmit Data Register empty interrupt
	777	* @arg @ref UART_IT_TC Transmission complete interrupt
	778	* @arg @ref UART_IT_RXNE Receive Data register not empty interrupt
	779	* @arg @ref UART_IT_IDLE Idle line detection interrupt
	780	* @arg @ref UART_IT_PE Parity Error interrupt
	781	* @arg @ref UART_IT_ERR Error interrupt (Frame error, noise error, overrun error)
	782	* @retval None
	783	*/
	784	#define __HAL_UART_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U)? ((__HANDLE__)->Instance->CR1 &= ~ (1U << ((__INTERRUPT__) & UART_IT_MASK))): \
	785	((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U)? ((__HANDLE__)->Instance->CR2 &= ~ (1U << ((__INTERRUPT__) & UART_IT_MASK))): \
	786	((__HANDLE__)->Instance->CR3 &= ~ (1U << ((__INTERRUPT__) & UART_IT_MASK))))
	787
	788	/** @brief Check whether the specified UART interrupt has occurred or not.
	789	* @param __HANDLE__ specifies the UART Handle.
	790	* @param __IT__ specifies the UART interrupt to check.
	791	* This parameter can be one of the following values:
	792	@if STM32F030x6
	793	@elseif STM32F030x8
	794	@elseif STM32F030xC
	795	@elseif STM32F070x6
	796	@elseif STM32F070xB
	797	@else
	798	* @arg @ref UART_IT_WUF Wakeup from stop mode interrupt (not available on F030xx devices)
	799	@endif
	800	* @arg @ref UART_IT_CM Character match interrupt
	801	* @arg @ref UART_IT_CTS CTS change interrupt
	802	@if STM32F030x6
	803	@elseif STM32F030x8
	804	@elseif STM32F030xC
	805	@elseif STM32F070x6
	806	@elseif STM32F070xB
	807	@else
	808	* @arg @ref UART_IT_LBD LIN Break detection interrupt (not available on F030xx devices)
	809	@endif
	810	* @arg @ref UART_IT_TXE Transmit Data Register empty interrupt
	811	* @arg @ref UART_IT_TC Transmission complete interrupt
	812	* @arg @ref UART_IT_RXNE Receive Data register not empty interrupt
	813	* @arg @ref UART_IT_IDLE Idle line detection interrupt
	814	* @arg @ref UART_IT_ORE Overrun Error interrupt
	815	* @arg @ref UART_IT_NE Noise Error interrupt
	816	* @arg @ref UART_IT_FE Framing Error interrupt
	817	* @arg @ref UART_IT_PE Parity Error interrupt
	818	* @retval The new state of __IT__ (TRUE or FALSE).
	819	*/
	820	#define __HAL_UART_GET_IT(__HANDLE__, __IT__) ((__HANDLE__)->Instance->ISR & (1U << ((__IT__)>> 0x08U)))
	821
	822	/** @brief Check whether the specified UART interrupt source is enabled or not.
	823	* @param __HANDLE__ specifies the UART Handle.
	824	* @param __IT__ specifies the UART interrupt source to check.
	825	* This parameter can be one of the following values:
	826	@if STM32F030x6
	827	@elseif STM32F030x8
	828	@elseif STM32F030xC
	829	@elseif STM32F070x6
	830	@elseif STM32F070xB
	831	@else
	832	* @arg @ref UART_IT_WUF Wakeup from stop mode interrupt (not available on F030xx devices)
	833	@endif
	834	* @arg @ref UART_IT_CM Character match interrupt
	835	* @arg @ref UART_IT_CTS CTS change interrupt
	836	@if STM32F030x6
	837	@elseif STM32F030x8
	838	@elseif STM32F030xC
	839	@elseif STM32F070x6
	840	@elseif STM32F070xB
	841	@else
	842	* @arg @ref UART_IT_LBD LIN Break detection interrupt (not available on F030xx devices)
	843	@endif
	844	* @arg @ref UART_IT_TXE Transmit Data Register empty interrupt
	845	* @arg @ref UART_IT_TC Transmission complete interrupt
	846	* @arg @ref UART_IT_RXNE Receive Data register not empty interrupt
	847	* @arg @ref UART_IT_IDLE Idle line detection interrupt
	848	* @arg @ref UART_IT_ERR Error interrupt (Frame error, noise error, overrun error)
	849	* @arg @ref UART_IT_PE Parity Error interrupt
	850	* @retval The new state of __IT__ (TRUE or FALSE).
	851	*/
	852	#define __HAL_UART_GET_IT_SOURCE(__HANDLE__, __IT__) ((((((uint8_t)(__IT__)) >> 5U) == 1U)? (__HANDLE__)->Instance->CR1:(((((uint8_t)(__IT__)) >> 5U) == 2U)? \
	853	(__HANDLE__)->Instance->CR2 : (__HANDLE__)->Instance->CR3)) & (1U << (((uint16_t)(__IT__)) & UART_IT_MASK)))
	854
	855	/** @brief Clear the specified UART ISR flag, in setting the proper ICR register flag.
	856	* @param __HANDLE__ specifies the UART Handle.
	857	* @param __IT_CLEAR__ specifies the interrupt clear register flag that needs to be set
	858	* to clear the corresponding interrupt
	859	* This parameter can be one of the following values:
	860	* @arg @ref UART_CLEAR_PEF Parity Error Clear Flag
	861	* @arg @ref UART_CLEAR_FEF Framing Error Clear Flag
	862	* @arg @ref UART_CLEAR_NEF Noise detected Clear Flag
	863	* @arg @ref UART_CLEAR_OREF Overrun Error Clear Flag
	864	* @arg @ref UART_CLEAR_IDLEF IDLE line detected Clear Flag
	865	* @arg @ref UART_CLEAR_TCF Transmission Complete Clear Flag
	866	@if STM32F030x6
	867	@elseif STM32F030x8
	868	@elseif STM32F030xC
	869	@elseif STM32F070x6
	870	@elseif STM32F070xB
	871	@else
	872	* @arg @ref UART_CLEAR_LBDF LIN Break Detection Clear Flag (not available on F030xx devices)
	873	@endif
	874	* @arg @ref UART_CLEAR_CTSF CTS Interrupt Clear Flag
	875	* @arg @ref UART_CLEAR_RTOF Receiver Time Out Clear Flag
	876	@if STM32F030x6
	877	@elseif STM32F030x8
	878	@elseif STM32F030xC
	879	@elseif STM32F070x6
	880	@elseif STM32F070xB
	881	@else
	882	* @arg @ref UART_CLEAR_EOBF End Of Block Clear Flag
	883	@endif
	884	* @arg @ref UART_CLEAR_CMF Character Match Clear Flag
	885	@if STM32F030x6
	886	@elseif STM32F030x8
	887	@elseif STM32F030xC
	888	@elseif STM32F070x6
	889	@elseif STM32F070xB
	890	@else
	891	* @arg @ref UART_CLEAR_WUF Wake Up from stop mode Clear Flag (not available on F030xx devices)
	892	@endif
	893	* @retval None
	894	*/
	895	#define __HAL_UART_CLEAR_IT(__HANDLE__, __IT_CLEAR__) ((__HANDLE__)->Instance->ICR = (uint32_t)(__IT_CLEAR__))
	896
	897	/** @brief Set a specific UART request flag.
	898	* @param __HANDLE__ specifies the UART Handle.
	899	* @param __REQ__ specifies the request flag to set
	900	* This parameter can be one of the following values:
	901	* @arg @ref UART_AUTOBAUD_REQUEST Auto-Baud Rate Request
	902	* @arg @ref UART_SENDBREAK_REQUEST Send Break Request
	903	* @arg @ref UART_MUTE_MODE_REQUEST Mute Mode Request
	904	* @arg @ref UART_RXDATA_FLUSH_REQUEST Receive Data flush Request
	905	@if STM32F030x6
	906	@elseif STM32F030x8
	907	@elseif STM32F030xC
	908	@elseif STM32F070x6
	909	@elseif STM32F070xB
	910	@else
	911	* @arg @ref UART_TXDATA_FLUSH_REQUEST Transmit data flush Request (not available on F030xx devices)
	912	@endif
	913	* @retval None
	914	*/
	915	#define __HAL_UART_SEND_REQ(__HANDLE__, __REQ__) ((__HANDLE__)->Instance->RQR \|= (uint32_t)(__REQ__))
	916
	917	/** @brief Enable the UART one bit sample method.
	918	* @param __HANDLE__ specifies the UART Handle.
	919	* @retval None
	920	*/
	921	#define __HAL_UART_ONE_BIT_SAMPLE_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3\|= USART_CR3_ONEBIT)
	922
	923	/** @brief Disable the UART one bit sample method.
	924	* @param __HANDLE__ specifies the UART Handle.
	925	* @retval None
	926	*/
	927	#define __HAL_UART_ONE_BIT_SAMPLE_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3 &= (uint32_t)~((uint32_t)USART_CR3_ONEBIT))
	928
	929	/** @brief Enable UART.
	930	* @param __HANDLE__ specifies the UART Handle.
	931	* @retval None
	932	*/
	933	#define __HAL_UART_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 \|= USART_CR1_UE)
	934
	935	/** @brief Disable UART.
	936	* @param __HANDLE__ specifies the UART Handle.
	937	* @retval None
	938	*/
	939	#define __HAL_UART_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~USART_CR1_UE)
	940
	941	/** @brief Enable CTS flow control.
	942	* @note This macro allows to enable CTS hardware flow control for a given UART instance,
	943	* without need to call HAL_UART_Init() function.
	944	* As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
	945	* @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need
	946	* for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
	947	* - UART instance should have already been initialised (through call of HAL_UART_Init() )
	948	* - macro could only be called when corresponding UART instance is disabled (i.e. __HAL_UART_DISABLE(__HANDLE__))
	949	* and should be followed by an Enable macro (i.e. __HAL_UART_ENABLE(__HANDLE__)).
	950	* @param __HANDLE__ specifies the UART Handle.
	951	* @retval None
	952	*/
	953	#define __HAL_UART_HWCONTROL_CTS_ENABLE(__HANDLE__) \
	954	do{ \
	955	SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \
	956	(__HANDLE__)->Init.HwFlowCtl \|= USART_CR3_CTSE; \
	957	} while(0)
	958
	959	/** @brief Disable CTS flow control.
	960	* @note This macro allows to disable CTS hardware flow control for a given UART instance,
	961	* without need to call HAL_UART_Init() function.
	962	* As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
	963	* @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need
	964	* for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
	965	* - UART instance should have already been initialised (through call of HAL_UART_Init() )
	966	* - macro could only be called when corresponding UART instance is disabled (i.e. __HAL_UART_DISABLE(__HANDLE__))
	967	* and should be followed by an Enable macro (i.e. __HAL_UART_ENABLE(__HANDLE__)).
	968	* @param __HANDLE__ specifies the UART Handle.
	969	* @retval None
	970	*/
	971	#define __HAL_UART_HWCONTROL_CTS_DISABLE(__HANDLE__) \
	972	do{ \
	973	CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \
	974	(__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_CTSE); \
	975	} while(0)
	976
	977	/** @brief Enable RTS flow control.
	978	* @note This macro allows to enable RTS hardware flow control for a given UART instance,
	979	* without need to call HAL_UART_Init() function.
	980	* As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
	981	* @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need
	982	* for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
	983	* - UART instance should have already been initialised (through call of HAL_UART_Init() )
	984	* - macro could only be called when corresponding UART instance is disabled (i.e. __HAL_UART_DISABLE(__HANDLE__))
	985	* and should be followed by an Enable macro (i.e. __HAL_UART_ENABLE(__HANDLE__)).
	986	* @param __HANDLE__ specifies the UART Handle.
	987	* @retval None
	988	*/
	989	#define __HAL_UART_HWCONTROL_RTS_ENABLE(__HANDLE__) \
	990	do{ \
	991	SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE); \
	992	(__HANDLE__)->Init.HwFlowCtl \|= USART_CR3_RTSE; \
	993	} while(0)
	994
	995	/** @brief Disable RTS flow control.
	996	* @note This macro allows to disable RTS hardware flow control for a given UART instance,
	997	* without need to call HAL_UART_Init() function.
	998	* As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
	999	* @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need
	1000	* for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
	1001	* - UART instance should have already been initialised (through call of HAL_UART_Init() )
	1002	* - macro could only be called when corresponding UART instance is disabled (i.e. __HAL_UART_DISABLE(__HANDLE__))
	1003	* and should be followed by an Enable macro (i.e. __HAL_UART_ENABLE(__HANDLE__)).
	1004	* @param __HANDLE__ specifies the UART Handle.
	1005	* @retval None
	1006	*/
	1007	#define __HAL_UART_HWCONTROL_RTS_DISABLE(__HANDLE__) \
	1008	do{ \
	1009	CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE);\
	1010	(__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_RTSE); \
	1011	} while(0)
	1012
	1013	/**
	1014	* @}
	1015	*/
	1016
	1017	/* Private macros --------------------------------------------------------*/
	1018	/** @defgroup UART_Private_Macros UART Private Macros
	1019	* @{
	1020	*/
	1021
	1022	/** @brief BRR division operation to set BRR register in 8-bit oversampling mode.
	1023	* @param __PCLK__ UART clock.
	1024	* @param __BAUD__ Baud rate set by the user.
	1025	* @retval Division result
	1026	*/
	1027	#define UART_DIV_SAMPLING8(__PCLK__, __BAUD__) ((((__PCLK__)*2U) + ((__BAUD__)/2U)) / (__BAUD__))
	1028
	1029	/** @brief BRR division operation to set BRR register in 16-bit oversampling mode.
	1030	* @param __PCLK__ UART clock.
	1031	* @param __BAUD__ Baud rate set by the user.
	1032	* @retval Division result
	1033	*/
	1034	#define UART_DIV_SAMPLING16(__PCLK__, __BAUD__) (((__PCLK__) + ((__BAUD__)/2U)) / (__BAUD__))
	1035
	1036	/** @brief Check UART Baud rate.
	1037	* @param __BAUDRATE__ Baudrate specified by the user.
	1038	* The maximum Baud Rate is derived from the maximum clock on F0 (i.e. 48 MHz)
	1039	* divided by the smallest oversampling used on the USART (i.e. 8)
	1040	* @retval SET (__BAUDRATE__ is valid) or RESET (__BAUDRATE__ is invalid)
	1041	*/
	1042	#define IS_UART_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) < 6000001U)
	1043
	1044	/** @brief Check UART assertion time.
	1045	* @param __TIME__ 5-bit value assertion time.
	1046	* @retval Test result (TRUE or FALSE).
	1047	*/
	1048	#define IS_UART_ASSERTIONTIME(__TIME__) ((__TIME__) <= 0x1F)
	1049
	1050	/** @brief Check UART deassertion time.
	1051	* @param __TIME__ 5-bit value deassertion time.
	1052	* @retval Test result (TRUE or FALSE).
	1053	*/
	1054	#define IS_UART_DEASSERTIONTIME(__TIME__) ((__TIME__) <= 0x1F)
	1055
	1056	/**
	1057	* @brief Ensure that UART frame number of stop bits is valid.
	1058	* @param __STOPBITS__ UART frame number of stop bits.
	1059	* @retval SET (__STOPBITS__ is valid) or RESET (__STOPBITS__ is invalid)
	1060	*/
	1061	#ifdef USART_SMARTCARD_SUPPORT
	1062	#define IS_UART_STOPBITS(__STOPBITS__) (((__STOPBITS__) == UART_STOPBITS_0_5) \|\| \
	1063	((__STOPBITS__) == UART_STOPBITS_1) \|\| \
	1064	((__STOPBITS__) == UART_STOPBITS_1_5) \|\| \
	1065	((__STOPBITS__) == UART_STOPBITS_2))
	1066	#else
	1067	#define IS_UART_STOPBITS(__STOPBITS__) (((__STOPBITS__) == UART_STOPBITS_1) \|\| \
	1068	((__STOPBITS__) == UART_STOPBITS_2))
	1069	#endif
	1070
	1071	/**
	1072	* @brief Ensure that UART frame parity is valid.
	1073	* @param __PARITY__ UART frame parity.
	1074	* @retval SET (__PARITY__ is valid) or RESET (__PARITY__ is invalid)
	1075	*/
	1076	#define IS_UART_PARITY(__PARITY__) (((__PARITY__) == UART_PARITY_NONE) \|\| \
	1077	((__PARITY__) == UART_PARITY_EVEN) \|\| \
	1078	((__PARITY__) == UART_PARITY_ODD))
	1079
	1080	/**
	1081	* @brief Ensure that UART hardware flow control is valid.
	1082	* @param __CONTROL__ UART hardware flow control.
	1083	* @retval SET (__CONTROL__ is valid) or RESET (__CONTROL__ is invalid)
	1084	*/
	1085	#define IS_UART_HARDWARE_FLOW_CONTROL(__CONTROL__)\
	1086	(((__CONTROL__) == UART_HWCONTROL_NONE) \|\| \
	1087	((__CONTROL__) == UART_HWCONTROL_RTS) \|\| \
	1088	((__CONTROL__) == UART_HWCONTROL_CTS) \|\| \
	1089	((__CONTROL__) == UART_HWCONTROL_RTS_CTS))
	1090
	1091	/**
	1092	* @brief Ensure that UART communication mode is valid.
	1093	* @param __MODE__ UART communication mode.
	1094	* @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid)
	1095	*/
	1096	#define IS_UART_MODE(__MODE__) ((((__MODE__) & (~((uint32_t)(UART_MODE_TX_RX)))) == 0x00U) && ((__MODE__) != 0x00U))
	1097
	1098	/**
	1099	* @brief Ensure that UART state is valid.
	1100	* @param __STATE__ UART state.
	1101	* @retval SET (__STATE__ is valid) or RESET (__STATE__ is invalid)
	1102	*/
	1103	#define IS_UART_STATE(__STATE__) (((__STATE__) == UART_STATE_DISABLE) \|\| \
	1104	((__STATE__) == UART_STATE_ENABLE))
	1105
	1106	/**
	1107	* @brief Ensure that UART oversampling is valid.
	1108	* @param __SAMPLING__ UART oversampling.
	1109	* @retval SET (__SAMPLING__ is valid) or RESET (__SAMPLING__ is invalid)
	1110	*/
	1111	#define IS_UART_OVERSAMPLING(__SAMPLING__) (((__SAMPLING__) == UART_OVERSAMPLING_16) \|\| \
	1112	((__SAMPLING__) == UART_OVERSAMPLING_8))
	1113
	1114	/**
	1115	* @brief Ensure that UART frame sampling is valid.
	1116	* @param __ONEBIT__ UART frame sampling.
	1117	* @retval SET (__ONEBIT__ is valid) or RESET (__ONEBIT__ is invalid)
	1118	*/
	1119	#define IS_UART_ONE_BIT_SAMPLE(__ONEBIT__) (((__ONEBIT__) == UART_ONE_BIT_SAMPLE_DISABLE) \|\| \
	1120	((__ONEBIT__) == UART_ONE_BIT_SAMPLE_ENABLE))
	1121
	1122	/**
	1123	* @brief Ensure that Address Length detection parameter is valid.
	1124	* @param __ADDRESS__ UART Adress length value.
	1125	* @retval SET (__ADDRESS__ is valid) or RESET (__ADDRESS__ is invalid)
	1126	*/
	1127	#define IS_UART_ADDRESSLENGTH_DETECT(__ADDRESS__) (((__ADDRESS__) == UART_ADDRESS_DETECT_4B) \|\| \
	1128	((__ADDRESS__) == UART_ADDRESS_DETECT_7B))
	1129
	1130	/**
	1131	* @brief Ensure that UART receiver timeout setting is valid.
	1132	* @param __TIMEOUT__ UART receiver timeout setting.
	1133	* @retval SET (__TIMEOUT__ is valid) or RESET (__TIMEOUT__ is invalid)
	1134	*/
	1135	#define IS_UART_RECEIVER_TIMEOUT(__TIMEOUT__) (((__TIMEOUT__) == UART_RECEIVER_TIMEOUT_DISABLE) \|\| \
	1136	((__TIMEOUT__) == UART_RECEIVER_TIMEOUT_ENABLE))
	1137
	1138	/**
	1139	* @brief Ensure that UART DMA TX state is valid.
	1140	* @param __DMATX__ UART DMA TX state.
	1141	* @retval SET (__DMATX__ is valid) or RESET (__DMATX__ is invalid)
	1142	*/
	1143	#define IS_UART_DMA_TX(__DMATX__) (((__DMATX__) == UART_DMA_TX_DISABLE) \|\| \
	1144	((__DMATX__) == UART_DMA_TX_ENABLE))
	1145
	1146	/**
	1147	* @brief Ensure that UART DMA RX state is valid.
	1148	* @param __DMARX__ UART DMA RX state.
	1149	* @retval SET (__DMARX__ is valid) or RESET (__DMARX__ is invalid)
	1150	*/
	1151	#define IS_UART_DMA_RX(__DMARX__) (((__DMARX__) == UART_DMA_RX_DISABLE) \|\| \
	1152	((__DMARX__) == UART_DMA_RX_ENABLE))
	1153
	1154	/**
	1155	* @brief Ensure that UART half-duplex state is valid.
	1156	* @param __HDSEL__ UART half-duplex state.
	1157	* @retval SET (__HDSEL__ is valid) or RESET (__HDSEL__ is invalid)
	1158	*/
	1159	#define IS_UART_HALF_DUPLEX(__HDSEL__) (((__HDSEL__) == UART_HALF_DUPLEX_DISABLE) \|\| \
	1160	((__HDSEL__) == UART_HALF_DUPLEX_ENABLE))
	1161
	1162	/**
	1163	* @brief Ensure that UART wake-up method is valid.
	1164	* @param __WAKEUP__ UART wake-up method .
	1165	* @retval SET (__WAKEUP__ is valid) or RESET (__WAKEUP__ is invalid)
	1166	*/
	1167	#define IS_UART_WAKEUPMETHOD(__WAKEUP__) (((__WAKEUP__) == UART_WAKEUPMETHOD_IDLELINE) \|\| \
	1168	((__WAKEUP__) == UART_WAKEUPMETHOD_ADDRESSMARK))
	1169
	1170	/**
	1171	* @brief Ensure that UART advanced features initialization is valid.
	1172	* @param __INIT__ UART advanced features initialization.
	1173	* @retval SET (__INIT__ is valid) or RESET (__INIT__ is invalid)
	1174	*/
	1175	#define IS_UART_ADVFEATURE_INIT(__INIT__) ((__INIT__) <= (UART_ADVFEATURE_NO_INIT \| \
	1176	UART_ADVFEATURE_TXINVERT_INIT \| \
	1177	UART_ADVFEATURE_RXINVERT_INIT \| \
	1178	UART_ADVFEATURE_DATAINVERT_INIT \| \
	1179	UART_ADVFEATURE_SWAP_INIT \| \
	1180	UART_ADVFEATURE_RXOVERRUNDISABLE_INIT \| \
	1181	UART_ADVFEATURE_DMADISABLEONERROR_INIT \| \
	1182	UART_ADVFEATURE_AUTOBAUDRATE_INIT \| \
	1183	UART_ADVFEATURE_MSBFIRST_INIT))
	1184
	1185	/**
	1186	* @brief Ensure that UART frame TX inversion setting is valid.
	1187	* @param __TXINV__ UART frame TX inversion setting.
	1188	* @retval SET (__TXINV__ is valid) or RESET (__TXINV__ is invalid)
	1189	*/
	1190	#define IS_UART_ADVFEATURE_TXINV(__TXINV__) (((__TXINV__) == UART_ADVFEATURE_TXINV_DISABLE) \|\| \
	1191	((__TXINV__) == UART_ADVFEATURE_TXINV_ENABLE))
	1192
	1193	/**
	1194	* @brief Ensure that UART frame RX inversion setting is valid.
	1195	* @param __RXINV__ UART frame RX inversion setting.
	1196	* @retval SET (__RXINV__ is valid) or RESET (__RXINV__ is invalid)
	1197	*/
	1198	#define IS_UART_ADVFEATURE_RXINV(__RXINV__) (((__RXINV__) == UART_ADVFEATURE_RXINV_DISABLE) \|\| \
	1199	((__RXINV__) == UART_ADVFEATURE_RXINV_ENABLE))
	1200
	1201	/**
	1202	* @brief Ensure that UART frame data inversion setting is valid.
	1203	* @param __DATAINV__ UART frame data inversion setting.
	1204	* @retval SET (__DATAINV__ is valid) or RESET (__DATAINV__ is invalid)
	1205	*/
	1206	#define IS_UART_ADVFEATURE_DATAINV(__DATAINV__) (((__DATAINV__) == UART_ADVFEATURE_DATAINV_DISABLE) \|\| \
	1207	((__DATAINV__) == UART_ADVFEATURE_DATAINV_ENABLE))
	1208
	1209	/**
	1210	* @brief Ensure that UART frame RX/TX pins swap setting is valid.
	1211	* @param __SWAP__ UART frame RX/TX pins swap setting.
	1212	* @retval SET (__SWAP__ is valid) or RESET (__SWAP__ is invalid)
	1213	*/
	1214	#define IS_UART_ADVFEATURE_SWAP(__SWAP__) (((__SWAP__) == UART_ADVFEATURE_SWAP_DISABLE) \|\| \
	1215	((__SWAP__) == UART_ADVFEATURE_SWAP_ENABLE))
	1216
	1217	/**
	1218	* @brief Ensure that UART frame overrun setting is valid.
	1219	* @param __OVERRUN__ UART frame overrun setting.
	1220	* @retval SET (__OVERRUN__ is valid) or RESET (__OVERRUN__ is invalid)
	1221	*/
	1222	#define IS_UART_OVERRUN(__OVERRUN__) (((__OVERRUN__) == UART_ADVFEATURE_OVERRUN_ENABLE) \|\| \
	1223	((__OVERRUN__) == UART_ADVFEATURE_OVERRUN_DISABLE))
	1224
	1225	/**
	1226	* @brief Ensure that UART auto Baud rate state is valid.
	1227	* @param __AUTOBAUDRATE__ UART auto Baud rate state.
	1228	* @retval SET (__AUTOBAUDRATE__ is valid) or RESET (__AUTOBAUDRATE__ is invalid)
	1229	*/
	1230	#define IS_UART_ADVFEATURE_AUTOBAUDRATE(__AUTOBAUDRATE__) (((__AUTOBAUDRATE__) == UART_ADVFEATURE_AUTOBAUDRATE_DISABLE) \|\| \
	1231	((__AUTOBAUDRATE__) == UART_ADVFEATURE_AUTOBAUDRATE_ENABLE))
	1232
	1233	/**
	1234	* @brief Ensure that UART DMA enabling or disabling on error setting is valid.
	1235	* @param __DMA__ UART DMA enabling or disabling on error setting.
	1236	* @retval SET (__DMA__ is valid) or RESET (__DMA__ is invalid)
	1237	*/
	1238	#define IS_UART_ADVFEATURE_DMAONRXERROR(__DMA__) (((__DMA__) == UART_ADVFEATURE_DMA_ENABLEONRXERROR) \|\| \
	1239	((__DMA__) == UART_ADVFEATURE_DMA_DISABLEONRXERROR))
	1240
	1241	/**
	1242	* @brief Ensure that UART frame MSB first setting is valid.
	1243	* @param __MSBFIRST__ UART frame MSB first setting.
	1244	* @retval SET (__MSBFIRST__ is valid) or RESET (__MSBFIRST__ is invalid)
	1245	*/
	1246	#define IS_UART_ADVFEATURE_MSBFIRST(__MSBFIRST__) (((__MSBFIRST__) == UART_ADVFEATURE_MSBFIRST_DISABLE) \|\| \
	1247	((__MSBFIRST__) == UART_ADVFEATURE_MSBFIRST_ENABLE))
	1248
	1249	/**
	1250	* @brief Ensure that UART mute mode state is valid.
	1251	* @param __MUTE__ UART mute mode state.
	1252	* @retval SET (__MUTE__ is valid) or RESET (__MUTE__ is invalid)
	1253	*/
	1254	#define IS_UART_MUTE_MODE(__MUTE__) (((__MUTE__) == UART_ADVFEATURE_MUTEMODE_DISABLE) \|\| \
	1255	((__MUTE__) == UART_ADVFEATURE_MUTEMODE_ENABLE))
	1256
	1257	/**
	1258	* @brief Ensure that UART driver enable polarity is valid.
	1259	* @param __POLARITY__ UART driver enable polarity.
	1260	* @retval SET (__POLARITY__ is valid) or RESET (__POLARITY__ is invalid)
	1261	*/
	1262	#define IS_UART_DE_POLARITY(__POLARITY__) (((__POLARITY__) == UART_DE_POLARITY_HIGH) \|\| \
	1263	((__POLARITY__) == UART_DE_POLARITY_LOW))
	1264
	1265	/**
	1266	* @}
	1267	*/
	1268
	1269	/* Include UART HAL Extended module */
	1270	#include "stm32f0xx_hal_uart_ex.h"
	1271
	1272	/* Exported functions --------------------------------------------------------*/
	1273	/** @addtogroup UART_Exported_Functions UART Exported Functions
	1274	* @{
	1275	*/
	1276
	1277	/** @addtogroup UART_Exported_Functions_Group1 Initialization and de-initialization functions
	1278	* @{
	1279	*/
	1280
	1281	/* Initialization and de-initialization functions ****************************/
	1282	HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart);
	1283	HAL_StatusTypeDef HAL_HalfDuplex_Init(UART_HandleTypeDef *huart);
	1284	HAL_StatusTypeDef HAL_MultiProcessor_Init(UART_HandleTypeDef *huart, uint8_t Address, uint32_t WakeUpMethod);
	1285	HAL_StatusTypeDef HAL_UART_DeInit (UART_HandleTypeDef *huart);
	1286	void HAL_UART_MspInit(UART_HandleTypeDef *huart);
	1287	void HAL_UART_MspDeInit(UART_HandleTypeDef *huart);
	1288
	1289	/**
	1290	* @}
	1291	*/
	1292
	1293	/** @addtogroup UART_Exported_Functions_Group2 IO operation functions
	1294	* @{
	1295	*/
	1296
	1297	/* IO operation functions *****************************************************/
	1298	HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef huart, uint8_t pData, uint16_t Size, uint32_t Timeout);
	1299	HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef huart, uint8_t pData, uint16_t Size, uint32_t Timeout);
	1300	HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef huart, uint8_t pData, uint16_t Size);
	1301	HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef huart, uint8_t pData, uint16_t Size);
	1302	HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef huart, uint8_t pData, uint16_t Size);
	1303	HAL_StatusTypeDef HAL_UART_Receive_DMA(UART_HandleTypeDef huart, uint8_t pData, uint16_t Size);
	1304	HAL_StatusTypeDef HAL_UART_DMAPause(UART_HandleTypeDef *huart);
	1305	HAL_StatusTypeDef HAL_UART_DMAResume(UART_HandleTypeDef *huart);
	1306	HAL_StatusTypeDef HAL_UART_DMAStop(UART_HandleTypeDef *huart);
	1307	/* Transfer Abort functions */
	1308	HAL_StatusTypeDef HAL_UART_Abort(UART_HandleTypeDef *huart);
	1309	HAL_StatusTypeDef HAL_UART_AbortTransmit(UART_HandleTypeDef *huart);
	1310	HAL_StatusTypeDef HAL_UART_AbortReceive(UART_HandleTypeDef *huart);
	1311	HAL_StatusTypeDef HAL_UART_Abort_IT(UART_HandleTypeDef *huart);
	1312	HAL_StatusTypeDef HAL_UART_AbortTransmit_IT(UART_HandleTypeDef *huart);
	1313	HAL_StatusTypeDef HAL_UART_AbortReceive_IT(UART_HandleTypeDef *huart);
	1314
	1315	void HAL_UART_IRQHandler(UART_HandleTypeDef *huart);
	1316	void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart);
	1317	void HAL_UART_TxHalfCpltCallback(UART_HandleTypeDef *huart);
	1318	void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart);
	1319	void HAL_UART_RxHalfCpltCallback(UART_HandleTypeDef *huart);
	1320	void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart);
	1321	void HAL_UART_AbortCpltCallback (UART_HandleTypeDef *huart);
	1322	void HAL_UART_AbortTransmitCpltCallback (UART_HandleTypeDef *huart);
	1323	void HAL_UART_AbortReceiveCpltCallback (UART_HandleTypeDef *huart);
	1324
	1325	/**
	1326	* @}
	1327	*/
	1328
	1329	/** @addtogroup UART_Exported_Functions_Group3 Peripheral Control functions
	1330	* @{
	1331	*/
	1332
	1333	/* Peripheral Control functions ************************************************/
	1334	HAL_StatusTypeDef HAL_MultiProcessor_EnableMuteMode(UART_HandleTypeDef *huart);
	1335	HAL_StatusTypeDef HAL_MultiProcessor_DisableMuteMode(UART_HandleTypeDef *huart);
	1336	void HAL_MultiProcessor_EnterMuteMode(UART_HandleTypeDef *huart);
	1337	HAL_StatusTypeDef HAL_HalfDuplex_EnableTransmitter(UART_HandleTypeDef *huart);
	1338	HAL_StatusTypeDef HAL_HalfDuplex_EnableReceiver(UART_HandleTypeDef *huart);
	1339
	1340	/**
	1341	* @}
	1342	*/
	1343
	1344	/** @addtogroup UART_Exported_Functions_Group4 Peripheral State and Error functions
	1345	* @{
	1346	*/
	1347
	1348	/* Peripheral State and Errors functions **************************************************/
	1349	HAL_UART_StateTypeDef HAL_UART_GetState(UART_HandleTypeDef *huart);
	1350	uint32_t HAL_UART_GetError(UART_HandleTypeDef *huart);
	1351
	1352	/**
	1353	* @}
	1354	*/
	1355
	1356	/**
	1357	* @}
	1358	*/
	1359
	1360	/* Private functions -----------------------------------------------------------*/
	1361	/** @addtogroup UART_Private_Functions UART Private Functions
	1362	* @{
	1363	*/
	1364	void UART_AdvFeatureConfig(UART_HandleTypeDef *huart);
	1365	HAL_StatusTypeDef UART_CheckIdleState(UART_HandleTypeDef *huart);
	1366	HAL_StatusTypeDef UART_SetConfig(UART_HandleTypeDef *huart);
	1367	HAL_StatusTypeDef UART_Transmit_IT(UART_HandleTypeDef *huart);
	1368	HAL_StatusTypeDef UART_EndTransmit_IT(UART_HandleTypeDef *huart);
	1369	HAL_StatusTypeDef UART_Receive_IT(UART_HandleTypeDef *huart);
	1370	HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status, uint32_t Tickstart, uint32_t Timeout);
	1371
	1372	/**
	1373	* @}
	1374	*/
	1375
	1376	/**
	1377	* @}
	1378	*/
	1379
	1380	/**
	1381	* @}
	1382	*/
	1383
	1384	#ifdef __cplusplus
	1385	}
	1386	#endif
	1387
	1388	#endif /* __STM32F0xx_HAL_UART_H */
	1389
	1390	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/
	1391