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| 483170 | 1 | /** |
| Q | 2 | ****************************************************************************** |
| 3 | * @file stm32f0xx_hal_tsc.h | |
| 4 | * @author MCD Application Team | |
| 5 | * @brief This file contains all the functions prototypes for the TSC firmware | |
| 6 | * library. | |
| 7 | ****************************************************************************** | |
| 8 | * @attention | |
| 9 | * | |
| 10 | * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> | |
| 11 | * | |
| 12 | * Redistribution and use in source and binary forms, with or without modification, | |
| 13 | * are permitted provided that the following conditions are met: | |
| 14 | * 1. Redistributions of source code must retain the above copyright notice, | |
| 15 | * this list of conditions and the following disclaimer. | |
| 16 | * 2. Redistributions in binary form must reproduce the above copyright notice, | |
| 17 | * this list of conditions and the following disclaimer in the documentation | |
| 18 | * and/or other materials provided with the distribution. | |
| 19 | * 3. Neither the name of STMicroelectronics nor the names of its contributors | |
| 20 | * may be used to endorse or promote products derived from this software | |
| 21 | * without specific prior written permission. | |
| 22 | * | |
| 23 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" | |
| 24 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE | |
| 25 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE | |
| 26 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE | |
| 27 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL | |
| 28 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR | |
| 29 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER | |
| 30 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, | |
| 31 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE | |
| 32 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | |
| 33 | * | |
| 34 | ****************************************************************************** | |
| 35 | */ | |
| 36 | ||
| 37 | /* Define to prevent recursive inclusion -------------------------------------*/ | |
| 38 | #ifndef __STM32F0xx_TSC_H | |
| 39 | #define __STM32F0xx_TSC_H | |
| 40 | ||
| 41 | #ifdef __cplusplus | |
| 42 | extern "C" { | |
| 43 | #endif | |
| 44 | ||
| 45 | #if defined(STM32F051x8) || defined(STM32F071xB) || defined(STM32F091xC) || \ | |
| 46 | defined(STM32F042x6) || defined(STM32F048xx) || defined(STM32F072xB) || \ | |
| 47 | defined(STM32F058xx) || defined(STM32F078xx) || defined(STM32F098xx) | |
| 48 | ||
| 49 | /* Includes ------------------------------------------------------------------*/ | |
| 50 | #include "stm32f0xx_hal_def.h" | |
| 51 | ||
| 52 | /** @addtogroup STM32F0xx_HAL_Driver | |
| 53 | * @{ | |
| 54 | */ | |
| 55 | ||
| 56 | /** @addtogroup TSC | |
| 57 | * @{ | |
| 58 | */ | |
| 59 | ||
| 60 | /* Exported types ------------------------------------------------------------*/ | |
| 61 | ||
| 62 | /** @defgroup TSC_Exported_Types TSC Exported Types | |
| 63 | * @{ | |
| 64 | */ | |
| 65 | /** | |
| 66 | * @brief TSC state structure definition | |
| 67 | */ | |
| 68 | typedef enum | |
| 69 | { | |
| 70 | HAL_TSC_STATE_RESET = 0x00U, /*!< TSC registers have their reset value */ | |
| 71 | HAL_TSC_STATE_READY = 0x01U, /*!< TSC registers are initialized or acquisition is completed with success */ | |
| 72 | HAL_TSC_STATE_BUSY = 0x02U, /*!< TSC initialization or acquisition is on-going */ | |
| 73 | HAL_TSC_STATE_ERROR = 0x03U /*!< Acquisition is completed with max count error */ | |
| 74 | } HAL_TSC_StateTypeDef; | |
| 75 | ||
| 76 | /** | |
| 77 | * @brief TSC group status structure definition | |
| 78 | */ | |
| 79 | typedef enum | |
| 80 | { | |
| 81 | TSC_GROUP_ONGOING = 0x00U, /*!< Acquisition on group is on-going or not started */ | |
| 82 | TSC_GROUP_COMPLETED = 0x01U /*!< Acquisition on group is completed with success (no max count error) */ | |
| 83 | } TSC_GroupStatusTypeDef; | |
| 84 | ||
| 85 | /** | |
| 86 | * @brief TSC init structure definition | |
| 87 | */ | |
| 88 | typedef struct | |
| 89 | { | |
| 90 | uint32_t CTPulseHighLength; /*!< Charge-transfer high pulse length */ | |
| 91 | uint32_t CTPulseLowLength; /*!< Charge-transfer low pulse length */ | |
| 92 | uint32_t SpreadSpectrum; /*!< Spread spectrum activation */ | |
| 93 | uint32_t SpreadSpectrumDeviation; /*!< Spread spectrum deviation */ | |
| 94 | uint32_t SpreadSpectrumPrescaler; /*!< Spread spectrum prescaler */ | |
| 95 | uint32_t PulseGeneratorPrescaler; /*!< Pulse generator prescaler */ | |
| 96 | uint32_t MaxCountValue; /*!< Max count value */ | |
| 97 | uint32_t IODefaultMode; /*!< IO default mode */ | |
| 98 | uint32_t SynchroPinPolarity; /*!< Synchro pin polarity */ | |
| 99 | uint32_t AcquisitionMode; /*!< Acquisition mode */ | |
| 100 | uint32_t MaxCountInterrupt; /*!< Max count interrupt activation */ | |
| 101 | uint32_t ChannelIOs; /*!< Channel IOs mask */ | |
| 102 | uint32_t ShieldIOs; /*!< Shield IOs mask */ | |
| 103 | uint32_t SamplingIOs; /*!< Sampling IOs mask */ | |
| 104 | } TSC_InitTypeDef; | |
| 105 | ||
| 106 | /** | |
| 107 | * @brief TSC IOs configuration structure definition | |
| 108 | */ | |
| 109 | typedef struct | |
| 110 | { | |
| 111 | uint32_t ChannelIOs; /*!< Channel IOs mask */ | |
| 112 | uint32_t ShieldIOs; /*!< Shield IOs mask */ | |
| 113 | uint32_t SamplingIOs; /*!< Sampling IOs mask */ | |
| 114 | } TSC_IOConfigTypeDef; | |
| 115 | ||
| 116 | /** | |
| 117 | * @brief TSC handle Structure definition | |
| 118 | */ | |
| 119 | typedef struct | |
| 120 | { | |
| 121 | TSC_TypeDef *Instance; /*!< Register base address */ | |
| 122 | TSC_InitTypeDef Init; /*!< Initialization parameters */ | |
| 123 | __IO HAL_TSC_StateTypeDef State; /*!< Peripheral state */ | |
| 124 | HAL_LockTypeDef Lock; /*!< Lock feature */ | |
| 125 | } TSC_HandleTypeDef; | |
| 126 | ||
| 127 | /** | |
| 128 | * @} | |
| 129 | */ | |
| 130 | ||
| 131 | /* Exported constants --------------------------------------------------------*/ | |
| 132 | ||
| 133 | /** @defgroup TSC_Exported_Constants TSC Exported Constants | |
| 134 | * @{ | |
| 135 | */ | |
| 136 | ||
| 137 | /** @defgroup TSC_CTPH_Cycles TSC Charge Transfer Pulse High | |
| 138 | * @{ | |
| 139 | */ | |
| 140 | #define TSC_CTPH_1CYCLE ((uint32_t)( 0U << 28)) | |
| 141 | #define TSC_CTPH_2CYCLES ((uint32_t)( 1U << 28)) | |
| 142 | #define TSC_CTPH_3CYCLES ((uint32_t)( 2U << 28)) | |
| 143 | #define TSC_CTPH_4CYCLES ((uint32_t)( 3U << 28)) | |
| 144 | #define TSC_CTPH_5CYCLES ((uint32_t)( 4U << 28)) | |
| 145 | #define TSC_CTPH_6CYCLES ((uint32_t)( 5U << 28)) | |
| 146 | #define TSC_CTPH_7CYCLES ((uint32_t)( 6U << 28)) | |
| 147 | #define TSC_CTPH_8CYCLES ((uint32_t)( 7U << 28)) | |
| 148 | #define TSC_CTPH_9CYCLES ((uint32_t)( 8U << 28)) | |
| 149 | #define TSC_CTPH_10CYCLES ((uint32_t)( 9U << 28)) | |
| 150 | #define TSC_CTPH_11CYCLES ((uint32_t)(10U << 28)) | |
| 151 | #define TSC_CTPH_12CYCLES ((uint32_t)(11U << 28)) | |
| 152 | #define TSC_CTPH_13CYCLES ((uint32_t)(12U << 28)) | |
| 153 | #define TSC_CTPH_14CYCLES ((uint32_t)(13U << 28)) | |
| 154 | #define TSC_CTPH_15CYCLES ((uint32_t)(14U << 28)) | |
| 155 | #define TSC_CTPH_16CYCLES ((uint32_t)(15U << 28)) | |
| 156 | #define IS_TSC_CTPH(VAL) (((VAL) == TSC_CTPH_1CYCLE) || \ | |
| 157 | ((VAL) == TSC_CTPH_2CYCLES) || \ | |
| 158 | ((VAL) == TSC_CTPH_3CYCLES) || \ | |
| 159 | ((VAL) == TSC_CTPH_4CYCLES) || \ | |
| 160 | ((VAL) == TSC_CTPH_5CYCLES) || \ | |
| 161 | ((VAL) == TSC_CTPH_6CYCLES) || \ | |
| 162 | ((VAL) == TSC_CTPH_7CYCLES) || \ | |
| 163 | ((VAL) == TSC_CTPH_8CYCLES) || \ | |
| 164 | ((VAL) == TSC_CTPH_9CYCLES) || \ | |
| 165 | ((VAL) == TSC_CTPH_10CYCLES) || \ | |
| 166 | ((VAL) == TSC_CTPH_11CYCLES) || \ | |
| 167 | ((VAL) == TSC_CTPH_12CYCLES) || \ | |
| 168 | ((VAL) == TSC_CTPH_13CYCLES) || \ | |
| 169 | ((VAL) == TSC_CTPH_14CYCLES) || \ | |
| 170 | ((VAL) == TSC_CTPH_15CYCLES) || \ | |
| 171 | ((VAL) == TSC_CTPH_16CYCLES)) | |
| 172 | /** | |
| 173 | * @} | |
| 174 | */ | |
| 175 | ||
| 176 | /** @defgroup TSC_CTPL_Cycles TSC Charge Transfer Pulse Low | |
| 177 | * @{ | |
| 178 | */ | |
| 179 | #define TSC_CTPL_1CYCLE ((uint32_t)( 0U << 24)) | |
| 180 | #define TSC_CTPL_2CYCLES ((uint32_t)( 1U << 24)) | |
| 181 | #define TSC_CTPL_3CYCLES ((uint32_t)( 2U << 24)) | |
| 182 | #define TSC_CTPL_4CYCLES ((uint32_t)( 3U << 24)) | |
| 183 | #define TSC_CTPL_5CYCLES ((uint32_t)( 4U << 24)) | |
| 184 | #define TSC_CTPL_6CYCLES ((uint32_t)( 5U << 24)) | |
| 185 | #define TSC_CTPL_7CYCLES ((uint32_t)( 6U << 24)) | |
| 186 | #define TSC_CTPL_8CYCLES ((uint32_t)( 7U << 24)) | |
| 187 | #define TSC_CTPL_9CYCLES ((uint32_t)( 8U << 24)) | |
| 188 | #define TSC_CTPL_10CYCLES ((uint32_t)( 9U << 24)) | |
| 189 | #define TSC_CTPL_11CYCLES ((uint32_t)(10U << 24)) | |
| 190 | #define TSC_CTPL_12CYCLES ((uint32_t)(11U << 24)) | |
| 191 | #define TSC_CTPL_13CYCLES ((uint32_t)(12U << 24)) | |
| 192 | #define TSC_CTPL_14CYCLES ((uint32_t)(13U << 24)) | |
| 193 | #define TSC_CTPL_15CYCLES ((uint32_t)(14U << 24)) | |
| 194 | #define TSC_CTPL_16CYCLES ((uint32_t)(15U << 24)) | |
| 195 | #define IS_TSC_CTPL(VAL) (((VAL) == TSC_CTPL_1CYCLE) || \ | |
| 196 | ((VAL) == TSC_CTPL_2CYCLES) || \ | |
| 197 | ((VAL) == TSC_CTPL_3CYCLES) || \ | |
| 198 | ((VAL) == TSC_CTPL_4CYCLES) || \ | |
| 199 | ((VAL) == TSC_CTPL_5CYCLES) || \ | |
| 200 | ((VAL) == TSC_CTPL_6CYCLES) || \ | |
| 201 | ((VAL) == TSC_CTPL_7CYCLES) || \ | |
| 202 | ((VAL) == TSC_CTPL_8CYCLES) || \ | |
| 203 | ((VAL) == TSC_CTPL_9CYCLES) || \ | |
| 204 | ((VAL) == TSC_CTPL_10CYCLES) || \ | |
| 205 | ((VAL) == TSC_CTPL_11CYCLES) || \ | |
| 206 | ((VAL) == TSC_CTPL_12CYCLES) || \ | |
| 207 | ((VAL) == TSC_CTPL_13CYCLES) || \ | |
| 208 | ((VAL) == TSC_CTPL_14CYCLES) || \ | |
| 209 | ((VAL) == TSC_CTPL_15CYCLES) || \ | |
| 210 | ((VAL) == TSC_CTPL_16CYCLES)) | |
| 211 | /** | |
| 212 | * @} | |
| 213 | */ | |
| 214 | ||
| 215 | /** @defgroup TSC_SS_Prescaler_definition TSC Spread spectrum prescaler definition | |
| 216 | * @{ | |
| 217 | */ | |
| 218 | #define TSC_SS_PRESC_DIV1 (0U) | |
| 219 | #define TSC_SS_PRESC_DIV2 (TSC_CR_SSPSC) | |
| 220 | #define IS_TSC_SS_PRESC(VAL) (((VAL) == TSC_SS_PRESC_DIV1) || ((VAL) == TSC_SS_PRESC_DIV2)) | |
| 221 | ||
| 222 | /** | |
| 223 | * @} | |
| 224 | */ | |
| 225 | ||
| 226 | /** @defgroup TSC_PG_Prescaler_definition TSC Pulse Generator prescaler definition | |
| 227 | * @{ | |
| 228 | */ | |
| 229 | #define TSC_PG_PRESC_DIV1 ((uint32_t)(0 << 12)) | |
| 230 | #define TSC_PG_PRESC_DIV2 ((uint32_t)(1 << 12)) | |
| 231 | #define TSC_PG_PRESC_DIV4 ((uint32_t)(2 << 12)) | |
| 232 | #define TSC_PG_PRESC_DIV8 ((uint32_t)(3 << 12)) | |
| 233 | #define TSC_PG_PRESC_DIV16 ((uint32_t)(4 << 12)) | |
| 234 | #define TSC_PG_PRESC_DIV32 ((uint32_t)(5 << 12)) | |
| 235 | #define TSC_PG_PRESC_DIV64 ((uint32_t)(6 << 12)) | |
| 236 | #define TSC_PG_PRESC_DIV128 ((uint32_t)(7 << 12)) | |
| 237 | #define IS_TSC_PG_PRESC(VAL) (((VAL) == TSC_PG_PRESC_DIV1) || \ | |
| 238 | ((VAL) == TSC_PG_PRESC_DIV2) || \ | |
| 239 | ((VAL) == TSC_PG_PRESC_DIV4) || \ | |
| 240 | ((VAL) == TSC_PG_PRESC_DIV8) || \ | |
| 241 | ((VAL) == TSC_PG_PRESC_DIV16) || \ | |
| 242 | ((VAL) == TSC_PG_PRESC_DIV32) || \ | |
| 243 | ((VAL) == TSC_PG_PRESC_DIV64) || \ | |
| 244 | ((VAL) == TSC_PG_PRESC_DIV128)) | |
| 245 | /** | |
| 246 | * @} | |
| 247 | */ | |
| 248 | ||
| 249 | /** @defgroup TSC_MCV_definition TSC Max Count Value definition | |
| 250 | * @{ | |
| 251 | */ | |
| 252 | #define TSC_MCV_255 ((uint32_t)(0 << 5)) | |
| 253 | #define TSC_MCV_511 ((uint32_t)(1 << 5)) | |
| 254 | #define TSC_MCV_1023 ((uint32_t)(2 << 5)) | |
| 255 | #define TSC_MCV_2047 ((uint32_t)(3 << 5)) | |
| 256 | #define TSC_MCV_4095 ((uint32_t)(4 << 5)) | |
| 257 | #define TSC_MCV_8191 ((uint32_t)(5 << 5)) | |
| 258 | #define TSC_MCV_16383 ((uint32_t)(6 << 5)) | |
| 259 | #define IS_TSC_MCV(VAL) (((VAL) == TSC_MCV_255) || \ | |
| 260 | ((VAL) == TSC_MCV_511) || \ | |
| 261 | ((VAL) == TSC_MCV_1023) || \ | |
| 262 | ((VAL) == TSC_MCV_2047) || \ | |
| 263 | ((VAL) == TSC_MCV_4095) || \ | |
| 264 | ((VAL) == TSC_MCV_8191) || \ | |
| 265 | ((VAL) == TSC_MCV_16383)) | |
| 266 | /** | |
| 267 | * @} | |
| 268 | */ | |
| 269 | ||
| 270 | /** @defgroup TSC_IO_default_mode_definition TSC I/O default mode definition | |
| 271 | * @{ | |
| 272 | */ | |
| 273 | #define TSC_IODEF_OUT_PP_LOW (0U) | |
| 274 | #define TSC_IODEF_IN_FLOAT (TSC_CR_IODEF) | |
| 275 | #define IS_TSC_IODEF(VAL) (((VAL) == TSC_IODEF_OUT_PP_LOW) || ((VAL) == TSC_IODEF_IN_FLOAT)) | |
| 276 | /** | |
| 277 | * @} | |
| 278 | */ | |
| 279 | ||
| 280 | /** @defgroup TSC_Synchronization_pin_polarity TSC Synchronization pin polarity | |
| 281 | * @{ | |
| 282 | */ | |
| 283 | #define TSC_SYNC_POLARITY_FALLING (0U) | |
| 284 | #define TSC_SYNC_POLARITY_RISING (TSC_CR_SYNCPOL) | |
| 285 | #define IS_TSC_SYNC_POL(VAL) (((VAL) == TSC_SYNC_POLARITY_FALLING) || ((VAL) == TSC_SYNC_POLARITY_RISING)) | |
| 286 | /** | |
| 287 | * @} | |
| 288 | */ | |
| 289 | ||
| 290 | /** @defgroup TSC_Acquisition_mode TSC Acquisition mode | |
| 291 | * @{ | |
| 292 | */ | |
| 293 | #define TSC_ACQ_MODE_NORMAL (0U) | |
| 294 | #define TSC_ACQ_MODE_SYNCHRO (TSC_CR_AM) | |
| 295 | #define IS_TSC_ACQ_MODE(VAL) (((VAL) == TSC_ACQ_MODE_NORMAL) || ((VAL) == TSC_ACQ_MODE_SYNCHRO)) | |
| 296 | /** | |
| 297 | * @} | |
| 298 | */ | |
| 299 | ||
| 300 | /** @defgroup TSC_IO_mode_definition TSC I/O mode definition | |
| 301 | * @{ | |
| 302 | */ | |
| 303 | #define TSC_IOMODE_UNUSED (0U) | |
| 304 | #define TSC_IOMODE_CHANNEL (1U) | |
| 305 | #define TSC_IOMODE_SHIELD (2U) | |
| 306 | #define TSC_IOMODE_SAMPLING (3U) | |
| 307 | #define IS_TSC_IOMODE(VAL) (((VAL) == TSC_IOMODE_UNUSED) || \ | |
| 308 | ((VAL) == TSC_IOMODE_CHANNEL) || \ | |
| 309 | ((VAL) == TSC_IOMODE_SHIELD) || \ | |
| 310 | ((VAL) == TSC_IOMODE_SAMPLING)) | |
| 311 | /** | |
| 312 | * @} | |
| 313 | */ | |
| 314 | ||
| 315 | /** @defgroup TSC_interrupts_definition TSC interrupts definition | |
| 316 | * @{ | |
| 317 | */ | |
| 318 | #define TSC_IT_EOA ((uint32_t)TSC_IER_EOAIE) | |
| 319 | #define TSC_IT_MCE ((uint32_t)TSC_IER_MCEIE) | |
| 320 | #define IS_TSC_MCE_IT(VAL) (((VAL) == DISABLE) || ((VAL) == ENABLE)) | |
| 321 | /** | |
| 322 | * @} | |
| 323 | */ | |
| 324 | ||
| 325 | /** @defgroup TSC_flags_definition TSC Flags Definition | |
| 326 | * @{ | |
| 327 | */ | |
| 328 | #define TSC_FLAG_EOA ((uint32_t)TSC_ISR_EOAF) | |
| 329 | #define TSC_FLAG_MCE ((uint32_t)TSC_ISR_MCEF) | |
| 330 | /** | |
| 331 | * @} | |
| 332 | */ | |
| 333 | ||
| 334 | /** @defgroup TSC_groups_definition TSC groups definition | |
| 335 | * @{ | |
| 336 | */ | |
| 337 | #define TSC_NB_OF_GROUPS (8) | |
| 338 | ||
| 339 | #define TSC_GROUP1 (0x00000001U) | |
| 340 | #define TSC_GROUP2 (0x00000002U) | |
| 341 | #define TSC_GROUP3 (0x00000004U) | |
| 342 | #define TSC_GROUP4 (0x00000008U) | |
| 343 | #define TSC_GROUP5 (0x00000010U) | |
| 344 | #define TSC_GROUP6 (0x00000020U) | |
| 345 | #define TSC_GROUP7 (0x00000040U) | |
| 346 | #define TSC_GROUP8 (0x00000080U) | |
| 347 | #define TSC_ALL_GROUPS (0x000000FFU) | |
| 348 | ||
| 349 | #define TSC_GROUP1_IDX (0U) | |
| 350 | #define TSC_GROUP2_IDX (1U) | |
| 351 | #define TSC_GROUP3_IDX (2U) | |
| 352 | #define TSC_GROUP4_IDX (3U) | |
| 353 | #define TSC_GROUP5_IDX (4U) | |
| 354 | #define TSC_GROUP6_IDX (5U) | |
| 355 | #define TSC_GROUP7_IDX (6U) | |
| 356 | #define TSC_GROUP8_IDX (7U) | |
| 357 | #define IS_GROUP_INDEX(VAL) (((VAL) == 0U) || (((VAL) > 0U) && ((VAL) < TSC_NB_OF_GROUPS))) | |
| 358 | ||
| 359 | #define TSC_GROUP1_IO1 (0x00000001U) | |
| 360 | #define TSC_GROUP1_IO2 (0x00000002U) | |
| 361 | #define TSC_GROUP1_IO3 (0x00000004U) | |
| 362 | #define TSC_GROUP1_IO4 (0x00000008U) | |
| 363 | #define TSC_GROUP1_ALL_IOS (0x0000000FU) | |
| 364 | ||
| 365 | #define TSC_GROUP2_IO1 (0x00000010U) | |
| 366 | #define TSC_GROUP2_IO2 (0x00000020U) | |
| 367 | #define TSC_GROUP2_IO3 (0x00000040U) | |
| 368 | #define TSC_GROUP2_IO4 (0x00000080U) | |
| 369 | #define TSC_GROUP2_ALL_IOS (0x000000F0U) | |
| 370 | ||
| 371 | #define TSC_GROUP3_IO1 (0x00000100U) | |
| 372 | #define TSC_GROUP3_IO2 (0x00000200U) | |
| 373 | #define TSC_GROUP3_IO3 (0x00000400U) | |
| 374 | #define TSC_GROUP3_IO4 (0x00000800U) | |
| 375 | #define TSC_GROUP3_ALL_IOS (0x00000F00U) | |
| 376 | ||
| 377 | #define TSC_GROUP4_IO1 (0x00001000U) | |
| 378 | #define TSC_GROUP4_IO2 (0x00002000U) | |
| 379 | #define TSC_GROUP4_IO3 (0x00004000U) | |
| 380 | #define TSC_GROUP4_IO4 (0x00008000U) | |
| 381 | #define TSC_GROUP4_ALL_IOS (0x0000F000U) | |
| 382 | ||
| 383 | #define TSC_GROUP5_IO1 (0x00010000U) | |
| 384 | #define TSC_GROUP5_IO2 (0x00020000U) | |
| 385 | #define TSC_GROUP5_IO3 (0x00040000U) | |
| 386 | #define TSC_GROUP5_IO4 (0x00080000U) | |
| 387 | #define TSC_GROUP5_ALL_IOS (0x000F0000U) | |
| 388 | ||
| 389 | #define TSC_GROUP6_IO1 (0x00100000U) | |
| 390 | #define TSC_GROUP6_IO2 (0x00200000U) | |
| 391 | #define TSC_GROUP6_IO3 (0x00400000U) | |
| 392 | #define TSC_GROUP6_IO4 (0x00800000U) | |
| 393 | #define TSC_GROUP6_ALL_IOS (0x00F00000U) | |
| 394 | ||
| 395 | #define TSC_GROUP7_IO1 (0x01000000U) | |
| 396 | #define TSC_GROUP7_IO2 (0x02000000U) | |
| 397 | #define TSC_GROUP7_IO3 (0x04000000U) | |
| 398 | #define TSC_GROUP7_IO4 (0x08000000U) | |
| 399 | #define TSC_GROUP7_ALL_IOS (0x0F000000U) | |
| 400 | ||
| 401 | #define TSC_GROUP8_IO1 (0x10000000U) | |
| 402 | #define TSC_GROUP8_IO2 (0x20000000U) | |
| 403 | #define TSC_GROUP8_IO3 (0x40000000U) | |
| 404 | #define TSC_GROUP8_IO4 (0x80000000U) | |
| 405 | #define TSC_GROUP8_ALL_IOS (0xF0000000U) | |
| 406 | ||
| 407 | #define TSC_ALL_GROUPS_ALL_IOS (0xFFFFFFFFU) | |
| 408 | /** | |
| 409 | * @} | |
| 410 | */ | |
| 411 | ||
| 412 | /** | |
| 413 | * @} | |
| 414 | */ | |
| 415 | ||
| 416 | /* Private macros -----------------------------------------------------------*/ | |
| 417 | /** @defgroup TSC_Private_Macros TSC Private Macros | |
| 418 | * @{ | |
| 419 | */ | |
| 420 | /** @defgroup TSC_Spread_Spectrum TSC Spread Spectrum | |
| 421 | * @{ | |
| 422 | */ | |
| 423 | #define IS_TSC_SS(VAL) (((VAL) == DISABLE) || ((VAL) == ENABLE)) | |
| 424 | ||
| 425 | #define IS_TSC_SSD(VAL) (((VAL) == 0U) || (((VAL) > 0U) && ((VAL) < 128U))) | |
| 426 | /** | |
| 427 | * @} | |
| 428 | */ | |
| 429 | ||
| 430 | /** | |
| 431 | * @} | |
| 432 | */ | |
| 433 | ||
| 434 | /* Exported macros -----------------------------------------------------------*/ | |
| 435 | /** @defgroup TSC_Exported_Macros TSC Exported Macros | |
| 436 | * @{ | |
| 437 | */ | |
| 438 | ||
| 439 | /** @brief Reset TSC handle state | |
| 440 | * @param __HANDLE__ TSC handle. | |
| 441 | * @retval None | |
| 442 | */ | |
| 443 | #define __HAL_TSC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_TSC_STATE_RESET) | |
| 444 | ||
| 445 | /** | |
| 446 | * @brief Enable the TSC peripheral. | |
| 447 | * @param __HANDLE__ TSC handle | |
| 448 | * @retval None | |
| 449 | */ | |
| 450 | #define __HAL_TSC_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= TSC_CR_TSCE) | |
| 451 | ||
| 452 | /** | |
| 453 | * @brief Disable the TSC peripheral. | |
| 454 | * @param __HANDLE__ TSC handle | |
| 455 | * @retval None | |
| 456 | */ | |
| 457 | #define __HAL_TSC_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= (uint32_t)(~TSC_CR_TSCE)) | |
| 458 | ||
| 459 | /** | |
| 460 | * @brief Start acquisition | |
| 461 | * @param __HANDLE__ TSC handle | |
| 462 | * @retval None | |
| 463 | */ | |
| 464 | #define __HAL_TSC_START_ACQ(__HANDLE__) ((__HANDLE__)->Instance->CR |= TSC_CR_START) | |
| 465 | ||
| 466 | /** | |
| 467 | * @brief Stop acquisition | |
| 468 | * @param __HANDLE__ TSC handle | |
| 469 | * @retval None | |
| 470 | */ | |
| 471 | #define __HAL_TSC_STOP_ACQ(__HANDLE__) ((__HANDLE__)->Instance->CR &= (uint32_t)(~TSC_CR_START)) | |
| 472 | ||
| 473 | /** | |
| 474 | * @brief Set IO default mode to output push-pull low | |
| 475 | * @param __HANDLE__ TSC handle | |
| 476 | * @retval None | |
| 477 | */ | |
| 478 | #define __HAL_TSC_SET_IODEF_OUTPPLOW(__HANDLE__) ((__HANDLE__)->Instance->CR &= (uint32_t)(~TSC_CR_IODEF)) | |
| 479 | ||
| 480 | /** | |
| 481 | * @brief Set IO default mode to input floating | |
| 482 | * @param __HANDLE__ TSC handle | |
| 483 | * @retval None | |
| 484 | */ | |
| 485 | #define __HAL_TSC_SET_IODEF_INFLOAT(__HANDLE__) ((__HANDLE__)->Instance->CR |= TSC_CR_IODEF) | |
| 486 | ||
| 487 | /** | |
| 488 | * @brief Set synchronization polarity to falling edge | |
| 489 | * @param __HANDLE__ TSC handle | |
| 490 | * @retval None | |
| 491 | */ | |
| 492 | #define __HAL_TSC_SET_SYNC_POL_FALL(__HANDLE__) ((__HANDLE__)->Instance->CR &= (uint32_t)(~TSC_CR_SYNCPOL)) | |
| 493 | ||
| 494 | /** | |
| 495 | * @brief Set synchronization polarity to rising edge and high level | |
| 496 | * @param __HANDLE__ TSC handle | |
| 497 | * @retval None | |
| 498 | */ | |
| 499 | #define __HAL_TSC_SET_SYNC_POL_RISE_HIGH(__HANDLE__) ((__HANDLE__)->Instance->CR |= TSC_CR_SYNCPOL) | |
| 500 | ||
| 501 | /** | |
| 502 | * @brief Enable TSC interrupt. | |
| 503 | * @param __HANDLE__ TSC handle | |
| 504 | * @param __INTERRUPT__ TSC interrupt | |
| 505 | * @retval None | |
| 506 | */ | |
| 507 | #define __HAL_TSC_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER |= (__INTERRUPT__)) | |
| 508 | ||
| 509 | /** | |
| 510 | * @brief Disable TSC interrupt. | |
| 511 | * @param __HANDLE__ TSC handle | |
| 512 | * @param __INTERRUPT__ TSC interrupt | |
| 513 | * @retval None | |
| 514 | */ | |
| 515 | #define __HAL_TSC_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER &= (uint32_t)(~(__INTERRUPT__))) | |
| 516 | ||
| 517 | /** @brief Check if the specified TSC interrupt source is enabled or disabled. | |
| 518 | * @param __HANDLE__ TSC Handle | |
| 519 | * @param __INTERRUPT__ TSC interrupt | |
| 520 | * @retval SET or RESET | |
| 521 | */ | |
| 522 | #define __HAL_TSC_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->IER & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET) | |
| 523 | ||
| 524 | /** | |
| 525 | * @brief Get the selected TSC's flag status. | |
| 526 | * @param __HANDLE__ TSC handle | |
| 527 | * @param __FLAG__ TSC flag | |
| 528 | * @retval SET or RESET | |
| 529 | */ | |
| 530 | #define __HAL_TSC_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->ISR & (__FLAG__)) == (__FLAG__)) ? SET : RESET) | |
| 531 | ||
| 532 | /** | |
| 533 | * @brief Clear the TSC's pending flag. | |
| 534 | * @param __HANDLE__ TSC handle | |
| 535 | * @param __FLAG__ TSC flag | |
| 536 | * @retval None | |
| 537 | */ | |
| 538 | #define __HAL_TSC_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__)) | |
| 539 | ||
| 540 | /** | |
| 541 | * @brief Enable schmitt trigger hysteresis on a group of IOs | |
| 542 | * @param __HANDLE__ TSC handle | |
| 543 | * @param __GX_IOY_MASK__ IOs mask | |
| 544 | * @retval None | |
| 545 | */ | |
| 546 | #define __HAL_TSC_ENABLE_HYSTERESIS(__HANDLE__, __GX_IOY_MASK__) ((__HANDLE__)->Instance->IOHCR |= (__GX_IOY_MASK__)) | |
| 547 | ||
| 548 | /** | |
| 549 | * @brief Disable schmitt trigger hysteresis on a group of IOs | |
| 550 | * @param __HANDLE__ TSC handle | |
| 551 | * @param __GX_IOY_MASK__ IOs mask | |
| 552 | * @retval None | |
| 553 | */ | |
| 554 | #define __HAL_TSC_DISABLE_HYSTERESIS(__HANDLE__, __GX_IOY_MASK__) ((__HANDLE__)->Instance->IOHCR &= (uint32_t)(~(__GX_IOY_MASK__))) | |
| 555 | ||
| 556 | /** | |
| 557 | * @brief Open analog switch on a group of IOs | |
| 558 | * @param __HANDLE__ TSC handle | |
| 559 | * @param __GX_IOY_MASK__ IOs mask | |
| 560 | * @retval None | |
| 561 | */ | |
| 562 | #define __HAL_TSC_OPEN_ANALOG_SWITCH(__HANDLE__, __GX_IOY_MASK__) ((__HANDLE__)->Instance->IOASCR &= (uint32_t)(~(__GX_IOY_MASK__))) | |
| 563 | ||
| 564 | /** | |
| 565 | * @brief Close analog switch on a group of IOs | |
| 566 | * @param __HANDLE__ TSC handle | |
| 567 | * @param __GX_IOY_MASK__ IOs mask | |
| 568 | * @retval None | |
| 569 | */ | |
| 570 | #define __HAL_TSC_CLOSE_ANALOG_SWITCH(__HANDLE__, __GX_IOY_MASK__) ((__HANDLE__)->Instance->IOASCR |= (__GX_IOY_MASK__)) | |
| 571 | ||
| 572 | /** | |
| 573 | * @brief Enable a group of IOs in channel mode | |
| 574 | * @param __HANDLE__ TSC handle | |
| 575 | * @param __GX_IOY_MASK__ IOs mask | |
| 576 | * @retval None | |
| 577 | */ | |
| 578 | #define __HAL_TSC_ENABLE_CHANNEL(__HANDLE__, __GX_IOY_MASK__) ((__HANDLE__)->Instance->IOCCR |= (__GX_IOY_MASK__)) | |
| 579 | ||
| 580 | /** | |
| 581 | * @brief Disable a group of channel IOs | |
| 582 | * @param __HANDLE__ TSC handle | |
| 583 | * @param __GX_IOY_MASK__ IOs mask | |
| 584 | * @retval None | |
| 585 | */ | |
| 586 | #define __HAL_TSC_DISABLE_CHANNEL(__HANDLE__, __GX_IOY_MASK__) ((__HANDLE__)->Instance->IOCCR &= (uint32_t)(~(__GX_IOY_MASK__))) | |
| 587 | ||
| 588 | /** | |
| 589 | * @brief Enable a group of IOs in sampling mode | |
| 590 | * @param __HANDLE__ TSC handle | |
| 591 | * @param __GX_IOY_MASK__ IOs mask | |
| 592 | * @retval None | |
| 593 | */ | |
| 594 | #define __HAL_TSC_ENABLE_SAMPLING(__HANDLE__, __GX_IOY_MASK__) ((__HANDLE__)->Instance->IOSCR |= (__GX_IOY_MASK__)) | |
| 595 | ||
| 596 | /** | |
| 597 | * @brief Disable a group of sampling IOs | |
| 598 | * @param __HANDLE__ TSC handle | |
| 599 | * @param __GX_IOY_MASK__ IOs mask | |
| 600 | * @retval None | |
| 601 | */ | |
| 602 | #define __HAL_TSC_DISABLE_SAMPLING(__HANDLE__, __GX_IOY_MASK__) ((__HANDLE__)->Instance->IOSCR &= (uint32_t)(~(__GX_IOY_MASK__))) | |
| 603 | ||
| 604 | /** | |
| 605 | * @brief Enable acquisition groups | |
| 606 | * @param __HANDLE__ TSC handle | |
| 607 | * @param __GX_MASK__ Groups mask | |
| 608 | * @retval None | |
| 609 | */ | |
| 610 | #define __HAL_TSC_ENABLE_GROUP(__HANDLE__, __GX_MASK__) ((__HANDLE__)->Instance->IOGCSR |= (__GX_MASK__)) | |
| 611 | ||
| 612 | /** | |
| 613 | * @brief Disable acquisition groups | |
| 614 | * @param __HANDLE__ TSC handle | |
| 615 | * @param __GX_MASK__ Groups mask | |
| 616 | * @retval None | |
| 617 | */ | |
| 618 | #define __HAL_TSC_DISABLE_GROUP(__HANDLE__, __GX_MASK__) ((__HANDLE__)->Instance->IOGCSR &= (uint32_t)(~(__GX_MASK__))) | |
| 619 | ||
| 620 | /** @brief Gets acquisition group status | |
| 621 | * @param __HANDLE__ TSC Handle | |
| 622 | * @param __GX_INDEX__ Group index | |
| 623 | * @retval SET or RESET | |
| 624 | */ | |
| 625 | #define __HAL_TSC_GET_GROUP_STATUS(__HANDLE__, __GX_INDEX__) \ | |
| 626 | ((((__HANDLE__)->Instance->IOGCSR & (uint32_t)((uint32_t)1 << ((__GX_INDEX__) + (uint32_t)16))) == (uint32_t)((uint32_t)1 << ((__GX_INDEX__) + (uint32_t)16))) ? TSC_GROUP_COMPLETED : TSC_GROUP_ONGOING) | |
| 627 | ||
| 628 | /** | |
| 629 | * @} | |
| 630 | */ | |
| 631 | ||
| 632 | /* Exported functions --------------------------------------------------------*/ | |
| 633 | /** @addtogroup TSC_Exported_Functions TSC Exported Functions | |
| 634 | * @{ | |
| 635 | */ | |
| 636 | ||
| 637 | /** @addtogroup TSC_Exported_Functions_Group1 Initialization/de-initialization functions | |
| 638 | * @brief Initialization and Configuration functions | |
| 639 | * @{ | |
| 640 | */ | |
| 641 | /* Initialization and de-initialization functions *****************************/ | |
| 642 | HAL_StatusTypeDef HAL_TSC_Init(TSC_HandleTypeDef* htsc); | |
| 643 | HAL_StatusTypeDef HAL_TSC_DeInit(TSC_HandleTypeDef *htsc); | |
| 644 | void HAL_TSC_MspInit(TSC_HandleTypeDef* htsc); | |
| 645 | void HAL_TSC_MspDeInit(TSC_HandleTypeDef* htsc); | |
| 646 | /** | |
| 647 | * @} | |
| 648 | */ | |
| 649 | ||
| 650 | /** @addtogroup TSC_Exported_Functions_Group2 IO operation functions | |
| 651 | * @brief IO operation functions * @{ | |
| 652 | */ | |
| 653 | /* IO operation functions *****************************************************/ | |
| 654 | HAL_StatusTypeDef HAL_TSC_Start(TSC_HandleTypeDef* htsc); | |
| 655 | HAL_StatusTypeDef HAL_TSC_Start_IT(TSC_HandleTypeDef* htsc); | |
| 656 | HAL_StatusTypeDef HAL_TSC_Stop(TSC_HandleTypeDef* htsc); | |
| 657 | HAL_StatusTypeDef HAL_TSC_Stop_IT(TSC_HandleTypeDef* htsc); | |
| 658 | TSC_GroupStatusTypeDef HAL_TSC_GroupGetStatus(TSC_HandleTypeDef* htsc, uint32_t gx_index); | |
| 659 | uint32_t HAL_TSC_GroupGetValue(TSC_HandleTypeDef* htsc, uint32_t gx_index); | |
| 660 | /** | |
| 661 | * @} | |
| 662 | */ | |
| 663 | ||
| 664 | /** @addtogroup TSC_Exported_Functions_Group3 Peripheral Control functions | |
| 665 | * @brief Peripheral Control functions | |
| 666 | * @{ | |
| 667 | */ | |
| 668 | /* Peripheral Control functions ***********************************************/ | |
| 669 | HAL_StatusTypeDef HAL_TSC_IOConfig(TSC_HandleTypeDef* htsc, TSC_IOConfigTypeDef* config); | |
| 670 | HAL_StatusTypeDef HAL_TSC_IODischarge(TSC_HandleTypeDef* htsc, uint32_t choice); | |
| 671 | /** | |
| 672 | * @} | |
| 673 | */ | |
| 674 | ||
| 675 | /** @addtogroup TSC_Exported_Functions_Group4 State functions | |
| 676 | * @brief State functions | |
| 677 | * @{ | |
| 678 | */ | |
| 679 | /* Peripheral State and Error functions ***************************************/ | |
| 680 | HAL_TSC_StateTypeDef HAL_TSC_GetState(TSC_HandleTypeDef* htsc); | |
| 681 | HAL_StatusTypeDef HAL_TSC_PollForAcquisition(TSC_HandleTypeDef* htsc); | |
| 682 | void HAL_TSC_IRQHandler(TSC_HandleTypeDef* htsc); | |
| 683 | /** | |
| 684 | * @} | |
| 685 | */ | |
| 686 | ||
| 687 | /** @addtogroup TSC_Exported_Functions_Group5 Callback functions | |
| 688 | * @brief Callback functions | |
| 689 | * @{ | |
| 690 | */ | |
| 691 | /* Callback functions *********************************************************/ | |
| 692 | void HAL_TSC_ConvCpltCallback(TSC_HandleTypeDef* htsc); | |
| 693 | void HAL_TSC_ErrorCallback(TSC_HandleTypeDef* htsc); | |
| 694 | /** | |
| 695 | * @} | |
| 696 | */ | |
| 697 | ||
| 698 | /** | |
| 699 | * @} | |
| 700 | */ | |
| 701 | ||
| 702 | /** | |
| 703 | * @} | |
| 704 | */ | |
| 705 | ||
| 706 | /** | |
| 707 | * @} | |
| 708 | */ | |
| 709 | ||
| 710 | #endif /* defined(STM32F051x8) || defined(STM32F071xB) || defined(STM32F091xC) || */ | |
| 711 | /* defined(STM32F042x6) || defined(STM32F048xx) || defined(STM32F072xB) || */ | |
| 712 | /* defined(STM32F058xx) || defined(STM32F078xx) || defined(STM32F098xx) */ | |
| 713 | ||
| 714 | ||
| 715 | #ifdef __cplusplus | |
| 716 | } | |
| 717 | #endif | |
| 718 | ||
| 719 | #endif /*__STM32F0xx_TSC_H */ | |
| 720 | ||
| 721 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ | |
| 722 | ||
