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/** |
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****************************************************************************** |
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* @file stm32f0xx_ll_exti.h |
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* @author MCD Application Team |
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* @brief Header file of EXTI LL module. |
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****************************************************************************** |
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* @attention |
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* |
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* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
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* |
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* Redistribution and use in source and binary forms, with or without modification, |
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* are permitted provided that the following conditions are met: |
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* 1. Redistributions of source code must retain the above copyright notice, |
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* this list of conditions and the following disclaimer. |
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* 2. Redistributions in binary form must reproduce the above copyright notice, |
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* this list of conditions and the following disclaimer in the documentation |
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* and/or other materials provided with the distribution. |
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* 3. Neither the name of STMicroelectronics nor the names of its contributors |
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* may be used to endorse or promote products derived from this software |
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* without specific prior written permission. |
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* |
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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* |
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****************************************************************************** |
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*/ |
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/* Define to prevent recursive inclusion -------------------------------------*/ |
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#ifndef __STM32F0xx_LL_EXTI_H |
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#define __STM32F0xx_LL_EXTI_H |
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#ifdef __cplusplus |
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extern "C" { |
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#endif |
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/* Includes ------------------------------------------------------------------*/ |
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#include "stm32f0xx.h" |
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/** @addtogroup STM32F0xx_LL_Driver |
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* @{ |
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*/ |
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#if defined (EXTI) |
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/** @defgroup EXTI_LL EXTI |
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* @{ |
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*/ |
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/* Private types -------------------------------------------------------------*/ |
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/* Private variables ---------------------------------------------------------*/ |
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/* Private constants ---------------------------------------------------------*/ |
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/* Private Macros ------------------------------------------------------------*/ |
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#if defined(USE_FULL_LL_DRIVER) |
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/** @defgroup EXTI_LL_Private_Macros EXTI Private Macros |
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* @{ |
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*/ |
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/** |
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* @} |
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*/ |
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#endif /*USE_FULL_LL_DRIVER*/ |
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/* Exported types ------------------------------------------------------------*/ |
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#if defined(USE_FULL_LL_DRIVER) |
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/** @defgroup EXTI_LL_ES_INIT EXTI Exported Init structure |
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* @{ |
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*/ |
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typedef struct |
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{ |
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uint32_t Line_0_31; /*!< Specifies the EXTI lines to be enabled or disabled for Lines in range 0 to 31 |
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This parameter can be any combination of @ref EXTI_LL_EC_LINE */ |
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FunctionalState LineCommand; /*!< Specifies the new state of the selected EXTI lines. |
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This parameter can be set either to ENABLE or DISABLE */ |
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uint8_t Mode; /*!< Specifies the mode for the EXTI lines. |
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This parameter can be a value of @ref EXTI_LL_EC_MODE. */ |
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uint8_t Trigger; /*!< Specifies the trigger signal active edge for the EXTI lines. |
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This parameter can be a value of @ref EXTI_LL_EC_TRIGGER. */ |
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} LL_EXTI_InitTypeDef; |
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/** |
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* @} |
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*/ |
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#endif /*USE_FULL_LL_DRIVER*/ |
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/* Exported constants --------------------------------------------------------*/ |
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/** @defgroup EXTI_LL_Exported_Constants EXTI Exported Constants |
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* @{ |
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*/ |
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/** @defgroup EXTI_LL_EC_LINE LINE |
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* @{ |
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*/ |
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#define LL_EXTI_LINE_0 EXTI_IMR_IM0 /*!< Extended line 0 */ |
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#define LL_EXTI_LINE_1 EXTI_IMR_IM1 /*!< Extended line 1 */ |
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#define LL_EXTI_LINE_2 EXTI_IMR_IM2 /*!< Extended line 2 */ |
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#define LL_EXTI_LINE_3 EXTI_IMR_IM3 /*!< Extended line 3 */ |
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#define LL_EXTI_LINE_4 EXTI_IMR_IM4 /*!< Extended line 4 */ |
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#define LL_EXTI_LINE_5 EXTI_IMR_IM5 /*!< Extended line 5 */ |
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#define LL_EXTI_LINE_6 EXTI_IMR_IM6 /*!< Extended line 6 */ |
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#define LL_EXTI_LINE_7 EXTI_IMR_IM7 /*!< Extended line 7 */ |
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#define LL_EXTI_LINE_8 EXTI_IMR_IM8 /*!< Extended line 8 */ |
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#define LL_EXTI_LINE_9 EXTI_IMR_IM9 /*!< Extended line 9 */ |
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#define LL_EXTI_LINE_10 EXTI_IMR_IM10 /*!< Extended line 10 */ |
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#define LL_EXTI_LINE_11 EXTI_IMR_IM11 /*!< Extended line 11 */ |
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#define LL_EXTI_LINE_12 EXTI_IMR_IM12 /*!< Extended line 12 */ |
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#define LL_EXTI_LINE_13 EXTI_IMR_IM13 /*!< Extended line 13 */ |
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#define LL_EXTI_LINE_14 EXTI_IMR_IM14 /*!< Extended line 14 */ |
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#define LL_EXTI_LINE_15 EXTI_IMR_IM15 /*!< Extended line 15 */ |
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#if defined(EXTI_IMR_IM16) |
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#define LL_EXTI_LINE_16 EXTI_IMR_IM16 /*!< Extended line 16 */ |
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#endif |
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#define LL_EXTI_LINE_17 EXTI_IMR_IM17 /*!< Extended line 17 */ |
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#if defined(EXTI_IMR_IM18) |
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#define LL_EXTI_LINE_18 EXTI_IMR_IM18 /*!< Extended line 18 */ |
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#endif |
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#define LL_EXTI_LINE_19 EXTI_IMR_IM19 /*!< Extended line 19 */ |
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#if defined(EXTI_IMR_IM20) |
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#define LL_EXTI_LINE_20 EXTI_IMR_IM20 /*!< Extended line 20 */ |
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#endif |
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#if defined(EXTI_IMR_IM21) |
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#define LL_EXTI_LINE_21 EXTI_IMR_IM21 /*!< Extended line 21 */ |
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#endif |
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#if defined(EXTI_IMR_IM22) |
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#define LL_EXTI_LINE_22 EXTI_IMR_IM22 /*!< Extended line 22 */ |
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#endif |
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#define LL_EXTI_LINE_23 EXTI_IMR_IM23 /*!< Extended line 23 */ |
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#if defined(EXTI_IMR_IM24) |
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#define LL_EXTI_LINE_24 EXTI_IMR_IM24 /*!< Extended line 24 */ |
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#endif |
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#if defined(EXTI_IMR_IM25) |
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#define LL_EXTI_LINE_25 EXTI_IMR_IM25 /*!< Extended line 25 */ |
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#endif |
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#if defined(EXTI_IMR_IM26) |
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#define LL_EXTI_LINE_26 EXTI_IMR_IM26 /*!< Extended line 26 */ |
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#endif |
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#if defined(EXTI_IMR_IM27) |
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#define LL_EXTI_LINE_27 EXTI_IMR_IM27 /*!< Extended line 27 */ |
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#endif |
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#if defined(EXTI_IMR_IM28) |
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#define LL_EXTI_LINE_28 EXTI_IMR_IM28 /*!< Extended line 28 */ |
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#endif |
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#if defined(EXTI_IMR_IM29) |
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#define LL_EXTI_LINE_29 EXTI_IMR_IM29 /*!< Extended line 29 */ |
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#endif |
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#if defined(EXTI_IMR_IM30) |
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#define LL_EXTI_LINE_30 EXTI_IMR_IM30 /*!< Extended line 30 */ |
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#endif |
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#if defined(EXTI_IMR_IM31) |
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#define LL_EXTI_LINE_31 EXTI_IMR_IM31 /*!< Extended line 31 */ |
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#endif |
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#define LL_EXTI_LINE_ALL_0_31 EXTI_IMR_IM /*!< All Extended line not reserved*/ |
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#define LL_EXTI_LINE_ALL (0xFFFFFFFFU) /*!< All Extended line */ |
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#if defined(USE_FULL_LL_DRIVER) |
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#define LL_EXTI_LINE_NONE (0x00000000U) /*!< None Extended line */ |
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#endif /*USE_FULL_LL_DRIVER*/ |
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/** |
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* @} |
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*/ |
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#if defined(USE_FULL_LL_DRIVER) |
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/** @defgroup EXTI_LL_EC_MODE Mode |
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* @{ |
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*/ |
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#define LL_EXTI_MODE_IT ((uint8_t)0x00U) /*!< Interrupt Mode */ |
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#define LL_EXTI_MODE_EVENT ((uint8_t)0x01U) /*!< Event Mode */ |
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#define LL_EXTI_MODE_IT_EVENT ((uint8_t)0x02U) /*!< Interrupt & Event Mode */ |
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/** |
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* @} |
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*/ |
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/** @defgroup EXTI_LL_EC_TRIGGER Edge Trigger |
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* @{ |
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*/ |
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#define LL_EXTI_TRIGGER_NONE ((uint8_t)0x00U) /*!< No Trigger Mode */ |
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#define LL_EXTI_TRIGGER_RISING ((uint8_t)0x01U) /*!< Trigger Rising Mode */ |
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#define LL_EXTI_TRIGGER_FALLING ((uint8_t)0x02U) /*!< Trigger Falling Mode */ |
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#define LL_EXTI_TRIGGER_RISING_FALLING ((uint8_t)0x03U) /*!< Trigger Rising & Falling Mode */ |
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/** |
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* @} |
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*/ |
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#endif /*USE_FULL_LL_DRIVER*/ |
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/** |
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* @} |
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*/ |
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/* Exported macro ------------------------------------------------------------*/ |
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/** @defgroup EXTI_LL_Exported_Macros EXTI Exported Macros |
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* @{ |
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*/ |
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/** @defgroup EXTI_LL_EM_WRITE_READ Common Write and read registers Macros |
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* @{ |
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*/ |
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/** |
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* @brief Write a value in EXTI register |
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* @param __REG__ Register to be written |
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* @param __VALUE__ Value to be written in the register |
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* @retval None |
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*/ |
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#define LL_EXTI_WriteReg(__REG__, __VALUE__) WRITE_REG(EXTI->__REG__, (__VALUE__)) |
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/** |
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* @brief Read a value in EXTI register |
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* @param __REG__ Register to be read |
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* @retval Register value |
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*/ |
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#define LL_EXTI_ReadReg(__REG__) READ_REG(EXTI->__REG__) |
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/** |
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* @} |
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*/ |
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/** |
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* @} |
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*/ |
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/* Exported functions --------------------------------------------------------*/ |
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/** @defgroup EXTI_LL_Exported_Functions EXTI Exported Functions |
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* @{ |
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*/ |
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/** @defgroup EXTI_LL_EF_IT_Management IT_Management |
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* @{ |
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*/ |
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/** |
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* @brief Enable ExtiLine Interrupt request for Lines in range 0 to 31 |
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* @note The reset value for the direct or internal lines (see RM) |
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* is set to 1 in order to enable the interrupt by default. |
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* Bits are set automatically at Power on. |
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* @rmtoll IMR IMx LL_EXTI_EnableIT_0_31 |
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* @param ExtiLine This parameter can be one of the following values: |
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* @arg @ref LL_EXTI_LINE_0 |
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* @arg @ref LL_EXTI_LINE_1 |
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* @arg @ref LL_EXTI_LINE_2 |
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* @arg @ref LL_EXTI_LINE_3 |
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* @arg @ref LL_EXTI_LINE_4 |
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* @arg @ref LL_EXTI_LINE_5 |
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* @arg @ref LL_EXTI_LINE_6 |
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* @arg @ref LL_EXTI_LINE_7 |
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* @arg @ref LL_EXTI_LINE_8 |
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* @arg @ref LL_EXTI_LINE_9 |
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* @arg @ref LL_EXTI_LINE_10 |
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* @arg @ref LL_EXTI_LINE_11 |
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* @arg @ref LL_EXTI_LINE_12 |
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* @arg @ref LL_EXTI_LINE_13 |
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* @arg @ref LL_EXTI_LINE_14 |
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* @arg @ref LL_EXTI_LINE_15 |
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* @arg @ref LL_EXTI_LINE_16 |
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* @arg @ref LL_EXTI_LINE_17 |
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* @arg @ref LL_EXTI_LINE_18 |
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* @arg @ref LL_EXTI_LINE_19 |
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* @arg @ref LL_EXTI_LINE_20 |
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* @arg @ref LL_EXTI_LINE_21 |
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* @arg @ref LL_EXTI_LINE_22 |
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* @arg @ref LL_EXTI_LINE_23 |
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* @arg @ref LL_EXTI_LINE_24 |
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* @arg @ref LL_EXTI_LINE_25 |
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* @arg @ref LL_EXTI_LINE_26 |
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* @arg @ref LL_EXTI_LINE_27 |
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* @arg @ref LL_EXTI_LINE_28 |
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* @arg @ref LL_EXTI_LINE_29 |
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* @arg @ref LL_EXTI_LINE_30 |
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* @arg @ref LL_EXTI_LINE_31 |
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* @arg @ref LL_EXTI_LINE_ALL_0_31 |
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* @note Please check each device line mapping for EXTI Line availability |
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* @retval None |
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*/ |
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__STATIC_INLINE void LL_EXTI_EnableIT_0_31(uint32_t ExtiLine) |
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{ |
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SET_BIT(EXTI->IMR, ExtiLine); |
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} |
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/** |
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* @brief Disable ExtiLine Interrupt request for Lines in range 0 to 31 |
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* @note The reset value for the direct or internal lines (see RM) |
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* is set to 1 in order to enable the interrupt by default. |
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* Bits are set automatically at Power on. |
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* @rmtoll IMR IMx LL_EXTI_DisableIT_0_31 |
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* @param ExtiLine This parameter can be one of the following values: |
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* @arg @ref LL_EXTI_LINE_0 |
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* @arg @ref LL_EXTI_LINE_1 |
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* @arg @ref LL_EXTI_LINE_2 |
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* @arg @ref LL_EXTI_LINE_3 |
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* @arg @ref LL_EXTI_LINE_4 |
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* @arg @ref LL_EXTI_LINE_5 |
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* @arg @ref LL_EXTI_LINE_6 |
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* @arg @ref LL_EXTI_LINE_7 |
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* @arg @ref LL_EXTI_LINE_8 |
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* @arg @ref LL_EXTI_LINE_9 |
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* @arg @ref LL_EXTI_LINE_10 |
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* @arg @ref LL_EXTI_LINE_11 |
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* @arg @ref LL_EXTI_LINE_12 |
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* @arg @ref LL_EXTI_LINE_13 |
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* @arg @ref LL_EXTI_LINE_14 |
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* @arg @ref LL_EXTI_LINE_15 |
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* @arg @ref LL_EXTI_LINE_16 |
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* @arg @ref LL_EXTI_LINE_17 |
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* @arg @ref LL_EXTI_LINE_18 |
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* @arg @ref LL_EXTI_LINE_19 |
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* @arg @ref LL_EXTI_LINE_20 |
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* @arg @ref LL_EXTI_LINE_21 |
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* @arg @ref LL_EXTI_LINE_22 |
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* @arg @ref LL_EXTI_LINE_23 |
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* @arg @ref LL_EXTI_LINE_24 |
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* @arg @ref LL_EXTI_LINE_25 |
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* @arg @ref LL_EXTI_LINE_26 |
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* @arg @ref LL_EXTI_LINE_27 |
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* @arg @ref LL_EXTI_LINE_28 |
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* @arg @ref LL_EXTI_LINE_29 |
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* @arg @ref LL_EXTI_LINE_30 |
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* @arg @ref LL_EXTI_LINE_31 |
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* @arg @ref LL_EXTI_LINE_ALL_0_31 |
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* @note Please check each device line mapping for EXTI Line availability |
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* @retval None |
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*/ |
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__STATIC_INLINE void LL_EXTI_DisableIT_0_31(uint32_t ExtiLine) |
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{ |
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CLEAR_BIT(EXTI->IMR, ExtiLine); |
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} |
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/** |
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* @brief Indicate if ExtiLine Interrupt request is enabled for Lines in range 0 to 31 |
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* @note The reset value for the direct or internal lines (see RM) |
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* is set to 1 in order to enable the interrupt by default. |
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* Bits are set automatically at Power on. |
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* @rmtoll IMR IMx LL_EXTI_IsEnabledIT_0_31 |
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* @param ExtiLine This parameter can be one of the following values: |
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* @arg @ref LL_EXTI_LINE_0 |
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* @arg @ref LL_EXTI_LINE_1 |
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* @arg @ref LL_EXTI_LINE_2 |
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* @arg @ref LL_EXTI_LINE_3 |
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* @arg @ref LL_EXTI_LINE_4 |
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* @arg @ref LL_EXTI_LINE_5 |
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* @arg @ref LL_EXTI_LINE_6 |
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* @arg @ref LL_EXTI_LINE_7 |
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* @arg @ref LL_EXTI_LINE_8 |
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* @arg @ref LL_EXTI_LINE_9 |
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* @arg @ref LL_EXTI_LINE_10 |
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* @arg @ref LL_EXTI_LINE_11 |
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* @arg @ref LL_EXTI_LINE_12 |
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* @arg @ref LL_EXTI_LINE_13 |
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* @arg @ref LL_EXTI_LINE_14 |
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* @arg @ref LL_EXTI_LINE_15 |
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* @arg @ref LL_EXTI_LINE_16 |
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* @arg @ref LL_EXTI_LINE_17 |
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* @arg @ref LL_EXTI_LINE_18 |
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* @arg @ref LL_EXTI_LINE_19 |
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* @arg @ref LL_EXTI_LINE_20 |
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* @arg @ref LL_EXTI_LINE_21 |
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* @arg @ref LL_EXTI_LINE_22 |
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* @arg @ref LL_EXTI_LINE_23 |
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* @arg @ref LL_EXTI_LINE_24 |
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* @arg @ref LL_EXTI_LINE_25 |
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* @arg @ref LL_EXTI_LINE_26 |
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* @arg @ref LL_EXTI_LINE_27 |
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* @arg @ref LL_EXTI_LINE_28 |
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* @arg @ref LL_EXTI_LINE_29 |
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* @arg @ref LL_EXTI_LINE_30 |
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* @arg @ref LL_EXTI_LINE_31 |
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* @arg @ref LL_EXTI_LINE_ALL_0_31 |
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* @note Please check each device line mapping for EXTI Line availability |
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* @retval State of bit (1 or 0). |
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*/ |
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__STATIC_INLINE uint32_t LL_EXTI_IsEnabledIT_0_31(uint32_t ExtiLine) |
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{ |
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return (READ_BIT(EXTI->IMR, ExtiLine) == (ExtiLine)); |
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} |
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/** |
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* @} |
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*/ |
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/** @defgroup EXTI_LL_EF_Event_Management Event_Management |
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* @{ |
|
399 |
*/ |
|
400 |
|
|
401 |
/** |
|
402 |
* @brief Enable ExtiLine Event request for Lines in range 0 to 31 |
|
403 |
* @rmtoll EMR EMx LL_EXTI_EnableEvent_0_31 |
|
404 |
* @param ExtiLine This parameter can be one of the following values: |
|
405 |
* @arg @ref LL_EXTI_LINE_0 |
|
406 |
* @arg @ref LL_EXTI_LINE_1 |
|
407 |
* @arg @ref LL_EXTI_LINE_2 |
|
408 |
* @arg @ref LL_EXTI_LINE_3 |
|
409 |
* @arg @ref LL_EXTI_LINE_4 |
|
410 |
* @arg @ref LL_EXTI_LINE_5 |
|
411 |
* @arg @ref LL_EXTI_LINE_6 |
|
412 |
* @arg @ref LL_EXTI_LINE_7 |
|
413 |
* @arg @ref LL_EXTI_LINE_8 |
|
414 |
* @arg @ref LL_EXTI_LINE_9 |
|
415 |
* @arg @ref LL_EXTI_LINE_10 |
|
416 |
* @arg @ref LL_EXTI_LINE_11 |
|
417 |
* @arg @ref LL_EXTI_LINE_12 |
|
418 |
* @arg @ref LL_EXTI_LINE_13 |
|
419 |
* @arg @ref LL_EXTI_LINE_14 |
|
420 |
* @arg @ref LL_EXTI_LINE_15 |
|
421 |
* @arg @ref LL_EXTI_LINE_16 |
|
422 |
* @arg @ref LL_EXTI_LINE_17 |
|
423 |
* @arg @ref LL_EXTI_LINE_18 |
|
424 |
* @arg @ref LL_EXTI_LINE_19 |
|
425 |
* @arg @ref LL_EXTI_LINE_20 |
|
426 |
* @arg @ref LL_EXTI_LINE_21 |
|
427 |
* @arg @ref LL_EXTI_LINE_22 |
|
428 |
* @arg @ref LL_EXTI_LINE_23 |
|
429 |
* @arg @ref LL_EXTI_LINE_24 |
|
430 |
* @arg @ref LL_EXTI_LINE_25 |
|
431 |
* @arg @ref LL_EXTI_LINE_26 |
|
432 |
* @arg @ref LL_EXTI_LINE_27 |
|
433 |
* @arg @ref LL_EXTI_LINE_28 |
|
434 |
* @arg @ref LL_EXTI_LINE_29 |
|
435 |
* @arg @ref LL_EXTI_LINE_30 |
|
436 |
* @arg @ref LL_EXTI_LINE_31 |
|
437 |
* @arg @ref LL_EXTI_LINE_ALL_0_31 |
|
438 |
* @note Please check each device line mapping for EXTI Line availability |
|
439 |
* @retval None |
|
440 |
*/ |
|
441 |
__STATIC_INLINE void LL_EXTI_EnableEvent_0_31(uint32_t ExtiLine) |
|
442 |
{ |
|
443 |
SET_BIT(EXTI->EMR, ExtiLine); |
|
444 |
|
|
445 |
} |
|
446 |
|
|
447 |
|
|
448 |
/** |
|
449 |
* @brief Disable ExtiLine Event request for Lines in range 0 to 31 |
|
450 |
* @rmtoll EMR EMx LL_EXTI_DisableEvent_0_31 |
|
451 |
* @param ExtiLine This parameter can be one of the following values: |
|
452 |
* @arg @ref LL_EXTI_LINE_0 |
|
453 |
* @arg @ref LL_EXTI_LINE_1 |
|
454 |
* @arg @ref LL_EXTI_LINE_2 |
|
455 |
* @arg @ref LL_EXTI_LINE_3 |
|
456 |
* @arg @ref LL_EXTI_LINE_4 |
|
457 |
* @arg @ref LL_EXTI_LINE_5 |
|
458 |
* @arg @ref LL_EXTI_LINE_6 |
|
459 |
* @arg @ref LL_EXTI_LINE_7 |
|
460 |
* @arg @ref LL_EXTI_LINE_8 |
|
461 |
* @arg @ref LL_EXTI_LINE_9 |
|
462 |
* @arg @ref LL_EXTI_LINE_10 |
|
463 |
* @arg @ref LL_EXTI_LINE_11 |
|
464 |
* @arg @ref LL_EXTI_LINE_12 |
|
465 |
* @arg @ref LL_EXTI_LINE_13 |
|
466 |
* @arg @ref LL_EXTI_LINE_14 |
|
467 |
* @arg @ref LL_EXTI_LINE_15 |
|
468 |
* @arg @ref LL_EXTI_LINE_16 |
|
469 |
* @arg @ref LL_EXTI_LINE_17 |
|
470 |
* @arg @ref LL_EXTI_LINE_18 |
|
471 |
* @arg @ref LL_EXTI_LINE_19 |
|
472 |
* @arg @ref LL_EXTI_LINE_20 |
|
473 |
* @arg @ref LL_EXTI_LINE_21 |
|
474 |
* @arg @ref LL_EXTI_LINE_22 |
|
475 |
* @arg @ref LL_EXTI_LINE_23 |
|
476 |
* @arg @ref LL_EXTI_LINE_24 |
|
477 |
* @arg @ref LL_EXTI_LINE_25 |
|
478 |
* @arg @ref LL_EXTI_LINE_26 |
|
479 |
* @arg @ref LL_EXTI_LINE_27 |
|
480 |
* @arg @ref LL_EXTI_LINE_28 |
|
481 |
* @arg @ref LL_EXTI_LINE_29 |
|
482 |
* @arg @ref LL_EXTI_LINE_30 |
|
483 |
* @arg @ref LL_EXTI_LINE_31 |
|
484 |
* @arg @ref LL_EXTI_LINE_ALL_0_31 |
|
485 |
* @note Please check each device line mapping for EXTI Line availability |
|
486 |
* @retval None |
|
487 |
*/ |
|
488 |
__STATIC_INLINE void LL_EXTI_DisableEvent_0_31(uint32_t ExtiLine) |
|
489 |
{ |
|
490 |
CLEAR_BIT(EXTI->EMR, ExtiLine); |
|
491 |
} |
|
492 |
|
|
493 |
|
|
494 |
/** |
|
495 |
* @brief Indicate if ExtiLine Event request is enabled for Lines in range 0 to 31 |
|
496 |
* @rmtoll EMR EMx LL_EXTI_IsEnabledEvent_0_31 |
|
497 |
* @param ExtiLine This parameter can be one of the following values: |
|
498 |
* @arg @ref LL_EXTI_LINE_0 |
|
499 |
* @arg @ref LL_EXTI_LINE_1 |
|
500 |
* @arg @ref LL_EXTI_LINE_2 |
|
501 |
* @arg @ref LL_EXTI_LINE_3 |
|
502 |
* @arg @ref LL_EXTI_LINE_4 |
|
503 |
* @arg @ref LL_EXTI_LINE_5 |
|
504 |
* @arg @ref LL_EXTI_LINE_6 |
|
505 |
* @arg @ref LL_EXTI_LINE_7 |
|
506 |
* @arg @ref LL_EXTI_LINE_8 |
|
507 |
* @arg @ref LL_EXTI_LINE_9 |
|
508 |
* @arg @ref LL_EXTI_LINE_10 |
|
509 |
* @arg @ref LL_EXTI_LINE_11 |
|
510 |
* @arg @ref LL_EXTI_LINE_12 |
|
511 |
* @arg @ref LL_EXTI_LINE_13 |
|
512 |
* @arg @ref LL_EXTI_LINE_14 |
|
513 |
* @arg @ref LL_EXTI_LINE_15 |
|
514 |
* @arg @ref LL_EXTI_LINE_16 |
|
515 |
* @arg @ref LL_EXTI_LINE_17 |
|
516 |
* @arg @ref LL_EXTI_LINE_18 |
|
517 |
* @arg @ref LL_EXTI_LINE_19 |
|
518 |
* @arg @ref LL_EXTI_LINE_20 |
|
519 |
* @arg @ref LL_EXTI_LINE_21 |
|
520 |
* @arg @ref LL_EXTI_LINE_22 |
|
521 |
* @arg @ref LL_EXTI_LINE_23 |
|
522 |
* @arg @ref LL_EXTI_LINE_24 |
|
523 |
* @arg @ref LL_EXTI_LINE_25 |
|
524 |
* @arg @ref LL_EXTI_LINE_26 |
|
525 |
* @arg @ref LL_EXTI_LINE_27 |
|
526 |
* @arg @ref LL_EXTI_LINE_28 |
|
527 |
* @arg @ref LL_EXTI_LINE_29 |
|
528 |
* @arg @ref LL_EXTI_LINE_30 |
|
529 |
* @arg @ref LL_EXTI_LINE_31 |
|
530 |
* @arg @ref LL_EXTI_LINE_ALL_0_31 |
|
531 |
* @note Please check each device line mapping for EXTI Line availability |
|
532 |
* @retval State of bit (1 or 0). |
|
533 |
*/ |
|
534 |
__STATIC_INLINE uint32_t LL_EXTI_IsEnabledEvent_0_31(uint32_t ExtiLine) |
|
535 |
{ |
|
536 |
return (READ_BIT(EXTI->EMR, ExtiLine) == (ExtiLine)); |
|
537 |
|
|
538 |
} |
|
539 |
|
|
540 |
|
|
541 |
/** |
|
542 |
* @} |
|
543 |
*/ |
|
544 |
|
|
545 |
/** @defgroup EXTI_LL_EF_Rising_Trigger_Management Rising_Trigger_Management |
|
546 |
* @{ |
|
547 |
*/ |
|
548 |
|
|
549 |
/** |
|
550 |
* @brief Enable ExtiLine Rising Edge Trigger for Lines in range 0 to 31 |
|
551 |
* @note The configurable wakeup lines are edge-triggered. No glitch must be |
|
552 |
* generated on these lines. If a rising edge on a configurable interrupt |
|
553 |
* line occurs during a write operation in the EXTI_RTSR register, the |
|
554 |
* pending bit is not set. |
|
555 |
* Rising and falling edge triggers can be set for |
|
556 |
* the same interrupt line. In this case, both generate a trigger |
|
557 |
* condition. |
|
558 |
* @rmtoll RTSR RTx LL_EXTI_EnableRisingTrig_0_31 |
|
559 |
* @param ExtiLine This parameter can be a combination of the following values: |
|
560 |
* @arg @ref LL_EXTI_LINE_0 |
|
561 |
* @arg @ref LL_EXTI_LINE_1 |
|
562 |
* @arg @ref LL_EXTI_LINE_2 |
|
563 |
* @arg @ref LL_EXTI_LINE_3 |
|
564 |
* @arg @ref LL_EXTI_LINE_4 |
|
565 |
* @arg @ref LL_EXTI_LINE_5 |
|
566 |
* @arg @ref LL_EXTI_LINE_6 |
|
567 |
* @arg @ref LL_EXTI_LINE_7 |
|
568 |
* @arg @ref LL_EXTI_LINE_8 |
|
569 |
* @arg @ref LL_EXTI_LINE_9 |
|
570 |
* @arg @ref LL_EXTI_LINE_10 |
|
571 |
* @arg @ref LL_EXTI_LINE_11 |
|
572 |
* @arg @ref LL_EXTI_LINE_12 |
|
573 |
* @arg @ref LL_EXTI_LINE_13 |
|
574 |
* @arg @ref LL_EXTI_LINE_14 |
|
575 |
* @arg @ref LL_EXTI_LINE_15 |
|
576 |
* @arg @ref LL_EXTI_LINE_16 |
|
577 |
* @arg @ref LL_EXTI_LINE_18 |
|
578 |
* @arg @ref LL_EXTI_LINE_19 |
|
579 |
* @arg @ref LL_EXTI_LINE_20 |
|
580 |
* @arg @ref LL_EXTI_LINE_21 |
|
581 |
* @arg @ref LL_EXTI_LINE_22 |
|
582 |
* @arg @ref LL_EXTI_LINE_29 |
|
583 |
* @arg @ref LL_EXTI_LINE_30 |
|
584 |
* @arg @ref LL_EXTI_LINE_31 |
|
585 |
* @note Please check each device line mapping for EXTI Line availability |
|
586 |
* @retval None |
|
587 |
*/ |
|
588 |
__STATIC_INLINE void LL_EXTI_EnableRisingTrig_0_31(uint32_t ExtiLine) |
|
589 |
{ |
|
590 |
SET_BIT(EXTI->RTSR, ExtiLine); |
|
591 |
|
|
592 |
} |
|
593 |
|
|
594 |
|
|
595 |
/** |
|
596 |
* @brief Disable ExtiLine Rising Edge Trigger for Lines in range 0 to 31 |
|
597 |
* @note The configurable wakeup lines are edge-triggered. No glitch must be |
|
598 |
* generated on these lines. If a rising edge on a configurable interrupt |
|
599 |
* line occurs during a write operation in the EXTI_RTSR register, the |
|
600 |
* pending bit is not set. |
|
601 |
* Rising and falling edge triggers can be set for |
|
602 |
* the same interrupt line. In this case, both generate a trigger |
|
603 |
* condition. |
|
604 |
* @rmtoll RTSR RTx LL_EXTI_DisableRisingTrig_0_31 |
|
605 |
* @param ExtiLine This parameter can be a combination of the following values: |
|
606 |
* @arg @ref LL_EXTI_LINE_0 |
|
607 |
* @arg @ref LL_EXTI_LINE_1 |
|
608 |
* @arg @ref LL_EXTI_LINE_2 |
|
609 |
* @arg @ref LL_EXTI_LINE_3 |
|
610 |
* @arg @ref LL_EXTI_LINE_4 |
|
611 |
* @arg @ref LL_EXTI_LINE_5 |
|
612 |
* @arg @ref LL_EXTI_LINE_6 |
|
613 |
* @arg @ref LL_EXTI_LINE_7 |
|
614 |
* @arg @ref LL_EXTI_LINE_8 |
|
615 |
* @arg @ref LL_EXTI_LINE_9 |
|
616 |
* @arg @ref LL_EXTI_LINE_10 |
|
617 |
* @arg @ref LL_EXTI_LINE_11 |
|
618 |
* @arg @ref LL_EXTI_LINE_12 |
|
619 |
* @arg @ref LL_EXTI_LINE_13 |
|
620 |
* @arg @ref LL_EXTI_LINE_14 |
|
621 |
* @arg @ref LL_EXTI_LINE_15 |
|
622 |
* @arg @ref LL_EXTI_LINE_16 |
|
623 |
* @arg @ref LL_EXTI_LINE_18 |
|
624 |
* @arg @ref LL_EXTI_LINE_19 |
|
625 |
* @arg @ref LL_EXTI_LINE_20 |
|
626 |
* @arg @ref LL_EXTI_LINE_21 |
|
627 |
* @arg @ref LL_EXTI_LINE_22 |
|
628 |
* @arg @ref LL_EXTI_LINE_29 |
|
629 |
* @arg @ref LL_EXTI_LINE_30 |
|
630 |
* @arg @ref LL_EXTI_LINE_31 |
|
631 |
* @note Please check each device line mapping for EXTI Line availability |
|
632 |
* @retval None |
|
633 |
*/ |
|
634 |
__STATIC_INLINE void LL_EXTI_DisableRisingTrig_0_31(uint32_t ExtiLine) |
|
635 |
{ |
|
636 |
CLEAR_BIT(EXTI->RTSR, ExtiLine); |
|
637 |
|
|
638 |
} |
|
639 |
|
|
640 |
|
|
641 |
/** |
|
642 |
* @brief Check if rising edge trigger is enabled for Lines in range 0 to 31 |
|
643 |
* @rmtoll RTSR RTx LL_EXTI_IsEnabledRisingTrig_0_31 |
|
644 |
* @param ExtiLine This parameter can be a combination of the following values: |
|
645 |
* @arg @ref LL_EXTI_LINE_0 |
|
646 |
* @arg @ref LL_EXTI_LINE_1 |
|
647 |
* @arg @ref LL_EXTI_LINE_2 |
|
648 |
* @arg @ref LL_EXTI_LINE_3 |
|
649 |
* @arg @ref LL_EXTI_LINE_4 |
|
650 |
* @arg @ref LL_EXTI_LINE_5 |
|
651 |
* @arg @ref LL_EXTI_LINE_6 |
|
652 |
* @arg @ref LL_EXTI_LINE_7 |
|
653 |
* @arg @ref LL_EXTI_LINE_8 |
|
654 |
* @arg @ref LL_EXTI_LINE_9 |
|
655 |
* @arg @ref LL_EXTI_LINE_10 |
|
656 |
* @arg @ref LL_EXTI_LINE_11 |
|
657 |
* @arg @ref LL_EXTI_LINE_12 |
|
658 |
* @arg @ref LL_EXTI_LINE_13 |
|
659 |
* @arg @ref LL_EXTI_LINE_14 |
|
660 |
* @arg @ref LL_EXTI_LINE_15 |
|
661 |
* @arg @ref LL_EXTI_LINE_16 |
|
662 |
* @arg @ref LL_EXTI_LINE_18 |
|
663 |
* @arg @ref LL_EXTI_LINE_19 |
|
664 |
* @arg @ref LL_EXTI_LINE_20 |
|
665 |
* @arg @ref LL_EXTI_LINE_21 |
|
666 |
* @arg @ref LL_EXTI_LINE_22 |
|
667 |
* @arg @ref LL_EXTI_LINE_29 |
|
668 |
* @arg @ref LL_EXTI_LINE_30 |
|
669 |
* @arg @ref LL_EXTI_LINE_31 |
|
670 |
* @note Please check each device line mapping for EXTI Line availability |
|
671 |
* @retval State of bit (1 or 0). |
|
672 |
*/ |
|
673 |
__STATIC_INLINE uint32_t LL_EXTI_IsEnabledRisingTrig_0_31(uint32_t ExtiLine) |
|
674 |
{ |
|
675 |
return (READ_BIT(EXTI->RTSR, ExtiLine) == (ExtiLine)); |
|
676 |
} |
|
677 |
|
|
678 |
|
|
679 |
/** |
|
680 |
* @} |
|
681 |
*/ |
|
682 |
|
|
683 |
/** @defgroup EXTI_LL_EF_Falling_Trigger_Management Falling_Trigger_Management |
|
684 |
* @{ |
|
685 |
*/ |
|
686 |
|
|
687 |
/** |
|
688 |
* @brief Enable ExtiLine Falling Edge Trigger for Lines in range 0 to 31 |
|
689 |
* @note The configurable wakeup lines are edge-triggered. No glitch must be |
|
690 |
* generated on these lines. If a falling edge on a configurable interrupt |
|
691 |
* line occurs during a write operation in the EXTI_FTSR register, the |
|
692 |
* pending bit is not set. |
|
693 |
* Rising and falling edge triggers can be set for |
|
694 |
* the same interrupt line. In this case, both generate a trigger |
|
695 |
* condition. |
|
696 |
* @rmtoll FTSR FTx LL_EXTI_EnableFallingTrig_0_31 |
|
697 |
* @param ExtiLine This parameter can be a combination of the following values: |
|
698 |
* @arg @ref LL_EXTI_LINE_0 |
|
699 |
* @arg @ref LL_EXTI_LINE_1 |
|
700 |
* @arg @ref LL_EXTI_LINE_2 |
|
701 |
* @arg @ref LL_EXTI_LINE_3 |
|
702 |
* @arg @ref LL_EXTI_LINE_4 |
|
703 |
* @arg @ref LL_EXTI_LINE_5 |
|
704 |
* @arg @ref LL_EXTI_LINE_6 |
|
705 |
* @arg @ref LL_EXTI_LINE_7 |
|
706 |
* @arg @ref LL_EXTI_LINE_8 |
|
707 |
* @arg @ref LL_EXTI_LINE_9 |
|
708 |
* @arg @ref LL_EXTI_LINE_10 |
|
709 |
* @arg @ref LL_EXTI_LINE_11 |
|
710 |
* @arg @ref LL_EXTI_LINE_12 |
|
711 |
* @arg @ref LL_EXTI_LINE_13 |
|
712 |
* @arg @ref LL_EXTI_LINE_14 |
|
713 |
* @arg @ref LL_EXTI_LINE_15 |
|
714 |
* @arg @ref LL_EXTI_LINE_16 |
|
715 |
* @arg @ref LL_EXTI_LINE_18 |
|
716 |
* @arg @ref LL_EXTI_LINE_19 |
|
717 |
* @arg @ref LL_EXTI_LINE_20 |
|
718 |
* @arg @ref LL_EXTI_LINE_21 |
|
719 |
* @arg @ref LL_EXTI_LINE_22 |
|
720 |
* @arg @ref LL_EXTI_LINE_29 |
|
721 |
* @arg @ref LL_EXTI_LINE_30 |
|
722 |
* @arg @ref LL_EXTI_LINE_31 |
|
723 |
* @note Please check each device line mapping for EXTI Line availability |
|
724 |
* @retval None |
|
725 |
*/ |
|
726 |
__STATIC_INLINE void LL_EXTI_EnableFallingTrig_0_31(uint32_t ExtiLine) |
|
727 |
{ |
|
728 |
SET_BIT(EXTI->FTSR, ExtiLine); |
|
729 |
} |
|
730 |
|
|
731 |
|
|
732 |
/** |
|
733 |
* @brief Disable ExtiLine Falling Edge Trigger for Lines in range 0 to 31 |
|
734 |
* @note The configurable wakeup lines are edge-triggered. No glitch must be |
|
735 |
* generated on these lines. If a Falling edge on a configurable interrupt |
|
736 |
* line occurs during a write operation in the EXTI_FTSR register, the |
|
737 |
* pending bit is not set. |
|
738 |
* Rising and falling edge triggers can be set for the same interrupt line. |
|
739 |
* In this case, both generate a trigger condition. |
|
740 |
* @rmtoll FTSR FTx LL_EXTI_DisableFallingTrig_0_31 |
|
741 |
* @param ExtiLine This parameter can be a combination of the following values: |
|
742 |
* @arg @ref LL_EXTI_LINE_0 |
|
743 |
* @arg @ref LL_EXTI_LINE_1 |
|
744 |
* @arg @ref LL_EXTI_LINE_2 |
|
745 |
* @arg @ref LL_EXTI_LINE_3 |
|
746 |
* @arg @ref LL_EXTI_LINE_4 |
|
747 |
* @arg @ref LL_EXTI_LINE_5 |
|
748 |
* @arg @ref LL_EXTI_LINE_6 |
|
749 |
* @arg @ref LL_EXTI_LINE_7 |
|
750 |
* @arg @ref LL_EXTI_LINE_8 |
|
751 |
* @arg @ref LL_EXTI_LINE_9 |
|
752 |
* @arg @ref LL_EXTI_LINE_10 |
|
753 |
* @arg @ref LL_EXTI_LINE_11 |
|
754 |
* @arg @ref LL_EXTI_LINE_12 |
|
755 |
* @arg @ref LL_EXTI_LINE_13 |
|
756 |
* @arg @ref LL_EXTI_LINE_14 |
|
757 |
* @arg @ref LL_EXTI_LINE_15 |
|
758 |
* @arg @ref LL_EXTI_LINE_16 |
|
759 |
* @arg @ref LL_EXTI_LINE_18 |
|
760 |
* @arg @ref LL_EXTI_LINE_19 |
|
761 |
* @arg @ref LL_EXTI_LINE_20 |
|
762 |
* @arg @ref LL_EXTI_LINE_21 |
|
763 |
* @arg @ref LL_EXTI_LINE_22 |
|
764 |
* @arg @ref LL_EXTI_LINE_29 |
|
765 |
* @arg @ref LL_EXTI_LINE_30 |
|
766 |
* @arg @ref LL_EXTI_LINE_31 |
|
767 |
* @note Please check each device line mapping for EXTI Line availability |
|
768 |
* @retval None |
|
769 |
*/ |
|
770 |
__STATIC_INLINE void LL_EXTI_DisableFallingTrig_0_31(uint32_t ExtiLine) |
|
771 |
{ |
|
772 |
CLEAR_BIT(EXTI->FTSR, ExtiLine); |
|
773 |
} |
|
774 |
|
|
775 |
|
|
776 |
/** |
|
777 |
* @brief Check if falling edge trigger is enabled for Lines in range 0 to 31 |
|
778 |
* @rmtoll FTSR FTx LL_EXTI_IsEnabledFallingTrig_0_31 |
|
779 |
* @param ExtiLine This parameter can be a combination of the following values: |
|
780 |
* @arg @ref LL_EXTI_LINE_0 |
|
781 |
* @arg @ref LL_EXTI_LINE_1 |
|
782 |
* @arg @ref LL_EXTI_LINE_2 |
|
783 |
* @arg @ref LL_EXTI_LINE_3 |
|
784 |
* @arg @ref LL_EXTI_LINE_4 |
|
785 |
* @arg @ref LL_EXTI_LINE_5 |
|
786 |
* @arg @ref LL_EXTI_LINE_6 |
|
787 |
* @arg @ref LL_EXTI_LINE_7 |
|
788 |
* @arg @ref LL_EXTI_LINE_8 |
|
789 |
* @arg @ref LL_EXTI_LINE_9 |
|
790 |
* @arg @ref LL_EXTI_LINE_10 |
|
791 |
* @arg @ref LL_EXTI_LINE_11 |
|
792 |
* @arg @ref LL_EXTI_LINE_12 |
|
793 |
* @arg @ref LL_EXTI_LINE_13 |
|
794 |
* @arg @ref LL_EXTI_LINE_14 |
|
795 |
* @arg @ref LL_EXTI_LINE_15 |
|
796 |
* @arg @ref LL_EXTI_LINE_16 |
|
797 |
* @arg @ref LL_EXTI_LINE_18 |
|
798 |
* @arg @ref LL_EXTI_LINE_19 |
|
799 |
* @arg @ref LL_EXTI_LINE_20 |
|
800 |
* @arg @ref LL_EXTI_LINE_21 |
|
801 |
* @arg @ref LL_EXTI_LINE_22 |
|
802 |
* @arg @ref LL_EXTI_LINE_29 |
|
803 |
* @arg @ref LL_EXTI_LINE_30 |
|
804 |
* @arg @ref LL_EXTI_LINE_31 |
|
805 |
* @note Please check each device line mapping for EXTI Line availability |
|
806 |
* @retval State of bit (1 or 0). |
|
807 |
*/ |
|
808 |
__STATIC_INLINE uint32_t LL_EXTI_IsEnabledFallingTrig_0_31(uint32_t ExtiLine) |
|
809 |
{ |
|
810 |
return (READ_BIT(EXTI->FTSR, ExtiLine) == (ExtiLine)); |
|
811 |
} |
|
812 |
|
|
813 |
|
|
814 |
/** |
|
815 |
* @} |
|
816 |
*/ |
|
817 |
|
|
818 |
/** @defgroup EXTI_LL_EF_Software_Interrupt_Management Software_Interrupt_Management |
|
819 |
* @{ |
|
820 |
*/ |
|
821 |
|
|
822 |
/** |
|
823 |
* @brief Generate a software Interrupt Event for Lines in range 0 to 31 |
|
824 |
* @note If the interrupt is enabled on this line in the EXTI_IMR, writing a 1 to |
|
825 |
* this bit when it is at '0' sets the corresponding pending bit in EXTI_PR |
|
826 |
* resulting in an interrupt request generation. |
|
827 |
* This bit is cleared by clearing the corresponding bit in the EXTI_PR |
|
828 |
* register (by writing a 1 into the bit) |
|
829 |
* @rmtoll SWIER SWIx LL_EXTI_GenerateSWI_0_31 |
|
830 |
* @param ExtiLine This parameter can be a combination of the following values: |
|
831 |
* @arg @ref LL_EXTI_LINE_0 |
|
832 |
* @arg @ref LL_EXTI_LINE_1 |
|
833 |
* @arg @ref LL_EXTI_LINE_2 |
|
834 |
* @arg @ref LL_EXTI_LINE_3 |
|
835 |
* @arg @ref LL_EXTI_LINE_4 |
|
836 |
* @arg @ref LL_EXTI_LINE_5 |
|
837 |
* @arg @ref LL_EXTI_LINE_6 |
|
838 |
* @arg @ref LL_EXTI_LINE_7 |
|
839 |
* @arg @ref LL_EXTI_LINE_8 |
|
840 |
* @arg @ref LL_EXTI_LINE_9 |
|
841 |
* @arg @ref LL_EXTI_LINE_10 |
|
842 |
* @arg @ref LL_EXTI_LINE_11 |
|
843 |
* @arg @ref LL_EXTI_LINE_12 |
|
844 |
* @arg @ref LL_EXTI_LINE_13 |
|
845 |
* @arg @ref LL_EXTI_LINE_14 |
|
846 |
* @arg @ref LL_EXTI_LINE_15 |
|
847 |
* @arg @ref LL_EXTI_LINE_16 |
|
848 |
* @arg @ref LL_EXTI_LINE_18 |
|
849 |
* @arg @ref LL_EXTI_LINE_19 |
|
850 |
* @arg @ref LL_EXTI_LINE_20 |
|
851 |
* @arg @ref LL_EXTI_LINE_21 |
|
852 |
* @arg @ref LL_EXTI_LINE_22 |
|
853 |
* @arg @ref LL_EXTI_LINE_29 |
|
854 |
* @arg @ref LL_EXTI_LINE_30 |
|
855 |
* @arg @ref LL_EXTI_LINE_31 |
|
856 |
* @note Please check each device line mapping for EXTI Line availability |
|
857 |
* @retval None |
|
858 |
*/ |
|
859 |
__STATIC_INLINE void LL_EXTI_GenerateSWI_0_31(uint32_t ExtiLine) |
|
860 |
{ |
|
861 |
SET_BIT(EXTI->SWIER, ExtiLine); |
|
862 |
} |
|
863 |
|
|
864 |
|
|
865 |
/** |
|
866 |
* @} |
|
867 |
*/ |
|
868 |
|
|
869 |
/** @defgroup EXTI_LL_EF_Flag_Management Flag_Management |
|
870 |
* @{ |
|
871 |
*/ |
|
872 |
|
|
873 |
/** |
|
874 |
* @brief Check if the ExtLine Flag is set or not for Lines in range 0 to 31 |
|
875 |
* @note This bit is set when the selected edge event arrives on the interrupt |
|
876 |
* line. This bit is cleared by writing a 1 to the bit. |
|
877 |
* @rmtoll PR PIFx LL_EXTI_IsActiveFlag_0_31 |
|
878 |
* @param ExtiLine This parameter can be a combination of the following values: |
|
879 |
* @arg @ref LL_EXTI_LINE_0 |
|
880 |
* @arg @ref LL_EXTI_LINE_1 |
|
881 |
* @arg @ref LL_EXTI_LINE_2 |
|
882 |
* @arg @ref LL_EXTI_LINE_3 |
|
883 |
* @arg @ref LL_EXTI_LINE_4 |
|
884 |
* @arg @ref LL_EXTI_LINE_5 |
|
885 |
* @arg @ref LL_EXTI_LINE_6 |
|
886 |
* @arg @ref LL_EXTI_LINE_7 |
|
887 |
* @arg @ref LL_EXTI_LINE_8 |
|
888 |
* @arg @ref LL_EXTI_LINE_9 |
|
889 |
* @arg @ref LL_EXTI_LINE_10 |
|
890 |
* @arg @ref LL_EXTI_LINE_11 |
|
891 |
* @arg @ref LL_EXTI_LINE_12 |
|
892 |
* @arg @ref LL_EXTI_LINE_13 |
|
893 |
* @arg @ref LL_EXTI_LINE_14 |
|
894 |
* @arg @ref LL_EXTI_LINE_15 |
|
895 |
* @arg @ref LL_EXTI_LINE_16 |
|
896 |
* @arg @ref LL_EXTI_LINE_18 |
|
897 |
* @arg @ref LL_EXTI_LINE_19 |
|
898 |
* @arg @ref LL_EXTI_LINE_20 |
|
899 |
* @arg @ref LL_EXTI_LINE_21 |
|
900 |
* @arg @ref LL_EXTI_LINE_22 |
|
901 |
* @arg @ref LL_EXTI_LINE_29 |
|
902 |
* @arg @ref LL_EXTI_LINE_30 |
|
903 |
* @arg @ref LL_EXTI_LINE_31 |
|
904 |
* @note Please check each device line mapping for EXTI Line availability |
|
905 |
* @retval State of bit (1 or 0). |
|
906 |
*/ |
|
907 |
__STATIC_INLINE uint32_t LL_EXTI_IsActiveFlag_0_31(uint32_t ExtiLine) |
|
908 |
{ |
|
909 |
return (READ_BIT(EXTI->PR, ExtiLine) == (ExtiLine)); |
|
910 |
} |
|
911 |
|
|
912 |
|
|
913 |
/** |
|
914 |
* @brief Read ExtLine Combination Flag for Lines in range 0 to 31 |
|
915 |
* @note This bit is set when the selected edge event arrives on the interrupt |
|
916 |
* line. This bit is cleared by writing a 1 to the bit. |
|
917 |
* @rmtoll PR PIFx LL_EXTI_ReadFlag_0_31 |
|
918 |
* @param ExtiLine This parameter can be a combination of the following values: |
|
919 |
* @arg @ref LL_EXTI_LINE_0 |
|
920 |
* @arg @ref LL_EXTI_LINE_1 |
|
921 |
* @arg @ref LL_EXTI_LINE_2 |
|
922 |
* @arg @ref LL_EXTI_LINE_3 |
|
923 |
* @arg @ref LL_EXTI_LINE_4 |
|
924 |
* @arg @ref LL_EXTI_LINE_5 |
|
925 |
* @arg @ref LL_EXTI_LINE_6 |
|
926 |
* @arg @ref LL_EXTI_LINE_7 |
|
927 |
* @arg @ref LL_EXTI_LINE_8 |
|
928 |
* @arg @ref LL_EXTI_LINE_9 |
|
929 |
* @arg @ref LL_EXTI_LINE_10 |
|
930 |
* @arg @ref LL_EXTI_LINE_11 |
|
931 |
* @arg @ref LL_EXTI_LINE_12 |
|
932 |
* @arg @ref LL_EXTI_LINE_13 |
|
933 |
* @arg @ref LL_EXTI_LINE_14 |
|
934 |
* @arg @ref LL_EXTI_LINE_15 |
|
935 |
* @arg @ref LL_EXTI_LINE_16 |
|
936 |
* @arg @ref LL_EXTI_LINE_18 |
|
937 |
* @arg @ref LL_EXTI_LINE_19 |
|
938 |
* @arg @ref LL_EXTI_LINE_20 |
|
939 |
* @arg @ref LL_EXTI_LINE_21 |
|
940 |
* @arg @ref LL_EXTI_LINE_22 |
|
941 |
* @arg @ref LL_EXTI_LINE_29 |
|
942 |
* @arg @ref LL_EXTI_LINE_30 |
|
943 |
* @arg @ref LL_EXTI_LINE_31 |
|
944 |
* @note Please check each device line mapping for EXTI Line availability |
|
945 |
* @retval @note This bit is set when the selected edge event arrives on the interrupt |
|
946 |
*/ |
|
947 |
__STATIC_INLINE uint32_t LL_EXTI_ReadFlag_0_31(uint32_t ExtiLine) |
|
948 |
{ |
|
949 |
return (uint32_t)(READ_BIT(EXTI->PR, ExtiLine)); |
|
950 |
} |
|
951 |
|
|
952 |
|
|
953 |
/** |
|
954 |
* @brief Clear ExtLine Flags for Lines in range 0 to 31 |
|
955 |
* @note This bit is set when the selected edge event arrives on the interrupt |
|
956 |
* line. This bit is cleared by writing a 1 to the bit. |
|
957 |
* @rmtoll PR PIFx LL_EXTI_ClearFlag_0_31 |
|
958 |
* @param ExtiLine This parameter can be a combination of the following values: |
|
959 |
* @arg @ref LL_EXTI_LINE_0 |
|
960 |
* @arg @ref LL_EXTI_LINE_1 |
|
961 |
* @arg @ref LL_EXTI_LINE_2 |
|
962 |
* @arg @ref LL_EXTI_LINE_3 |
|
963 |
* @arg @ref LL_EXTI_LINE_4 |
|
964 |
* @arg @ref LL_EXTI_LINE_5 |
|
965 |
* @arg @ref LL_EXTI_LINE_6 |
|
966 |
* @arg @ref LL_EXTI_LINE_7 |
|
967 |
* @arg @ref LL_EXTI_LINE_8 |
|
968 |
* @arg @ref LL_EXTI_LINE_9 |
|
969 |
* @arg @ref LL_EXTI_LINE_10 |
|
970 |
* @arg @ref LL_EXTI_LINE_11 |
|
971 |
* @arg @ref LL_EXTI_LINE_12 |
|
972 |
* @arg @ref LL_EXTI_LINE_13 |
|
973 |
* @arg @ref LL_EXTI_LINE_14 |
|
974 |
* @arg @ref LL_EXTI_LINE_15 |
|
975 |
* @arg @ref LL_EXTI_LINE_16 |
|
976 |
* @arg @ref LL_EXTI_LINE_18 |
|
977 |
* @arg @ref LL_EXTI_LINE_19 |
|
978 |
* @arg @ref LL_EXTI_LINE_20 |
|
979 |
* @arg @ref LL_EXTI_LINE_21 |
|
980 |
* @arg @ref LL_EXTI_LINE_22 |
|
981 |
* @arg @ref LL_EXTI_LINE_29 |
|
982 |
* @arg @ref LL_EXTI_LINE_30 |
|
983 |
* @arg @ref LL_EXTI_LINE_31 |
|
984 |
* @note Please check each device line mapping for EXTI Line availability |
|
985 |
* @retval None |
|
986 |
*/ |
|
987 |
__STATIC_INLINE void LL_EXTI_ClearFlag_0_31(uint32_t ExtiLine) |
|
988 |
{ |
|
989 |
WRITE_REG(EXTI->PR, ExtiLine); |
|
990 |
} |
|
991 |
|
|
992 |
|
|
993 |
/** |
|
994 |
* @} |
|
995 |
*/ |
|
996 |
|
|
997 |
#if defined(USE_FULL_LL_DRIVER) |
|
998 |
/** @defgroup EXTI_LL_EF_Init Initialization and de-initialization functions |
|
999 |
* @{ |
|
1000 |
*/ |
|
1001 |
|
|
1002 |
uint32_t LL_EXTI_Init(LL_EXTI_InitTypeDef *EXTI_InitStruct); |
|
1003 |
uint32_t LL_EXTI_DeInit(void); |
|
1004 |
void LL_EXTI_StructInit(LL_EXTI_InitTypeDef *EXTI_InitStruct); |
|
1005 |
|
|
1006 |
|
|
1007 |
/** |
|
1008 |
* @} |
|
1009 |
*/ |
|
1010 |
#endif /* USE_FULL_LL_DRIVER */ |
|
1011 |
|
|
1012 |
/** |
|
1013 |
* @} |
|
1014 |
*/ |
|
1015 |
|
|
1016 |
/** |
|
1017 |
* @} |
|
1018 |
*/ |
|
1019 |
|
|
1020 |
#endif /* EXTI */ |
|
1021 |
|
|
1022 |
/** |
|
1023 |
* @} |
|
1024 |
*/ |
|
1025 |
|
|
1026 |
#ifdef __cplusplus |
|
1027 |
} |
|
1028 |
#endif |
|
1029 |
|
|
1030 |
#endif /* __STM32F0xx_LL_EXTI_H */ |
|
1031 |
|
|
1032 |
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |