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8b51c7	1	/**
Q	2	******************************************************************************
	3	* @file stm32f0xx_hal_i2c.h
	4	* @author MCD Application Team
	5	* @brief Header file of I2C HAL module.
	6	******************************************************************************
	7	* @attention
	8	*
	9	* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
	10	*
	11	* Redistribution and use in source and binary forms, with or without modification,
	12	* are permitted provided that the following conditions are met:
	13	* 1. Redistributions of source code must retain the above copyright notice,
	14	* this list of conditions and the following disclaimer.
	15	* 2. Redistributions in binary form must reproduce the above copyright notice,
	16	* this list of conditions and the following disclaimer in the documentation
	17	* and/or other materials provided with the distribution.
	18	* 3. Neither the name of STMicroelectronics nor the names of its contributors
	19	* may be used to endorse or promote products derived from this software
	20	* without specific prior written permission.
	21	*
	22	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
	23	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
	24	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
	25	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
	26	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
	27	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
	28	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
	29	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
	30	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
	31	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
	32	*
	33	******************************************************************************
	34	*/
	35
	36	/* Define to prevent recursive inclusion -------------------------------------*/
	37	#ifndef __STM32F0xx_HAL_I2C_H
	38	#define __STM32F0xx_HAL_I2C_H
	39
	40	#ifdef __cplusplus
	41	extern "C" {
	42	#endif
	43
	44	/* Includes ------------------------------------------------------------------*/
	45	#include "stm32f0xx_hal_def.h"
	46
	47	/** @addtogroup STM32F0xx_HAL_Driver
	48	* @{
	49	*/
	50
	51	/** @addtogroup I2C
	52	* @{
	53	*/
	54
	55	/* Exported types ------------------------------------------------------------*/
	56	/** @defgroup I2C_Exported_Types I2C Exported Types
	57	* @{
	58	*/
	59
	60	/** @defgroup I2C_Configuration_Structure_definition I2C Configuration Structure definition
	61	* @brief I2C Configuration Structure definition
	62	* @{
	63	*/
	64	typedef struct
	65	{
	66	uint32_t Timing; /*!< Specifies the I2C_TIMINGR_register value.
	67	This parameter calculated by referring to I2C initialization
	68	section in Reference manual */
	69
	70	uint32_t OwnAddress1; /*!< Specifies the first device own address.
	71	This parameter can be a 7-bit or 10-bit address. */
	72
	73	uint32_t AddressingMode; /*!< Specifies if 7-bit or 10-bit addressing mode is selected.
	74	This parameter can be a value of @ref I2C_ADDRESSING_MODE */
	75
	76	uint32_t DualAddressMode; /*!< Specifies if dual addressing mode is selected.
	77	This parameter can be a value of @ref I2C_DUAL_ADDRESSING_MODE */
	78
	79	uint32_t OwnAddress2; /*!< Specifies the second device own address if dual addressing mode is selected
	80	This parameter can be a 7-bit address. */
	81
	82	uint32_t OwnAddress2Masks; /*!< Specifies the acknowledge mask address second device own address if dual addressing mode is selected
	83	This parameter can be a value of @ref I2C_OWN_ADDRESS2_MASKS */
	84
	85	uint32_t GeneralCallMode; /*!< Specifies if general call mode is selected.
	86	This parameter can be a value of @ref I2C_GENERAL_CALL_ADDRESSING_MODE */
	87
	88	uint32_t NoStretchMode; /*!< Specifies if nostretch mode is selected.
	89	This parameter can be a value of @ref I2C_NOSTRETCH_MODE */
	90
	91	} I2C_InitTypeDef;
	92
	93	/**
	94	* @}
	95	*/
	96
	97	/** @defgroup HAL_state_structure_definition HAL state structure definition
	98	* @brief HAL State structure definition
	99	* @note HAL I2C State value coding follow below described bitmap :\n
	100	* b7-b6 Error information\n
	101	* 00 : No Error\n
	102	* 01 : Abort (Abort user request on going)\n
	103	* 10 : Timeout\n
	104	* 11 : Error\n
	105	* b5 IP initilisation status\n
	106	* 0 : Reset (IP not initialized)\n
	107	* 1 : Init done (IP initialized and ready to use. HAL I2C Init function called)\n
	108	* b4 (not used)\n
	109	* x : Should be set to 0\n
	110	* b3\n
	111	* 0 : Ready or Busy (No Listen mode ongoing)\n
	112	* 1 : Listen (IP in Address Listen Mode)\n
	113	* b2 Intrinsic process state\n
	114	* 0 : Ready\n
	115	* 1 : Busy (IP busy with some configuration or internal operations)\n
	116	* b1 Rx state\n
	117	* 0 : Ready (no Rx operation ongoing)\n
	118	* 1 : Busy (Rx operation ongoing)\n
	119	* b0 Tx state\n
	120	* 0 : Ready (no Tx operation ongoing)\n
	121	* 1 : Busy (Tx operation ongoing)
	122	* @{
	123	*/
	124	typedef enum
	125	{
	126	HAL_I2C_STATE_RESET = 0x00U, /!< Peripheral is not yet Initialized /
	127	HAL_I2C_STATE_READY = 0x20U, /!< Peripheral Initialized and ready for use /
	128	HAL_I2C_STATE_BUSY = 0x24U, /!< An internal process is ongoing /
	129	HAL_I2C_STATE_BUSY_TX = 0x21U, /!< Data Transmission process is ongoing /
	130	HAL_I2C_STATE_BUSY_RX = 0x22U, /!< Data Reception process is ongoing /
	131	HAL_I2C_STATE_LISTEN = 0x28U, /!< Address Listen Mode is ongoing /
	132	HAL_I2C_STATE_BUSY_TX_LISTEN = 0x29U, /*!< Address Listen Mode and Data Transmission
	133	process is ongoing */
	134	HAL_I2C_STATE_BUSY_RX_LISTEN = 0x2AU, /*!< Address Listen Mode and Data Reception
	135	process is ongoing */
	136	HAL_I2C_STATE_ABORT = 0x60U, /!< Abort user request ongoing /
	137	HAL_I2C_STATE_TIMEOUT = 0xA0U, /!< Timeout state /
	138	HAL_I2C_STATE_ERROR = 0xE0U /!< Error /
	139
	140	} HAL_I2C_StateTypeDef;
	141
	142	/**
	143	* @}
	144	*/
	145
	146	/** @defgroup HAL_mode_structure_definition HAL mode structure definition
	147	* @brief HAL Mode structure definition
	148	* @note HAL I2C Mode value coding follow below described bitmap :\n
	149	* b7 (not used)\n
	150	* x : Should be set to 0\n
	151	* b6\n
	152	* 0 : None\n
	153	* 1 : Memory (HAL I2C communication is in Memory Mode)\n
	154	* b5\n
	155	* 0 : None\n
	156	* 1 : Slave (HAL I2C communication is in Slave Mode)\n
	157	* b4\n
	158	* 0 : None\n
	159	* 1 : Master (HAL I2C communication is in Master Mode)\n
	160	* b3-b2-b1-b0 (not used)\n
	161	* xxxx : Should be set to 0000
	162	* @{
	163	*/
	164	typedef enum
	165	{
	166	HAL_I2C_MODE_NONE = 0x00U, /!< No I2C communication on going /
	167	HAL_I2C_MODE_MASTER = 0x10U, /!< I2C communication is in Master Mode /
	168	HAL_I2C_MODE_SLAVE = 0x20U, /!< I2C communication is in Slave Mode /
	169	HAL_I2C_MODE_MEM = 0x40U /!< I2C communication is in Memory Mode /
	170
	171	} HAL_I2C_ModeTypeDef;
	172
	173	/**
	174	* @}
	175	*/
	176
	177	/** @defgroup I2C_Error_Code_definition I2C Error Code definition
	178	* @brief I2C Error Code definition
	179	* @{
	180	*/
	181	#define HAL_I2C_ERROR_NONE (0x00000000U) /!< No error /
	182	#define HAL_I2C_ERROR_BERR (0x00000001U) /!< BERR error /
	183	#define HAL_I2C_ERROR_ARLO (0x00000002U) /!< ARLO error /
	184	#define HAL_I2C_ERROR_AF (0x00000004U) /!< ACKF error /
	185	#define HAL_I2C_ERROR_OVR (0x00000008U) /!< OVR error /
	186	#define HAL_I2C_ERROR_DMA (0x00000010U) /!< DMA transfer error /
	187	#define HAL_I2C_ERROR_TIMEOUT (0x00000020U) /!< Timeout error /
	188	#define HAL_I2C_ERROR_SIZE (0x00000040U) /!< Size Management error /
	189	/**
	190	* @}
	191	*/
	192
	193	/** @defgroup I2C_handle_Structure_definition I2C handle Structure definition
	194	* @brief I2C handle Structure definition
	195	* @{
	196	*/
	197	typedef struct __I2C_HandleTypeDef
	198	{
	199	I2C_TypeDef Instance; /!< I2C registers base address */
	200
	201	I2C_InitTypeDef Init; /!< I2C communication parameters /
	202
	203	uint8_t pBuffPtr; /!< Pointer to I2C transfer buffer */
	204
	205	uint16_t XferSize; /!< I2C transfer size /
	206
	207	__IO uint16_t XferCount; /!< I2C transfer counter /
	208
	209	__IO uint32_t XferOptions; /*!< I2C sequantial transfer options, this parameter can
	210	be a value of @ref I2C_XFEROPTIONS */
	211
	212	__IO uint32_t PreviousState; /!< I2C communication Previous state /
	213
	214	HAL_StatusTypeDef(XferISR)(struct __I2C_HandleTypeDef hi2c, uint32_t ITFlags, uint32_t ITSources); /!< I2C transfer IRQ handler function pointer /
	215
	216	DMA_HandleTypeDef hdmatx; /!< I2C Tx DMA handle parameters */
	217
	218	DMA_HandleTypeDef hdmarx; /!< I2C Rx DMA handle parameters */
	219
	220	HAL_LockTypeDef Lock; /!< I2C locking object /
	221
	222	__IO HAL_I2C_StateTypeDef State; /!< I2C communication state /
	223
	224	__IO HAL_I2C_ModeTypeDef Mode; /!< I2C communication mode /
	225
	226	__IO uint32_t ErrorCode; /!< I2C Error code /
	227
	228	__IO uint32_t AddrEventCount; /!< I2C Address Event counter /
	229	} I2C_HandleTypeDef;
	230	/**
	231	* @}
	232	*/
	233
	234	/**
	235	* @}
	236	*/
	237	/* Exported constants --------------------------------------------------------*/
	238
	239	/** @defgroup I2C_Exported_Constants I2C Exported Constants
	240	* @{
	241	*/
	242
	243	/** @defgroup I2C_XFEROPTIONS I2C Sequential Transfer Options
	244	* @{
	245	*/
	246	#define I2C_FIRST_FRAME ((uint32_t)I2C_SOFTEND_MODE)
	247	#define I2C_FIRST_AND_NEXT_FRAME ((uint32_t)(I2C_RELOAD_MODE \| I2C_SOFTEND_MODE))
	248	#define I2C_NEXT_FRAME ((uint32_t)(I2C_RELOAD_MODE \| I2C_SOFTEND_MODE))
	249	#define I2C_FIRST_AND_LAST_FRAME ((uint32_t)I2C_AUTOEND_MODE)
	250	#define I2C_LAST_FRAME ((uint32_t)I2C_AUTOEND_MODE)
	251	/**
	252	* @}
	253	*/
	254
	255	/** @defgroup I2C_ADDRESSING_MODE I2C Addressing Mode
	256	* @{
	257	*/
	258	#define I2C_ADDRESSINGMODE_7BIT (0x00000001U)
	259	#define I2C_ADDRESSINGMODE_10BIT (0x00000002U)
	260	/**
	261	* @}
	262	*/
	263
	264	/** @defgroup I2C_DUAL_ADDRESSING_MODE I2C Dual Addressing Mode
	265	* @{
	266	*/
	267	#define I2C_DUALADDRESS_DISABLE (0x00000000U)
	268	#define I2C_DUALADDRESS_ENABLE I2C_OAR2_OA2EN
	269	/**
	270	* @}
	271	*/
	272
	273	/** @defgroup I2C_OWN_ADDRESS2_MASKS I2C Own Address2 Masks
	274	* @{
	275	*/
	276	#define I2C_OA2_NOMASK ((uint8_t)0x00U)
	277	#define I2C_OA2_MASK01 ((uint8_t)0x01U)
	278	#define I2C_OA2_MASK02 ((uint8_t)0x02U)
	279	#define I2C_OA2_MASK03 ((uint8_t)0x03U)
	280	#define I2C_OA2_MASK04 ((uint8_t)0x04U)
	281	#define I2C_OA2_MASK05 ((uint8_t)0x05U)
	282	#define I2C_OA2_MASK06 ((uint8_t)0x06U)
	283	#define I2C_OA2_MASK07 ((uint8_t)0x07U)
	284	/**
	285	* @}
	286	*/
	287
	288	/** @defgroup I2C_GENERAL_CALL_ADDRESSING_MODE I2C General Call Addressing Mode
	289	* @{
	290	*/
	291	#define I2C_GENERALCALL_DISABLE (0x00000000U)
	292	#define I2C_GENERALCALL_ENABLE I2C_CR1_GCEN
	293	/**
	294	* @}
	295	*/
	296
	297	/** @defgroup I2C_NOSTRETCH_MODE I2C No-Stretch Mode
	298	* @{
	299	*/
	300	#define I2C_NOSTRETCH_DISABLE (0x00000000U)
	301	#define I2C_NOSTRETCH_ENABLE I2C_CR1_NOSTRETCH
	302	/**
	303	* @}
	304	*/
	305
	306	/** @defgroup I2C_MEMORY_ADDRESS_SIZE I2C Memory Address Size
	307	* @{
	308	*/
	309	#define I2C_MEMADD_SIZE_8BIT (0x00000001U)
	310	#define I2C_MEMADD_SIZE_16BIT (0x00000002U)
	311	/**
	312	* @}
	313	*/
	314
	315	/** @defgroup I2C_XFERDIRECTION I2C Transfer Direction Master Point of View
	316	* @{
	317	*/
	318	#define I2C_DIRECTION_TRANSMIT (0x00000000U)
	319	#define I2C_DIRECTION_RECEIVE (0x00000001U)
	320	/**
	321	* @}
	322	*/
	323
	324	/** @defgroup I2C_RELOAD_END_MODE I2C Reload End Mode
	325	* @{
	326	*/
	327	#define I2C_RELOAD_MODE I2C_CR2_RELOAD
	328	#define I2C_AUTOEND_MODE I2C_CR2_AUTOEND
	329	#define I2C_SOFTEND_MODE (0x00000000U)
	330	/**
	331	* @}
	332	*/
	333
	334	/** @defgroup I2C_START_STOP_MODE I2C Start or Stop Mode
	335	* @{
	336	*/
	337	#define I2C_NO_STARTSTOP (0x00000000U)
	338	#define I2C_GENERATE_STOP I2C_CR2_STOP
	339	#define I2C_GENERATE_START_READ (uint32_t)(I2C_CR2_START \| I2C_CR2_RD_WRN)
	340	#define I2C_GENERATE_START_WRITE I2C_CR2_START
	341	/**
	342	* @}
	343	*/
	344
	345	/** @defgroup I2C_Interrupt_configuration_definition I2C Interrupt configuration definition
	346	* @brief I2C Interrupt definition
	347	* Elements values convention: 0xXXXXXXXX
	348	* - XXXXXXXX : Interrupt control mask
	349	* @{
	350	*/
	351	#define I2C_IT_ERRI I2C_CR1_ERRIE
	352	#define I2C_IT_TCI I2C_CR1_TCIE
	353	#define I2C_IT_STOPI I2C_CR1_STOPIE
	354	#define I2C_IT_NACKI I2C_CR1_NACKIE
	355	#define I2C_IT_ADDRI I2C_CR1_ADDRIE
	356	#define I2C_IT_RXI I2C_CR1_RXIE
	357	#define I2C_IT_TXI I2C_CR1_TXIE
	358	/**
	359	* @}
	360	*/
	361
	362	/** @defgroup I2C_Flag_definition I2C Flag definition
	363	* @{
	364	*/
	365	#define I2C_FLAG_TXE I2C_ISR_TXE
	366	#define I2C_FLAG_TXIS I2C_ISR_TXIS
	367	#define I2C_FLAG_RXNE I2C_ISR_RXNE
	368	#define I2C_FLAG_ADDR I2C_ISR_ADDR
	369	#define I2C_FLAG_AF I2C_ISR_NACKF
	370	#define I2C_FLAG_STOPF I2C_ISR_STOPF
	371	#define I2C_FLAG_TC I2C_ISR_TC
	372	#define I2C_FLAG_TCR I2C_ISR_TCR
	373	#define I2C_FLAG_BERR I2C_ISR_BERR
	374	#define I2C_FLAG_ARLO I2C_ISR_ARLO
	375	#define I2C_FLAG_OVR I2C_ISR_OVR
	376	#define I2C_FLAG_PECERR I2C_ISR_PECERR
	377	#define I2C_FLAG_TIMEOUT I2C_ISR_TIMEOUT
	378	#define I2C_FLAG_ALERT I2C_ISR_ALERT
	379	#define I2C_FLAG_BUSY I2C_ISR_BUSY
	380	#define I2C_FLAG_DIR I2C_ISR_DIR
	381	/**
	382	* @}
	383	*/
	384
	385	/**
	386	* @}
	387	*/
	388
	389	/* Exported macros -----------------------------------------------------------*/
	390
	391	/** @defgroup I2C_Exported_Macros I2C Exported Macros
	392	* @{
	393	*/
	394
	395	/** @brief Reset I2C handle state.
	396	* @param __HANDLE__ specifies the I2C Handle.
	397	* @retval None
	398	*/
	399	#define __HAL_I2C_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_I2C_STATE_RESET)
	400
	401	/** @brief Enable the specified I2C interrupt.
	402	* @param __HANDLE__ specifies the I2C Handle.
	403	* @param __INTERRUPT__ specifies the interrupt source to enable.
	404	* This parameter can be one of the following values:
	405	* @arg @ref I2C_IT_ERRI Errors interrupt enable
	406	* @arg @ref I2C_IT_TCI Transfer complete interrupt enable
	407	* @arg @ref I2C_IT_STOPI STOP detection interrupt enable
	408	* @arg @ref I2C_IT_NACKI NACK received interrupt enable
	409	* @arg @ref I2C_IT_ADDRI Address match interrupt enable
	410	* @arg @ref I2C_IT_RXI RX interrupt enable
	411	* @arg @ref I2C_IT_TXI TX interrupt enable
	412	*
	413	* @retval None
	414	*/
	415	#define __HAL_I2C_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR1 \|= (__INTERRUPT__))
	416
	417	/** @brief Disable the specified I2C interrupt.
	418	* @param __HANDLE__ specifies the I2C Handle.
	419	* @param __INTERRUPT__ specifies the interrupt source to disable.
	420	* This parameter can be one of the following values:
	421	* @arg @ref I2C_IT_ERRI Errors interrupt enable
	422	* @arg @ref I2C_IT_TCI Transfer complete interrupt enable
	423	* @arg @ref I2C_IT_STOPI STOP detection interrupt enable
	424	* @arg @ref I2C_IT_NACKI NACK received interrupt enable
	425	* @arg @ref I2C_IT_ADDRI Address match interrupt enable
	426	* @arg @ref I2C_IT_RXI RX interrupt enable
	427	* @arg @ref I2C_IT_TXI TX interrupt enable
	428	*
	429	* @retval None
	430	*/
	431	#define __HAL_I2C_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR1 &= (~(__INTERRUPT__)))
	432
	433	/** @brief Check whether the specified I2C interrupt source is enabled or not.
	434	* @param __HANDLE__ specifies the I2C Handle.
	435	* @param __INTERRUPT__ specifies the I2C interrupt source to check.
	436	* This parameter can be one of the following values:
	437	* @arg @ref I2C_IT_ERRI Errors interrupt enable
	438	* @arg @ref I2C_IT_TCI Transfer complete interrupt enable
	439	* @arg @ref I2C_IT_STOPI STOP detection interrupt enable
	440	* @arg @ref I2C_IT_NACKI NACK received interrupt enable
	441	* @arg @ref I2C_IT_ADDRI Address match interrupt enable
	442	* @arg @ref I2C_IT_RXI RX interrupt enable
	443	* @arg @ref I2C_IT_TXI TX interrupt enable
	444	*
	445	* @retval The new state of __INTERRUPT__ (SET or RESET).
	446	*/
	447	#define __HAL_I2C_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR1 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
	448
	449	/** @brief Check whether the specified I2C flag is set or not.
	450	* @param __HANDLE__ specifies the I2C Handle.
	451	* @param __FLAG__ specifies the flag to check.
	452	* This parameter can be one of the following values:
	453	* @arg @ref I2C_FLAG_TXE Transmit data register empty
	454	* @arg @ref I2C_FLAG_TXIS Transmit interrupt status
	455	* @arg @ref I2C_FLAG_RXNE Receive data register not empty
	456	* @arg @ref I2C_FLAG_ADDR Address matched (slave mode)
	457	* @arg @ref I2C_FLAG_AF Acknowledge failure received flag
	458	* @arg @ref I2C_FLAG_STOPF STOP detection flag
	459	* @arg @ref I2C_FLAG_TC Transfer complete (master mode)
	460	* @arg @ref I2C_FLAG_TCR Transfer complete reload
	461	* @arg @ref I2C_FLAG_BERR Bus error
	462	* @arg @ref I2C_FLAG_ARLO Arbitration lost
	463	* @arg @ref I2C_FLAG_OVR Overrun/Underrun
	464	* @arg @ref I2C_FLAG_PECERR PEC error in reception
	465	* @arg @ref I2C_FLAG_TIMEOUT Timeout or Tlow detection flag
	466	* @arg @ref I2C_FLAG_ALERT SMBus alert
	467	* @arg @ref I2C_FLAG_BUSY Bus busy
	468	* @arg @ref I2C_FLAG_DIR Transfer direction (slave mode)
	469	*
	470	* @retval The new state of __FLAG__ (SET or RESET).
	471	*/
	472	#define __HAL_I2C_GET_FLAG(__HANDLE__, __FLAG__) (((((__HANDLE__)->Instance->ISR) & (__FLAG__)) == (__FLAG__)) ? SET : RESET)
	473
	474	/** @brief Clear the I2C pending flags which are cleared by writing 1 in a specific bit.
	475	* @param __HANDLE__ specifies the I2C Handle.
	476	* @param __FLAG__ specifies the flag to clear.
	477	* This parameter can be any combination of the following values:
	478	* @arg @ref I2C_FLAG_TXE Transmit data register empty
	479	* @arg @ref I2C_FLAG_ADDR Address matched (slave mode)
	480	* @arg @ref I2C_FLAG_AF Acknowledge failure received flag
	481	* @arg @ref I2C_FLAG_STOPF STOP detection flag
	482	* @arg @ref I2C_FLAG_BERR Bus error
	483	* @arg @ref I2C_FLAG_ARLO Arbitration lost
	484	* @arg @ref I2C_FLAG_OVR Overrun/Underrun
	485	* @arg @ref I2C_FLAG_PECERR PEC error in reception
	486	* @arg @ref I2C_FLAG_TIMEOUT Timeout or Tlow detection flag
	487	* @arg @ref I2C_FLAG_ALERT SMBus alert
	488	*
	489	* @retval None
	490	*/
	491	#define __HAL_I2C_CLEAR_FLAG(__HANDLE__, __FLAG__) (((__FLAG__) == I2C_FLAG_TXE) ? ((__HANDLE__)->Instance->ISR \|= (__FLAG__)) \
	492	: ((__HANDLE__)->Instance->ICR = (__FLAG__)))
	493
	494	/** @brief Enable the specified I2C peripheral.
	495	* @param __HANDLE__ specifies the I2C Handle.
	496	* @retval None
	497	*/
	498	#define __HAL_I2C_ENABLE(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE))
	499
	500	/** @brief Disable the specified I2C peripheral.
	501	* @param __HANDLE__ specifies the I2C Handle.
	502	* @retval None
	503	*/
	504	#define __HAL_I2C_DISABLE(__HANDLE__) (CLEAR_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE))
	505
	506	/** @brief Generate a Non-Acknowledge I2C peripheral in Slave mode.
	507	* @param __HANDLE__ specifies the I2C Handle.
	508	* @retval None
	509	*/
	510	#define __HAL_I2C_GENERATE_NACK(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->CR2, I2C_CR2_NACK))
	511	/**
	512	* @}
	513	*/
	514
	515	/* Include I2C HAL Extended module */
	516	#include "stm32f0xx_hal_i2c_ex.h"
	517
	518	/* Exported functions --------------------------------------------------------*/
	519	/** @addtogroup I2C_Exported_Functions
	520	* @{
	521	*/
	522
	523	/** @addtogroup I2C_Exported_Functions_Group1 Initialization and de-initialization functions
	524	* @{
	525	*/
	526	/* Initialization and de-initialization functions******************************/
	527	HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c);
	528	HAL_StatusTypeDef HAL_I2C_DeInit(I2C_HandleTypeDef *hi2c);
	529	void HAL_I2C_MspInit(I2C_HandleTypeDef *hi2c);
	530	void HAL_I2C_MspDeInit(I2C_HandleTypeDef *hi2c);
	531	/**
	532	* @}
	533	*/
	534
	535	/** @addtogroup I2C_Exported_Functions_Group2 Input and Output operation functions
	536	* @{
	537	*/
	538	/* IO operation functions ****************************************************/
	539	/******* Blocking mode: Polling */
	540	HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint8_t pData, uint16_t Size, uint32_t Timeout);
	541	HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint8_t pData, uint16_t Size, uint32_t Timeout);
	542	HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef hi2c, uint8_t pData, uint16_t Size, uint32_t Timeout);
	543	HAL_StatusTypeDef HAL_I2C_Slave_Receive(I2C_HandleTypeDef hi2c, uint8_t pData, uint16_t Size, uint32_t Timeout);
	544	HAL_StatusTypeDef HAL_I2C_Mem_Write(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t pData, uint16_t Size, uint32_t Timeout);
	545	HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t pData, uint16_t Size, uint32_t Timeout);
	546	HAL_StatusTypeDef HAL_I2C_IsDeviceReady(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout);
	547
	548	/******* Non-Blocking mode: Interrupt */
	549	HAL_StatusTypeDef HAL_I2C_Master_Transmit_IT(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint8_t pData, uint16_t Size);
	550	HAL_StatusTypeDef HAL_I2C_Master_Receive_IT(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint8_t pData, uint16_t Size);
	551	HAL_StatusTypeDef HAL_I2C_Slave_Transmit_IT(I2C_HandleTypeDef hi2c, uint8_t pData, uint16_t Size);
	552	HAL_StatusTypeDef HAL_I2C_Slave_Receive_IT(I2C_HandleTypeDef hi2c, uint8_t pData, uint16_t Size);
	553	HAL_StatusTypeDef HAL_I2C_Mem_Write_IT(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t pData, uint16_t Size);
	554	HAL_StatusTypeDef HAL_I2C_Mem_Read_IT(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t pData, uint16_t Size);
	555
	556	HAL_StatusTypeDef HAL_I2C_Master_Sequential_Transmit_IT(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint8_t pData, uint16_t Size, uint32_t XferOptions);
	557	HAL_StatusTypeDef HAL_I2C_Master_Sequential_Receive_IT(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint8_t pData, uint16_t Size, uint32_t XferOptions);
	558	HAL_StatusTypeDef HAL_I2C_Slave_Sequential_Transmit_IT(I2C_HandleTypeDef hi2c, uint8_t pData, uint16_t Size, uint32_t XferOptions);
	559	HAL_StatusTypeDef HAL_I2C_Slave_Sequential_Receive_IT(I2C_HandleTypeDef hi2c, uint8_t pData, uint16_t Size, uint32_t XferOptions);
	560	HAL_StatusTypeDef HAL_I2C_EnableListen_IT(I2C_HandleTypeDef *hi2c);
	561	HAL_StatusTypeDef HAL_I2C_DisableListen_IT(I2C_HandleTypeDef *hi2c);
	562	HAL_StatusTypeDef HAL_I2C_Master_Abort_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress);
	563
	564	/******* Non-Blocking mode: DMA */
	565	HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint8_t pData, uint16_t Size);
	566	HAL_StatusTypeDef HAL_I2C_Master_Receive_DMA(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint8_t pData, uint16_t Size);
	567	HAL_StatusTypeDef HAL_I2C_Slave_Transmit_DMA(I2C_HandleTypeDef hi2c, uint8_t pData, uint16_t Size);
	568	HAL_StatusTypeDef HAL_I2C_Slave_Receive_DMA(I2C_HandleTypeDef hi2c, uint8_t pData, uint16_t Size);
	569	HAL_StatusTypeDef HAL_I2C_Mem_Write_DMA(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t pData, uint16_t Size);
	570	HAL_StatusTypeDef HAL_I2C_Mem_Read_DMA(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t pData, uint16_t Size);
	571	/**
	572	* @}
	573	*/
	574
	575	/** @addtogroup I2C_IRQ_Handler_and_Callbacks IRQ Handler and Callbacks
	576	* @{
	577	*/
	578	/******* I2C IRQHandler and Callbacks used in non blocking modes (Interrupt and DMA) */
	579	void HAL_I2C_EV_IRQHandler(I2C_HandleTypeDef *hi2c);
	580	void HAL_I2C_ER_IRQHandler(I2C_HandleTypeDef *hi2c);
	581	void HAL_I2C_MasterTxCpltCallback(I2C_HandleTypeDef *hi2c);
	582	void HAL_I2C_MasterRxCpltCallback(I2C_HandleTypeDef *hi2c);
	583	void HAL_I2C_SlaveTxCpltCallback(I2C_HandleTypeDef *hi2c);
	584	void HAL_I2C_SlaveRxCpltCallback(I2C_HandleTypeDef *hi2c);
	585	void HAL_I2C_AddrCallback(I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode);
	586	void HAL_I2C_ListenCpltCallback(I2C_HandleTypeDef *hi2c);
	587	void HAL_I2C_MemTxCpltCallback(I2C_HandleTypeDef *hi2c);
	588	void HAL_I2C_MemRxCpltCallback(I2C_HandleTypeDef *hi2c);
	589	void HAL_I2C_ErrorCallback(I2C_HandleTypeDef *hi2c);
	590	void HAL_I2C_AbortCpltCallback(I2C_HandleTypeDef *hi2c);
	591	/**
	592	* @}
	593	*/
	594
	595	/** @addtogroup I2C_Exported_Functions_Group3 Peripheral State, Mode and Error functions
	596	* @{
	597	*/
	598	/* Peripheral State, Mode and Error functions *********************************/
	599	HAL_I2C_StateTypeDef HAL_I2C_GetState(I2C_HandleTypeDef *hi2c);
	600	HAL_I2C_ModeTypeDef HAL_I2C_GetMode(I2C_HandleTypeDef *hi2c);
	601	uint32_t HAL_I2C_GetError(I2C_HandleTypeDef *hi2c);
	602
	603	/**
	604	* @}
	605	*/
	606
	607	/**
	608	* @}
	609	*/
	610
	611	/* Private constants ---------------------------------------------------------*/
	612	/** @defgroup I2C_Private_Constants I2C Private Constants
	613	* @{
	614	*/
	615
	616	/**
	617	* @}
	618	*/
	619
	620	/* Private macros ------------------------------------------------------------*/
	621	/** @defgroup I2C_Private_Macro I2C Private Macros
	622	* @{
	623	*/
	624
	625	#define IS_I2C_ADDRESSING_MODE(MODE) (((MODE) == I2C_ADDRESSINGMODE_7BIT) \|\| \
	626	((MODE) == I2C_ADDRESSINGMODE_10BIT))
	627
	628	#define IS_I2C_DUAL_ADDRESS(ADDRESS) (((ADDRESS) == I2C_DUALADDRESS_DISABLE) \|\| \
	629	((ADDRESS) == I2C_DUALADDRESS_ENABLE))
	630
	631	#define IS_I2C_OWN_ADDRESS2_MASK(MASK) (((MASK) == I2C_OA2_NOMASK) \|\| \
	632	((MASK) == I2C_OA2_MASK01) \|\| \
	633	((MASK) == I2C_OA2_MASK02) \|\| \
	634	((MASK) == I2C_OA2_MASK03) \|\| \
	635	((MASK) == I2C_OA2_MASK04) \|\| \
	636	((MASK) == I2C_OA2_MASK05) \|\| \
	637	((MASK) == I2C_OA2_MASK06) \|\| \
	638	((MASK) == I2C_OA2_MASK07))
	639
	640	#define IS_I2C_GENERAL_CALL(CALL) (((CALL) == I2C_GENERALCALL_DISABLE) \|\| \
	641	((CALL) == I2C_GENERALCALL_ENABLE))
	642
	643	#define IS_I2C_NO_STRETCH(STRETCH) (((STRETCH) == I2C_NOSTRETCH_DISABLE) \|\| \
	644	((STRETCH) == I2C_NOSTRETCH_ENABLE))
	645
	646	#define IS_I2C_MEMADD_SIZE(SIZE) (((SIZE) == I2C_MEMADD_SIZE_8BIT) \|\| \
	647	((SIZE) == I2C_MEMADD_SIZE_16BIT))
	648
	649	#define IS_TRANSFER_MODE(MODE) (((MODE) == I2C_RELOAD_MODE) \|\| \
	650	((MODE) == I2C_AUTOEND_MODE) \|\| \
	651	((MODE) == I2C_SOFTEND_MODE))
	652
	653	#define IS_TRANSFER_REQUEST(REQUEST) (((REQUEST) == I2C_GENERATE_STOP) \|\| \
	654	((REQUEST) == I2C_GENERATE_START_READ) \|\| \
	655	((REQUEST) == I2C_GENERATE_START_WRITE) \|\| \
	656	((REQUEST) == I2C_NO_STARTSTOP))
	657
	658	#define IS_I2C_TRANSFER_OPTIONS_REQUEST(REQUEST) (((REQUEST) == I2C_FIRST_FRAME) \|\| \
	659	((REQUEST) == I2C_FIRST_AND_NEXT_FRAME) \|\| \
	660	((REQUEST) == I2C_NEXT_FRAME) \|\| \
	661	((REQUEST) == I2C_FIRST_AND_LAST_FRAME) \|\| \
	662	((REQUEST) == I2C_LAST_FRAME))
	663
	664	#define I2C_RESET_CR2(__HANDLE__) ((__HANDLE__)->Instance->CR2 &= (uint32_t)~((uint32_t)(I2C_CR2_SADD \| I2C_CR2_HEAD10R \| I2C_CR2_NBYTES \| I2C_CR2_RELOAD \| I2C_CR2_RD_WRN)))
	665
	666	#define I2C_GET_ADDR_MATCH(__HANDLE__) (((__HANDLE__)->Instance->ISR & I2C_ISR_ADDCODE) >> 16U)
	667	#define I2C_GET_DIR(__HANDLE__) (((__HANDLE__)->Instance->ISR & I2C_ISR_DIR) >> 16U)
	668	#define I2C_GET_STOP_MODE(__HANDLE__) ((__HANDLE__)->Instance->CR2 & I2C_CR2_AUTOEND)
	669	#define I2C_GET_OWN_ADDRESS1(__HANDLE__) ((__HANDLE__)->Instance->OAR1 & I2C_OAR1_OA1)
	670	#define I2C_GET_OWN_ADDRESS2(__HANDLE__) ((__HANDLE__)->Instance->OAR2 & I2C_OAR2_OA2)
	671
	672	#define IS_I2C_OWN_ADDRESS1(ADDRESS1) ((ADDRESS1) <= 0x000003FFU)
	673	#define IS_I2C_OWN_ADDRESS2(ADDRESS2) ((ADDRESS2) <= (uint16_t)0x00FFU)
	674
	675	#define I2C_MEM_ADD_MSB(__ADDRESS__) ((uint8_t)((uint16_t)(((uint16_t)((__ADDRESS__) & (uint16_t)(0xFF00U))) >> 8U)))
	676	#define I2C_MEM_ADD_LSB(__ADDRESS__) ((uint8_t)((uint16_t)((__ADDRESS__) & (uint16_t)(0x00FFU))))
	677
	678	#define I2C_GENERATE_START(__ADDMODE__,__ADDRESS__) (((__ADDMODE__) == I2C_ADDRESSINGMODE_7BIT) ? (uint32_t)((((uint32_t)(__ADDRESS__) & (I2C_CR2_SADD)) \| (I2C_CR2_START) \| (I2C_CR2_AUTOEND)) & (~I2C_CR2_RD_WRN)) : \
	679	(uint32_t)((((uint32_t)(__ADDRESS__) & (I2C_CR2_SADD)) \| (I2C_CR2_ADD10) \| (I2C_CR2_START)) & (~I2C_CR2_RD_WRN)))
	680	/**
	681	* @}
	682	*/
	683
	684	/* Private Functions ---------------------------------------------------------*/
	685	/** @defgroup I2C_Private_Functions I2C Private Functions
	686	* @{
	687	*/
	688	/* Private functions are defined in stm32f0xx_hal_i2c.c file */
	689	/**
	690	* @}
	691	*/
	692
	693	/**
	694	* @}
	695	*/
	696
	697	/**
	698	* @}
	699	*/
	700
	701	#ifdef __cplusplus
	702	}
	703	#endif
	704
	705
	706	#endif /* __STM32F0xx_HAL_I2C_H */
	707
	708	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/