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| 483170 | 1 | /* ---------------------------------------------------------------------- |
| Q | 2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved. |
| 3 | * | |
| 4 | * $Date: 19. March 2015 | |
| 5 | * $Revision: V.1.4.5 | |
| 6 | * | |
| 7 | * Project: CMSIS DSP Library | |
| 8 | * Title: arm_cmplx_mag_squared_q15.c | |
| 9 | * | |
| 10 | * Description: Q15 complex magnitude squared. | |
| 11 | * | |
| 12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 | |
| 13 | * | |
| 14 | * Redistribution and use in source and binary forms, with or without | |
| 15 | * modification, are permitted provided that the following conditions | |
| 16 | * are met: | |
| 17 | * - Redistributions of source code must retain the above copyright | |
| 18 | * notice, this list of conditions and the following disclaimer. | |
| 19 | * - Redistributions in binary form must reproduce the above copyright | |
| 20 | * notice, this list of conditions and the following disclaimer in | |
| 21 | * the documentation and/or other materials provided with the | |
| 22 | * distribution. | |
| 23 | * - Neither the name of ARM LIMITED nor the names of its contributors | |
| 24 | * may be used to endorse or promote products derived from this | |
| 25 | * software without specific prior written permission. | |
| 26 | * | |
| 27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS | |
| 28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT | |
| 29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS | |
| 30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE | |
| 31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, | |
| 32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, | |
| 33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; | |
| 34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER | |
| 35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT | |
| 36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN | |
| 37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE | |
| 38 | * POSSIBILITY OF SUCH DAMAGE. | |
| 39 | * ---------------------------------------------------------------------------- */ | |
| 40 | ||
| 41 | #include "arm_math.h" | |
| 42 | ||
| 43 | /** | |
| 44 | * @ingroup groupCmplxMath | |
| 45 | */ | |
| 46 | ||
| 47 | /** | |
| 48 | * @addtogroup cmplx_mag_squared | |
| 49 | * @{ | |
| 50 | */ | |
| 51 | ||
| 52 | /** | |
| 53 | * @brief Q15 complex magnitude squared | |
| 54 | * @param *pSrc points to the complex input vector | |
| 55 | * @param *pDst points to the real output vector | |
| 56 | * @param numSamples number of complex samples in the input vector | |
| 57 | * @return none. | |
| 58 | * | |
| 59 | * <b>Scaling and Overflow Behavior:</b> | |
| 60 | * \par | |
| 61 | * The function implements 1.15 by 1.15 multiplications and finally output is converted into 3.13 format. | |
| 62 | */ | |
| 63 | ||
| 64 | void arm_cmplx_mag_squared_q15( | |
| 65 | q15_t * pSrc, | |
| 66 | q15_t * pDst, | |
| 67 | uint32_t numSamples) | |
| 68 | { | |
| 69 | q31_t acc0, acc1; /* Accumulators */ | |
| 70 | ||
| 71 | #ifndef ARM_MATH_CM0_FAMILY | |
| 72 | ||
| 73 | /* Run the below code for Cortex-M4 and Cortex-M3 */ | |
| 74 | uint32_t blkCnt; /* loop counter */ | |
| 75 | q31_t in1, in2, in3, in4; | |
| 76 | q31_t acc2, acc3; | |
| 77 | ||
| 78 | /*loop Unrolling */ | |
| 79 | blkCnt = numSamples >> 2u; | |
| 80 | ||
| 81 | /* First part of the processing with loop unrolling. Compute 4 outputs at a time. | |
| 82 | ** a second loop below computes the remaining 1 to 3 samples. */ | |
| 83 | while(blkCnt > 0u) | |
| 84 | { | |
| 85 | /* C[0] = (A[0] * A[0] + A[1] * A[1]) */ | |
| 86 | in1 = *__SIMD32(pSrc)++; | |
| 87 | in2 = *__SIMD32(pSrc)++; | |
| 88 | in3 = *__SIMD32(pSrc)++; | |
| 89 | in4 = *__SIMD32(pSrc)++; | |
| 90 | ||
| 91 | acc0 = __SMUAD(in1, in1); | |
| 92 | acc1 = __SMUAD(in2, in2); | |
| 93 | acc2 = __SMUAD(in3, in3); | |
| 94 | acc3 = __SMUAD(in4, in4); | |
| 95 | ||
| 96 | /* store the result in 3.13 format in the destination buffer. */ | |
| 97 | *pDst++ = (q15_t) (acc0 >> 17); | |
| 98 | *pDst++ = (q15_t) (acc1 >> 17); | |
| 99 | *pDst++ = (q15_t) (acc2 >> 17); | |
| 100 | *pDst++ = (q15_t) (acc3 >> 17); | |
| 101 | ||
| 102 | /* Decrement the loop counter */ | |
| 103 | blkCnt--; | |
| 104 | } | |
| 105 | ||
| 106 | /* If the numSamples is not a multiple of 4, compute any remaining output samples here. | |
| 107 | ** No loop unrolling is used. */ | |
| 108 | blkCnt = numSamples % 0x4u; | |
| 109 | ||
| 110 | while(blkCnt > 0u) | |
| 111 | { | |
| 112 | /* C[0] = (A[0] * A[0] + A[1] * A[1]) */ | |
| 113 | in1 = *__SIMD32(pSrc)++; | |
| 114 | acc0 = __SMUAD(in1, in1); | |
| 115 | ||
| 116 | /* store the result in 3.13 format in the destination buffer. */ | |
| 117 | *pDst++ = (q15_t) (acc0 >> 17); | |
| 118 | ||
| 119 | /* Decrement the loop counter */ | |
| 120 | blkCnt--; | |
| 121 | } | |
| 122 | ||
| 123 | #else | |
| 124 | ||
| 125 | /* Run the below code for Cortex-M0 */ | |
| 126 | q15_t real, imag; /* Temporary variables to store real and imaginary values */ | |
| 127 | ||
| 128 | while(numSamples > 0u) | |
| 129 | { | |
| 130 | /* out = ((real * real) + (imag * imag)) */ | |
| 131 | real = *pSrc++; | |
| 132 | imag = *pSrc++; | |
| 133 | acc0 = (real * real); | |
| 134 | acc1 = (imag * imag); | |
| 135 | /* store the result in 3.13 format in the destination buffer. */ | |
| 136 | *pDst++ = (q15_t) (((q63_t) acc0 + acc1) >> 17); | |
| 137 | ||
| 138 | /* Decrement the loop counter */ | |
| 139 | numSamples--; | |
| 140 | } | |
| 141 | ||
| 142 | #endif /* #ifndef ARM_MATH_CM0_FAMILY */ | |
| 143 | ||
| 144 | } | |
| 145 | ||
| 146 | /** | |
| 147 | * @} end of cmplx_mag_squared group | |
| 148 | */ | |
