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| 483170 | 1 | ;******************** (C) COPYRIGHT 2016 STMicroelectronics ******************** |
| Q | 2 | ;* File Name : startup_stm32f098xx.s |
| 3 | ;* Author : MCD Application Team | |
| 4 | ;* Description : STM32F098xx devices vector table for EWARM toolchain. | |
| 5 | ;* This module performs: | |
| 6 | ;* - Set the initial SP | |
| 7 | ;* - Set the initial PC == __iar_program_start, | |
| 8 | ;* - Set the vector table entries with the exceptions ISR | |
| 9 | ;* address, | |
| 10 | ;* - Branches to main in the C library (which eventually | |
| 11 | ;* calls main()). | |
| 12 | ;* After Reset the Cortex-M0 processor is in Thread mode, | |
| 13 | ;* priority is Privileged, and the Stack is set to Main. | |
| 14 | ;******************************************************************************* | |
| 15 | ;* | |
| 16 | ;* Redistribution and use in source and binary forms, with or without modification, | |
| 17 | ;* are permitted provided that the following conditions are met: | |
| 18 | ;* 1. Redistributions of source code must retain the above copyright notice, | |
| 19 | ;* this list of conditions and the following disclaimer. | |
| 20 | ;* 2. Redistributions in binary form must reproduce the above copyright notice, | |
| 21 | ;* this list of conditions and the following disclaimer in the documentation | |
| 22 | ;* and/or other materials provided with the distribution. | |
| 23 | ;* 3. Neither the name of STMicroelectronics nor the names of its contributors | |
| 24 | ;* may be used to endorse or promote products derived from this software | |
| 25 | ;* without specific prior written permission. | |
| 26 | ;* | |
| 27 | ;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" | |
| 28 | ;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE | |
| 29 | ;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE | |
| 30 | ;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE | |
| 31 | ;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL | |
| 32 | ;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR | |
| 33 | ;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER | |
| 34 | ;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, | |
| 35 | ;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE | |
| 36 | ;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | |
| 37 | ;* | |
| 38 | ;******************************************************************************* | |
| 39 | ; | |
| 40 | ; | |
| 41 | ; The modules in this file are included in the libraries, and may be replaced | |
| 42 | ; by any user-defined modules that define the PUBLIC symbol _program_start or | |
| 43 | ; a user defined start symbol. | |
| 44 | ; To override the cstartup defined in the library, simply add your modified | |
| 45 | ; version to the workbench project. | |
| 46 | ; | |
| 47 | ; The vector table is normally located at address 0. | |
| 48 | ; When debugging in RAM, it can be located in RAM, aligned to at least 2^6. | |
| 49 | ; The name "__vector_table" has special meaning for C-SPY: | |
| 50 | ; it is where the SP start value is found, and the NVIC vector | |
| 51 | ; table register (VTOR) is initialized to this address if != 0. | |
| 52 | ; | |
| 53 | ; Cortex-M version | |
| 54 | ; | |
| 55 | ||
| 56 | MODULE ?cstartup | |
| 57 | ||
| 58 | ;; Forward declaration of sections. | |
| 59 | SECTION CSTACK:DATA:NOROOT(3) | |
| 60 | ||
| 61 | SECTION .intvec:CODE:NOROOT(2) | |
| 62 | ||
| 63 | EXTERN __iar_program_start | |
| 64 | EXTERN SystemInit | |
| 65 | PUBLIC __vector_table | |
| 66 | ||
| 67 | DATA | |
| 68 | __vector_table | |
| 69 | DCD sfe(CSTACK) | |
| 70 | DCD Reset_Handler ; Reset Handler | |
| 71 | ||
| 72 | DCD NMI_Handler ; NMI Handler | |
| 73 | DCD HardFault_Handler ; Hard Fault Handler | |
| 74 | DCD 0 ; Reserved | |
| 75 | DCD 0 ; Reserved | |
| 76 | DCD 0 ; Reserved | |
| 77 | DCD 0 ; Reserved | |
| 78 | DCD 0 ; Reserved | |
| 79 | DCD 0 ; Reserved | |
| 80 | DCD 0 ; Reserved | |
| 81 | DCD SVC_Handler ; SVCall Handler | |
| 82 | DCD 0 ; Reserved | |
| 83 | DCD 0 ; Reserved | |
| 84 | DCD PendSV_Handler ; PendSV Handler | |
| 85 | DCD SysTick_Handler ; SysTick Handler | |
| 86 | ||
| 87 | ; External Interrupts | |
| 88 | DCD WWDG_IRQHandler ; Window Watchdog | |
| 89 | DCD VDDIO2_IRQHandler ; VDDIO2 Monitor through EXTI Line 31 | |
| 90 | DCD RTC_IRQHandler ; RTC through EXTI Line | |
| 91 | DCD FLASH_IRQHandler ; FLASH | |
| 92 | DCD RCC_CRS_IRQHandler ; RCC and CRS | |
| 93 | DCD EXTI0_1_IRQHandler ; EXTI Line 0 and 1 | |
| 94 | DCD EXTI2_3_IRQHandler ; EXTI Line 2 and 3 | |
| 95 | DCD EXTI4_15_IRQHandler ; EXTI Line 4 to 15 | |
| 96 | DCD TSC_IRQHandler ; TS | |
| 97 | DCD DMA1_Ch1_IRQHandler ; DMA1 Channel 1 | |
| 98 | DCD DMA1_Ch2_3_DMA2_Ch1_2_IRQHandler ; DMA1 Channel 2 and 3 & DMA2 Channel 1 and 2 | |
| 99 | DCD DMA1_Ch4_7_DMA2_Ch3_5_IRQHandler ; DMA1 Channel 4 to 7 & DMA2 Channel 3 to 5 | |
| 100 | DCD ADC1_COMP_IRQHandler ; ADC1, COMP1 and COMP2 | |
| 101 | DCD TIM1_BRK_UP_TRG_COM_IRQHandler ; TIM1 Break, Update, Trigger and Commutation | |
| 102 | DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare | |
| 103 | DCD TIM2_IRQHandler ; TIM2 | |
| 104 | DCD TIM3_IRQHandler ; TIM3 | |
| 105 | DCD TIM6_DAC_IRQHandler ; TIM6 and DAC | |
| 106 | DCD TIM7_IRQHandler ; TIM7 | |
| 107 | DCD TIM14_IRQHandler ; TIM14 | |
| 108 | DCD TIM15_IRQHandler ; TIM15 | |
| 109 | DCD TIM16_IRQHandler ; TIM16 | |
| 110 | DCD TIM17_IRQHandler ; TIM17 | |
| 111 | DCD I2C1_IRQHandler ; I2C1 | |
| 112 | DCD I2C2_IRQHandler ; I2C2 | |
| 113 | DCD SPI1_IRQHandler ; SPI1 | |
| 114 | DCD SPI2_IRQHandler ; SPI2 | |
| 115 | DCD USART1_IRQHandler ; USART1 | |
| 116 | DCD USART2_IRQHandler ; USART2 | |
| 117 | DCD USART3_8_IRQHandler ; USART3, USART4, USART5, USART6, USART7, USART8 | |
| 118 | DCD CEC_CAN_IRQHandler ; CEC and CAN | |
| 119 | ||
| 120 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; | |
| 121 | ;; | |
| 122 | ;; Default interrupt handlers. | |
| 123 | ;; | |
| 124 | THUMB | |
| 125 | ||
| 126 | PUBWEAK Reset_Handler | |
| 127 | SECTION .text:CODE:NOROOT:REORDER(2) | |
| 128 | Reset_Handler | |
| 129 | LDR R0, =SystemInit | |
| 130 | BLX R0 | |
| 131 | LDR R0, =__iar_program_start | |
| 132 | BX R0 | |
| 133 | ||
| 134 | PUBWEAK NMI_Handler | |
| 135 | SECTION .text:CODE:NOROOT:REORDER(1) | |
| 136 | NMI_Handler | |
| 137 | B NMI_Handler | |
| 138 | ||
| 139 | PUBWEAK HardFault_Handler | |
| 140 | SECTION .text:CODE:NOROOT:REORDER(1) | |
| 141 | HardFault_Handler | |
| 142 | B HardFault_Handler | |
| 143 | ||
| 144 | PUBWEAK SVC_Handler | |
| 145 | SECTION .text:CODE:NOROOT:REORDER(1) | |
| 146 | SVC_Handler | |
| 147 | B SVC_Handler | |
| 148 | ||
| 149 | PUBWEAK PendSV_Handler | |
| 150 | SECTION .text:CODE:NOROOT:REORDER(1) | |
| 151 | PendSV_Handler | |
| 152 | B PendSV_Handler | |
| 153 | ||
| 154 | PUBWEAK SysTick_Handler | |
| 155 | SECTION .text:CODE:NOROOT:REORDER(1) | |
| 156 | SysTick_Handler | |
| 157 | B SysTick_Handler | |
| 158 | ||
| 159 | PUBWEAK WWDG_IRQHandler | |
| 160 | SECTION .text:CODE:NOROOT:REORDER(1) | |
| 161 | WWDG_IRQHandler | |
| 162 | B WWDG_IRQHandler | |
| 163 | ||
| 164 | PUBWEAK VDDIO2_IRQHandler | |
| 165 | SECTION .text:CODE:NOROOT:REORDER(1) | |
| 166 | VDDIO2_IRQHandler | |
| 167 | B VDDIO2_IRQHandler | |
| 168 | ||
| 169 | PUBWEAK RTC_IRQHandler | |
| 170 | SECTION .text:CODE:NOROOT:REORDER(1) | |
| 171 | RTC_IRQHandler | |
| 172 | B RTC_IRQHandler | |
| 173 | ||
| 174 | PUBWEAK FLASH_IRQHandler | |
| 175 | SECTION .text:CODE:NOROOT:REORDER(1) | |
| 176 | FLASH_IRQHandler | |
| 177 | B FLASH_IRQHandler | |
| 178 | ||
| 179 | PUBWEAK RCC_CRS_IRQHandler | |
| 180 | SECTION .text:CODE:NOROOT:REORDER(1) | |
| 181 | RCC_CRS_IRQHandler | |
| 182 | B RCC_CRS_IRQHandler | |
| 183 | ||
| 184 | PUBWEAK EXTI0_1_IRQHandler | |
| 185 | SECTION .text:CODE:NOROOT:REORDER(1) | |
| 186 | EXTI0_1_IRQHandler | |
| 187 | B EXTI0_1_IRQHandler | |
| 188 | ||
| 189 | PUBWEAK EXTI2_3_IRQHandler | |
| 190 | SECTION .text:CODE:NOROOT:REORDER(1) | |
| 191 | EXTI2_3_IRQHandler | |
| 192 | B EXTI2_3_IRQHandler | |
| 193 | ||
| 194 | PUBWEAK EXTI4_15_IRQHandler | |
| 195 | SECTION .text:CODE:NOROOT:REORDER(1) | |
| 196 | EXTI4_15_IRQHandler | |
| 197 | B EXTI4_15_IRQHandler | |
| 198 | ||
| 199 | PUBWEAK TSC_IRQHandler | |
| 200 | SECTION .text:CODE:NOROOT:REORDER(1) | |
| 201 | TSC_IRQHandler | |
| 202 | B TSC_IRQHandler | |
| 203 | ||
| 204 | PUBWEAK DMA1_Ch1_IRQHandler | |
| 205 | SECTION .text:CODE:NOROOT:REORDER(1) | |
| 206 | DMA1_Ch1_IRQHandler | |
| 207 | B DMA1_Ch1_IRQHandler | |
| 208 | ||
| 209 | PUBWEAK DMA1_Ch2_3_DMA2_Ch1_2_IRQHandler | |
| 210 | SECTION .text:CODE:NOROOT:REORDER(1) | |
| 211 | DMA1_Ch2_3_DMA2_Ch1_2_IRQHandler | |
| 212 | B DMA1_Ch2_3_DMA2_Ch1_2_IRQHandler | |
| 213 | ||
| 214 | PUBWEAK DMA1_Ch4_7_DMA2_Ch3_5_IRQHandler | |
| 215 | SECTION .text:CODE:NOROOT:REORDER(1) | |
| 216 | DMA1_Ch4_7_DMA2_Ch3_5_IRQHandler | |
| 217 | B DMA1_Ch4_7_DMA2_Ch3_5_IRQHandler | |
| 218 | ||
| 219 | PUBWEAK ADC1_COMP_IRQHandler | |
| 220 | SECTION .text:CODE:NOROOT:REORDER(1) | |
| 221 | ADC1_COMP_IRQHandler | |
| 222 | B ADC1_COMP_IRQHandler | |
| 223 | ||
| 224 | PUBWEAK TIM1_BRK_UP_TRG_COM_IRQHandler | |
| 225 | SECTION .text:CODE:NOROOT:REORDER(1) | |
| 226 | TIM1_BRK_UP_TRG_COM_IRQHandler | |
| 227 | B TIM1_BRK_UP_TRG_COM_IRQHandler | |
| 228 | ||
| 229 | PUBWEAK TIM1_CC_IRQHandler | |
| 230 | SECTION .text:CODE:NOROOT:REORDER(1) | |
| 231 | TIM1_CC_IRQHandler | |
| 232 | B TIM1_CC_IRQHandler | |
| 233 | ||
| 234 | PUBWEAK TIM2_IRQHandler | |
| 235 | SECTION .text:CODE:NOROOT:REORDER(1) | |
| 236 | TIM2_IRQHandler | |
| 237 | B TIM2_IRQHandler | |
| 238 | ||
| 239 | PUBWEAK TIM3_IRQHandler | |
| 240 | SECTION .text:CODE:NOROOT:REORDER(1) | |
| 241 | TIM3_IRQHandler | |
| 242 | B TIM3_IRQHandler | |
| 243 | ||
| 244 | PUBWEAK TIM6_DAC_IRQHandler | |
| 245 | SECTION .text:CODE:NOROOT:REORDER(1) | |
| 246 | TIM6_DAC_IRQHandler | |
| 247 | B TIM6_DAC_IRQHandler | |
| 248 | ||
| 249 | PUBWEAK TIM7_IRQHandler | |
| 250 | SECTION .text:CODE:NOROOT:REORDER(1) | |
| 251 | TIM7_IRQHandler | |
| 252 | B TIM7_IRQHandler | |
| 253 | ||
| 254 | PUBWEAK TIM14_IRQHandler | |
| 255 | SECTION .text:CODE:NOROOT:REORDER(1) | |
| 256 | TIM14_IRQHandler | |
| 257 | B TIM14_IRQHandler | |
| 258 | ||
| 259 | PUBWEAK TIM15_IRQHandler | |
| 260 | SECTION .text:CODE:NOROOT:REORDER(1) | |
| 261 | TIM15_IRQHandler | |
| 262 | B TIM15_IRQHandler | |
| 263 | ||
| 264 | PUBWEAK TIM16_IRQHandler | |
| 265 | SECTION .text:CODE:NOROOT:REORDER(1) | |
| 266 | TIM16_IRQHandler | |
| 267 | B TIM16_IRQHandler | |
| 268 | ||
| 269 | PUBWEAK TIM17_IRQHandler | |
| 270 | SECTION .text:CODE:NOROOT:REORDER(1) | |
| 271 | TIM17_IRQHandler | |
| 272 | B TIM17_IRQHandler | |
| 273 | ||
| 274 | PUBWEAK I2C1_IRQHandler | |
| 275 | SECTION .text:CODE:NOROOT:REORDER(1) | |
| 276 | I2C1_IRQHandler | |
| 277 | B I2C1_IRQHandler | |
| 278 | ||
| 279 | PUBWEAK I2C2_IRQHandler | |
| 280 | SECTION .text:CODE:NOROOT:REORDER(1) | |
| 281 | I2C2_IRQHandler | |
| 282 | B I2C2_IRQHandler | |
| 283 | ||
| 284 | PUBWEAK SPI1_IRQHandler | |
| 285 | SECTION .text:CODE:NOROOT:REORDER(1) | |
| 286 | SPI1_IRQHandler | |
| 287 | B SPI1_IRQHandler | |
| 288 | ||
| 289 | PUBWEAK SPI2_IRQHandler | |
| 290 | SECTION .text:CODE:NOROOT:REORDER(1) | |
| 291 | SPI2_IRQHandler | |
| 292 | B SPI2_IRQHandler | |
| 293 | ||
| 294 | PUBWEAK USART1_IRQHandler | |
| 295 | SECTION .text:CODE:NOROOT:REORDER(1) | |
| 296 | USART1_IRQHandler | |
| 297 | B USART1_IRQHandler | |
| 298 | ||
| 299 | PUBWEAK USART2_IRQHandler | |
| 300 | SECTION .text:CODE:NOROOT:REORDER(1) | |
| 301 | USART2_IRQHandler | |
| 302 | B USART2_IRQHandler | |
| 303 | ||
| 304 | PUBWEAK USART3_8_IRQHandler | |
| 305 | SECTION .text:CODE:NOROOT:REORDER(1) | |
| 306 | USART3_8_IRQHandler | |
| 307 | B USART3_8_IRQHandler | |
| 308 | ||
| 309 | PUBWEAK CEC_CAN_IRQHandler | |
| 310 | SECTION .text:CODE:NOROOT:REORDER(1) | |
| 311 | CEC_CAN_IRQHandler | |
| 312 | B CEC_CAN_IRQHandler | |
| 313 | ||
| 314 | END | |
| 315 | ;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE***** | |
